Methods, apparatus, computer equipment, and storage media for inspecting circuit layouts.

Abstract

This invention relates to a method, apparatus, computer device, and storage medium for inspecting circuit layouts, and pertains to the field of circuit layout design technology. This method, by comprehensively inspecting the circuit layout based on information from both functional items and physical points, achieves more accurate inspections and reduces wasted layout area. Furthermore, the increased accuracy improves the effective utilization rate of the circuit layout area, reduces unnecessary layout and wiring, saves on process and manpower optimization costs, and avoids some difficult-to-detect electrical and yield problems caused by inappropriate circuit settings.

Description

Technical Field

[0001] This application relates to the field of circuit layout design technology, and in particular to a method, apparatus, computer device, and storage medium for inspecting circuit layouts. Background Technology

[0002] In advanced process chips, circuit-related design rules become increasingly complex, and defining and identifying various circuit information becomes more and more important.

[0003] A lack of accurate circuit information may lead to problems such as excessively close spacing between high-voltage connections and incorrect component layout, causing additional capacitive and inductive coupling in the circuit, affecting chip stability, and in severe cases, even causing irreversible circuit damage such as short circuits and breakdowns. Summary of the Invention

[0004] Therefore, it is necessary to provide a method, apparatus, computer device, and storage medium for inspecting circuit layouts to address the problem of how to accurately define circuit information.

[0005] To achieve the above objectives, in one aspect, the present invention provides a method for inspecting circuit layouts, comprising:

[0006] Obtain circuit information from the circuit diagram;

[0007] Based on the circuit information in the circuit diagram, the information of the functional items and the information of the physical point items are marked on the corresponding circuit structure in the circuit layout.

[0008] Extract valid information from the information of the functional items, and extract valid information from the information of the physical point items;

[0009] If the valid information of the functional items and the valid information of the physical point items both conform to the preset design rules of the circuit layout, the circuit structure of the circuit layout is confirmed to be accurate.

[0010] In one embodiment, the step of determining the information of circuit marker functional items and physical point items in the corresponding circuit layout based on the circuit information in the circuit diagram includes:

[0011] Extract at least a portion of the information of the physical point items from the circuit information;

[0012] Based on the circuit information in the circuit diagram, supplement the information of the functional items.

[0013] In one embodiment, after extracting at least a portion of the physical point item information from the circuit information, the method further includes:

[0014] Based on the circuit information in the circuit diagram, supplement the information of another part of the physical point items.

[0015] In one embodiment, the step of extracting valid information from the information of the functional items, and after extracting valid information from the information of the physical point items, includes:

[0016] If the valid information of the functional item and / or the valid information of the physical point item does not conform to the preset design rules of the circuit layout, the circuit structure of the circuit layout is adjusted to match the circuit diagram, and the information of the functional item and the information of the physical point item are re-marked.

[0017] In one embodiment, the information used to mark the functional items in the circuit layout includes:

[0018] The circuit structure is labeled with category information, first voltage information, and region information respectively;

[0019] The information used to mark the physical point items in the circuit layout includes:

[0020] The circuit structure is labeled with group information, second voltage information, special point information, and power supply information respectively.

[0021] In one embodiment, an alarm is triggered when multiple areas of information are marked at the same location on the circuit layout.

[0022] On the other hand, this application also provides a circuit layout inspection device, comprising:

[0023] The acquisition module is used to acquire circuit information from the circuit diagram;

[0024] The marking module is used to mark the information of functional items and physical point items of the circuit structure in the corresponding circuit layout based on the circuit information in the circuit diagram.

[0025] The extraction module is used to extract valid information from the information of the functional items and to extract valid information from the information of the physical point items.

[0026] The judgment module is used to confirm the accuracy of the circuit structure of the circuit layout if the valid information of the functional items and the valid information of the physical point items both conform to the preset design rules of the circuit layout.

[0027] This application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of any of the methods described above.

[0028] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the methods described above.

[0029] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the methods described above.

[0030] This application provides a method, apparatus, computer device, and storage medium for inspecting circuit layouts. First, circuit information from the circuit diagram is acquired. Then, circuits in the corresponding circuit layout are marked based on the circuit information in the circuit diagram. The marked information includes functional item information and physical point item information. Next, valid information from the functional item information and physical point item information is extracted, and it is determined whether the valid information of the functional item information and physical point item information meets the preset design rules of the circuit layout. Because the circuit layout is inspected comprehensively based on the functional item information and physical point item information, the inspection is more accurate and reduces wasted layout area. Furthermore, due to the more accurate inspection, the effective utilization rate of the circuit layout area is improved, unnecessary layout and wiring are reduced, process and manpower optimization costs are saved, and some difficult-to-detect electrical and yield problems caused by inappropriate circuit settings are avoided. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 A schematic diagram of an existing circuit design;

[0033] Figure 2 A schematic diagram of an alternative existing circuit design;

[0034] Figure 3 This is a flowchart illustrating a method for inspecting a circuit layout according to an embodiment of this application.

[0035] Figure 4 A schematic diagram of a marking provided for an embodiment of this application;

[0036] Figure 5 Another schematic diagram of markings provided for embodiments of this application;

[0037] Figure 6 This is another schematic diagram of a marking provided for an embodiment of this application. Detailed Implementation

[0038] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0040] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0041] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0042] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0043] Based on the background information, let's take the spacing design of circuits with different voltages as an example. (Reference) Figure 1 , Figure 1 This is a schematic diagram of an existing circuit design. A common solution is to maintain the spacing between the circuits at a fixed value S1', ensuring that even if the voltage difference between them reaches the maximum value of the circuit design, it will not have an impact. However, this results in the spacing still being defined as S1' even when the voltage difference ΔV2' is less than the voltage difference ΔV1', causing additional wiring, further increasing complexity and wasting chip area. It also adds extra work to post-design performance simulation and debugging.

[0044] Furthermore, refer to Figure 2 , Figure 2 This is a schematic diagram of another existing circuit design; generally, the spacing is defined according to the low-voltage region LV, the medium-voltage region MV, and the high-voltage region HV, such as... Figure 2 As shown, in the low-voltage region LV, the voltage difference ΔV1 is set with a spacing of S1, and in the medium-voltage region MV, the voltage difference ΔV2 is set with a spacing of S2, which does not waste spacing. However, it is obvious that in high-order process chips, there is more voltage information, and it cannot be simply divided into three categories. Moreover, even within the high-voltage region HV, the voltage differences between circuits are not all the same. For example, within the same high-voltage region HV, the voltage difference ΔV3 is greater than the voltage difference ΔV4. In this case, setting the spacing of the circuit with voltage difference ΔV4 to S3 would waste circuit layout area.

[0045] Based on this, this application provides a method, apparatus, computer device, and storage medium for inspecting circuit layouts. First, circuit information from the circuit diagram is acquired. Then, circuits in the corresponding circuit layout are marked based on the circuit information in the circuit diagram. The marked information includes functional item information and physical point item information. Next, valid information from the functional item information and physical point item information is extracted, and it is determined whether the valid information of the functional item information and physical point item information meets the preset design rules of the circuit layout. Because the circuit layout is inspected comprehensively based on the functional item information and physical point item information, the inspection is more accurate and reduces wasted layout area. Furthermore, due to the more accurate inspection, the effective utilization rate of the circuit layout area is improved, unnecessary layout and wiring are reduced, process and manpower optimization costs are saved, and some difficult-to-detect electrical and yield problems caused by inappropriate circuit settings are avoided.

[0046] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, this application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0047] refer to Figure 3 , Figure 3 This application provides a schematic flowchart of a method for inspecting a circuit layout, including the following steps:

[0048] Step S10: Obtain circuit information from the circuit diagram.

[0049] The acquired circuit information includes, but is not limited to, component parameter information, pin information, circuit connection relationship information, circuit routing information, functional information, and node information. For example, in some embodiments, the parameter information, pin information, and functional information of a component can be obtained from a single component in the circuit diagram. It should be noted that the circuit information can be acquired automatically using computer software, specifically Electronic Design Automation (EDA) tools, which can then convert the circuit diagram into a circuit layout.

[0050] Step S20: Based on the circuit information in the circuit diagram, mark the information of the functional items and the physical point items in the corresponding circuit layout.

[0051] Circuit layout design is based on circuit diagrams. The information in the circuit layout corresponds to that in the circuit diagram. Therefore, information is marked on the circuits in the circuit layout based on the circuit information in the circuit diagram. For example, if a lamp component is included in the circuit diagram, and the lamp component may include positive and negative pins, then the information of those two pins can be marked at the lamp component location on the circuit layout. If the lamp component operates at 5V, then the circuit layout can be marked with "5V". Other components are marked similarly, and different circuits are also marked. Marking information on functional items and physical points can cover more circuit information, making the circuit information determined during inspection more accurate.

[0052] Step S30: Extract valid information from the information of the functional items and extract valid information from the information of the physical point items.

[0053] Specifically, after marking the information of functional items and physical point items, valid information can be extracted for subsequent judgment.

[0054] For example, if a circuit line is relatively long and has two different functional components connected to it, the first functional component is labeled with a 5V voltage, and the second functional component is labeled with a 6V voltage, then in order to ensure the circuit operates, the circuit line needs a larger 6V voltage as the valid information in the functional item information.

[0055] Alternatively, to determine how many different devices are connected to a circuit, one can obtain the physical point items marked on the circuit line. For example, if information on 7 physical point items is obtained, and 3 of the 7 items are identical, then it can be determined that there are 5 different devices on the circuit. In this case, having 5 different devices on the circuit is considered valid information among the physical point items. Similarly, the maximum, minimum, or average value can be determined, and the necessary valid information can be extracted.

[0056] Relevant information can be extracted using computer software. It should be noted that the extracted relevant information may include, but is not limited to, voltage, power supply, and category information. Extracting relevant information is more helpful in determining the accuracy of the circuit layout.

[0057] Step S40: If the valid information of the functional items and the valid information of the physical point items both conform to the preset design rules of the circuit layout, confirm that the circuit structure of the circuit layout is accurate.

[0058] The preset design rules for circuit layout include, but are not limited to, geometric rules, electrical rules, and process rules, and these preset design rules can be set according to the manufacturer's needs.

[0059] Preset design rules can specify minimum spacing for different voltage differences and set arrangement rules between devices with different voltages, tailored to local conditions. This maximizes the rational use of chip space while ensuring the accuracy and stability of electrical functions.

[0060] If the valid information of both the functional items and the physical point items conforms to the preset design rules of the circuit layout, then the circuit layout can be determined to be accurate.

[0061] In some embodiments, for example, if a preset design rule stipulates that the voltage in a certain area is not allowed to exceed 5V, then it can be determined whether the voltage-related information in the valid information of the functional items and the valid information of the physical point items in that area exceeds 5V. For example, if there are 4 voltage information in that area, these 4 voltage information are compared with the preset design rule. When none of these 4 voltage information exceeds 5V, it is confirmed that the circuit structure of the circuit layout in that area is accurate.

[0062] Alternatively, for example, if a pre-defined design rule stipulates that when the voltage difference between two circuit lines exceeds 6V, the distance between these two circuit lines should not be less than 3. Then, first, based on the valid information of the functional items and physical points, determine whether the voltage difference between the two circuit lines exceeds 6V. If the voltage difference exceeds 6V, then determine whether the distance between the two circuit lines is less than 3. If the distance is not less than 3, then the circuit structure of these two circuit lines on the circuit layout is confirmed to be accurate. Of course, the distance can be determined first, and then the voltage difference can be determined, without a specific limitation.

[0063] In some embodiments, the first circuit line has a first typical voltage and the second circuit line has a second typical voltage. A preset design rule can specify that the voltage difference between the two circuit lines is the first typical voltage minus the absolute value of the second typical voltage.

[0064] In some embodiments, when the circuit uses alternating current, the typical voltage on the circuit will have a maximum value and a minimum value. The maximum value of the typical voltage of the first circuit line minus the minimum value of the typical voltage of the second circuit line is the first difference value, and the maximum value of the typical voltage of the second circuit line minus the minimum value of the typical voltage of the first circuit line is the second difference value. The preset design rules can specify that the voltage difference between the two circuit lines is the larger of the first difference value and the second difference value.

[0065] In some embodiments, the typical voltage of the first circuit line includes a first maximum value, a first minimum value, and a first intermediate value, and the typical voltage of the second circuit line includes a second maximum value, a second minimum value, and a second intermediate value. A preset design rule can specify that the voltage difference between the two circuit lines is the absolute value of the first intermediate value minus the second intermediate value.

[0066] In this embodiment, the largest voltage difference between two adjacent circuit lines is selected as the distance judgment value between the two lines.

[0067] It should be noted that the above is only an example. In actual comparison and inspection, different preset design rules can be used to check and traverse all markers.

[0068] In this embodiment, when both the valid information of the functional items and the valid information of the physical point items conform to the preset design rules, the circuit structure of the circuit layout is checked based on a comprehensive analysis of the information of both functional items and physical point items. Therefore, the check is more accurate, reducing wasted layout area. Furthermore, the more accurate check improves the effective utilization rate of the circuit layout area, reduces unnecessary layout and wiring, saves process and manpower optimization costs, and avoids some difficult-to-detect electrical and yield problems caused by inappropriate circuit settings.

[0069] This method can also be used to identify and inspect more objects, such as the spacing between objects with different pressure differences, the classification of different voltage devices to different regions, and the accuracy of voltage information settings.

[0070] In another embodiment of this application, step S20 includes:

[0071] Step S201: Extract information on at least some physical point items from the circuit information.

[0072] Specifically, information about physical points can be marked in the circuit diagram beforehand. This can be information about all physical points or only a portion of them, which is then retrieved simultaneously when the circuit information is acquired. When marking the circuit layout, the marked physical point information can be extracted from the circuit information first.

[0073] Step S202: Based on the circuit information in the circuit diagram, supplement the information of the marked functional items.

[0074] The information of the marked physical point items can be used directly in the circuit layout. Then, based on the circuit information in the circuit layout, the information of the marked functional items can be added so that all the information in the circuit layout is marked.

[0075] In this embodiment, the information of the physical point items is first marked in the circuit diagram. Since the circuit connection relationship is clearer, marking and modification are more convenient.

[0076] In another embodiment of this application, after step S201, the method further includes:

[0077] Based on the circuit information in the circuit diagram, supplement and mark the information of another part of the physical point items.

[0078] Specifically, when marking the information of physical point items in a circuit diagram, some physical point items may be omitted. In this case, the remaining physical point items can be marked based on the circuit information in the circuit diagram.

[0079] In this embodiment, supplementing the information of the physical point items can avoid omissions and ensure the accuracy of subsequent circuit layout confirmation.

[0080] In another embodiment of this application, after step S30, the following is included:

[0081] If the valid information of functional items and / or physical point items does not conform to the preset design rules of the circuit layout, the circuit structure of the circuit layout is adjusted to match the circuit diagram, and the information of functional items and physical point items is re-marked.

[0082] When one or both of the valid information of the functional items and the valid information of the physical point items do not conform to the preset design rules of the circuit layout, it can be considered that the circuit in the circuit layout does not match the circuit diagram. At this time, the circuit structure of the circuit layout can be adjusted to match the circuit in the circuit diagram, and then remarked. After the marking is completed, continue to steps S30 and S40 to confirm the accuracy of the circuit in the circuit layout.

[0083] It should be noted that the judgment is based on a comprehensive assessment of both the valid information of the functional items and the valid information of the physical point items. If either of these two pieces of information does not conform to the preset design rules, a comprehensive judgment cannot be made. Therefore, if one or both of the information of the functional items and the information of the physical point items do not conform, the circuit layout must be adjusted, that is, the circuit information of the circuit layout must be adjusted.

[0084] In this embodiment, adjusting the circuit of the circuit board diagram allows the circuit in the circuit layout to match the circuit in the circuit diagram, enabling faster layout design.

[0085] In another embodiment of this application, the information for marking functional items in the circuit structure of the circuit layout includes:

[0086] The circuit is labeled with category information, first voltage information, and region information respectively;

[0087] Information for marking physical points in the circuit layout includes:

[0088] The circuit is labeled with group information, second voltage information, special point information, and power supply information.

[0089] Specifically, the labeling of functional items includes: classifying the circuit lines on the circuit board diagram, then labeling the category information, and performing special processing on the circuit lines according to the corresponding category during synthesis.

[0090] The first voltage information can be a typical voltage, including various reference voltages, such as ground voltage, rated voltage, etc.

[0091] The circuit lines on the circuit board diagram are divided into regions, such as high-voltage, medium-voltage, and low-voltage regions, and then the region information is marked. Special regions can also be marked according to specific requirements, and the region information will be specially processed during synthesis. It should be noted that the information for functional items includes, but is not limited to, category information, first voltage information, and region information.

[0092] The information marking for physical point projects includes: marking secondary voltage information on the circuit layout. This secondary voltage information can be special voltage information, which is often higher or lower than the safe voltage range. Marking ensures circuit safety and facilitates debugging and maintenance. Furthermore, marking special voltages ensures that designers correctly allocate and handle voltages during the design process, avoiding design errors caused by voltage issues. For example, there may be pins in the circuit that are connected to external circuits. The voltage at these pins can be the operating voltage of the entire circuit, and therefore relatively high; such voltages can be marked as special voltages.

[0093] Marking specific points in special locations on the circuit layout allows for the implementation of special functions during synthesis. For example, marking test locations or power supply connection points can quickly identify test locations or pinpoint faults.

[0094] Marking power supply or ground locations in the circuit layout with power information allows operators and maintenance personnel to clearly understand the voltage range that each physical point can withstand, preventing damage to electronic components due to incorrect connection of excessive voltage. Clear power information ensures that each component receives the correct power supply, ensuring the normal operation of the circuit.

[0095] Classifying physical points into groups and labeling them with group information in a circuit layout allows designers to handle different parts of the circuit more systematically. It should be noted that the information for physical point items includes, but is not limited to, group information, secondary voltage information, special point information, and power supply information.

[0096] refer to Figure 4 , Figure 4This is a schematic diagram of a marking provided in an embodiment of this application. Five types of information are marked on the circuit line, including three different voltage values: second voltage information PV-1, first voltage information FV-2, and first voltage information FV-3. Additionally, there is category information FC-1 and special point information PS-1. After extracting the valid information from these five markings, the accuracy of the circuit line is determined by comprehensively judging whether its information conforms to preset design rules.

[0097] For example, a preset design rule for this circuit line is that the first voltage information on the circuit line is not less than 5V. In this case, the first voltage information FV-2 and FV-3 obtained by marking are compared with the preset design rule to determine if they are greater than 5V. If they are greater than 5V, they conform to the preset design rule; if they are less than 5V, they do not conform to the preset design rule. It can be considered that the circuit line in the circuit layout does not match the circuit diagram. In this case, the circuit structure of the circuit layout can be adjusted to match the circuit lines in the circuit layout, and then the marking is repeated. After marking is completed, steps S30 and S40 are continued to confirm the accuracy of the circuit layout.

[0098] Alternatively, for example, another preset design rule for this circuit line is that the second voltage information on the circuit line is not less than 4V. The second voltage information PV-1 obtained by marking is compared with the preset design rule to determine if it is not less than 4V. If it is less than 4V, it does not conform to the preset design rule, and it can be considered that the circuit line in the circuit layout does not match the circuit diagram. In this case, the circuit structure of the circuit layout can be adjusted to match the circuit lines in the circuit layout, and then the marking is re-done. After marking is completed, steps S30 and S40 are continued to confirm the accuracy of the circuit in the circuit layout.

[0099] Furthermore, another preset design rule for this circuit line is that the category information FC-1 on this circuit line is greater than the normal value by 2V. Therefore, when checking whether the voltage value meets the rule, it needs to be 2V greater than the specified value. The calibration value of the first voltage information FV on this circuit line is at least 7V, and the calibration value of the second voltage information PV is at least 6V in order to meet the category information design rule.

[0100] It should be noted that this circuit line is only an example. In an actual layout, the circuit line may be longer, and multiple components may be on the circuit line to perform different functions. Therefore, multiple first voltage information can be marked, for example... Figure 4The circuit is marked with first voltage information FV-2 and first voltage information FV-3. If the first voltage information FV-2 is 5V and the first voltage information FV-3 is 6V, then the larger first voltage information FV-3 can be used as the valid information of the circuit.

[0101] refer to Figure 5 , Figure 5 This is another schematic diagram of marking provided in an embodiment of this application; it includes a first circuit line and a second circuit line. The first circuit line is marked with four types of information, including second voltage information PV-1, group information PG-1, first voltage information FV-1, and category information FC-2. The second circuit line is marked with five types of markings, including power information PP-1, second voltage information PV-2, group information PG-1, category information FC-2, and first voltage information FV-1. Both the first and second circuit lines have category information FC-2, meaning that even if the first and second circuit lines do not belong to the same network, they can be classified as being in the same category. The second circuit line is connected to a first device D-1, which is marked with area information FR-1. The specific requirements of this area information need to be considered during synthesis processing.

[0102] In some embodiments, there may be multiple voltage value markings on a circuit line, but the preset design rules can set a limited number of specific voltage values ​​on a circuit, such as only one voltage value or two voltage values. In the case of multiple voltage values, the maximum value, minimum value, or the difference between the maximum and minimum values, the average value, etc. can be taken, all of which can be set according to the preset design rules. Then, the voltage difference between the two lines is compared.

[0103] For example, if the preset design rule states that circuits with category information FC-2 belong to the same network, and both the first and second circuit lines are labeled with category information FC-2, then the first and second circuit lines belong to the same network. Of course, the individual information of each circuit can also be determined separately.

[0104] In this embodiment, marking information about functional items and physical point items can improve the readability of the circuit and make debugging easier.

[0105] In another embodiment of this application, reference is made to Figure 6 , Figure 6 This is another marking diagram provided in the embodiments of this application; when multiple area information is marked at the same location on the circuit layout, an alarm is triggered.

[0106] Specifically, there may be multiple layers of different circuit lines at the same location in a circuit layout, such as the third circuit line and the fourth circuit line. The third circuit line is marked with power information PP-1, and the fourth circuit line is marked with special point information PS-1. Since the circuit lines of different layers overlap at the same location, different circuit lines at the same location will have different area information, such as area information FR-1 and area information FR-2. When multiple area information is marked at a location in a circuit layout, an alarm can be triggered so that the designer can pay attention and take special measures.

[0107] In this embodiment, when multiple area information is marked at the same location on the circuit layout, alarm processing can better troubleshoot and perform maintenance.

[0108] It should be noted that the marking method used in this application, which is based on a comprehensive consideration of information from both functional items and physical points, results in a more accurate circuit layout and increased precision. Furthermore, the more accurate inspection improves the effective utilization of the circuit layout area, reduces unnecessary layout and wiring, saves on process and manpower optimization costs, and avoids some difficult-to-detect electrical and yield problems caused by inappropriate circuit settings.

[0109] In another embodiment of this application, a circuit layout inspection device is also provided, comprising: an acquisition module, a marking module, an extraction module, and a judgment module, wherein:

[0110] The acquisition module is used to acquire circuit information from the circuit diagram;

[0111] The marking module is used to mark the information of functional items and physical point items of the circuit structure in the corresponding circuit layout based on the circuit information in the circuit diagram.

[0112] The extraction module is used to extract valid information from the information of the functional items and to extract valid information from the information of the physical point items.

[0113] The judgment module is used to confirm the accuracy of the circuit structure of the circuit layout if the valid information of both the functional items and the physical point items conform to the preset design rules of the circuit layout.

[0114] Specifically, the information acquired includes, but is not limited to, component parameter information, pin information, circuit connection information, circuit routing information, functional information, and node information. It should be noted that circuit information can be acquired automatically using computer software.

[0115] The circuit layout design is based on the circuit diagram. The information of the circuits in the circuit layout corresponds to that in the circuit diagram. Therefore, the circuits in the circuit layout are marked with information based on the circuit information in the circuit diagram. Marking the information of functional items and physical point items can cover more circuit information, making the circuit information determined during inspection more accurate.

[0116] Valid information can be extracted using computer software. It should be noted that the extracted valid information can include, but is not limited to, voltage and power supply information. Extracting valid information is more helpful in determining the accuracy of the circuit layout.

[0117] The preset design rules for circuit layout include, but are not limited to, geometric rules, electrical rules, and process rules, and these preset design rules can be set according to the manufacturer's needs.

[0118] Preset design rules can specify minimum spacing for different voltage differences and set arrangement rules between devices with different voltages, tailored to local conditions. This maximizes the rational use of chip space while ensuring the accuracy and stability of electrical functions.

[0119] In this embodiment, when both the valid information of the functional items and the valid information of the physical point items conform to the preset design rules, the circuit layout is checked based on a comprehensive analysis of both information, resulting in more accurate checks and reduced waste of layout area. Furthermore, the increased accuracy of the checks improves the effective utilization of the circuit layout area, reduces unnecessary layout and wiring, saves on process and manpower optimization costs, and avoids some difficult-to-detect electrical and yield problems caused by inappropriate circuit settings.

[0120] In another embodiment of this application, the marking module includes:

[0121] The first sub-extraction module is used to extract information about at least a portion of the physical point items from the circuit information.

[0122] The first sub-marking module is used to supplement the marking information of functional items based on the circuit information in the circuit diagram.

[0123] In another embodiment of this application, the marking module further includes:

[0124] The second sub-marking module is used to supplement the marking of information for another part of the physical point items based on the circuit information in the circuit diagram.

[0125] In another embodiment of this application, the circuit layout inspection apparatus further includes:

[0126] The adjustment module is used to adjust the circuit structure of the circuit layout to match the circuit diagram when the valid information of the functional items and / or the valid information of the physical point items does not conform to the preset design rules of the circuit layout, and to re-mark the information of the functional items and the information of the physical point items.

[0127] In another embodiment of this application, the circuit layout inspection apparatus further includes:

[0128] The alarm module is used to trigger an alarm when multiple area information is marked at the same location on the circuit layout.

[0129] For specific limitations on the inspection equipment for circuit layouts, please refer to the limitations on the inspection methods for circuit layouts mentioned above, which will not be repeated here.

[0130] Each module in the circuit layout inspection device described above can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware within or independently of the processor in a computer device, or stored in software within the memory of the computer device, so that the processor can call and execute the operations corresponding to each module.

[0131] In another embodiment of this application, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0132] In another embodiment of this application, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps in the above-described method embodiments.

[0133] In another embodiment of this application, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.

[0134] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0135] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0136] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for inspecting circuit layouts, characterized in that, include: Obtain circuit information from the circuit diagram; Based on the circuit information in the circuit diagram, the information of the functional items and the information of the physical point items are marked on the corresponding circuit structure in the circuit layout. Extract valid information from the information of the functional items, and extract valid information from the information of the physical point items; If the valid information of the functional items and the valid information of the physical point items both conform to the preset design rules of the circuit layout, the circuit structure of the circuit layout is confirmed to be accurate. The step of marking functional items and physical point items of the circuit structure in the corresponding circuit layout based on the circuit information in the circuit diagram includes: Extract at least a portion of the information of the physical point items from the circuit information; Based on the circuit information in the circuit diagram, supplement and mark the information of another part of the physical point items; Based on the circuit information in the circuit diagram, supplement the information of the functional items.

2. The inspection method according to claim 1, characterized in that, After extracting valid information from the information of the functional items and from the information of the physical point items, the process includes: If the valid information of the functional item and / or the valid information of the physical point item does not conform to the preset design rules of the circuit layout, the circuit structure of the circuit layout is adjusted to match the circuit diagram, and the information of the functional item and the information of the physical point item are re-marked.

3. The inspection method according to claim 1, characterized in that, The information used to label the functional items in the circuit layout includes: The circuit structure is labeled with category information, first voltage information, and region information respectively; The information used to mark the physical point items in the circuit layout includes: The circuit structure is labeled with group information, second voltage information, special point information, and power supply information respectively.

4. The inspection method according to claim 3, characterized in that, An alarm is triggered when multiple areas are marked at the same location on the circuit layout.

5. A circuit layout inspection device, characterized in that, include: The acquisition module is used to acquire circuit information from the circuit diagram; The marking module is used to mark the information of functional items and physical point items of the circuit structure in the corresponding circuit layout based on the circuit information in the circuit diagram. The extraction module is used to extract valid information from the information of the functional items and to extract valid information from the information of the physical point items. The judgment module is used to confirm the accuracy of the circuit structure of the circuit layout when both the valid information of the functional items and the valid information of the physical point items conform to the preset design rules of the circuit layout. The marking module includes: A first sub-extraction module is used to extract information of at least a portion of the physical point items from the circuit information; The second sub-marking module is used to supplement and mark the information of another part of the physical point items based on the circuit information in the circuit diagram; The first sub-marking module is used to supplement the information of the functional items by marking them based on the circuit information in the circuit diagram.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

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