DC-DC forward boost-buck power conversion circuit based on cascade Cuk topology

Abstract

The invention provides a DC-DC forward boost-buck power conversion circuit based on cascaded Cuk topologies, and relates to the technical field of power electronic conversion, the circuit is mainly formed by cascading two Cuk topologies sharing one inductor, and the circuit also comprises a power supply end, a load end and a same-frequency driving signal generator. The same-frequency driving signal generator controls the two power switch tubes in the Cuk topology through a same-frequency signal, and the output voltage is adjusted by adjusting the duty ratio. The circuit not only keeps the advantage of continuous input and output current of a traditional Cuk circuit, but also converts the polarity of the output voltage from the reverse direction to the forward direction, and meanwhile, the voltage gain is remarkably improved, so that forward voltage conversion can be efficiently and smoothly realized. The circuit structure has the characteristics of high gain, forward output, continuous current, simple control and the like, and is suitable for occasions requiring high-efficiency and high-quality electric energy conversion, such as new energy power generation and energy storage, electric automobiles, precision industry and the like.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, specifically to a DC-DC forward buck-boost power conversion circuit based on a cascaded Cuk topology. Background Technology

[0002] With the rapid development of modern technology, power electronics has become a core component of energy conversion and management. From everyday consumer electronics to industrial automation systems, and even in fields such as new energy vehicles, renewable energy generation and storage, the requirements for power quality, conversion efficiency, and system reliability are increasing. Especially in high-tech application scenarios such as new energy generation and storage systems, electric vehicle drives, and power supplies for precision instruments, power conversion circuits are often required to simultaneously possess high voltage gain, positive output voltage, continuous input and output current, high efficiency, and good electromagnetic compatibility characteristics.

[0003] In the field of DC-DC conversion technology, traditional non-isolated buck-boost topologies, such as Buck-Boost, Sepic, or Zeta converters, while capable of achieving output voltages higher or lower than input voltages (i.e., buck-boost functionality), suffer from significant voltage gain limitations imposed by the duty cycle, making it difficult to achieve high boost ratios. Furthermore, they exhibit discontinuous current at the input or output sides. This discontinuous current leads to substantial current ripple, increasing the difficulty of output filtering, affecting voltage quality, and reducing circuit performance. It can also potentially impact upstream power supplies (such as batteries), shortening their lifespan and introducing strong electromagnetic interference (EMI).

[0004] To improve current continuity, the Cuk converter was proposed and applied. This topology achieves continuous input and output current by introducing coupled inductors and capacitors into the circuit, effectively reducing current ripple and making it more power supply and load friendly. However, traditional Cuk converters have an inherent drawback: their output voltage polarity is opposite to the input voltage, i.e., the output is negative. This characteristic makes it unsuitable for direct application in most situations requiring positive voltage supply, necessitating the addition of level shifting or inverting circuits. This not only increases system complexity, size, and cost but also introduces additional power losses, reducing overall conversion efficiency and power density, making it difficult to meet the urgent demands of modern power electronic systems for high integration and high efficiency.

[0005] In view of the above, this application is hereby submitted. Summary of the Invention

[0006] This invention provides a DC-DC forward buck-boost power conversion circuit based on a cascaded Cuk topology, which can at least partially improve the above-mentioned problems.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: A DC-DC forward buck-boost power conversion circuit based on cascaded Cuk topology includes: a power supply terminal, a load terminal, a synchronous frequency drive signal generator, and a cascaded Cuk topology converter. The power supply terminal is electrically connected to the input terminal of the synchronous frequency drive signal generator and the input terminal of the cascaded Cuk topology converter. The output terminal of the synchronous frequency drive signal generator is electrically connected to the control terminal of the cascaded Cuk topology converter. The output terminal of the cascaded Cuk topology converter is electrically connected to the load terminal. The same-frequency drive signal generator is configured to send pulse waveform signals with different duty cycles to the control terminal of the cascaded Cuk topology converter to switch the operating mode of the cascaded Cuk topology converter; the cascaded Cuk topology converter is configured to output a first operating mode or a second operating mode according to the pulse waveform signal, wherein the current remains continuous when the operating mode is switched.

[0008] In summary, this invention achieves efficient and smooth forward voltage conversion by cascading two Cuk topology units sharing a single inductor and synchronously controlling the two switching transistors using a synchronous drive signal generator. This circuit inherits the advantage of continuous input and output current in traditional Cuk circuits, effectively reducing current ripple, while overcoming the defect of negative output voltage polarity in traditional Cuk circuits, thus achieving positive voltage output. Furthermore, this topology significantly improves voltage gain, exhibiting an exponential increase, and is compact, simple to control, and highly reliable. It can be widely applied in power electronics fields such as new energy power generation and storage systems, electric vehicles, and precision industrial equipment, where high requirements for voltage gain, output polarity, and current quality are necessary, demonstrating good practical value and application prospects.

[0009] Specifically, compared with existing technologies, this circuit has the following advantages: 1. The main circuit topology is reconstructed from two Cuk circuits cascaded together using a single inductor. By sharing the inductor, switching losses, conduction losses, and the size and cost of magnetic components can be significantly reduced, further improving the power density and efficiency of the circuit; 2. The circuit is composed of two cascaded Cuk circuits, which significantly improves the voltage gain under the same duty cycle; 3. The circuit retains the advantage of continuous current of the original Cuk circuit, while changing the polarity of the output voltage from reverse output to forward output, meeting the needs of mainstream power electronics technology; 4. The circuit is controlled by a pulse width modulation (PWM) signal of the same frequency, which simplifies the drive circuit and makes it more reliable. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the DC-DC forward buck-boost power conversion circuit based on the cascaded Cuk topology provided in an embodiment of the present invention.

[0011] Figure 2 This is a circuit diagram of a DC-DC forward buck-boost power conversion circuit based on a cascaded Cuk topology provided in an embodiment of the present invention.

[0012] Figure 3 This is a circuit operation mode diagram in the first working mode provided by the embodiment of the present invention, wherein the arrow direction in the figure is the actual current flow direction.

[0013] Figure 4 This is a circuit operation mode diagram for the second working mode provided in the embodiment of the present invention, wherein the arrow direction in the diagram indicates the actual current flow direction.

[0014] Figure 5 This is a simulation diagram of a DC-DC forward buck-boost power conversion circuit based on a cascaded Cuk topology provided in an embodiment of the present invention.

[0015] Figure 6 This is a simulation output waveform diagram provided by an embodiment of the present invention when the duty cycle is 0.4.

[0016] Figure 7 This is a simulation output waveform diagram provided by an embodiment of the present invention when the duty cycle is 0.6. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0018] refer to Figure 1 , Figure 2 As shown, the first embodiment of the present invention discloses a DC-DC forward buck-boost power conversion circuit based on a cascaded Cuk topology, which includes: a power supply terminal 1, a load terminal 2, a synchronous frequency drive signal generator 3, and a cascaded Cuk topology converter 4. The power supply terminal 1 is electrically connected to the input terminal of the synchronous frequency drive signal generator 3 and the input terminal of the cascaded Cuk topology converter 4. The output terminal of the synchronous frequency drive signal generator 3 is electrically connected to the control terminal of the cascaded Cuk topology converter 4. The output terminal of the cascaded Cuk topology converter 4 is electrically connected to the load terminal 2. The same-frequency drive signal generator 3 is configured to send pulse waveform signals with different duty cycles to the control terminal of the cascaded Cuk topology converter 4 to switch the operating mode of the cascaded Cuk topology converter 4; the cascaded Cuk topology converter 4 is configured to output a first operating mode or a second operating mode according to the pulse waveform signal, wherein the current remains continuous when the operating mode is switched.

[0019] In this embodiment, preferably, the cascaded Cuk topology converter 4 includes a first Cuk topology 41, a second Cuk topology 42, and a common inductor L2. The first Cuk topology 41 includes a first inductor L1, a first capacitor C1, a first diode VD1, and a first switch S1. The positive terminal of the power supply terminal 1 is electrically connected to one end of the first inductor L1, and the other end of the first inductor L1 is electrically connected to the positive terminal of the first capacitor C1 and the first terminal of the first switch S1. The negative terminal of the first capacitor C1 is electrically connected to the first terminal of the common inductor L2 and the positive terminal of the first diode VD1. The control terminal of the first switch S1 is electrically connected to the first output terminal of the same frequency drive signal generator 3. The negative terminal of the first diode VD1, the second terminal of the first switch S1, and the negative terminal of the power supply terminal 1 are all grounded.

[0020] The second Cuk topology 42 includes a third inductor L3, a second capacitor C2, a second diode VD2, and a second switch S2. The second terminal of the common inductor L2 is electrically connected to the positive terminal of the second capacitor C2 and the second terminal of the second switch S2. The negative terminal of the second capacitor C2 is electrically connected to one end of the third inductor L3 and the negative terminal of the second diode VD2. The other end of the third inductor L3 is electrically connected to the positive terminal of the load terminal 2. The control terminal of the second switch S2 is electrically connected to the second output terminal of the same frequency drive signal generator 3. The positive terminal of the second diode VD2, the first terminal of the second switch S2, and the negative terminal of the load terminal 2 are all grounded.

[0021] In this embodiment, both the first switch S1 and the second switch S2 are IGBTs. The control terminal of the first switch S1 is the gate of the IGBT, the first terminal of the first switch S1 is the collector of the IGBT, and the second terminal of the first switch S1 is the emitter of the IGBT. The control terminal of the second switch S2 is the gate of the IGBT, the first terminal of the second switch S2 is the collector of the IGBT, and the second terminal of the second switch S2 is the emitter of the IGBT.

[0022] Specifically, in this embodiment, the core components of this circuit mainly include: a power supply terminal 1 that provides power to the entire system, a load terminal 2 that consumes power, a synchronous drive signal generator 3 for generating control signals, and a cascaded Cuk topology converter 4 that realizes the power conversion function. The cascaded Cuk topology converter 4 is constructed by cascading two Cuk topology units together using a shared inductor. Specifically, the converter includes a first Cuk topology 41 and a second Cuk topology 42. The first Cuk topology 41 consists of a first inductor L1, a first capacitor C1, a first diode VD1, and a first switch S1. The second Cuk topology 42 consists of a third inductor L3, a second capacitor C2, a second diode VD2, and a second switch S2. This design using shared magnetic components is one of the keys to reducing the number of components, lowering switching and conduction losses, and improving power density and efficiency.

[0023] In terms of electrical connections, the positive terminal of power supply 1 is connected to one end of the first inductor L1, and the other end of the first inductor L1 is connected to the positive terminal of the first capacitor C1 and the collector of the first switching transistor S1. The negative terminal of the first capacitor C1 is connected to the first terminal of the common inductor L2 and the positive terminal of the first diode VD1. The second terminal of the common inductor L2 is connected to the positive terminal of the second capacitor C2 and the emitter of the second switching transistor S2. The negative terminal of the second capacitor C2 is connected to one end of the third inductor L3 and the negative terminal of the second diode VD2. The other end of the third inductor L3 is finally connected to the positive terminal of the load terminal 2. The common ground of the circuit is formed by connecting the negative terminals of the first diode VD1, the positive terminal of the second diode VD2, the emitter of the first switching transistor S1, the collector of the second switching transistor S2, the negative terminal of power supply 1, and the negative terminal of the load terminal 2.

[0024] The output terminal of the synchronous drive signal generator 3 is electrically connected to the control terminals (i.e., gates) of the first switch S1 and the second switch S2, respectively. Its core function is to generate a synchronous pulse width modulation (PWM) signal with a fixed period but an adjustable duty cycle D, used to simultaneously drive the two switches. By adjusting the duty cycle D of this PWM signal, the output voltage U of the circuit can be precisely controlled. o This achieves simple and efficient single-variable control. The generator outputs a square wave with alternating high and low levels, which causes the conversion circuit to exhibit two distinct operating modes. Throughout the entire operation, thanks to the inherent characteristics of the Cuk topology, both the input and output currents remain continuous. This effectively suppresses current ripple, reduces electrical stress on the input power supply and output load, and improves system reliability.

[0025] In this embodiment, preferably, when the pulse waveform signals sent by the first output terminal and the second output terminal of the same frequency drive signal generator 3 are both high-level signals, the cascaded Cuk topology converter 4 enters the first working mode, wherein the first switch S1 and the second switch S2 are both turned on, the first diode VD1 and the second diode VD2 are both turned off, the power supply terminal 1 directly supplies energy to the first inductor L1, the first capacitor C1 exchanges energy with the common inductor L2, and the second capacitor C2 and the third inductor L3 directly output energy to the load terminal 2.

[0026] According to Kirchhoff's voltage law, the corresponding formula for the power conversion circuit in the first operating mode is: , , ,in, Input voltage, The voltage across the first inductor in the first operating mode. The voltage across the first capacitor is... To ensure that the voltage across the inductor is shared in the first operating mode, The voltage across the second capacitor is... The voltage across the third inductor in the first operating mode. This is the output voltage.

[0027] When the pulse waveform signals sent by the first output terminal and the second output terminal of the same frequency drive signal generator 3 are both low-level signals, the cascaded Cuk topology converter 4 enters the second working mode, wherein the first switch S1 and the second switch S2 are both turned off, the first diode VD1 and the second diode VD2 are both turned on, the power supply terminal 1 directly supplies energy to the first inductor L1 and the first capacitor C1, the shared inductor L2 and the second capacitor C2 exchange energy, and the third inductor L3 directly outputs energy to the load terminal 2.

[0028] According to Kirchhoff's voltage law, the corresponding formula for the power conversion circuit in the second operating mode is: , , ,in, The voltage across the first inductor in the second operating mode. To ensure that the voltage across the inductor is shared in the second operating mode, This represents the voltage across the third inductor in the second operating mode.

[0029] The derivation of the relationship between input voltage, output voltage, and the duty cycle of the pulse waveform signal is as follows: Based on the volt-second characteristic of an inductor, it is known that under steady-state conditions, the integral of the voltage across the inductor over one switching cycle is zero. The derivation is based on the voltage across the first inductor L1, where the voltage expression is: T is the period of the pulse waveform. The duration of the high level within a single cycle. The duration of the low level within a single cycle; The duty cycle of the known pulse waveform signal The voltage expression across the first inductor L1 can be simplified to: ; Similarly, the voltage expressions for the shared inductor L2 and the third inductor L3 can be obtained: , ; By combining the above formulas and eliminating the unknowns, the input voltage can be obtained. Output voltage The relationship between the duty cycle D of the pulse waveform signal and the signal: .

[0030] Specifically, in this embodiment, please refer to Figure 3 When the synchronous drive signal generator 3 outputs a high-level signal, the circuit enters the first operating mode. At this time, the first switch S1 and the second switch S2 are simultaneously turned on, while the first diode VD1 and the second diode VD2 are turned off due to reverse voltage. In this mode, the energy supplied by the power supply terminal 1 is directly stored in the first inductor L1; at the same time, the energy stored in the first capacitor C1 is exchanged with the common inductor L2; and the energy stored in the second capacitor C2, together with the third inductor L3, outputs current to the load terminal 2. In this stage, energy is transferred and redistributed through the interaction of capacitors and inductors.

[0031] Please see Figure 4 When the synchronous drive signal generator 3 outputs a low-level signal, the circuit switches to the second operating mode. At this time, the first switch S1 and the second switch S2 are simultaneously turned off, and the first diode VD1 and the second diode VD2 are naturally turned on due to forward bias. In this mode, the power supply terminal 1 and the first inductor L1 together replenish energy to the first capacitor C1; at the same time, the energy stored in the common inductor L2 is transferred to the second capacitor C2; the third inductor L3 releases its stored magnetic energy and continues to provide a continuous and smooth output current to the load terminal 2. The alternation of the two modes completes the complete energy transfer process from the input terminal to the output terminal, and always maintains the continuity of the current.

[0032] By applying the inductor volt-second balance principle to perform steady-state analysis of the circuit, the key voltage gain formula for this converter circuit can be derived. By simultaneously solving the voltage balance equations for each inductor over one switching cycle, the output voltage U is finally obtained. o With input voltage U i The quantitative relationship between duty cycle D and the duty cycle D is as follows: The formula clearly reveals the significant advantages of the circuit of this invention: First, its voltage gain is exponentially improved compared to the gain of a traditional Cuk circuit, achieving a higher output voltage at the same duty cycle, making it particularly suitable for applications requiring a high boost ratio. Second, it can be directly seen from the formula that the output voltage U... o With input voltage U i The ratio is positive, and the ratio remains positive as the duty cycle D changes between 0 and 1. This in principle guarantees and verifies that the circuit can achieve positive voltage output, completely solving the problem of negative output voltage in traditional Cuk circuits. No additional inverting circuit is needed, which improves system integration and efficiency.

[0033] To further verify the effectiveness of this circuit, a simulation was performed, and the simulation results are shown below. Figure 5 As shown, the input voltage is set to 1V. This simulation uses a triangular wave function generator in conjunction with an operational amplifier comparator to simulate the same-frequency drive signal generator 3, which drives the switching transistors S1 and S2. By changing the constant, the duty cycle of the output pulse waveform is changed, thereby achieving the function of changing the output voltage.

[0034] For example, when the duty cycle is set to 0.4, the output waveform of the power conversion circuit is as follows: Figure 6 As shown, the output voltage is approximately 0.45V. Substituting into the formula, the theoretical value of the output voltage can be obtained as follows: .

[0035] For example, when the duty cycle is set to 0.6, the output waveform of the power conversion circuit is as follows: Figure 7 As shown, the output voltage is approximately 2.26V. Substituting into the formula, the theoretical value of the output voltage can be obtained as follows: .

[0036] Therefore, the error is within acceptable limits and meets design expectations. In summary, this circuit features positive voltage output and high gain, and inherits the advantage of continuous input and output current from the Cuk circuit. It is suitable for high-voltage, positive, and high-quality power applications, such as new energy power generation, electric vehicles, and precision industries, and has broad application prospects and significant practical value.

[0037] In summary, this invention achieves efficient and smooth forward voltage conversion by cascading two Cuk topology units sharing a single inductor and using a synchronous pulse width modulation (PWM) signal generated by a synchronous drive signal generator to control the two switching transistors. Structurally, this circuit inherits the advantage of continuous input and output currents from traditional Cuk circuits, effectively reducing current ripple and minimizing impact on the power supply and load. It also overcomes the inherent defect of traditional Cuk circuits where the output voltage polarity is opposite to the input voltage, achieving forward voltage output without the need for an additional inverting circuit, thus improving system integration and overall efficiency. Furthermore, this cascaded topology significantly enhances the circuit's voltage gain, exhibiting an exponential gain improvement compared to traditional Cuk circuits, achieving a higher output voltage under the same duty cycle conditions. The entire circuit is controlled by a single duty cycle signal, resulting in a simple structure and a simple and reliable drive and control scheme. This invention is particularly suitable for power electronics applications with stringent requirements for high voltage gain, forward output voltage, low current ripple, and high reliability, such as new energy power generation and storage systems, electric vehicle power systems, and precision industrial equipment, demonstrating good practicality and promising prospects for widespread adoption.

[0038] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A DC-DC forward step-up / down power conversion circuit based on a cascaded Cuk topology, characterized by, The application relates to a power supply device, which comprises a power supply end, a load end, a same-frequency driving signal generator and a cascade Cuk topology converter, wherein the power supply end is electrically connected with the input end of the same-frequency driving signal generator and the input end of the cascade Cuk topology converter; the output end of the same-frequency driving signal generator is electrically connected with the control end of the cascade Cuk topology converter; and the output end of the cascade Cuk topology converter is electrically connected with the load end. The same-frequency driving signal generator is configured to send pulse waveform signals with different duty cycles to the control end of the cascade Cuk topology converter to switch the working mode of the cascade Cuk topology converter; and the cascade Cuk topology converter is configured to output in a first working mode or a second working mode according to the pulse waveform signals, wherein the current is always continuous when the working mode is switched. The cascade Cuk topology converter comprises a first Cuk topology, a second Cuk topology and a shared inductor, wherein the first Cuk topology comprises a first inductor, a first capacitor, a first diode and a first switch tube; the positive pole of the power supply end is electrically connected with one end of the first inductor; the other end of the first inductor is electrically connected with the positive pole of the first capacitor and the first end of the first switch tube; the negative pole of the first capacitor is electrically connected with the first end of the shared inductor and the positive pole of the first diode; the control end of the first switch tube is electrically connected with the first output end of the same-frequency driving signal generator; and the negative pole of the first diode, the second end of the first switch tube and the negative pole of the power supply end are grounded.

2. The DC-DC forward buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 1, characterized in that, The second Cuk topology comprises a third inductor, a second capacitor, a second diode and a second switch tube, wherein the second end of the shared inductor is electrically connected with the positive pole of the second capacitor and the second end of the second switch tube; the negative pole of the second capacitor is electrically connected with one end of the third inductor and the negative pole of the second diode; the other end of the third inductor is electrically connected with the positive pole of the load end; the control end of the second switch tube is electrically connected with the second output end of the same-frequency driving signal generator; and the positive pole of the second diode, the first end of the second switch tube and the negative pole of the load end are grounded.

3. The DC-DC forward-buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 2, characterized in that, When the pulse waveform signals sent by the first output end of the same-frequency driving signal generator and the second output end of the same-frequency driving signal generator are both high-level signals, the cascade Cuk topology converter enters the first working mode, wherein the first switch tube and the second switch tube are both turned on, the first diode and the second diode are both turned off, the power supply end directly delivers energy to the first inductor, energy is exchanged between the first capacitor and the shared inductor, and the second capacitor and the third inductor directly output energy to the load end.

4. The DC-DC forward-buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 3, characterized in that, When the pulse waveform signals sent by the first output end of the same-frequency driving signal generator and the second output end of the same-frequency driving signal generator are both low-level signals, the cascade Cuk topology converter enters the second working mode, wherein the first switch tube and the second switch tube are both turned off, the first diode and the second diode are both turned on, the power supply end directly delivers energy to the first inductor and the first capacitor, energy is exchanged between the shared inductor and the second capacitor, and the third inductor directly outputs energy to the load end.

5. The DC-DC forward-buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 4, characterized in that, According to the Kirchhoff voltage law, in the first operating mode, the corresponding expression formula of the power conversion circuit is: , , wherein, is an input voltage, is a voltage across the first inductor in the first operating mode, is a voltage across the first capacitor, is a voltage across the common inductor in the first operating mode, is a voltage across the second capacitor, is a voltage across the third inductor in the first operating mode, is an output voltage.

6. The DC-DC forward-buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 5, characterized in that, ​ 7. The DC-DC forward-buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 6, characterized in that, According to the Kirchhoff voltage law, in the second operating mode, the corresponding expression formula of the power conversion circuit is: , , wherein, is the voltage across the first inductor in the second operating mode, is the voltage across the common inductor in the second operating mode, is the voltage across the third inductor in the second operating mode.

8. The DC-DC forward-buck-boost power conversion circuit based on a cascaded Cuk topology according to claim 7, characterized in that, The derivation process of the relationship between input voltage, output voltage and the duty cycle of the pulse waveform signal is as follows: Based on the inductance voltage-second characteristic, in the steady state, the integral of the voltage across the inductor in a switching cycle is zero. The voltage across the first inductor is derived as follows: T is the period of the pulse waveform, is the duration of the high level in a single cycle, is the duration of the low level in a single cycle; Duty cycle of a known pulse waveform signal The voltage expression across the first inductor can be simplified to: ; By the same token, the voltage expression corresponding to the common inductor and the third inductor is obtained: , ; By combining the above equations and eliminating the unknowns, the relationship between the input voltage, output voltage and the duty cycle of the pulse waveform signal can be obtained: .

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