Control method for improving current sampling rate of single resistor of motor by switching dead zone mode

Abstract

The invention provides a control method for improving the current sampling rate of a single resistor of a motor by switching a dead zone mode. According to the method, in each PWM modulation period, the UVW three-phase output duty ratio of the motor is firstly calculated and is ranked into a minimum middle maximum duty ratio phase according to the size, an on type dead zone mode and an off type dead zone mode are configured, then dynamic dead zone adjustment is carried out on the three phases, the off type dead zone mode is configured for the minimum duty ratio phase, the on type dead zone mode is configured for the maximum duty ratio phase, and the on type dead zone mode is configured for the maximum duty ratio phase. And the middle duty ratio phase dynamically selects a dead zone mode according to the duty ratio difference between the middle duty ratio phase and the other two phases. By dynamically switching the dead zone mode, the sampling effective window is reserved to the maximum extent, the current sampling success rate and the reconstruction accuracy are remarkably improved, the motor control stability and precision are optimized, additional hardware cost does not need to be increased, implementation is easy and convenient, and the method can be widely applied to a field-oriented control motor system adopting single-resistor current sampling.

Description

Technical Field

[0001] This invention relates to the field of motor single-resistance current sampling technology, and more specifically, to a control method for improving the sampling rate of motor single-resistance current by switching dead-time modes. Background Technology

[0002] In motor field-oriented control systems, the single-resistor current sampling scheme has been widely used due to its advantages of simple structure, low cost and ease of implementation. It collects current signals at specific moments within the pulse width modulation period by connecting a single sampling resistor in series with the DC bus, and reconstructs the three-phase current of the motor by combining the inverter switching state, so as to provide the necessary feedback information for the field-oriented control algorithm to achieve accurate torque output.

[0003] In existing technologies, to avoid the shoot-through problem caused by the simultaneous conduction of the upper and lower bridge arm switches of the inverter, a fixed dead time is usually set. However, this fixed dead time setting is used when the motor is running at low speed under light load or when adjacent modulation sectors are switching. Due to the small difference in the duty cycle of the two-phase or three-phase output, the effective time for current sampling is shortened, causing the sampling window to fail to meet the minimum sampling requirements of the analog-to-digital converter. This not only reduces the success rate and accuracy of current sampling but also causes problems such as current waveform distortion, torque ripple, and speed fluctuations, affecting the stability of motor control performance. At the same time, some existing technologies rely on current direction detection or adjustment of pulse width modulation switching time to optimize the sampling effect, which has drawbacks such as complex structure, susceptibility to interference, or reduced voltage vector synthesis accuracy.

[0004] Therefore, there is an urgent need for a motor single-resistance current sampling control method that does not require additional hardware costs and has wider adaptability, effectively solving the problem of insufficient sampling effective time caused by fixed dead zone, improving the success rate and reliability of motor single-resistance current sampling, and ensuring the stable control performance of the motor under various operating conditions. Summary of the Invention

[0005] Based on existing technology, the objective of this invention is to provide a control method for improving the sampling rate of single-resistance current in a motor by switching dead-time modes. This method can reduce the impact of dead time on the sampling time range without significant hardware adjustments, thereby improving the success rate of current sampling.

[0006] According to the present invention, the above-mentioned task is solved by a control method that utilizes a switching dead-time mode to improve the sampling rate of the single-resistor current of the motor.

[0007] This invention proposes a control method for improving the sampling rate of single-resistor current in a motor by switching dead-time modes, the method comprising: Within each PWM modulation cycle, the duty cycle of the three-phase output of the motor (UVW) is calculated, and the three phases (UVW) are sorted from smallest to largest according to the duty cycle as the smallest duty cycle phase a, the middle duty cycle phase b, and the largest duty cycle phase c. Two dead-time modes are provided, the dead-time modes being: In the dead-time mode, the complementary switch is turned on with a delay when the switching transistor is turned on; and In the shutdown dead-time mode, the complementary switch is turned off in advance when the switching transistor is turned off. Perform dynamic dead-time adjustment, configuring the minimum duty cycle phase a, the intermediate duty cycle phase b, and the maximum duty cycle phase c as either an on-type dead-time mode or an off-type dead-time mode.

[0008] Furthermore, the dynamic dead-time adjustment includes: Configure the dead time of the minimum duty cycle phase a as a shutdown dead time mode; Configure the dead time of the maximum duty cycle phase c as an on-line dead time mode; Calculate the difference between the duty cycle of the intermediate duty cycle phase b and the minimum duty cycle phase a and the maximum duty cycle phase c, respectively. b-a and Duty c-b .

[0009] Furthermore, when Duty b-a >Duty c-b At that time, the dead zone of the intermediate duty cycle phase b is configured as a shutdown dead zone mode.

[0010] Furthermore, when Duty b-a <=Duty c-b At that time, the dead zone of the intermediate duty cycle phase b is configured as an open dead zone mode.

[0011] Furthermore, when the sampling time of the current sampling is less than a preset time, the dynamic dead-time adjustment is performed, wherein the preset time depends on system limitations and is at least the time required for the level to switch to a stable sampling voltage. The system limitations include noise from the hardware switches and / or the slew rate of the operational amplifier.

[0012] Furthermore, the calculation, sorting, and / or dynamic dead-zone adjustment of the duty cycle of the UVW three-phase output are implemented through software.

[0013] Furthermore, the dynamic dead-time adjustment is performed synchronously once in each PWM modulation cycle.

[0014] Furthermore, the dynamic dead-time adjustment is achieved by adjusting the dead-time mode of each of the three phase arms. The dead-time modes of each phase arm are configured independently and do not affect each other.

[0015] Furthermore, after the dynamic dead zone adjustment, the current signal is acquired through a single resistor connected in series with the busbar, and the three-phase current of the motor is reconstructed.

[0016] The present invention also proposes a single-resistance current sampling device for a motor, comprising: Electric motor; and A controller for performing the control method as described in any one of claims 1-9 to improve the single-resistance current sampling rate of the motor by utilizing a switching dead-time mode.

[0017] The present invention proposes a control method for improving the sampling rate of single-resistor current in a motor by switching dead-time modes, which has at least the following beneficial effects: The method proposed in this invention effectively reduces the adverse effects of dead time on the effective time range of single-resistor current sampling by dynamically switching dead-time modes. This significantly improves the current sampling success rate of the motor under conditions such as light-load, low-speed operation and switching between adjacent modulation sectors, ensuring the accuracy of three-phase current reconstruction. This, in turn, enhances the stability and control precision of field-oriented control, avoiding problems such as torque pulsation and speed fluctuations caused by sampling failures. Furthermore, the method requires no additional hardware costs and can be implemented solely through software optimization. It is characterized by its ease of implementation and strong adaptability, and can be widely applied to field-oriented control motor systems using single-resistor current sampling, including various cost-sensitive devices requiring high-precision current control, such as household appliance compressor motors, industrial servo motors, and new energy vehicle drive motors. Attached Figure Description

[0018] To further illustrate the advantages and other features of the various embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It is understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by the same or similar reference numerals for clarity.

[0019] Figure 1 The sampling point range for single-resistor current sampling is shown.

[0020] Figure 2 A schematic diagram illustrating the configuration of an on-type dead zone mode and a off-type dead zone mode in one embodiment of the present invention is shown.

[0021] Figure 3 The flowchart shown is a control method for improving the sampling rate of single-resistor current of a motor by switching dead-time modes, according to one embodiment of the present invention.

[0022] Figure 4 , Figure 5 The present invention illustrates a comparison of the current sampling point ranges in fixed dead-time mode and dynamic dead-time configuration mode in an embodiment of the invention. Detailed Implementation

[0023] It should be noted that the components in the various figures may be shown exaggeratedly for illustrative purposes and are not necessarily to scale. In each figure, the same reference numerals are used for components that are identical or have the same function.

[0024] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0025] In this invention, unless otherwise specified, the quantifiers “a” and “one” do not exclude scenarios involving multiple elements.

[0026] It should also be noted that, in the embodiments of the present invention, only a portion of the components or parts may be shown for clarity and simplicity. However, those skilled in the art will understand that, under the teachings of the present invention, necessary components or parts can be added as needed for specific scenarios. Furthermore, unless otherwise stated, features in different embodiments of the present invention can be combined with each other. For example, a feature in the second embodiment can replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment will also fall within the scope of disclosure or description of this application.

[0027] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0028] Furthermore, the steps of the methods of the present invention are not limited in terms of the execution order of the method steps. Unless otherwise specified, the method steps may be executed in different orders.

[0029] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0030] Figure 1 The sampling point range for single-resistor current sampling is shown. For example... Figure 1 As shown, in the three-phase modulation control of field-oriented control (FOC) of a motor with single-resistor current sampling, when the pulse width modulation (PWM) output is symmetrical, the upper and lower PWM signals of the bridge arms of the U, V, and W phases are complementary (the lower bridge is off when the upper bridge is on, and vice versa). The range of the two current sampling points can be as follows: Figure 1 The T1 and T2 periods shown represent the duration of action of two non-zero voltage vectors in Space Vector Pulse Width Modulation (SVPWM). During T1 and T2, the inverter outputs a specific combination of voltage vectors, and the bus current can be mapped to the current of a certain phase of the motor, thereby reconstructing the three-phase current through Kirchhoff's laws.

[0031] In a motor-driven three-phase full-bridge inverter, a dead time is set to prevent the upper and lower switching transistors of the same bridge arm from conducting simultaneously, thus preventing a short circuit on the DC bus. Specifically, switching transistors have turn-on and turn-off delays: for example, after the upper transistor turns off, the lower transistor cannot turn on immediately; conversely, after the lower transistor turns off, the upper transistor cannot turn on immediately. Without a dead time, the upper and lower transistors might conduct simultaneously due to the switching delay, leading to a direct short circuit and potentially causing serious problems such as transistor burnout and system failure. Therefore, a dead time is a safety design feature of the inverter: it inserts a period of time during the switching process where both transistors are turned off, ensuring that the complementary transistor is turned on only after the switching transistor is completely turned off, thereby avoiding the risk of bridge arm shoot-through.

[0032] exist Figure 1 In this system, the turn-on / turn-off timing of each phase PWM adopts a fixed dead-time mode. For example, the switching transistors have a turn-on delay and there is no differentiated dynamic adjustment. In this mode, when the motor is lightly loaded, at low speed, or during sector switching, the duty cycle difference of the three phases is small, which causes T1 or T2 to be excessively compressed by the dead time, even less than the minimum sampling time of the analog-to-digital converter (ADC), ultimately resulting in current sampling failure.

[0033] In one embodiment of the present invention, the current sampling timing is placed in the second half of a PWM cycle.

[0034] In the method of the present invention, the dead-time control mode is set to delay the opening of the switching transistor when it is turned on and turn off the switching transistor in advance when it is turned off, which will be referred to as "turn-on dead-time mode" and "turn-off dead-time mode" respectively.

[0035] Figure 2 A schematic diagram illustrating the configuration of an on-type dead-time mode and a off-type dead-time mode in one embodiment of the present invention is shown. Figure 2 As shown: The dead-time-free configuration is achieved by ensuring that PWM H (upper bridge switch drive signal) and PWM L (lower bridge switch drive signal) are completely complementary. When the upper bridge turns off, the lower bridge immediately turns on, and vice versa. In this case, if there is a turn-on / turn-off delay in the switches, there is a high risk that both the upper and lower bridge arms may conduct simultaneously, leading to a short circuit on the DC bus. Therefore, the dead-time-free configuration is not used in practical applications.

[0036] The turn-on dead-time mode is configured to add a delayed turn-on dead time (sloping region) at the turn-on time of PWM H or PWM L. It is mainly used for bridge arms with a large duty cycle to prevent the effective conduction time from being unnecessarily cut off by premature turn-on.

[0037] The shutdown dead-time mode is configured to add a pre-shutdown dead time (grid region) at the shutdown time of PWM H or PWM L. It is mainly used for bridge arms with a small duty cycle to prevent the effective conduction time from being compressed to insufficient due to late shutdown.

[0038] Figure 3 A flowchart illustrating a control method for improving the sampling rate of a single-resistor current in a motor by switching dead-time modes is shown in one embodiment of the present invention. Figure 3 As shown, in one embodiment of the present invention, a control method for improving the sampling rate of a motor single-resistor current by switching dead-time modes includes: Within each PWM modulation cycle, the duty cycle of the three-phase output of the motor (UVW) is calculated, and the three phases (UVW) are sorted from smallest to largest according to the duty cycle as the smallest duty cycle phase a, the middle duty cycle phase b, and the largest duty cycle phase c. Configure two dead-time modes, the dead-time modes include: In the dead-time mode, the complementary switch is turned on with a delay when the switching transistor is turned on; and In the shutdown dead-time mode, the complementary switch is turned off in advance when the switching transistor is turned off. Perform dynamic dead-time adjustment, configuring the minimum duty cycle phase a, the intermediate duty cycle phase b, and the maximum duty cycle phase c as either an on-type dead-time mode or an off-type dead-time mode.

[0039] Specifically, in one embodiment of the present invention, when the current sampling time is less than a preset time, dynamic dead-time adjustment is performed, the dynamic dead-time adjustment including the following steps: The dead zone of the minimum duty cycle phase a is set to the off dead zone mode; The dead zone of the maximum duty cycle phase c is set to an open dead zone mode; Calculate the difference between the duty cycle of the intermediate duty cycle phase b and the duty cycles of the other two phases. b-a and Duty c-b ; When Duty b-a Duty c-b When the dead zone of the intermediate duty cycle phase b is set to the off dead zone mode; When Duty b-a <=Duty c-b At that time, the dead zone of the intermediate duty cycle phase b is set to the open dead zone mode.

[0040] In one embodiment of the present invention, when the sampling time of the current sampling is less than a preset time, the dynamic dead-time adjustment is performed. The preset time is at least the time required for the level to switch to a stable sampling voltage, and depends on system limitations, including: Noise from hardware switches (such as power switching transistors) generates transient electrical signal interference when they are turned on or off (similar to current fluctuations when switching electrical appliances), manifesting as brief jitters in the sampled voltage. After the switch changes, the noise causes instability in the sampled voltage, making it unusable for accurate sampling. The preset time must include the duration for the noise to attenuate to a negligible level; otherwise, the sampled value will be distorted due to noise.

[0041] The slew rate of an operational amplifier (op-amp): the maximum rate at which the output voltage of an op-amp follows the change in input voltage, reflecting the op-amp's response speed—the higher the slew rate, the faster the output voltage changes. After a level switch, the op-amp needs time to adjust the output voltage to a stable sampled value; the lower the slew rate, the longer the adjustment time. In one embodiment of this invention, the preset time must be greater than or equal to the time it takes for the op-amp to complete voltage adjustment and stabilize; otherwise, the sampled voltage cannot reach the true value.

[0042] In one embodiment of the present invention, the calculation, sorting and / or dynamic dead zone adjustment of the duty cycle of the UVW three-phase output are implemented by software.

[0043] In one embodiment of the present invention, the dynamic dead-time adjustment is performed synchronously once in each PWM modulation cycle.

[0044] In one embodiment of the present invention, the dynamic dead-time adjustment is achieved by adjusting the dead-time mode of each of the three phase arms, and the dead-time mode of each phase arm is configured independently and does not affect each other.

[0045] In one embodiment of the present invention, after the dynamic dead zone adjustment, the current signal is collected through a single resistor connected in series with the busbar, and the three-phase current of the motor is reconstructed.

[0046] The control method of the present invention will be further illustrated below through specific embodiments.

[0047] like Figure 4 In the illustrated embodiment, within each PWM modulation cycle, the output duty cycles of the motor's three phases (UVW) are calculated and sorted from smallest to largest to determine the phase with the smallest duty cycle (a), the phase with the middle duty cycle (b), and the phase with the largest duty cycle (c). The following dynamic dead-time adjustment is then performed: The dead zone of the minimum duty cycle phase a is set to the off dead zone mode; The dead zone of the maximum duty cycle phase c is set to an open dead zone mode; Calculate the difference between the duty cycle of the intermediate duty cycle phase b and the duty cycles of the other two phases. b-a and Duty c-b Get Duty b-a Duty c-b Configure the dead zone mode of the intermediate duty cycle phase b as the off-type dead zone mode.

[0048] like Figure 4 In the embodiment shown, the current sampling time T2 is extended compared to the fixed dead-time mode, thereby improving the current sampling success rate.

[0049] like Figure 5 In the illustrated embodiment, execution and Figure 4 The same duty cycle calculation and sorting are performed in the illustrated embodiment, and the following settings are executed: The dead zone of the minimum duty cycle phase a is set to the off dead zone mode; The dead zone of the maximum duty cycle phase c is set to an open dead zone mode; Calculate the difference between the duty cycle of the intermediate duty cycle phase b and the duty cycles of the other two phases. b-a and Duty c-b Get Duty b-a <Duty c-b Configure the dead zone mode of the intermediate duty cycle phase b as an open dead zone mode.

[0050] like Figure 5 In the embodiment shown, the current sampling time T1 is extended compared to the fixed dead-time mode, thereby improving the current sampling success rate.

[0051] In summary, in a specific embodiment of the present invention, the current sampling timing is placed in the latter half of a PWM cycle. The minimum duty cycle phase a is configured with a turn-off dead-time mode to avoid the T1 time being reduced due to the dead time of the minimum duty cycle phase a; the maximum duty cycle phase c is configured with an on-time dead-time mode to avoid the T2 time being reduced due to the dead time of the maximum duty cycle phase c; the dead-time mode of the intermediate duty cycle phase b is dynamically adjusted based on its difference from the minimum duty cycle phase a and the maximum duty cycle phase c, thereby reducing the impact of the dead time on the sampling time range and improving the success rate of current sampling. Specifically, in one embodiment of the present invention, when the modulation period is 16K and the dead time is 1μs, the sampling time can be increased by 1μs in the region with stringent sampling requirements. Compared to half a modulation cycle, the sampling time in the region with stringent sampling requirements can be increased by 3.2%, thus improving the success rate of current sampling.

[0052] This invention proposes a control method to improve the sampling rate of single-resistance current in a motor by switching dead-time modes. By dynamically switching between on-type and off-type dead-time modes, and configuring differentiated dead-time for three-phase bridge arms with different duty cycles, it effectively avoids the excessive compression of the effective current sampling window caused by a fixed dead-time. Under conditions such as light motor load, low speed, and adjacent sector switching, it significantly improves the success rate of single-resistance current sampling, ensuring the accuracy of three-phase current reconstruction. This method requires no additional hardware costs; it can be implemented solely through software-level duty cycle determination and dead-time mode switching. It is simple to implement, highly adaptable, and can be widely applied to various motor control systems using single-resistance current sampling. While ensuring control performance, it effectively controls system costs. Simultaneously, the differentiated dead-time configuration avoids the risk of bridge arm shoot-through and solves the sampling problems caused by a fixed dead-time. This enhances the overall reliability of the motor drive system from both hardware protection and control accuracy perspectives, extending the equipment's service life.

[0053] In one embodiment of the present invention, a single-resistance current sampling device for a motor is also provided, characterized in that it includes: Electric motor; and A controller for executing the control method described above to improve the single-resistance current sampling rate of the motor by utilizing a switching dead-time mode.

[0054] Although various embodiments of the invention have been described above, it should be understood that they are presented by way of example only and not as limitations. It will be apparent to those skilled in the art that various combinations, modifications, and alterations can be made without departing from the spirit and scope of the invention. Therefore, the breadth and scope of the invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined solely by the appended claims and their equivalents.

Claims

1. A control method for improving the sampling rate of a single-resistor current in a motor by switching dead-time modes, characterized in that, The method includes: Within each PWM modulation cycle, the duty cycle of the motor's three-phase output (UVW) is calculated, and the three phases (UVW) are sorted from smallest to largest according to the duty cycle as the smallest duty cycle phase a, the middle duty cycle phase b, and the largest duty cycle phase c. Two dead-time modes are provided, the dead-time modes being: A turn-on dead-time mode, wherein in the turn-on dead-time mode, the complementary switch is delayed when the switching transistor is turned on; and A turn-off dead-time mode, wherein in the turn-off dead-time mode, the complementary switch is turned off in advance when the switching transistor is turned off; and Perform dynamic dead-time adjustment, configuring the minimum duty cycle phase a, the intermediate duty cycle phase b, and the maximum duty cycle phase c as either an on-type dead-time mode or an off-type dead-time mode.

2. The method according to claim 1, characterized in that, The dynamic dead-time adjustment includes: Configure the dead time of the minimum duty cycle phase a as a shutdown dead time mode; Configure the dead time of the maximum duty cycle phase c as an on-line dead time mode; Calculate the difference between the duty cycle of the intermediate duty cycle phase b and the minimum duty cycle phase a and the maximum duty cycle phase c, respectively. b-a and Duty c-b .

3. The method according to claim 2, characterized in that, When Duty b-a >Duty c-b At that time, the dead zone of the intermediate duty cycle phase b is configured as a turn-off dead zone.

4. The method according to claim 2, characterized in that, When Duty b-a <=Duty c-b At that time, the dead zone of the intermediate duty cycle phase b is configured as an on-type dead zone.

5. The method according to claim 1, characterized in that, When the sampling time of the current sampling is less than a preset time, the dynamic dead-time adjustment is performed, wherein the preset time depends on system limitations and is at least the time required for the level to switch to a stable sampling voltage. The system limitations include noise from hardware switches and / or the slew rate of operational amplifiers.

6. The method according to claim 1, characterized in that, The software is used to calculate and sort the duty cycles of the UVW three-phase outputs and / or adjust the dynamic dead zone.

7. The method according to claim 1, characterized in that, The dynamic dead-time adjustment is performed synchronously once in each PWM modulation cycle.

8. The method according to claim 3, characterized in that, The dynamic dead-time adjustment is achieved by adjusting the dead-time mode of each of the three phase arms. The dead-time modes of each phase arm are configured independently and do not affect each other.

9. The method according to claim 1, characterized in that, After the dynamic dead zone is adjusted, the current signal is collected through a single resistor connected in series with the busbar, and the three-phase current of the motor is reconstructed.

10. A single-resistance current sampling device for a motor, characterized in that, include: Electric motor; as well as A controller for performing the control method as described in any one of claims 1-9 to improve the single-resistance current sampling rate of the motor by utilizing a switching dead-time mode.

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