Space-borne data transceiver apparatus and method for satellite systems

Abstract

This invention relates to the field of spaceborne data processing technology, and more particularly to a spaceborne data transceiver device and method for satellite systems. The spaceborne data transceiver device is used to connect to external multi-source devices. The device includes a storage unit and an LVDS unit, which are connected via a bus. The LVDS unit includes a serial-to-parallel conversion group, a frame buffer group, and a bus interface group. The bus interface group is connected to the storage unit, and the serial-to-parallel conversion group is connected to both the external multi-source devices and the frame buffer group. The bus interface group enables data interaction between the storage unit and the frame buffer group. The serial-to-parallel conversion group enables data interaction between the frame buffer group and the external multi-source devices based on a preset communication protocol. This invention aims to improve the anti-interference capability and reliability of spaceborne data transmission, and to address the problem that traditional communication methods can only handle specific data formats, thus adapting to the needs of satellite transmission services.

Description

Technical Field

[0001] This invention relates to the field of spaceborne data processing technology, and in particular to a spaceborne data transceiver device and method for satellite systems. Background Technology

[0002] In the field of aerospace engineering, onboard data processing chips undertake the core functions of data interaction and computation for spacecraft and launch vehicles, including long-life, high-reliability satellites and space-based satellite systems. They must simultaneously achieve key functions such as high-speed communication and data exchange with FPGAs (Field-Programmable Gate Arrays), stable processing of video signals output from cameras, and accurate reception of sampled data output from ADCs (Analog-to-Digital Converters). Meanwhile, the extreme environment of outer space places stringent requirements on the reliability and anti-interference capabilities of onboard data processing chips. This necessitates that the accompanying board-level communication devices possess high reliability, strong anti-interference capabilities, high transmission rates, and compatibility with multiple input data formats. However, traditional board-level chip communication methods have significant performance limitations. Technologies such as UART (Universal Asynchronous Receiver / Transmitter), SPI (Serial Peripheral Interface), and IIC (Integrated Circuit Bus) not only have low reliability and weak anti-interference capabilities, but also have transmission rates that are insufficient for aerospace applications. Furthermore, they are generally only compatible with specific types of input data formats, have low integration levels, and cannot match the multi-functional application scenarios of onboard data processing chips. These technological limitations make it difficult for traditional communication methods to support the stable operation of onboard data processing chips in complex space environments, and also fail to meet their actual needs for multi-task parallel processing. Summary of the Invention

[0003] In order to overcome the shortcomings of the prior art, the present invention aims to provide a satellite-borne data transceiver device and method for satellite systems, which aims to improve the anti-interference capability and reliability of satellite-borne data transmission, and to solve the problem that traditional communication methods can only handle specific data formats.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] An onboard data transceiver for a satellite system is disclosed. The onboard data transceiver connects to external multi-source devices. It includes a storage unit and an LVDS (Low Voltage Differential Signaling) unit, which are connected via a bus. The LVDS unit includes a serial-to-parallel converter group, a frame buffer group, and a bus interface group. The bus interface group is connected to the storage unit, and the serial-to-parallel converter group is connected to both the external multi-source devices and the frame buffer group. The bus interface group facilitates data exchange between the storage unit and the frame buffer group. The serial-to-parallel converter group facilitates data exchange between the frame buffer group and the external multi-source devices based on a preset communication protocol.

[0006] In the aforementioned onboard data transceiver for a satellite system, the onboard data transceiver further includes a central processing unit, which is connected to the storage unit and the LVDS unit via a bus. The LVDS unit further includes a configuration register group, which is connected to the bus interface group. The configuration register group is used to obtain configuration instructions sent by the central processing unit and configure the working mode based on the configuration instructions.

[0007] In the aforementioned onboard data transceiver device for a satellite system, the serial-to-parallel conversion group includes a multiplexer, a format converter, a multiplexer, and a frame parser. The external multi-source device, the multiplexer, the format converter, the multiplexer, the frame parser, and the frame buffer group are connected sequentially. The multiplexer receives multiple serial data transmitted by the external multi-source device. The format converter performs parallel conversion processing on the multiple serial data streams to obtain multiple parallel data streams. The multiplexer selects a target parallel data stream from the multiple parallel data streams based on the communication protocol. The frame parser performs frame parsing and integrity verification processing on the target parallel data based on the communication protocol to obtain valid frame data, and transmits the valid frame data to the frame buffer group, so that the frame buffer group transmits the valid frame data to the storage unit through the bus interface group.

[0008] In the aforementioned onboard data transceiver device for a satellite system, the serial-to-parallel conversion group further includes a frame packer, and the frame buffer group, the frame packer, and the format converter are connected in sequence. The frame packer is used to perform frame encapsulation and integrity verification processing on the data to be transmitted obtained by the frame buffer group from the storage unit based on the communication protocol to obtain parallel frame data. The format converter is also used to perform serial conversion processing on the parallel frame data to obtain LVDS serial data, and transmit the LVDS serial data to the external multi-source device.

[0009] In the aforementioned onboard data transceiver device for a satellite system, the frame buffer group includes a ping-pong buffer and a memory accessor, and the serial-to-parallel conversion group, the ping-pong buffer, the memory accessor, and the bus interface group are connected in sequence; the ping-pong buffer is used to realize continuous buffering and forwarding of data; the memory accessor is used to realize data interaction between the ping-pong buffer and the bus interface group.

[0010] The present invention also provides a method for onboard data transceiver in a satellite system, applicable to any of the onboard data transceiver devices for a satellite system described above. The method includes: controlling the serial-to-parallel conversion group to acquire multiple serial data streams from the external multi-source device, and performing parallel conversion and filtering / verification processing on the multiple serial data streams respectively to obtain valid frame data; controlling the frame buffer group to store the valid frame data, and transmitting the valid frame data to the storage unit through the bus interface group to complete data reception.

[0011] In the aforementioned method for transmitting and receiving satellite data for a satellite system, the satellite data transceiver device further includes a central processing unit (CPU). The CPU is connected to the storage unit and the LVDS unit via a bus. The LVDS unit further includes a configuration register group, which is connected to the bus interface group. Before controlling the serial-to-parallel conversion group to acquire multiple serial data from the external multi-source device, the method further includes: controlling the configuration register group to acquire configuration instructions transmitted by the CPU, and configuring the operating mode based on the configuration instructions.

[0012] The aforementioned method for transmitting and receiving onboard data for a satellite system further includes: controlling the frame buffer group to receive the data to be transmitted from the storage unit through the bus interface group, and transmitting the data to be transmitted to the serial-to-parallel conversion group; controlling the serial-to-parallel conversion group to perform frame encapsulation processing and serial conversion processing on the data to be transmitted to obtain LVDS serial data, and transmitting the LVDS serial data to the external multi-source device to complete the data transmission.

[0013] In the aforementioned method for transmitting and receiving onboard data for a satellite system, the serial-to-parallel conversion group includes a multi-channel data interface adapter, a format converter, a multiplexer, and a frame parser. The external multi-source device, the multi-channel data interface adapter, the format converter, the multiplexer, and the frame parser are connected sequentially. Controlling the serial-to-parallel conversion group to acquire multiple channels of serial data from the external multi-source device, and performing parallel conversion and filtering / verification processing on the multiple channels of serial data based on the operating mode to obtain valid frame data, includes: controlling the multi-channel data interface adapter to acquire multiple channels of the serial data from the external multi-source device; controlling the format converter to perform parallel conversion processing on the multiple channels of serial data to obtain multiple channels of parallel data; controlling the multiplexer to select target parallel data from the multiple channels of parallel data based on a preset communication protocol; and controlling the frame parser to perform frame parsing and integrity verification processing on the target parallel data based on the communication protocol to obtain the valid frame data.

[0014] In the aforementioned method for transmitting and receiving onboard data for a satellite system, the serial-to-parallel conversion group further includes a frame packer, which is connected to the format converter. Controlling the serial-to-parallel conversion group to perform frame encapsulation and serial conversion processing on the data to be transmitted to obtain LVDS serial data includes: controlling the frame packer to perform frame encapsulation and integrity verification processing on the data to be transmitted based on the communication protocol to obtain parallel frame data; and controlling the format converter to perform serial conversion processing on the parallel frame data to obtain the LVDS serial data.

[0015] Beneficial effects:

[0016] This invention provides an onboard data transceiver for a satellite system. The onboard data transceiver connects to external multi-source devices and includes a storage unit and an LVDS unit connected via a bus. The LVDS unit includes a serial-to-parallel conversion group, a frame buffer group, and a bus interface group. The bus interface group is connected to the storage unit, and the serial-to-parallel conversion group is connected to both the external multi-source devices and the frame buffer group. The bus interface group enables data interaction between the storage unit and the frame buffer group. The serial-to-parallel conversion group enables data interaction between the frame buffer group and the external multi-source devices based on a preset communication protocol. By setting up the LVDS unit and using LVDS levels for data communication, combined with the preset communication protocol used by the serial-to-parallel conversion group, the anti-interference capability and reliability of data transmission are improved, allowing stable adaptation to the complex space electromagnetic environment. Furthermore, the serial-to-parallel conversion group can directly interact with external multi-source devices, solving the technical problem that traditional communication methods can only handle specific data formats, and providing highly reliable data support for core tasks such as satellite navigation and communication. Attached Figure Description

[0017] Figure 1 A schematic diagram of the structure of the onboard data transceiver for a satellite system provided by the present invention;

[0018] Figure 2 A schematic diagram of the frame structure and frame interval of the preset communication protocol provided by the present invention;

[0019] Figure 3 This is a schematic diagram of the structure of the serial-to-parallel conversion group provided by the present invention;

[0020] Figure 4 This is a schematic diagram of the structure of the frame buffer group provided by the present invention;

[0021] Figure 5 The present invention provides a logic flowchart for a satellite system onboard data transmission and reception method. Detailed Implementation

[0022] This invention provides a satellite-borne data transceiver device and method for satellite systems. To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0023] In the description of this invention, it should be understood that the terms "installation" and "connection" should be interpreted broadly, and those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0024] Please see Figure 1 This invention provides an onboard data transceiver for a satellite system. The onboard data transceiver is used to connect to external multi-source devices. The onboard data transceiver includes a storage unit and an LVDS unit, which are connected via a bus. The LVDS unit includes a serial-to-parallel conversion group, a frame buffer group, and a bus interface group. The bus interface group is connected to the storage unit, and the serial-to-parallel conversion group is connected to both the external multi-source devices and the frame buffer group. The bus interface group is used to enable data interaction between the storage unit and the frame buffer group. The serial-to-parallel conversion group is used to enable data interaction between the frame buffer group and the external multi-source devices based on a preset communication protocol.

[0025] In this embodiment, the serial-to-parallel conversion group, based on a preset communication protocol, completes data interaction between the frame buffer group and external multi-source devices. Its core is to adapt to the signal format differences between external multi-source devices and the internal device, realizing bidirectional conversion between serial and parallel signals. At the same time, it relies on the preset communication protocol to complete data encoding and decoding and format calibration, ensuring that the data output by external multi-source devices can enter the device in compliance with regulations, or that the data to be transmitted by the device can be sent to external multi-source devices in compliance with regulations. Based on the LVDS architecture, the LVDS level standard itself has strong anti-interference capabilities. Combined with the preset communication protocol on which the serial-to-parallel conversion group relies, it can effectively resist the interference of the complex electromagnetic environment in space, improve the reliability of data transmission, and meet the stringent requirements of aerospace applications for data transmission and reception stability. Furthermore, the design of the serial-to-parallel conversion group directly interfacing with external multi-source devices realizes the integration of multiple functions such as chip-to-chip interconnection communication, camera video data reception, and ADC sampling data reception, replacing the limitations of traditional communication methods that only support specific data formats. This greatly improves the integration of the interface, simplifies the hardware structure of the device, and adapts to the design requirements of lightweight and miniaturized spaceborne equipment. The frame buffer group, acting as a buffer unit for data transfer, can temporarily store data transmitted by the serial-to-parallel conversion group, alleviating the problem of mismatch between the data processing rates of external multi-source devices and the internal data processing speed of the device. It avoids overflow or interruption during data transmission, ensuring the continuity of multi-source data transmission, preventing the loss of critical task data, and improving the efficiency of data flow between the storage unit and the LVDS unit, thus meeting the requirements of spaceborne data processing for high-speed transmission and real-time response. The bus interface group, based on the high-speed transmission characteristics of the bus, enables the writing of buffered data from the frame buffer group to the storage unit, and the reading of data to be transmitted from the storage unit to the frame buffer group, ensuring efficient data flow within the device.

[0026] It should also be noted that, please refer to Figure 2The pre-defined communication protocol is a frame format and timing specification designed to adapt to spaceborne data transmission scenarios. Specifically, a single frame (frame type 1) defined by the communication protocol adopts a fixed structure, sequentially including a frame start identifier, padding bits, valid data segment, padding bits, and a frame end identifier. The frame start identifier and frame end identifier are fixed fields used to define the transmission boundaries of a single frame, ensuring the receiving end can clearly identify the start and end range of the single frame data. The padding bits are format adaptation fields, used to align the hardware transmission bit width and synchronize data to adapt to the timing matching requirements during serial-to-parallel conversion. The valid data segment is the service data carrying area, used to transmit multi-source data in spaceborne scenarios, including camera video data, analog-to-digital converter sampling data, and other service information. In multi-frame continuous transmission scenarios, padding bits are also inserted between adjacent frames as intervals to prevent data aliasing during continuous transmission and ensure independent identification of each frame. Furthermore, from a transmission timing perspective, the preset communication protocol relies on a low-voltage differential clock signal for synchronous transmission, and simultaneously uses a low-voltage differential chip select signal to enable communication for the target device. The low-voltage differential chip select signal is a device selection control signal used to specify the external device currently interacting with the onboard data transceiver. Only when the low-voltage differential chip select signal is at a valid level will the corresponding external device respond to the communication request. The transmission timing flow of the low-voltage differential frame signal is as follows: first, the start padding bit is transmitted; after the transmission of the padding bit is complete, the frame start identifier is transmitted; then, the padding bit is transmitted again; then, the data segment is transmitted; after the data segment is transmitted, the padding bit is transmitted again; then, the frame end identifier is transmitted; and finally, the padding bit is transmitted again. During the padding phase, the low-differential-voltage fragment select (LDVFS) signal is high. During the frame start identifier, data segment, and frame end identifier phases, the LLVFS signal is low. Setting the LLVFS signal high during the padding phase ensures that external devices only respond within the core frame containing service data, ignoring meaningless auxiliary fields, thus guaranteeing low error rate and high orderliness in satellite data transmission. The data segment includes a checksum field generated by a cyclic redundancy check (CRC) algorithm. During data transmission, the checksum field is calculated from the valid data segment and transmitted along with the data. During data reception, the serial-to-parallel conversion group recalculates the CRC value for the received data segment and compares it with the transmitted checksum field, thereby verifying data integrity and correctness, improving the integrity and correctness of data transmission.

[0027] Further, please refer to Figure 1In the aforementioned onboard data transceiver for a satellite system, the onboard data transceiver further includes a central processing unit, which is connected to the storage unit and the LVDS unit via a bus. The LVDS unit further includes a configuration register group, which is connected to the bus interface group. The configuration register group is used to obtain configuration instructions sent by the central processing unit and configure the working mode based on the configuration instructions.

[0028] In this embodiment, the core function of the configuration register group is to receive and store the configuration instructions issued by the central processing unit, and at the same time, to complete the working mode configuration of each functional sub-module of the LVDS unit based on the instruction content. The configuration instructions involved can cover a variety of key parameters such as the communication protocol parameters of the serial-to-parallel conversion group, the buffer depth threshold of the frame buffer group, the effective level and timing matching parameters of the low voltage differential chip select signal, and the operation rules of the data segment cyclic redundancy check algorithm, so as to ensure that each sub-module of the LVDS unit operates collaboratively according to the requirements of the spaceborne mission.

[0029] Further, please refer to Figure 3 In the aforementioned onboard data transceiver device for a satellite system, the serial-to-parallel conversion group includes a multiplexer, a format converter, a multiplexer, and a frame parser. The external multi-source device, the multiplexer, the format converter, the multiplexer, the frame parser, and the frame buffer group are connected sequentially. The multiplexer receives multiple serial data transmitted by the external multi-source device. The format converter performs parallel conversion processing on the multiple serial data streams to obtain multiple parallel data streams. The multiplexer selects target parallel data from the multiple parallel data streams based on the communication protocol. The frame parser performs frame parsing and integrity verification processing on the target parallel data based on the communication protocol to obtain valid frame data and transmits the valid frame data to the frame buffer group, so that the frame buffer group transmits the valid frame data to the storage unit through the bus interface group.

[0030] In this embodiment, the multi-channel data interface adapter serves as an interaction bridge between the serial-to-parallel conversion group and external multi-source devices. It is compatible with the interface characteristics of different types of external devices. For example, it can integrate three types of receiving modules: an 803 protocol receiver, a camera receiver, and an analog-to-digital converter receiver. These modules respectively adapt to spaceborne devices conforming to the 803 protocol (such as spaceborne transponders, telemetry and control terminals, etc.), spaceborne camera equipment, and spaceborne multi-channel analog-to-digital converters. Through this modular and targeted design, it can accurately accommodate the interface characteristics of various external devices, achieving stable reception of multiple serial data streams and improving the compatibility of the data processing link. The format converter performs parallel conversion processing on the multiple serial data streams, transforming each serial data stream into parallel data. Leveraging the high transmission efficiency of parallel data, it improves the processing speed of subsequent data selection and parsing stages. The multiplexer, based on the frame structure specifications and data transmission priority definitions of the communication protocol, selects the target parallel data that meets the current task requirements from the multiple parallel data streams. The frame parser identifies the start and end frame identifiers in the target parallel data according to the frame structure defined by the protocol, thereby defining the boundaries of a single frame. It also separates the padding bits and valid data segments within the frame, filtering the padding bits. Based on this, the frame parser executes the cyclic redundancy check process specified by the communication protocol, recalculates the checksum value for the valid data segment, and compares it with the checksum field embedded in the data segment. It removes erroneous data caused by the complex electromagnetic environment on space and finally outputs valid frame data that conforms to the protocol specifications to the frame buffer group, which is then transmitted to the storage unit via the bus interface group. This reduces the bit error rate in the complex electromagnetic environment on space and ensures the integrity and correctness of data transmission.

[0031] Further, please refer to Figure 3 In the aforementioned onboard data transceiver device for a satellite system, the serial-to-parallel conversion group further includes a frame packer, and the frame buffer group, the frame packer, and the format converter are connected in sequence. The frame packer is used to perform frame encapsulation and integrity verification processing on the data to be transmitted obtained by the frame buffer group from the storage unit based on the communication protocol to obtain parallel frame data. The format converter is also used to perform serial conversion processing on the parallel frame data to obtain LVDS serial data, and transmit the LVDS serial data to the external multi-source device.

[0032] In this embodiment, the frame packetizer is used to perform frame encapsulation processing on the data to be transmitted obtained from the storage unit by the frame buffer group based on a preset communication protocol. According to the fixed frame structure defined by the protocol, it sequentially encapsulates the frame start identifier, padding bits, valid data segment, padding bits, and frame end identifier. Simultaneously, referring to the protocol's cyclic redundancy check process, it calculates a checksum field based on the valid data segment and embeds it within the data segment, completing the encapsulation and verification of parallel frame data. This ensures that the transmitted frame data fully conforms to the format and verification standards specified by the protocol, improving the compatibility and consistency of data transmission and avoiding transmission errors caused by frame format mismatch. The format converter also has bidirectional conversion functions. In addition to converting the serial data from the external device to parallel data during the data reception stage, it further performs serial conversion processing on the parallel frame data output by the frame packetizer during the data transmission stage, converting it into LVDS serial data conforming to the low-voltage differential signal standard, and finally transmitting it to the target multi-source device of the external multi-source device to complete the downlink data transmission process.

[0033] Further, please refer to Figure 4 In the aforementioned onboard data transceiver device for a satellite system, the frame buffer group includes a ping-pong buffer and a memory accessor, and the serial-to-parallel conversion group, the ping-pong buffer, the memory accessor, and the bus interface group are connected in sequence; the ping-pong buffer is used to realize continuous buffering and forwarding of data; the memory accessor is used to realize data interaction between the ping-pong buffer and the bus interface group.

[0034] In this embodiment, the ping-pong buffer employs a core mechanism of alternating dual buffer operation. During the data reception phase, when one buffer unit receives valid frame data transmitted by the serial-to-parallel conversion group, the other buffer unit, which has already completed data storage, synchronously forwards the data to the memory accessor. Once the receiving buffer unit is full, the two buffer units quickly switch their operating states, ensuring uninterrupted data reception and forwarding, achieving continuous data caching and flow, and avoiding data loss or transmission delays caused by single-buffer read / write conflicts. The memory accessor coordinates the timing synchronization and data transmission protocol between the ping-pong buffer and the bus interface group. Through address mapping and access control, it transmits the data forwarded by the ping-pong buffer to the bus interface group, and simultaneously writes the data to be sent obtained by the bus interface group from the storage unit into the ping-pong buffer in an orderly manner, ensuring smooth data interaction between the buffer unit and the bus link, and avoiding data transmission errors caused by timing mismatches.

[0035] Please see Figure 5 The present invention also provides a method for onboard data transceiver in a satellite system, applicable to any of the onboard data transceiver devices for satellite systems described above, the method comprising the following steps:

[0036] 501. Control the serial-to-parallel conversion group to obtain multiple serial data from the external multi-source device, and perform parallel conversion processing and filtering and verification processing on the multiple serial data respectively to obtain valid frame data;

[0037] 502. Control the frame buffer group to store the valid frame data, and transmit the valid frame data to the storage unit through the bus interface group to complete data reception.

[0038] In this embodiment, the control string parallel conversion group first acquires multiple serial data streams from external multi-source devices, then performs parallel conversion processing on each of the serial data streams. Next, it filters and verifies the resulting parallel data streams. Specifically, it filters out target parallel data from the multiple parallel data streams to avoid link conflicts caused by concurrent transmission of multi-source data. Then, according to a preset communication protocol, it performs frame parsing and integrity verification on the target parallel data, accurately identifying frame start and end markers to define single-frame boundaries, separating and filtering padding bits, and performing cyclic redundancy check on valid data segments. Error data is eliminated by comparing check values, and finally, valid frame data conforming to the protocol specifications is output. After the valid frame data is generated, the control frame buffer group stores the valid frame data and transmits it to the storage unit through the bus interface group to complete data reception. This achieves accurate reception, efficient conversion, and rigorous verification of multi-source data, significantly reducing the bit error rate in the complex electromagnetic environment of spaceborne systems and ensuring data integrity and correctness.

[0039] In the aforementioned method for transmitting and receiving satellite data for a satellite system, the satellite data transceiver device further includes a central processing unit (CPU). The CPU is connected to the storage unit and the LVDS unit via a bus. The LVDS unit further includes a configuration register group, which is connected to the bus interface group. Before controlling the serial-to-parallel conversion group to acquire multiple serial data from the external multi-source device, the method further includes: controlling the configuration register group to acquire configuration instructions transmitted by the CPU, and configuring the operating mode based on the configuration instructions.

[0040] In this embodiment, before initiating the core data reception process of the serial-to-parallel conversion group acquiring multiple channels of serial data from external multi-source devices, a preliminary working mode configuration step needs to be completed. Specifically, the central processing unit generates corresponding configuration instructions based on the onboard mission requirements. These instructions are transmitted to the bus interface group via the bus, and then passed to the configuration register group. The configuration register group controls the acquisition and parsing of the configuration instructions, and configures the relevant working modes of the LVDS unit and the serial-to-parallel conversion group based on the parsed configuration instructions. This ensures that each functional module of the subsequent data reception process is in a preset working state that meets the mission requirements, enabling the core operations of the subsequent serial-to-parallel conversion group, such as data acquisition and processing, to be carried out in an orderly manner based on parameters adapted to the mission requirements. This avoids data reception anomalies caused by mismatched module working modes from the source.

[0041] The aforementioned method for transmitting and receiving onboard data for a satellite system further includes: controlling the frame buffer group to receive the data to be transmitted from the storage unit through the bus interface group, and transmitting the data to be transmitted to the serial-to-parallel conversion group; controlling the serial-to-parallel conversion group to perform frame encapsulation processing and serial conversion processing on the data to be transmitted to obtain LVDS serial data, and transmitting the LVDS serial data to the external multi-source device to complete the data transmission.

[0042] In this embodiment, the frame buffer group is first controlled to receive the data to be transmitted from the storage unit. After the data reception is completed, the frame buffer group is further controlled to smoothly transmit the data to be transmitted to the serial-to-parallel conversion group. Then, the serial-to-parallel conversion group is controlled to perform normalization processing on the received data to be transmitted. First, frame encapsulation processing is performed to integrate the scattered data to be transmitted into frame structure data that conforms to the transmission standard. Then, serial conversion processing is performed on the encapsulated frame structure data to finally generate LVDS serial data that is adapted to the receiving requirements of external multi-source devices. Finally, the serial-to-parallel conversion group is controlled to transmit the LVDS serial data to the target external multi-source device to complete the entire data transmission process.

[0043] In the aforementioned method for transmitting and receiving onboard data for a satellite system, the serial-to-parallel conversion group includes a multi-channel data interface adapter, a format converter, a multiplexer, and a frame parser. The external multi-source device, the multi-channel data interface adapter, the format converter, the multiplexer, and the frame parser are connected sequentially. Controlling the serial-to-parallel conversion group to acquire multiple channels of serial data from the external multi-source device, and performing parallel conversion and filtering / verification processing on the multiple channels of serial data based on the operating mode to obtain valid frame data, includes: controlling the multi-channel data interface adapter to acquire multiple channels of the serial data from the external multi-source device; controlling the format converter to perform parallel conversion processing on the multiple channels of serial data to obtain multiple channels of parallel data; controlling the multiplexer to select target parallel data from the multiple channels of parallel data based on a preset communication protocol; and controlling the frame parser to perform frame parsing and integrity verification processing on the target parallel data based on the communication protocol to obtain the valid frame data.

[0044] In this embodiment, firstly, the multi-channel data interface adapter is controlled to connect to external multi-source devices to acquire serial data transmitted by each device. Next, the format converter is controlled to synchronously perform parallel conversion processing on the received multi-channel serial data, converting the serial data format to a parallel data format to improve the efficiency of subsequent data processing. Then, the multiplexer is controlled to accurately select the target parallel data that meets the current onboard mission requirements from the converted multi-channel parallel data based on the frame structure specifications and data transmission priority rules defined by the preset communication protocol, combined with a pre-configured working mode. This achieves on-demand selection of multi-source data and avoids invalid data consuming system resources. Finally, the frame parser is controlled to perform frame parsing and integrity verification processing based on the preset communication protocol. It first identifies the frame start and frame end markers in the target parallel data to clearly define the transmission boundary of a single frame. Then, it separates and filters the padding bits within the frame to extract valid data segments. Based on this, the cyclic redundancy check process specified in the protocol is executed, recalculating the checksum value for the valid data segment and comparing it with the checksum field embedded in the data segment. This effectively eliminates erroneous data generated during transmission in the complex electromagnetic environment of the onboard environment, and finally outputs valid frame data that conforms to the protocol specifications.

[0045] In the aforementioned method for transmitting and receiving onboard data for a satellite system, the serial-to-parallel conversion group further includes a frame packer, which is connected to the format converter. Controlling the serial-to-parallel conversion group to perform frame encapsulation and serial conversion processing on the data to be transmitted to obtain LVDS serial data includes: controlling the frame packer to perform frame encapsulation and integrity verification processing on the data to be transmitted based on the communication protocol to obtain parallel frame data; and controlling the format converter to perform serial conversion processing on the parallel frame data to obtain the LVDS serial data.

[0046] In this embodiment, the frame packetizer first integrates the scattered data to be transmitted in an orderly manner based on a preset communication protocol, sequentially encapsulating the frame start identifier, padding bits, valid data segments, padding bits, and frame end identifier to form a complete frame data framework. Simultaneously, according to the cyclic redundancy check rules specified in the communication protocol, a checksum field is calculated for the valid data segments and embedded into the corresponding data area to complete the integrity check process. Finally, parallel frame data that conforms to the communication protocol format requirements and passes the check is output. Subsequently, the format converter interfaces with the parallel frame data output by the frame packetizer and performs a parallel-to-serial conversion process, transforming the parallel frame data into LVDS serial data with strong anti-interference capabilities and high transmission rates. This ensures that the converted signal parameters are compatible with the receiving requirements of external multi-source devices, improves the orderliness of data transmission, effectively avoids the error risks during data transmission in the complex electromagnetic environment of spaceborne environments, and guarantees data reliability.

[0047] It is understood that those skilled in the art can make equivalent substitutions or changes to the technical solution and inventive concept of the present invention, and all such changes or substitutions should fall within the protection scope of the present invention.

Claims

1. A space-borne data transceiver apparatus for a satellite system, characterized by The onboard data transceiver is used to connect to external multi-source devices. The onboard data transceiver includes a storage unit and an LVDS unit, which are connected via a bus. The LVDS unit includes a serial-to-parallel conversion group, a frame buffer group, and a bus interface group. The bus interface group is connected to the storage unit, and the serial-to-parallel conversion group is connected to both the external multi-source devices and the frame buffer group. The bus interface group is used to enable data interaction between the storage unit and the frame buffer group. The serial-to-parallel conversion group is used to enable data interaction between the frame buffer group and the external multi-source devices based on a preset communication protocol. The serial-to-parallel conversion group includes a multiplexer, a format converter, a multiplexer, and a frame parser. The external multi-source device, the multiplexer, the format converter, the multiplexer, the frame parser, and the frame buffer group are connected in sequence. The multiplexer is used to receive multiple serial data transmitted by the external multi-source device. The format converter is used to perform parallel conversion processing on multiple channels of serial data to obtain multiple channels of parallel data. The multiplexer is used to select target parallel data from multiple parallel data streams based on the communication protocol. The frame parser is used to perform frame parsing and integrity verification processing on the target parallel data based on the communication protocol to obtain valid frame data, and transmits the valid frame data to the frame buffer group, so that the frame buffer group transmits the valid frame data to the storage unit through the bus interface group; the serial-to-parallel conversion group also includes a frame packer, and the frame buffer group, the frame packer, and the format converter are connected in sequence; the frame packer is used to perform frame encapsulation processing and integrity verification processing on the data to be sent obtained by the frame buffer group from the storage unit based on the communication protocol to obtain parallel frame data; the format converter is also used to perform serial conversion processing on the parallel frame data to obtain LVDS serial data, and transmit the LVDS serial data to the external multi-source device.

2. The space-borne data transceiver apparatus for a satellite system of claim 1, wherein, The onboard data transceiver also includes a central processing unit, which is connected to the storage unit and the LVDS unit via a bus. The LVDS unit also includes a configuration register group, which is connected to the bus interface group. The configuration register group is used to obtain configuration instructions sent by the central processing unit and configure the working mode based on the configuration instructions.

3. The on-board data transceiver apparatus for a satellite system according to claim 1, characterized by, The frame buffer group includes a ping-pong buffer and a memory accessor, and the serial-to-parallel conversion group, the ping-pong buffer, the memory accessor, and the bus interface group are connected in sequence; the ping-pong buffer is used to implement continuous buffering and forwarding of data; The memory accessor is used to enable data interaction between the ping-pong buffer and the bus interface group.

4. A space-borne data transceiving method for a satellite system, characterized by, The method, applied to the onboard data transceiver apparatus for a satellite system according to any one of claims 1-3, comprises: The system controls the multi-channel data interface adapter to acquire multiple channels of serial data from the external multi-source device; controls the format converter to perform parallel conversion processing on the multiple channels of serial data to obtain multiple channels of parallel data; controls the multiplexer to select target parallel data from the multiple channels of parallel data based on a preset communication protocol; and controls the frame parser to perform frame parsing and integrity verification processing on the target parallel data based on the communication protocol to obtain valid frame data. The frame buffer group is controlled to store the valid frame data, and the valid frame data is transmitted to the storage unit through the bus interface group to complete the data reception; The frame buffer group is controlled to receive the data to be transmitted from the storage unit through the bus interface group, and the data to be transmitted is transmitted to the serial-to-parallel conversion group; The frame packer is controlled to perform frame encapsulation and integrity verification on the data to be sent based on the communication protocol to obtain parallel frame data; the format converter is controlled to perform serial conversion on the parallel frame data to obtain LVDS serial data, and the LVDS serial data is transmitted to the external multi-source device to complete the data transmission.

5. The on-board data transceiving method for a satellite system according to claim 4, wherein, The onboard data transceiver also includes a central processing unit, which is connected to the storage unit and the LVDS unit via a bus. The LVDS unit further includes a configuration register group connected to the bus interface group. Before controlling the multiplexer to acquire multiple serial data streams from the external multi-source device, the system further includes: The configuration register group is controlled to obtain the configuration instructions transmitted by the central processing unit, and the operating mode is configured based on the configuration instructions.

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