A room temperature hall rectifier and a method of making the same

Abstract

This invention relates to the technical field of nonlinear electronic devices, specifically to a room-temperature Hall rectifier and its fabrication method. The room-temperature Hall rectifier comprises, from bottom to top, a substrate, a nonlinear Hall effect layer, source / drain electrodes, a blocking layer, and a measurement electrode. The nonlinear Hall effect layer is composed of an L11-order alloy with a (111) crystal plane. This invention, based on L11-order alloys, can meet the requirements of room-temperature operation and zero magnetic field. The robust effect of L11-order alloys, such as L11-CuPt alloys, ensures efficient operation of the device at room temperature, and the entire process requires no external magnetic field, simplifying the rectifier structure.

Description

Technical Field

[0001] This invention relates to the technical field of nonlinear electronic devices, and specifically to a room temperature Hall rectifier and its fabrication method. Background Technology

[0002] Rectification technology is a fundamental electronic function that converts alternating current (AC) to direct current (DC), and it is widely used in many fields such as power adapters, radio communications, audio amplifiers, industrial control systems, and electrical drive systems. Traditional rectification technology mainly relies on the unidirectional conductivity of diodes, but their performance is gradually becoming insufficient to meet the demands of modern electronic devices for high efficiency, high frequency, and miniaturization.

[0003] The most mainstream rectification technology currently is the diode rectifier based on a semiconductor PN junction. Its working principle is to use the unidirectional conductivity characteristic of a diode, which conducts when forward biased and cuts off when reverse biased, to convert the AC input signal into a pulsating DC signal. It usually needs to be combined with a half-wave or full-wave rectifier circuit and a filter circuit to obtain a smooth DC output.

[0004] However, this technology has the following inherent drawbacks:

[0005] 1. Threshold Voltage and Conduction Loss: Traditional silicon diodes have a threshold voltage of approximately 0.6V to 0.7V. The diode will only conduct when the input voltage exceeds this threshold, which leads to inherent energy loss and dissipation as heat. This significantly reduces the overall rectification efficiency of the system, especially in low-voltage, small-signal applications.

[0006] 2. Reverse Recovery Time and Frequency Limitations: Due to the junction capacitance effect of the PN junction, a diode experiences a "reverse recovery time" when switching from the conducting state to the cutting state. Under high-frequency AC signals, the diode may not be able to complete the state switching in time, leading to signal distortion and increased energy loss, severely limiting its application in the GHz-level high-frequency field.

[0007] 3. Circuit complexity and destructive rectification: Traditional rectifier circuits (such as half-wave and full-wave bridge rectifiers) require multiple diodes to work together, and their rectification process "destructively" truncates the original AC waveform. They must rely on external filter circuits to smooth the output waveform, which increases the size and complexity of the system.

[0008] To overcome the shortcomings of traditional diodes, Schottky diodes are widely used. They employ a metal-semiconductor junction instead of a PN junction, resulting in a lower threshold voltage (approximately 0.2V to 0.3V) and a majority carrier conduction mechanism. Therefore, they do not suffer from the accumulation and dissipation problems of minority carriers, exhibiting extremely short reverse recovery times and enabling rectification at higher frequencies (up to GHz). Nevertheless, Schottky diodes do not fundamentally escape the physical limitations of carrier transport in semiconductor devices. Their rectification performance is still limited by carrier transition times, and they exhibit significant reverse leakage current at high temperatures, restricting their application in certain high-voltage, high-temperature scenarios.

[0009] In recent years, rectification technology based on the nonlinear Hall effect has provided a novel approach to solving the aforementioned problems. The Hall effect refers to the linear relationship between the applied current and the generated Hall voltage. The nonlinear Hall effect, on the other hand, refers to the nonlinear relationship between the Hall voltage and the applied current. Especially in material systems with non-centrosymmetric crystal structures, the second-order nonlinear Hall effect results in the Hall voltage being proportional to the square of the applied current. In this case, when driven by an alternating electric field, a second-harmonic resonant Hall voltage and a DC Hall voltage can be generated in the direction perpendicular to the electric field, thus realizing a rectifier based on the nonlinear Hall effect. This rectification mechanism is completely different from the unidirectional conduction principle of diodes, possessing theoretical advantages such as zero threshold voltage and extremely fast intrinsic response speed, paving a new path for next-generation high-frequency, low-power rectifiers. However, current rectifiers based on the nonlinear Hall effect are still in the laboratory research stage, typically requiring extremely low temperatures (such as liquid helium temperature 4K) to generate a sufficiently strong rectified signal; the effect is weak at room temperature, facing significant industrialization challenges. Furthermore, current rectifiers based on the nonlinear Hall effect are not well compatible with semiconductor processes, resulting in poor scalability and high cost.

[0010] Therefore, existing technologies need to be improved. Summary of the Invention

[0011] To address the problems existing in the prior art, this invention proposes a room temperature Hall rectifier and its fabrication method, aiming to solve the technical problem that existing nonlinear Hall rectifiers can only operate at low temperatures and are incompatible with semiconductor processes.

[0012] In a first aspect, the present invention provides a room temperature Hall rectifier, comprising a substrate, a nonlinear Hall effect layer, source and drain electrodes, a blocking layer and a measurement electrode arranged sequentially from bottom to top, wherein the nonlinear Hall effect layer is composed of an alloy with an L11 order and a (111) crystal plane.

[0013] Optionally, the L11 sequence alloy includes CuPt alloy, MnNi alloy, MnPt alloy, FePt alloy or CoPt alloy.

[0014] Optionally, the nonlinear Hall effect layer includes Hall units arranged in a periodic array on a substrate. Each Hall unit includes a first strip extending along the [1-10] crystal direction of the L11-sequence alloy, and 1-2 pairs of second strips extending from the middle of the first strip in a direction perpendicular to the first strip. The two ends of the first strip form a source end and a drain end, and the second strips form Hall ends.

[0015] Optionally, the source and drain electrodes are connected to the source and drain terminals of two adjacent Hall cells, so that the source and drain terminals of the Hall cells, which are periodically arrayed, are connected in series, and the outermost source and drain electrodes are used for AC signal input.

[0016] Optionally, the measuring electrode is connected between a pair of Hall terminals of two adjacent Hall units, so that the Hall terminals of the Hall units arranged in a periodic array are connected in series, and the outermost measuring electrode is used for DC signal output.

[0017] Optionally, both the measuring electrode and the source / drain electrode are made of conductive metal, such as gold.

[0018] Optionally, the substrate is (111) oriented SrTiO3, (111) oriented LaAlO3, (111) oriented MgO, or C-faceted sapphire.

[0019] Optionally, the thickness of the nonlinear Hall effect layer is 5-50 nm.

[0020] Optionally, the barrier layer is made of an insulating material with a thickness of 5-100 nm. The barrier layer is made of SiO2, Si3N4, or Al2O3.

[0021] Secondly, the present invention provides a method for preparing a room temperature Hall rectifier, comprising the following steps:

[0022] S1. Provide a substrate and prepare an alloy with an L11 order and (111) crystal plane on the substrate surface;

[0023] S2. Photoresist is applied to the corresponding position on the L11-order alloy surface of the (111) crystal plane, and then photolithography and etching techniques are used to prepare the L11-order alloy of the (111) crystal plane into a nonlinear Hall effect layer including Hall units arranged in a periodic array.

[0024] S3. Photoresist is coated on the surface of the nonlinear Hall effect layer. Source and drain electrodes are fabricated at the source and drain ends of the Hall unit by photolithography, coating and lift-off techniques in sequence, so that the source and drain ends of two adjacent Hall units are connected.

[0025] S4. Photoresist is coated on the surface of the source and drain electrodes, and a barrier layer is formed on the surface of the source and drain electrodes by sequentially using photolithography, coating, and lift-off techniques.

[0026] S5. Photoresist is coated on the surface of the barrier layer, and photolithography, coating, and lift-off techniques are used in sequence to form a measurement electrode between a pair of Hall ends of two adjacent Hall units.

[0027] Compared with the prior art, the present invention has the following advantages:

[0028] This invention provides a room-temperature Hall rectifier and its fabrication method, which is based on L11-sequence alloys and can meet the requirements of room-temperature operation and zero magnetic field. The robust effect of L11-sequence alloys, such as L11-CuPt alloys, ensures efficient operation of the device at room temperature, and the entire process does not require an external magnetic field, simplifying the rectifier structure.

[0029] The rectification mechanism of this invention originates from the intrinsic Berry curvature of L11-order alloy materials, thus exhibiting no threshold voltage and extremely low energy loss, resulting in zero threshold voltage and ultra-high frequency response. Its physical process involves rapid electron transitions in momentum space, with a response speed reaching the picosecond level, providing a new solution for rectification and frequency doubling applications in the future terahertz band.

[0030] Based on the fourth-order nonlinear Hall effect, a single device can simultaneously output DC voltage and a frequency-harmonic resonant signal. The DC component can be directly used for high-frequency rectification, while the frequency-harmonic signal can be used for frequency-harmonic signal conversion. This allows a single device to simultaneously serve multiple circuit units, such as energy conversion (e.g., wireless charging) and signal processing (e.g., frequency synthesis), greatly improving system integration and functional versatility. Therefore, this invention features multifunctional signal output and efficient rectification.

[0031] The preparation method of this invention is simple, compatible with semiconductor processes, and easy to amplify the output DC voltage or current through series / parallel integration. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the room temperature rectifier Hall rectifier according to Embodiment 1 of the present invention.

[0033] Figure 2 The flowchart illustrates the fabrication of a room-temperature rectifier Hall rectifier according to Embodiment 1 of the present invention.

[0034] Figure 3 This is a schematic diagram of the rectification test of the room temperature rectifier Hall rectifier in Embodiment 1 of the present invention.

[0035] Figure 4 This is a schematic diagram of the room temperature rectifier Hall rectifier of Embodiment 2 of the present invention.

[0036] Figure 5 This is a schematic diagram of the rectification test of the room temperature rectifier Hall rectifier in Embodiment 2 of the present invention.

[0037] Figure 6 The diagram shows the rectification test results of the room temperature rectifier Hall rectifier in Embodiment 1 of the present invention.

[0038] Figure 7 The figure shows the rectification test results of the room temperature rectifier Hall rectifier in Embodiment 2 of the present invention. Detailed Implementation

[0039] This invention provides a room temperature Hall rectifier and its fabrication method. To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention is further described in detail below. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0040] Currently, rectifier devices based on the nonlinear Hall effect are still in the laboratory research stage and face significant challenges in industrialization, mainly in the following aspects:

[0041] Low-temperature operating environment requirements: Most high-performance nonlinear Hall devices reported so far, such as those based on two-dimensional materials such as WTe2, MoTe2, and twisted graphene, usually need to be at extremely low temperatures (such as the liquid helium temperature of 4K) to generate a sufficiently strong rectified signal. The effect is weak at room temperature, which seriously limits their practical application scenarios.

[0042] Material preparation and process complexity: These materials are mostly van der Waals two-dimensional materials, and their device fabrication involves complex and precise mechanical exfoliation, dry / wet transfer, and stacking processes. This process has low yield, poor controllability, and makes it difficult to guarantee batch-to-batch consistency and long-term device stability.

[0043] High cost and poor scalability: The complex fabrication process leads to high manufacturing costs and is incompatible with existing mainstream semiconductor integrated circuit processes, making it difficult to achieve large-scale, low-cost production, which constitutes the main bottleneck for its commercial application.

[0044] In summary, there is an urgent need in this field for a new rectification technology solution that can inherit the inherent advantages of nonlinear Hall effect rectifiers, such as zero threshold and high speed, while overcoming the dependence of existing solutions on low-temperature environments and complex two-dimensional material preparation processes. This solution can achieve stable and efficient operation at room temperature and has good process compatibility and is suitable for large-scale production.

[0045] Based on this, this embodiment provides a room temperature Hall rectifier, including a substrate 1, a nonlinear Hall effect layer 2, a source / drain electrode 3, a blocking layer 4 and a measurement electrode 5 arranged sequentially from bottom to top. The nonlinear Hall effect layer 2 is composed of an alloy with an L11 sequence and a (111) crystal plane.

[0046] The room-temperature Hall rectifier of this embodiment is based on an L11-sequence alloy, which meets the requirements of room-temperature operation and zero magnetic field. The robust effect of L11-sequence alloys, such as L11-CuPt alloys, ensures efficient operation of the device at room temperature, and the entire process does not require an external magnetic field, simplifying the rectifier structure. Its rectification mechanism originates from the intrinsic Berry curvature of the L11-sequence alloy material, thus having no threshold voltage and extremely low energy loss, resulting in zero threshold voltage and ultra-high frequency response. Its physical process involves the rapid transition of electrons in momentum space, with a response speed on the picosecond scale, providing a new solution for rectification and frequency doubling applications in the future terahertz band. Based on the fourth-order nonlinear Hall effect, a single device can simultaneously output DC voltage and a frequency-doubled resonant signal. The DC component can be directly used for high-frequency rectification, while the frequency-doubled signal can be used for frequency-doubled signal conversion. This allows a single device to simultaneously serve multiple circuit units such as energy conversion (e.g., wireless power charging) and signal processing (e.g., frequency synthesis), greatly improving system integration and functional versatility. Therefore, this invention features multifunctional signal output and high-efficiency rectification.

[0047] Therefore, this embodiment utilizes the fourth-order nonlinear Hall effect generated by the triple rotational symmetry Berry curvature of the L11-order alloy to convert alternating current into a DC output signal perpendicular to it, achieving a rectification effect. It has the advantages of operating at room temperature, requiring no external magnetic field, fast response, and high-efficiency rectification. The L11-order alloy with a (111) crystal plane has a triple rotational symmetry axis perpendicular to the surface. Under the action of spin-orbit coupling, it generates a triple rotational symmetry Berry curvature in momentum space, thereby realizing the fourth-order nonlinear Hall effect.

[0048] It should be noted that the traditional Hall effect refers to the Hall voltage generated in the vertical direction when current flows through a conductor under the influence of a magnetic field. The nonlinear Hall effect in this embodiment refers to the nonlinear relationship between the Hall voltage in the vertical direction and the input current. In L11-order alloys, such as L11-order CuPt alloys with (111) crystal planes, the strong Berry curvature singularity induced by the inherent triple rotational symmetry of its crystal structure can cause a fourth-order nonlinear Hall effect. In this case, the Hall voltage in the vertical direction is proportional to the fourth power of the applied current. Therefore, when an alternating current with a frequency of ω is passed through the outermost source and drain electrodes, a DC Hall voltage, a second harmonic resonant Hall voltage with a frequency of 2ω, and a fourth harmonic resonant Hall voltage with a frequency of 4ω can be detected in the outermost measuring electrode. The harmonic resonant signal and DC voltage signal obtained based on this can be applied to high-frequency rectification, wireless power charging, and frequency doubling signal conversion with ultra-low threshold voltage and ultra-high response speed.

[0049] In some embodiments, the L11-sequence alloy includes CuPt alloy, MnNi alloy, MnPt alloy, FePt alloy, or CoPt alloy.

[0050] In a preferred embodiment, the L11 sequence alloy is a CuPt alloy. The preparation method of this material is compatible with current semiconductor integrated circuit technology and can be easily extended by cascaded devices to amplify the output signal.

[0051] In a preferred embodiment, the nonlinear Hall effect layer 2 includes Hall units 2-1 arranged in a periodic array on a substrate. Each Hall unit 2-1 includes a first strip 2-11 extending along the [1-10] crystal direction of the L11-sequence alloy, and 1-2 pairs of second strips 2-12 extending from the middle of the first strip 2-11 in a direction perpendicular to the first strip 2-11. The two ends of the first strip 2-11 form a source end and a drain end, and the second strip 2-12 forms a Hall end.

[0052] It should be noted that in this embodiment, the two ends of the first block 2-11, that is, the two ends of the [1-10] crystal direction, serve as the source and drain ends, and the second block 2-12 serves as the Hall end. The source-drain direction of the current channel is parallel to the [1-10] crystal direction of the nonlinear Hall effect layer, and the direction of the Hall end is perpendicular to the current channel. When there is only one pair of second blocks 2-12, the source, drain, and Hall ends form a cross structure. When there are two pairs of second blocks 2-12, the source, drain, and Hall ends form a six-end structure.

[0053] In one embodiment, the source and drain electrodes 3 are connected to the source and drain terminals of two adjacent Hall cells 2-1, so that the source and drain terminals of the Hall cells 2-1, which are periodically arrayed, are connected in series, and the outermost source and drain electrodes are used for AC signal input.

[0054] In one embodiment, the measuring electrode 5 is connected between a pair of Hall terminals of two adjacent Hall units 2-1, so that the Hall terminals of the Hall units 2-1 arranged in a periodic array are connected in series, and the outermost measuring electrode is used for DC signal output.

[0055] In one embodiment, both the measuring electrode 5 and the source / drain electrode 3 are made of conductive metal, such as gold.

[0056] It should be noted that the nonlinear Hall effect layer in this embodiment, such as the L11-sequence CuPt alloy, is patterned as an array of Hall units. When there is a pair of Hall terminals, the structure is a cross-shaped four-terminal configuration; when there are two pairs of Hall terminals, the structure is a long strip-shaped six-terminal configuration. The source and drain terminals are arranged parallel to each other at both ends of the long strip structure, and the direction of the Hall terminals is perpendicular to the current channel (source and drain terminals). The source-drain directions of these long strip structures and cross-shaped structures are parallel to each other. Source and drain electrodes 3 are formed on the nonlinear Hall effect layer. The source and drain electrodes 3 respectively make contact with the source and drain terminals of the long strip structure or cross-shaped structure, which allows different long strip structures and cross-shaped structures to be connected in series. The outermost source and drain electrodes are used for AC signal input. Then, a barrier layer 4 is formed on the source and drain electrodes 3 to isolate the source and drain electrodes 3 from the measuring electrode 5. The measuring electrode 5 is formed on the barrier layer 4. The measuring electrode 5 respectively makes contact with one pair of Hall terminals of the long strip structure, which allows these Hall terminals to be connected in series. The outermost measuring electrode is used for DC signal output.

[0057] In some embodiments, the substrate 1 is (111) oriented SrTiO3, (111) oriented LaAlO3, (111) oriented MgO, or C-faceted sapphire.

[0058] In some embodiments, the thickness of the nonlinear Hall effect layer 2 is 5-50 nm. Specifically, the thickness can be 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, or any value within that range.

[0059] In some embodiments, the barrier layer 4 is made of an insulating material with a thickness of 5-100 nm. Specifically, the thickness can be 5 nm, 20 nm, 40 nm, 60 nm, 80 nm, 95 nm, or any value within that range. The barrier layer 4 can be made of SiO2, Si3N4, or Al2O3.

[0060] This embodiment also provides a method for preparing a room temperature Hall rectifier, including the following steps:

[0061] S1. Provide a substrate and prepare an alloy with an L11 order and (111) crystal plane on the substrate surface;

[0062] S2. Photoresist is applied to the corresponding position on the L11-order alloy surface of the (111) crystal plane, and then photolithography and etching techniques are used to prepare the L11-order alloy of the (111) crystal plane into a nonlinear Hall effect layer including Hall units arranged in a periodic array.

[0063] S3. Photoresist is coated on the surface of the nonlinear Hall effect layer. Source and drain electrodes are fabricated at the source and drain ends of the Hall unit by photolithography, coating and lift-off techniques in sequence, so that the source and drain ends of two adjacent Hall units are connected.

[0064] S4. Photoresist is coated on the surface of the source and drain electrodes, and a barrier layer is formed on the surface of the source and drain electrodes by sequentially using photolithography, coating, and lift-off techniques.

[0065] S5. Photoresist is coated on the surface of the barrier layer, and photolithography, coating, and lift-off techniques are used in sequence to form a measurement electrode between a pair of Hall ends of two adjacent Hall units 2-1.

[0066] In S1, an L11-order alloy with a (111) crystal plane was formed on the substrate surface using magnetron sputtering. X-ray diffraction analysis was then used to confirm that the nonlinear Hall effect layer was an L11-order CuPt alloy with a (111) crystal plane. Further optical methods (such as second harmonic generation or polarized Raman spectroscopy) were used to determine the crystallographic orientation of the nonlinear Hall effect layer, and photolithographic markings aligned with the crystal orientation of the nonlinear Hall effect layer [1-10] were prepared.

[0067] The photolithography technology in S2 includes laser direct-write photolithography or electron beam lithography; the etching technology includes ion beam etching or inductively coupled plasma etching. Specifically, it includes etching the nonlinear Hall effect layer to form Hall units (arranged in an array), with a structure of elongated six-terminal or cross-shaped four-terminal configuration. After etching, the photoresist is removed using a resist remover.

[0068] In S3, photoresist is coated at corresponding positions on the surface of the nonlinear Hall effect layer. Then, photolithography, deposition techniques (such as magnetron sputtering or electron beam evaporation), and lift-off techniques are sequentially used to form source and drain electrodes. In this embodiment, the source and drain electrodes respectively form contact with the source and drain ends of the elongated or cross-shaped structure, allowing different elongated and cross-shaped structures to be connected in series. The outermost source and drain electrodes are used for AC signal input.

[0069] The barrier layer in S4 can be used to isolate the source / drain electrodes and the measurement electrodes.

[0070] It should be noted that when an AC signal is input into the nonlinear Hall effect layer through the outermost source-drain electrodes, and the AC current flows along the source-drain direction (i.e., the crystal orientation of the nonlinear Hall effect layer [1-10]), a fourth-order nonlinear Hall effect simultaneously generates a frequency-doubled resonant Hall voltage and a DC Hall voltage. The outermost measuring electrodes are connected to the positive and negative terminals of an AC voltmeter and a DC voltmeter, respectively. The second and fourth harmonic resonant Hall voltages output from the outermost measuring electrodes are detected using the phase-locked loop (PLL) technique of the AC voltmeter, and the DC Hall voltage output from the outermost measuring electrodes is detected using the DC voltmeter. The DC voltage signal is then output to the load through the outermost measuring electrodes, thus achieving the rectification effect of converting the input AC power into a DC signal.

[0071] Because the materials of this invention possess excellent process compatibility and scalability, they are compatible with standard semiconductor processes. The devices can be easily integrated in series / parallel to amplify the output DC voltage or current, overcoming the limitations of a single unit's output power and laying a solid foundation for practical application.

[0072] The present invention will be further described below with reference to specific embodiments.

[0073] Example 1

[0074] 1. For example Figure 1 As shown, the room temperature Hall rectifier of the present invention includes: a room temperature Hall rectifier, comprising a substrate 1, a nonlinear Hall effect layer 2, a source / drain electrode 3, a blocking layer 4 and a measurement electrode 5 arranged sequentially from bottom to top, wherein the nonlinear Hall effect layer 2 is composed of a CuPt alloy with an L11 order and a (111) crystal plane.

[0075] The nonlinear Hall effect layer 2 includes Hall cells 2-1 arranged in a periodic array on a substrate. Each Hall cell 2-1 includes a first strip 2-11 extending along the [1-10] crystal direction of the L11-sequence alloy, and a pair of second strips 2-12 extending from the middle of the first strip 2-11 in a direction perpendicular to the first strip 2-11. The two ends of the first strip 2-11 form a source end and a drain end, and the second strip 2-12 forms a Hall end. That is, the Hall cell in this embodiment is cross-shaped with four ends.

[0076] The source and drain electrodes 3 are connected to the source and drain terminals of two adjacent Hall cells 2-1, so that the source and drain terminals of the Hall cells 2-1, which are periodically arrayed, are connected in series. The outermost source and drain electrodes are used for AC signal input.

[0077] The measuring electrode 5 is connected between a pair of Hall terminals of two adjacent Hall units 2-1, so that the Hall terminals of the Hall units 2-1 arranged in a periodic array are connected in series, and the outermost measuring electrode is used for DC signal output.

[0078] The measuring electrode 5 and the source / drain electrode 3 are both made of gold. The source / drain electrode 3 has a thickness of 30 nm, and the measuring electrode 5 has a thickness of 50 nm.

[0079] The substrate 1 is a (111) oriented SrTiO3.

[0080] The thickness of the nonlinear Hall effect layer 2 is 10 nm.

[0081] The barrier layer 4 is made of SiO2 and has a thickness of 40 nm.

[0082] 2. The preparation method of the room temperature Hall rectifier in this embodiment is as follows: Figure 2 As shown, it includes the following steps:

[0083] A substrate 1 is provided, and a CuPt alloy with an L11-order (111) crystal plane is formed on the front side of the substrate by magnetron sputtering as a nonlinear Hall effect layer 2, such as... Figure 2 (a) and Figure 2 As shown in (b), the sputtering powers of Cu and Pt were similar to control their composition ratio at 1:1, and the deposition temperature was 500℃. X-ray diffraction analysis confirmed that the nonlinear Hall effect layer was an L11-sequence CuPt alloy with a (111) crystal plane. The crystallographic orientation of the nonlinear Hall effect layer was determined by optical means (such as second harmonic generation or polarized Raman spectroscopy), and photolithographic marks aligned with the crystal orientation of the nonlinear Hall effect layer [1-10] were prepared.

[0084] A photoresist is coated on the surface of the nonlinear Hall effect layer. Laser direct-write lithography and ion beam etching are then used sequentially to etch the nonlinear Hall effect layer into an array of Hall cells. In this embodiment, the structure is a cross-shaped four-terminal configuration. After etching, the photoresist is removed using a photoresist remover. Figure 2 As shown in (c). The elongated structure etched from the nonlinear Hall effect layer has a pair of parallel source and drain ends, and two pairs of parallel Hall ends. The current channel (source-drain direction) is parallel to the crystal orientation of the nonlinear Hall effect layer [1-10], and the Hall end direction is perpendicular to the current channel. The cross-shaped structure etched from the nonlinear Hall effect layer has a pair of parallel source and drain ends, and a pair of parallel Hall ends. The current channel (source-drain direction) is parallel to the crystal orientation of the nonlinear Hall effect layer [1-10], and the Hall end direction is perpendicular to the current channel. The source-drain directions of these cross-shaped structures are parallel to each other.

[0085] A photoresist is coated onto the surface of the nonlinear Hall effect layer. Laser direct-write lithography is then used to expose the source and drain terminals of the Hall units. Electron beam evaporation deposition is used to deposit conductive gold, followed by resist stripping to form source and drain electrodes to connect the Hall units. The source and drain electrodes contact the source and drain terminals of the cross-shaped structures, respectively, allowing different cross-shaped structures to be connected in series. The outermost source and drain electrodes are used for AC signal input, such as... Figure 2 As shown in (d).

[0086] Photoresist is coated on the surface of the source and drain electrodes. A SiO2 layer is deposited sequentially using laser direct-write lithography, a deposition technique, and a lift-off technique to form a barrier layer 4. This barrier layer 4 is located above the source and drain electrodes and is used to isolate the source and drain electrodes 3 and the measurement electrode 5, such as... Figure 2 As shown in (e).

[0087] Photoresist is coated on the surface of barrier layer 4. Then, laser direct-write lithography is used to expose the Hall ports of the Hall units; electron beam evaporation deposition is used to deposit conductive gold; and a resist stripping process is employed to form measurement electrodes 5. Measurement electrodes 5 make contact with the Hall terminals of the cross-shaped structure, connecting these Hall terminals in series. Figure 2 As shown in (f), the outermost measuring electrode 5 is connected to the load for DC signal output.

[0088] 3. The room temperature Hall rectifier obtained in this embodiment was tested. The test schematic diagram is shown below. Figure 3 As shown, an AC signal with frequency ω is input into the nonlinear Hall effect layer through the outermost source-drain electrode. When the AC current flows along the source-drain direction, i.e., the crystal orientation of the nonlinear Hall effect layer [1-10], a frequency-doubled resonant Hall voltage and a DC Hall voltage are generated simultaneously through the fourth-order nonlinear Hall effect. The outermost source-drain electrode is connected to the positive and negative terminals of the AC signal source. The outermost measuring electrode is connected to the positive and negative terminals of an AC voltmeter and a DC voltmeter, respectively. The second-harmonic and fourth-harmonic resonant Hall voltages output from the outermost measuring electrode are detected using the phase-locked loop technique of the AC voltmeter, and the DC Hall voltage output from the outermost measuring electrode is detected using the DC voltmeter. The DC voltage signal is output to the load through the outermost measuring electrode, thereby achieving the rectification effect of converting the input AC power into a DC signal, as shown in the figure. Figure 3 As shown. When an AC signal with frequency ω is applied to the outermost source-drain electrodes, a DC Hall voltage, a second harmonic Hall voltage with frequency 2ω, and a fourth harmonic Hall voltage with frequency 4ω can be detected at the outermost measuring electrodes. The results are as follows. Figure 6 As shown.

[0089] Example 2

[0090] The difference between this embodiment and Embodiment 1 is that the Hall unit in this embodiment is different from that in Embodiment 1, such as... Figure 4 As shown, the Hall unit 2-1 in this embodiment includes a first strip 2-11 extending along the [1-10] crystal direction of the L11 sequence alloy, and two pairs of parallel second strips 2-12 extending from the middle of the first strip 2-11 in a direction perpendicular to the first strip 2-11. The two ends of the first strip 2-11 form the source end and the drain end, and the second strips 2-12 form the Hall end. That is, the Hall unit in this embodiment is a long strip with six ends. The room temperature Hall rectifier obtained in this embodiment is tested, and the test schematic diagram is shown below. Figure 5 As shown, the results are as follows Figure 7 As shown, similar to Example 1, when an AC signal with a frequency of ω is applied to the outermost source-drain electrode, a DC Hall voltage, a second harmonic Hall voltage with a frequency of 2ω, and a fourth harmonic Hall voltage with a frequency of 4ω can be detected in the outermost measuring electrode.

[0091] In summary, this invention provides a room-temperature Hall rectifier and its fabrication method, which is based on L11-sequence alloys and can meet the requirements of room-temperature operation and zero magnetic field. The robust effect of L11-sequence alloys, such as L11-CuPt alloys, ensures efficient operation of the device at room temperature, and the entire process does not require an external magnetic field, simplifying the rectifier structure.

[0092] The rectification mechanism of this invention originates from the intrinsic Berry curvature of L11-order alloy materials, thus exhibiting no threshold voltage and extremely low energy loss, resulting in zero threshold voltage and ultra-high frequency response. Its physical process involves rapid electron transitions in momentum space, with a response speed reaching the picosecond level, providing a new solution for rectification and frequency doubling applications in the future terahertz band.

[0093] Based on the fourth-order nonlinear Hall effect, a single device can simultaneously output DC voltage and a frequency-harmonic resonant signal. The DC component can be directly used for high-frequency rectification, while the frequency-harmonic signal can be used for frequency-harmonic signal conversion. This allows a single device to simultaneously serve multiple circuit units, such as energy conversion (e.g., wireless charging) and signal processing (e.g., frequency synthesis), greatly improving system integration and functional versatility. Therefore, this invention features multifunctional signal output and efficient rectification.

[0094] Finally, it should be noted that the purpose of disclosing the embodiments is to help further understand the present invention. However, those skilled in the art will understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection of the present invention is defined by the claims.

Claims

1. A room temperature Hall rectifier, characterized in that, The nonlinear Hall effect layer includes a substrate, a nonlinear Hall effect layer, source and drain electrodes, a blocking layer and a measurement electrode arranged sequentially from bottom to top. The nonlinear Hall effect layer is composed of an alloy with an L11 order and a (111) crystal plane. The nonlinear Hall effect layer includes Hall units arranged in a periodic array on a substrate. Each Hall unit includes a first strip extending along the [1-10] crystal direction of the L11 sequence alloy and 1-2 pairs of second strips extending from the middle of the first strip in a direction perpendicular to the first strip. The two ends of the first strip form a source end and a drain end, and the second strips form Hall ends.

2. The room temperature Hall rectifier according to claim 1, characterized in that, The L11 series alloys include CuPt alloys, MnNi alloys, MnPt alloys, FePt alloys, or CoPt alloys.

3. A room temperature Hall rectifier according to claim 1, characterized in that, The source and drain electrodes are connected to the source and drain terminals of two adjacent Hall cells, so that the source and drain terminals of the Hall cells, which are arranged in a periodic array, are connected in series. The outermost source and drain electrodes are used for AC signal input.

4. A room temperature Hall rectifier according to claim 1, characterized in that, The measuring electrode is connected between a pair of Hall terminals of two adjacent Hall units, so that the Hall terminals of the Hall units arranged in a periodic array are connected in series, and the outermost measuring electrode is used for DC signal output.

5. A room temperature Hall rectifier according to claim 1, characterized in that, The source / drain electrodes and the measuring electrodes are all made of conductive metal.

6. A room temperature Hall rectifier according to claim 1, characterized in that, The substrate is (111) oriented SrTiO3, (111) oriented LaAlO3, (111) oriented MgO, or C-faceted sapphire.

7. A room temperature Hall rectifier according to claim 1, characterized in that, The thickness of the nonlinear Hall effect layer is 5-50 nm.

8. A room temperature Hall rectifier according to claim 1, characterized in that, The barrier layer is made of insulating material and has a thickness of 5-100 nm.

9. A method for preparing a room temperature Hall rectifier as described in any one of claims 1-8, characterized in that, Includes the following steps: S1. Provide a substrate and prepare an alloy with an L11 order and (111) crystal plane on the substrate surface; S2. Photoresist is applied to the corresponding position on the L11-order alloy surface of the (111) crystal plane, and then photolithography and etching techniques are used to prepare the L11-order alloy of the (111) crystal plane into a nonlinear Hall effect layer including Hall units arranged in a periodic array. S3. Photoresist is coated on the surface of the nonlinear Hall effect layer. Source and drain electrodes are fabricated at the source and drain ends of the Hall unit by photolithography, coating and lift-off techniques in sequence, so that the source and drain ends of two adjacent Hall units are connected. S4. Photoresist is coated on the surface of the source and drain electrodes, and a barrier layer is formed on the surface of the source and drain electrodes by sequentially using photolithography, coating, and lift-off techniques. S5. Photoresist is coated on the surface of the barrier layer, and photolithography, coating, and lift-off techniques are used in sequence to form a measurement electrode between a pair of Hall ends of two adjacent Hall units.

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