Improved impact suppression driving circuit
By coordinating the voltage detection and protection status output circuit, the fast discharge circuit, and the implementation circuit, the problem of the suppression circuit repeatedly turning on or off when the equipment is powered on or off is solved, thus realizing the protection of the suppression circuit and the normal operation of the equipment, and extending the equipment life.
Patent Information
- Application Number
- CN202511864096.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-11
- Publication Date
- 2026-02-24
AI Technical Summary
Existing surge suppression circuits are prone to repeated switching on and off when the equipment is powered on or off, which can damage the suppression circuit or the equipment.
The voltage detection and protection status output circuit, the fast discharge circuit, and the implementation circuit work together to ensure that the suppression tube turns on before the load when the device is powered on and turns off after the load when the power is lost. The delay control of the capacitor and resistor prevents the load current from damaging the suppression circuit.
It effectively protects the shock-suppressing circuit from damage, ensures the equipment works normally during repeated power-on and power-off cycles, and extends the equipment's service life.
Smart Images
Figure CN121566401A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of shock suppression drive circuit technology, specifically an improved shock suppression drive circuit. Background Technology
[0002] In practical applications, many devices need to suppress the starting current to prevent excessive starting current from damaging the device or causing it to enter a false protection state. This is why device circuits often incorporate surge suppression circuits. However, the design of these circuits often focuses only on the suppression process, neglecting the load. Load current changes significantly impact the surge suppression circuit, potentially damaging it or even causing the device to malfunction. Currently available surge suppression circuits suffer from significant issues with load start-up and shutdown times. If the load starts before the surge suppression circuit, it is prone to overcurrent damage, while if the load shuts off after the circuit, the surge resistor within the circuit is easily damaged. Consequently, existing surge suppression circuits repeatedly turn on and off during device power-on or power-off, easily leading to damage to the circuit or the device itself. Therefore, an improved surge suppression drive circuit is proposed. Summary of the Invention
[0003] The purpose of this invention is to provide an improved shock suppression drive circuit to solve the problem mentioned in the background art that the existing shock suppression circuits are prone to damage due to repeated switching on and off when the device is powered on or off.
[0004] To achieve the above objectives, the present invention provides the following technical solution: an improved surge suppression drive circuit, comprising a voltage detection and protection status output circuit, a fast discharge circuit, and an implementation circuit connected to the fast discharge circuit. The voltage detection and protection status output circuit has a first comparator. The non-inverting input terminal of the first comparator is connected to a device through a sampling resistor, which is used for voltage acquisition. The output terminal of the first comparator is connected to a charging capacitor C19 through a resistor R34, a diode D4, and a resistor R35. The inverting input terminal of the first comparator is connected to a transistor Q12 through a resistor R49. The common connection between the inverting input terminal of the first comparator and the resistor R49 is connected to a reference voltage value. The emitter of transistor Q12 is connected to a transistor Q13. The fast discharge circuit includes dual diodes D5, a transistor Q15 connected to the output of dual diodes D5, and a transistor Q16 connected to the base of transistor Q15. The base of transistor Q16 is connected to the input of diode D4 through resistor R62. One input of dual diode D5 is connected to the input of resistor R35 through resistor R55. The other input of dual diode D5 is connected to resistor R59 and charging capacitor C22. The output of resistor R59 is connected to transistor Q14. The emitter of transistor Q14 and the output of charging capacitor C22 are grounded to PGND1. The collector of transistor Q14 is connected to the load. The implementation circuit includes a second comparator and an optocoupler. The non-inverting input of the second comparator is connected to the charging capacitor C19 through resistor R38, and the output of the second comparator is connected to resistors R58 and R17 respectively. The output of resistor R17 is connected to the optocoupler through a field-effect transistor Q10. The three pins of the optocoupler are connected to capacitor C18 and resistor R51 respectively. The output of resistor R51 is connected to transistor Q11, and the emitter of transistor Q11 and the output of capacitor C18 are connected to the device ground PGND_E. The collector of transistor Q11 is connected to a suppressor through resistor R45.
[0005] Preferably, when the first comparator outputs a low level, transistor Q15 is turned on, and the fast discharge circuit is used to discharge the charge of charging capacitor C22. When the first comparator outputs a high impedance state, charging capacitor C19 is charged through resistor R34, diode D4, and resistor R35. When the voltage value of charging capacitor C19 exceeds the reference voltage value of the inverting input of the second comparator, the optocoupler is turned on in a high impedance state, the gate-source voltage VGS of the suppressor is pulled to a low level, and the suppressor is turned off.
[0006] Preferably, the inverting input of the second comparator is connected to a capacitor C20 and a resistor R14, respectively. The output of the capacitor C20 is grounded to PDNG, and the resistor R14 is connected to a reference voltage.
[0007] Preferably, resistors R5, R12, R65 and capacitor C16 are connected in parallel between the optocoupler and the field-effect transistor Q10. The gate of the field-effect transistor Q10 is connected to resistor R44. The output terminal of resistor R44 is connected to the two pins of the optocoupler through a wire. The output terminals of resistor R65 and capacitor C16 are respectively connected to the wire.
[0008] The beneficial effects of this invention are as follows: By relying on the cooperation of voltage detection and protection status output circuit, fast discharge circuit and implementation circuit, this invention can meet the function of the suppression tube turning on before the load when it is turned on and turning off after the load when it is turned off. This effectively avoids the large current of the load passing through the suppression resistor and damaging the resistor when the suppression circuit turns on late or off early. It ensures that the suppression circuit can work normally when the equipment is started again, and effectively protects the suppression circuit from damage when the equipment is repeatedly powered on and off in a short period of time. Thus, it achieves the purpose of suppressing the inrush current in the equipment circuit for a long time. Attached Figure Description
[0009] Figure 1 This is a circuit diagram of the improved shock suppression drive of the present invention; Figure 2 This is a diagram of the voltage detection and protection status output circuit and the fast discharge circuit of the present invention; Figure 3 This is a schematic diagram of the circuit for implementing the present invention.
[0010] In the diagram: 1. Voltage detection and protection status output circuit; 11. First comparator; 2. Fast discharge circuit; 3. Implementation circuit; 31. Second comparator; 32. Optocoupler. Detailed Implementation
[0011] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0012] Please see Figure 1-3This invention provides a technical solution: an improved surge suppression drive circuit, comprising a voltage detection and protection status output circuit 1, a fast discharge circuit 2, and an implementation circuit 3 connected to the fast discharge circuit 2. The voltage detection and protection status output circuit 1 has a first comparator 11, the non-inverting input of which is connected to a device via a sampling resistor. The sampling resistor is used for voltage acquisition and includes resistors R30, R33, R41, R47, R46, and R43 connected in series. A filter circuit is also connected to the sampling resistor, consisting of capacitor C34, capacitor C35, resistor R48, and resistor R49. The system consists of resistor R49 and capacitor C36. The output of the first comparator 11 is connected to charging capacitor C19 via resistor R34, diode D4, and resistor R35. The inverting input of the first comparator 11 is connected to transistor Q12 via resistor R49. The common connection between the inverting input of the first comparator 11 and resistor R49 is connected to a reference voltage. The emitter of transistor Q12 is connected to transistor Q13. One pin of the first comparator 11 is grounded to PGND1, and the other pin is grounded to PGND via capacitor C37 and resistor R46. The input of capacitor C37 can be connected to the VCC_15.8V_FB power supply voltage.
[0013] In this embodiment, the fast discharge circuit 2 includes dual diodes D5, a transistor Q15 connected to the output of dual diodes D5, and a transistor Q16 connected to the base of transistor Q15. The base of transistor Q16 is connected to the input of diode D4 through resistor R62. One input of dual diode D5 is connected to the input of resistor R35 through resistor R55. The other input of dual diode D5 is connected to resistor R59 and charging capacitor C22. The output of resistor R59 is connected to transistor Q14. The emitter of transistor Q14 and the output of charging capacitor C22 are grounded to PGND1, and the collector of transistor Q14 is connected to the load. The implementation circuit 3 is used to implement surge suppression and load control. The implementation circuit 3 includes a second comparator 31 and an optocoupler 32. The non-inverting input of the second comparator 31 is connected to... Resistor R38 is connected to charging capacitor C19, and the output of the second comparator 31 is connected to resistors R58 and R17 respectively. The output of resistor R17 is connected to optocoupler 32 through field-effect transistor Q10, and the three pins of optocoupler 32 are connected to capacitor C18 and resistor R51 respectively. The output of the aforementioned resistor R51 is connected to transistor Q11. The emitter of transistor Q11 and the output of capacitor C18 are connected together to the device ground PGND_E. The collector of the aforementioned transistor Q11 is connected to a suppressor through resistor R45. Among them, the four pins of optocoupler 32 are connected in parallel with diode D2, resistor R39, Zener diode D11, capacitor C17 and resistor R42. The input of resistor R42 is connected in series with resistors R36, R31 and R29 in sequence. The input of resistor R29 is connected to the device, and the output of resistor R42 is grounded to PGND_E.
[0014] It should be noted that when the first comparator 11 outputs a low level, transistor Q15 is turned on, and the fast discharge circuit 2 is used to discharge the charge of charging capacitors C19 and C22. When the first comparator 11 outputs a high-impedance state, charging capacitor C19 is charged through resistor R34, diode D4, and resistor R35. When the voltage value of charging capacitor C19 exceeds the reference voltage value at the inverting input of the second comparator 31, the second comparator 31 outputs a high-impedance state, optocoupler 32 is turned on, the gate-source voltage VGS of the suppressor is pulled low, and the suppressor is turned off. The inverting input of the second comparator 31 is connected to capacitor C20 and resistor R14. The output of capacitor C20 is grounded to PDNG, and resistor R14 is connected to the reference voltage value. The optocoupler 32 and the field-effect transistor Q10 are connected in parallel with resistors R5, R12, R65 and capacitor C16. The gate of the field-effect transistor Q10 is connected to resistor R44. The output terminal of resistor R44 is connected to the two pins of optocoupler 32 through a wire. The output terminals of resistor R65 and capacitor C16 are respectively connected to the wire. The voltage detection and protection status output circuit 1 mentioned above is used to ensure that the turn-on voltage of the product's surge suppression circuit is higher than the turn-off voltage. When the voltage value collected by the sampling resistor is higher than the reference voltage value of the first comparator 11, the first comparator 11 outputs a high-impedance state, the transistor Q12 is turned on, and the reference voltage value is pulled low until the collected voltage value is lower than the new reference value, at which point the first comparator 11 outputs a low level.
[0015] This improved surge suppression drive circuit, through the cooperation of voltage detection and protection status output circuit 1, fast discharge circuit 2, and implementation circuit 3, can prevent the suppression transistor from repeatedly turning on and off when the equipment is powered on or off, thus avoiding damage to the suppression transistor or the equipment. Specifically, when the first comparator 11 outputs a high-impedance state, the charging capacitor C19 is charged through resistor R34, diode D4, and resistor R35, achieving a delay. This delay ensures that the suppression circuit performs its suppression function before turning on the suppression transistor, reducing line impedance. When the charging capacitor C19 is charged to a value higher than the reference voltage at the inverting input of the second comparator 31, the first... When the output of comparator 31 is in a high-impedance state, optocoupler 32 is turned on, and the VGS gate-source voltage of the suppressor is pulled low, turning off the suppressor. Thus, when the device starts up next time, the current flows through the suppressor resistor first. At the same time, the second comparator 31 charges the charging capacitor C22 through resistor R58. The voltage of the charging capacitor C22 rises slowly. When the voltage reaches the turn-on voltage of transistor Q11, transistor Q11 turns on, sending the load power-on signal to the load. The delay time of the charging capacitor C22 through resistor R58 achieves the purpose of the suppressor in the surge suppression circuit turning on first and the load turning on later. The delay time can be adjusted by the charging capacitor C22 through resistor R58. When the device loses power, transistor Q15 discharges the charge on charging capacitors C22 and C19. At this time, there is no resistance between charging capacitor C22 and ground, so the discharge is rapid. Transistor Q14 turns off, outputting a load shutdown signal. Charging capacitor C19 has resistors R35 and R55 in its discharge path, so its charge discharge speed is slower than that of charging capacitor C22. The output of the second comparator 31 is delayed, the VGS state of the optocoupler 32 is delayed, and the shutdown of the surge suppression circuit is also delayed. In this way, the load is shut down first, and the surge suppression circuit is shut down later. Similarly, the shutdown time can be adjusted by resistors R35 and R55.
[0016] It should be noted that transistors Q12, Q13, Q16, Q15, Q14, and Q11 are all NPN transistors; the first comparator 11 and the second comparator 31 are, but are not limited to, LM393, LM311, or LM139 type comparators. The first comparator 11 can be marked as U2A, and the second comparator 31 can be marked as U2B.
[0017] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0018] The above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. In the present invention, unless otherwise explicitly specified and limited, the terms "installation", "connection", "linking", "fixing", etc., should be interpreted broadly. For example, they can refer to fixed connections or detachable connections.
[0019] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. An improved shock suppression drive circuit, characterized in that: The device includes a voltage detection and protection status output circuit, a fast discharge circuit, and an implementation circuit connected to the fast discharge circuit. The voltage detection and protection status output circuit has a first comparator. The non-inverting input terminal of the first comparator is connected to the device through a sampling resistor, which is used for voltage acquisition. The output terminal of the first comparator is connected to a charging capacitor C19 through a resistor R34, a diode D4, and a resistor R35. The inverting input terminal of the first comparator is connected to a transistor Q12 through a resistor R49. The common connection terminal of the inverting input terminal of the first comparator and the resistor R49 is connected to a reference voltage value. The emitter of the transistor Q12 is connected to a transistor Q13. The fast discharge circuit includes dual diodes D5, a transistor Q15 connected to the output of dual diodes D5, and a transistor Q16 connected to the base of transistor Q15. The base of transistor Q16 is connected to the input of diode D4 through resistor R62. One input of dual diode D5 is connected to the input of resistor R35 through resistor R55. The other input of dual diode D5 is connected to resistor R59 and charging capacitor C22. The output of resistor R59 is connected to transistor Q14. The emitter of transistor Q14 and the output of charging capacitor C22 are grounded to PGND1. The collector of transistor Q14 is connected to the load. The implementation circuit includes a second comparator and an optocoupler. The non-inverting input of the second comparator is connected to the charging capacitor C19 through resistor R38, and the output of the second comparator is connected to resistors R58 and R17 respectively. The output of resistor R17 is connected to the optocoupler through a field-effect transistor Q10. The three pins of the optocoupler are connected to capacitor C18 and resistor R51 respectively. The output of resistor R51 is connected to transistor Q11, and the emitter of transistor Q11 and the output of capacitor C18 are connected to the device ground PGND_E. The collector of transistor Q11 is connected to a suppressor through resistor R45.
2. The improved shock suppression drive circuit according to claim 1, characterized in that: When the first comparator outputs a low level, transistor Q15 is turned on, and the fast discharge circuit is used to discharge the charge of charging capacitor C22. When the first comparator outputs a high impedance state, it charges charging capacitor C19 through resistor R34, diode D4, and resistor R35. When the voltage value of charging capacitor C19 exceeds the reference voltage value of the inverting input of the second comparator, the second comparator outputs a high impedance state, the optocoupler is turned on, the gate-source voltage VGS of the suppressor is pulled low, and the suppressor is turned off.
3. The improved shock suppression drive circuit according to claim 1, characterized in that: The inverting input of the second comparator is connected to a capacitor C20 and a resistor R14. The output of the capacitor C20 is grounded to PDNG, and the resistor R14 is connected to a reference voltage.
4. The improved shock suppression drive circuit according to claim 1, characterized in that: The optocoupler and the field-effect transistor Q10 are connected in parallel with resistors R5, R12, R65 and capacitor C16. The gate of the field-effect transistor Q10 is connected to resistor R44. The output terminal of resistor R44 is connected to the two pins of the optocoupler through a wire. The output terminals of resistor R65 and capacitor C16 are respectively connected to the wire.