Double-fed fan frequency change suppression method, system and equipment based on phase-locked loop and medium

Abstract

The invention discloses a doubly-fed fan frequency change suppression method, system and equipment based on a phase-locked loop, and a medium, and belongs to the technical field of doubly-fed fan change suppression, and the method comprises the steps: collecting a power grid terminal voltage and doubly-fed fan data, inputting the power grid terminal voltage to the phase-locked loop for processing, and obtaining an initial output signal; the method comprises the following steps: acquiring initial output signals of a phase-locked loop, screening the initial output signals through a phase threshold to obtain output signals, judging an internal potential frequency change trend of the doubly-fed fan according to data of the doubly-fed fan, combining the change trend with the output signals to obtain phase adjustment signals of the phase-locked loop, and when frequency oscillation occurs in the doubly-fed fan, outputting the phase adjustment signals of the phase-locked loop. And adjusting lead-lag compensation according to the data of the doubly-fed fan, processing the phase adjustment signal according to the adjusted lead-lag compensation to obtain a compensation signal, feeding back the compensation signal to the doubly-fed fan, and adjusting the operating parameters of the doubly-fed fan. According to the invention, the frequency change of the doubly-fed fan of the phase-locked loop is suppressed, and the system stability is ensured.

Description

Technical Field

[0001] This invention relates to the field of doubly-fed induction generator (DFIG) frequency variation suppression technology, specifically to a method, system, device, and medium for suppressing DFIG frequency variation based on a phase-locked loop (PLL). Background Technology

[0002] With the increasing scale of wind power grid connection, future power systems will require wind turbines and power plants to have the function of stabilizing system frequency. In doubly-fed induction generators (DFIGs) that use fast phase-locked loops (PLLs) for synchronization, the rotors are isolated from the grid via power electronic converters, making it difficult to directly supply the stored rotational kinetic energy to the grid. This has led to research into inertia enhancement methods optimized for PLLs.

[0003] Current research shows that reducing the phase-locked loop (PLL) bandwidth can increase the equivalent inertia of a doubly-fed induction generator (DFIG). However, this method also brings some problems, mainly in the following two aspects: First, when the system experiences an active power disturbance, the instantaneous change in the terminal voltage phase will rapidly affect the phase-locked loop phase through the proportional branch of the PLL, causing the internal potential frequency to respond quickly to the terminal voltage frequency, weakening the generator's ability to support active power. Second, while the equivalent inertia is increased, the system damping decreases to some extent, manifesting as oscillations in the frequency response, which is not conducive to the rapid recovery of the system frequency after a disturbance. Based on these two problems, simply reducing the PLL bandwidth to increase the inertia of the DFIG cannot effectively solve the problem of suppressing system frequency changes. Summary of the Invention

[0004] In view of the above-mentioned problems, the present invention is proposed.

[0005] Therefore, the technical problem solved by this invention is: how to suppress the frequency variation of a doubly fed fan based on a phase-locked loop (PLL) to simultaneously improve the damping of the fan near a specific frequency and enhance system stability.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a method for suppressing frequency variation of a doubly-fed induction generator (DFIG) wind turbine based on a phase-locked loop (PLL), comprising the following steps: acquiring grid voltage and DFIG data; inputting the grid voltage into the PLL for processing to obtain an initial output signal, and filtering the initial output signal through a phase threshold to obtain an output signal; determining the frequency variation trend of the DFIG's internal potential based on the DFIG data, and combining the variation trend with the output signal to obtain a phase adjustment signal of the PLL; when the DFIG experiences frequency oscillation, adjusting the lead-lag compensation based on the DFIG data, processing the phase adjustment signal based on the adjusted lead-lag compensation to obtain a compensation signal; and feeding the compensation signal back to the DFIG to adjust the DFIG's operating parameters.

[0007] In a preferred embodiment of the doubly-fed induction generator (DFIG) frequency variation suppression method based on a phase-locked loop (PLL) according to the present invention, the step of obtaining the output signal includes: inputting the phase fluctuation signal in the grid terminal voltage into the proportional branch of the PLL; performing a filtering operation on the output of the proportional branch through a preset low-pass filter to obtain the initial output signal; and setting the frequency of the initial output signal as the output signal when it is not greater than the phase threshold. The beneficial effects of this preferred embodiment are: By introducing the phase fluctuation signal in the grid voltage into the proportional branch, the phase information is focused, avoiding interference from other voltage components in the initial processing of the phase-locked loop. Secondly, the preset low-pass filter can effectively filter out high-frequency noise in the output of the proportional branch, reduce signal noise caused by grid voltage fluctuations, and improve the stability and purity of the initial output signal. Finally, through the screening mechanism, unstable signals with out-of-range frequencies are eliminated to ensure that the output signal meets the subsequent phase adjustment requirements of the phase-locked loop and improve the reliability of frequency change suppression of the doubly-fed induction generator (DFIG).

[0008] As a preferred embodiment of the doubly-fed induction generator (DFIG) frequency variation suppression method based on phase-locked loop (PLL) of the present invention, the step of determining the internal potential frequency variation trend of the DFIG includes: extracting the detected value of the active power interference signal and the historical detected value over a preset time period from the DFIG data; calculating the real-time change rate based on the detected value and the historical detected value; determining the internal potential frequency variation trend based on the real-time change rate; when the real-time change rate is positive, determining that the internal potential frequency variation trend is in an upward state; when the real-time change rate is zero, determining that the internal potential frequency variation trend is in a static state; and when the real-time change rate is positive, determining that the internal potential frequency variation trend is in a downward state.

[0009] As a preferred embodiment of the doubly-fed induction generator (DFIG) frequency variation suppression method based on phase-locked loop (PLL) of the present invention, the step of obtaining the phase adjustment signal of the PLL includes: the step of combining the variation trend with the output signal is as follows: when the internal potential frequency variation trend is rising, the output signal is attenuated by a first preset coefficient; when the internal potential frequency variation trend is stationary, the output signal is kept unchanged; when the internal potential frequency variation trend is falling, the output signal is amplified by a second preset coefficient; and the processed output signal is recorded as the phase adjustment signal. The beneficial effects of this preferred embodiment are: Corresponding strategies are adopted for different trends in the internal potential frequency. When the frequency rises, the output signal is attenuated by the first preset coefficient to avoid frequency overshoot. When the frequency falls, the output signal is amplified by the second preset coefficient to offset the downward trend. When the frequency is stationary, the output signal remains unchanged to reduce energy consumption and signal disturbance. The phase adjustment signal after differential processing can match the real-time frequency state of the doubly fed fan, providing a basis for compensation and adjustment of operating parameters during subsequent frequency oscillations, and ensuring the frequency stability of the fan.

[0010] As a preferred embodiment of the doubly-fed induction generator (DFIG) frequency variation suppression method based on phase-locked loop (PLL) of the present invention, the step of adjusting the lead-lag compensation according to the DFIG data includes: when the DFIG experiences frequency oscillation, extracting a real-time frequency signal from the DFIG data, calculating the fluctuation of the real-time frequency signal, and obtaining the oscillation amplitude and oscillation period of the real-time frequency signal; when the difference between the oscillation amplitude and the oscillation amplitude when the frequency oscillation does not occur is positive, increasing the lead time constant in the lead-lag compensation to X times; when the difference between the oscillation period and the oscillation period when the frequency oscillation does not occur is positive, reducing the lag time constant in the lead-lag compensation to Y times. The beneficial effects of this preferred embodiment are: First, by extracting real-time frequency signals and calculating oscillation amplitude and period, the oscillation state is quantified. Second, by making differentiated adjustments for different oscillation characteristics, the intensity of fluctuations can be quickly reduced or the oscillation can be prevented from continuing due to prolonged period, thereby improving the accuracy and efficiency of frequency oscillation suppression of doubly fed wind turbines and ensuring the stability of wind turbine operation.

[0011] As a preferred embodiment of the doubly fed wind turbine frequency variation suppression method based on phase-locked loop described in this invention, the step of obtaining the compensation signal includes: performing data alignment by leading the phase adjustment signal with the adjusted lead time constant; and performing data alignment again on the data-aligned phase adjustment signal with the adjusted lag time constant to obtain the compensation signal.

[0012] As a preferred embodiment of the doubly fed fan frequency variation suppression method based on phase-locked loop described in this invention, the step of adjusting the operating parameters of the doubly fed fan includes: adjusting the proportional and integral parameters in the phase-locked loop through a transfer function according to the compensation signal.

[0013] This invention provides a doubly fed fan frequency variation suppression system based on a phase-locked loop.

[0014] To address the aforementioned technical problems, the present invention further provides the following technical solution: a doubly-fed induction generator (DFIG) frequency variation suppression system based on a phase-locked loop (PLL), comprising: a data acquisition module for acquiring grid voltage and DFIG data; an output signal acquisition module for processing the grid voltage input to the PLL to acquire an initial output signal, and filtering the initial output signal through a phase threshold to acquire an output signal; a phase adjustment signal acquisition module for determining the frequency variation trend of the DFIG's internal potential based on the DFIG data, combining the variation trend with the output signal to acquire the phase adjustment signal of the PLL; a compensation signal acquisition module for adjusting the lead-lag compensation based on the DFIG data when the DFIG experiences frequency oscillation, processing the phase adjustment signal based on the adjusted lead-lag compensation to acquire a compensation signal; and a feedback adjustment module for feeding the compensation signal back to the DFIG to adjust the DFIG's operating parameters.

[0015] The present invention provides a computer device, including a memory and a processor, wherein the memory stores a computer program, characterized in that the processor executes the computer program to implement the steps of the doubly fed wind turbine frequency variation suppression method based on phase-locked loop.

[0016] The present invention provides a computer-readable storage medium having a computer program stored thereon, characterized in that, when the computer program is executed by a processor, it implements the steps of the doubly fed wind turbine frequency variation suppression method based on phase-locked loop.

[0017] The beneficial effects of this invention are as follows: By directionally collecting grid voltage and doubly-fed induction generator (DFIG) wind turbine data, combined with phase-locked loop (PLL) proportional branch processing, low-pass filtering, and phase threshold screening, high-frequency noise and excessive interference in the voltage signal are effectively filtered out, improving the purity and reliability of the initial output signal. Secondly, by analyzing the rate of change of active power interference signal to determine the internal potential frequency trend, and by selectively attenuating, maintaining, or amplifying the output signal, the phase adjustment signal can dynamically adapt to the wind turbine frequency state, avoiding frequency overshoot or response lag caused by blind control. Finally, when the frequency oscillates, the lead-lag compensation parameters are adjusted according to the real-time oscillation amplitude and period differences, and the PLL proportional and integral parameters are optimized in combination with the compensation signal, which can suppress oscillations and further stabilize the frequency, improving the adaptability of the DFIG wind turbine to grid fluctuations and reducing the impact of frequency anomalies on wind turbine operation and grid stability. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 The above is a flowchart of a doubly fed wind turbine frequency variation suppression method based on a phase-locked loop provided in one embodiment of the present invention. Detailed Implementation

[0020] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0021] Example 1, referring to Figure 1 This is the first embodiment of the present invention, which provides a method for suppressing frequency variations in doubly-fed wind turbines based on phase-locked loops, including: S100: Collects grid voltage and doubly-fed wind turbine data.

[0022] S200: The grid voltage is input to the phase-locked loop and processed to obtain the initial output signal. The initial output signal is then filtered through a phase threshold to obtain the final output signal.

[0023] S300: Based on the data of the doubly fed fan, determine the frequency change trend of the internal potential of the doubly fed fan, combine the change trend with the output signal, and obtain the phase adjustment signal of the phase-locked loop.

[0024] S400: When the doubly fed fan experiences frequency oscillation, the lead-lag compensation is adjusted based on the doubly fed fan data. The phase adjustment signal is then processed based on the adjusted lead-lag compensation to obtain the compensation signal.

[0025] S500: Feeds the compensation signal back to the doubly fed fan to adjust the fan's operating parameters.

[0026] It should be noted that existing phase-locked loops isolate the rotors of different doubly-fed wind turbines from the power grid through power electronic conversion, making it difficult to directly supply the stored rotational kinetic energy to the grid. In addition, in order to reduce the bandwidth of the phase-locked loop, there is a tendency for the internal potential frequency to respond quickly to the terminal voltage frequency, which weakens the generator's active power support capability. At the same time, the increase in equivalent inertia also leads to a decrease in the system damping coefficient, which is not conducive to the rapid recovery of the system frequency after a disturbance.

[0027] Therefore, to address the aforementioned issues of weakened generator active power support and slow system frequency recovery after disturbances caused by the difficulty in directly supplying kinetic energy to the grid, a doubly-fed induction generator (DFIG) frequency variation suppression method based on a phase-locked loop (PLL) is constructed through steps S100-S500. First, grid voltage and DFIG data are collected. The grid voltage is input to the PLL for processing to obtain an initial output signal. This initial output signal is then filtered using a phase threshold to obtain the final output signal. Second, based on the DFIG data, the frequency variation trend of the DFIG's internal potential is determined. This trend is combined with the output signal to obtain the PLL's phase adjustment signal. When the DFIG experiences frequency oscillation, the lead-lag compensation is adjusted based on the DFIG data. The adjusted lead-lag compensation is then used to process the phase adjustment signal to obtain a compensation signal. Finally, the compensation signal is fed back to the DFIG to adjust its operating parameters.

[0028] Example 2, refer to Figure 1 This is the second embodiment of the present invention, which provides a method for suppressing frequency variation of a doubly fed wind turbine based on a phase-locked loop.

[0029] In this embodiment of the invention, step S100 involves collecting grid terminal voltage and doubly fed wind turbine data.

[0030] Specifically, the stator current, output current, and terminal voltage of the doubly fed wind turbine are collected, and the terminal voltage is used as the input of the phase-locked loop.

[0031] In this embodiment of the invention, step S200 involves inputting the grid terminal voltage into the phase-locked loop for processing to obtain an initial output signal. The initial output signal is then filtered using a phase threshold to obtain the final output signal. This includes the following steps A1-A3: A1: Input the phase fluctuation signal in the grid terminal voltage into the proportional branch of the phase-locked loop, and perform filtering operation on the output of the proportional branch through a preset low-pass filter to obtain the initial output signal.

[0032] Specifically, the phase fluctuation signal is separated from the grid voltage and then input into the proportional branch of the phase-locked loop.

[0033] Furthermore, the output signal of the proportional branch is filtered by a preset low-pass filter, which is based on the Bode plot of the equivalent inertia of the doubly fed fan.

[0034] It should be noted that the equivalent inertia Bode plot is obtained by analyzing the frequency response of the doubly fed wind turbine at the rotor speed time scale, and selecting a certain frequency in the 8~20Hz frequency band at different speed time scales as the compensation frequency.

[0035] Furthermore, the final time constant of the low-pass filter is calculated through an adjustment control algorithm. The specific form of the adjustment control algorithm is as follows: ; ; In the formula, This indicates the compensation frequency at which equivalent inertia compensation is required. The doubly fed wind turbine is expressed in decibels. The required amplitude margin for compensation at a given frequency; represent The corresponding dimensionless gain magnitude; This represents the time constant of the low-pass filter.

[0036] Furthermore, the specific manifestation of a low-pass filter is as follows: ; In the formula, Let represent the transfer function of the low-pass filter; s is the Laplace operator, representing the complex variables of the Laplace transform; This represents the time constant of the low-pass filter.

[0037] In one possible implementation, the low-pass filter can also be implemented using a moving average filter. Based on the Bode plot of the equivalent inertia of the doubly-fed wind turbine, and combined with the compensation frequency of 8~20Hz on the rotor speed time scale, the window size of the filter is determined. Then, the phase fluctuation signal output by the phase-locked loop proportional branch is subjected to point-by-point moving average calculation according to the set window. Through this calculation, high-frequency interference above the 8~20Hz frequency band is filtered out, and low-frequency phase signals that meet the requirements of equivalent inertia compensation are retained, finally obtaining a stable initial output signal.

[0038] In another possible implementation, the low-pass filter can also be implemented by an RC passive low-pass filter. Based on the Bode plot parameters of the equivalent inertia of the doubly fed wind turbine, the RC parameters of the filter are calculated using a compensation frequency of 8~20Hz to determine the specific values ​​of the resistor R and capacitor C. The phase fluctuation signal output from the proportional branch of the phase-locked loop is connected to the input terminal of the RC filter. After being filtered by the charging and discharging of the RC circuit, a stable initial output signal is obtained from the output terminal.

[0039] A2: When the frequency of the initial output signal is not greater than the phase threshold, it is set as the output signal.

[0040] Specifically, using the upper limit of the frequency band where the equivalent inertia of the doubly fed wind turbine needs to be guaranteed as the core reference in the Bode diagram, the phase threshold is set to a frequency value that matches the upper limit of this frequency band, ensuring that the filtered signal frequency can cover the target frequency band and avoiding interference from signals exceeding the threshold frequency to the subsequent phase-locked loop phase adjustment.

[0041] In one possible implementation, the Bode plot can also be replaced by fitting experimental data of frequency response. By applying small-amplitude disturbance signals of different frequencies to the doubly fed wind turbine, the internal potential frequency and output active power response data at each disturbance frequency are collected. Then, the collected data points are fitted into a continuous curve using the least squares method, and the target inertia is identified from the curve.

[0042] In another possible implementation, the Bode plot can be replaced by transfer function simulation analysis. By first establishing a mathematical model of the doubly fed wind turbine, the equivalent inertia transfer function between the internal potential frequency and the phase change of the terminal voltage is derived. Then, the transfer function is frequency-scanned using simulation tools to obtain the equivalent inertia values ​​at different frequencies.

[0043] In this embodiment of the invention, step S300 involves determining the frequency change trend of the internal potential of the doubly-fed wind turbine based on the doubly-fed wind turbine data, combining the change trend with the output signal to obtain the phase adjustment signal of the phase-locked loop, and includes the following steps B1~B2: B1: Determine the frequency change trend of the internal potential of the doubly-fed fan.

[0044] Specifically, determining the trend of change includes the following steps B11~B13: B11: Extract the detected value of active power interference signal from the doubly fed wind turbine data and the historical detected value for a preset time period.

[0045] It should be noted that the preset time period needs to be dynamically set in combination with the actual rotor speed parameters of the doubly fed wind turbine and the typical response time of the system's active power disturbance.

[0046] B12: Calculate the real-time rate of change based on the detected value and historical detected values.

[0047] Specifically, based on the difference between the detected value and the historical detected value, combined with the duration of a preset time period, i.e. the time span from the start time corresponding to the historical detected value to the current time, the degree of change of the active power interference signal per unit time is quantified.

[0048] B13: Determine the trend of internal potential frequency change based on the real-time rate of change.

[0049] Specifically, when the real-time rate of change is positive, the internal potential frequency is judged to be in an upward trend; when the real-time rate of change is zero, the internal potential frequency is judged to be in a static trend; and when the real-time rate of change is positive, the internal potential frequency is judged to be in a downward trend.

[0050] B2: Obtain the phase adjustment signal of the phase-locked loop.

[0051] Specifically, the trend of change is combined with the output signal. When the internal potential frequency changes in an upward trend, the output signal is attenuated by a first preset coefficient; when the internal potential frequency changes in a static trend, the output signal remains unchanged; and when the internal potential frequency changes in a downward trend, the output signal is amplified by a second preset coefficient.

[0052] The first preset coefficient ranges from 0.5 to 0.9, and the second preset coefficient ranges from 1.1 to 1.5.

[0053] In this embodiment of the invention, when the doubly-fed induction generator (DFIG) experiences frequency oscillation in step S400, the lead-lag compensation is adjusted based on the DFIG data. The phase adjustment signal is then processed based on the adjusted lead-lag compensation to obtain a compensation signal, including the following steps C1~C2: C1: When the frequency of the doubly fed fan oscillates, extract the real-time frequency signal from the doubly fed fan data, and obtain the oscillation amplitude and oscillation period of the real-time frequency signal by calculating the fluctuation of the real-time frequency signal.

[0054] Specifically, based on the time-series data of the identified frequency signals, the oscillation amplitude and oscillation period are obtained by identifying the maximum and minimum values ​​of the frequency signals within that time period and the time interval between two adjacent frequency peaks.

[0055] Specifically, the forms of advance-delay compensation are as follows: ; In the formula, Represents the Laplace operator; The transfer function represents the lead-lag compensation stage; , These are the lead time constant and lag time constant of the controller, and their specific values ​​are determined based on the required compensation frequency and the magnitude of the compensation damping.

[0056] Furthermore, when the difference between the oscillation amplitude and the oscillation amplitude when no frequency oscillation occurs is positive, the lead time constant in the lead-lag compensation is increased to X times; when the difference between the oscillation period and the oscillation period when no frequency oscillation occurs is positive, the lag time constant in the lead-lag compensation is reduced to Y times.

[0057] The coefficient of X is 1.2 to 1.8, and the coefficient of Y is 0.5 to 0.8.

[0058] C2: Obtain the compensation signal.

[0059] Specifically, obtaining the compensation signal includes the following steps C21~C22: C21: The phase adjustment signal is aligned with the phase by adjusting the lead time constant.

[0060] Specifically, based on the adjusted By combining the real-time frequency of the current frequency oscillation, the corresponding leading phase angle is determined, and then the overall phase of the phase adjustment signal is shifted forward by this angle value to perform data alignment.

[0061] C22: The phase adjustment signal after data alignment is re-aligned using the adjusted hysteresis time constant to obtain the compensation signal.

[0062] Specifically, by adjusting the phase adjustment signal after aligning the leading phase data, step C1 adjusts the hysteresis time constant based on the oscillation period. Based on this, and combined with the real-time frequency of the current frequency oscillation, the corresponding hysteresis phase angle is determined. Then, the phase adjustment signal for data alignment is shifted backward according to this angle value to complete the hysteresis phase data alignment. The final signal obtained is the compensation signal.

[0063] In one possible implementation, lead-lag compensation can also be replaced by a PR compensator. When the doubly fed wind turbine experiences frequency oscillation, the resonant frequency of the compensator is determined, and the proportional element is used to respond to the deviation of the phase adjustment signal. The compensation force is strengthened at the oscillation frequency through the resonant element, thus ensuring system stability.

[0064] In another possible implementation, lead-lag compensation can be replaced by a PID compensation controller. If the oscillation amplitude increases, the predictive ability of the derivative element is enhanced to suppress the oscillation propagation; if the oscillation period becomes longer, the integral element is adjusted to avoid excessive lag; and the proportional element always responds quickly to the phase deviation.

[0065] In this embodiment of the invention, in step S500, the compensation signal is fed back to the doubly fed fan to adjust the operating parameters of the doubly fed fan.

[0066] Specifically, based on the compensation signal, the proportional and integral parameters in the phase-locked loop are adjusted through a transfer function.

[0067] Furthermore, after improving the phase-locked loop, the specific form of the formula for calculating the phase-locked frequency is as follows: ; In the formula, Represents the Laplace operator; The frequency of the terminal voltage measured by the phase-locked loop; Represents the q-axis component of the terminal voltage after the Park transform; The proportional parameter of the PI element in the phase-locked loop; These are the integral parameters of the phase-locked loop PI circuit.

[0068] It should be noted that the formula for calculating the phase-locked frequency is, in nature, a transfer function.

[0069] Furthermore, the specific form of the Park transform is as follows: ; In the formula, , and The instantaneous three-phase voltage at the turbine terminals is measured by a voltage detection device. This refers to the phase output of the phase-locked loop; , and This represents the d-axis component, q-axis component, and zero-sequence component of the terminal voltage after the Park transformation.

[0070] In one possible implementation, the Park transform can also be replaced by the Clark transform combined with a coordinate rotation algorithm. The Clark transform first converts the terminal voltage of the three-phase stationary coordinate system into two-phase stationary αβ coordinate system components, and then calculates the rotation matrix based on the phase-locked loop output phase to rotate the αβ components, thereby obtaining the q-axis component of the rotating coordinate system with the phase-locked loop phase as the reference.

[0071] In another possible implementation, the Park transform can be replaced by a direct phase compensation algorithm based on the phase-locked loop phase. By using the phase output phase of the phase-locked loop to perform phase compensation on the three-phase terminal voltage, the intermediate coordinate system transformation can be skipped directly, and the q-axis component in the rotating coordinate system can be extracted directly.

[0072] In summary, this invention effectively filters out high-frequency noise and excessive interference in the voltage signal by directionally collecting grid voltage and doubly-fed induction generator (DFIG) wind turbine data, combined with phase-locked loop (PLL) proportional branch processing, low-pass filtering, and phase threshold screening, thereby improving the purity and reliability of the initial output signal. Secondly, by analyzing the rate of change of active power interference signal to determine the internal potential frequency trend, and by selectively attenuating, maintaining, or amplifying the output signal, the phase adjustment signal can dynamically adapt to the wind turbine frequency state, avoiding frequency overshoot or response lag caused by blind control. Finally, when the frequency oscillates, the lead-lag compensation parameters are adjusted according to the real-time oscillation amplitude and period differences, and the PLL proportional and integral parameters are optimized in combination with the compensation signal, which can suppress oscillations and further stabilize the frequency, improving the adaptability of the DFIG wind turbine to grid fluctuations and reducing the impact of frequency anomalies on wind turbine operation and grid stability.

[0073] Example 3 is the third embodiment of the present invention. This embodiment provides a doubly fed wind turbine frequency variation suppression system based on a phase-locked loop, including...

[0074] The data acquisition module collects grid voltage and doubly-fed wind turbine data.

[0075] The output signal acquisition module processes the grid voltage input to the phase-locked loop to obtain the initial output signal, and then filters the initial output signal through a phase threshold to obtain the final output signal.

[0076] The phase adjustment signal acquisition module determines the frequency change trend of the internal potential of the doubly fed fan based on the data of the doubly fed fan, and combines the change trend with the output signal to obtain the phase adjustment signal of the phase-locked loop.

[0077] The compensation signal acquisition module adjusts the lead-lag compensation based on the doubly-fed fan data when the doubly-fed fan experiences frequency oscillation. It then processes the phase adjustment signal based on the adjusted lead-lag compensation to acquire the compensation signal.

[0078] The feedback adjustment module feeds the compensation signal back to the doubly fed fan to adjust its operating parameters.

[0079] Example 4, the fourth embodiment of the present invention, differs from the previous three embodiments in that: if the function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0080] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-including system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0081] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0082] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination of all three. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0083] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for suppressing frequency variation in doubly-fed wind turbines based on phase-locked loops, characterized in that: include, Collect grid voltage and doubly-fed induction generator (DFIG) data; The grid terminal voltage is input to the phase-locked loop for processing to obtain an initial output signal. The initial output signal is then filtered through a phase threshold to obtain an output signal. Based on the doubly fed fan data, the trend of the internal potential frequency change of the doubly fed fan is determined, and the trend of the change is combined with the output signal to obtain the phase adjustment signal of the phase-locked loop. When the doubly fed fan experiences frequency oscillation, the lead-lag compensation is adjusted based on the doubly fed fan data, and the phase adjustment signal is processed based on the adjusted lead-lag compensation to obtain the compensation signal. The compensation signal is fed back to the doubly fed fan to adjust its operating parameters.

2. The method for suppressing frequency variation in a doubly-fed induction generator (DFIG) based on a phase-locked loop as described in claim 1, characterized in that: The steps for obtaining the output signal include: The phase fluctuation signal in the grid terminal voltage is input into the proportional branch of the phase-locked loop, and the output of the proportional branch is filtered by a preset low-pass filter to obtain the initial output signal. When the frequency of the initial output signal is not greater than the phase threshold, it is set as the output signal.

3. The method for suppressing frequency variation in a doubly-fed wind turbine based on a phase-locked loop as described in claim 2, characterized in that: The steps for determining the frequency variation trend of the internal potential of a doubly-fed wind turbine include: Extract the detected value of the active power interference signal and the historical detection value over a preset time period from the doubly fed wind turbine data; Calculate the real-time rate of change based on the detected value and the historical detected value; The trend of internal potential frequency change is determined based on the real-time rate of change. When the real-time rate of change is positive, it is determined that the internal potential frequency change trend is upward. When the real-time rate of change is zero, the trend of the internal potential frequency change is determined to be static. When the real-time rate of change is positive, it is determined that the internal potential frequency change trend is decreasing.

4. The method for suppressing frequency variation in a doubly-fed induction generator (DFIG) based on a phase-locked loop as described in claim 3, characterized in that: The steps for obtaining the phase adjustment signal of the phase-locked loop include: The step of combining the changing trend with the output signal is as follows: When the internal potential frequency changes in an upward trend, the output signal is attenuated by a first preset coefficient. When the frequency change trend of the internal potential is static, the output signal remains unchanged; When the internal potential frequency changes in a decreasing trend, the output signal is amplified by a second preset coefficient. The processed output signal is denoted as the phase adjustment signal.

5. The method for suppressing frequency variation in a doubly-fed induction generator (DFIG) based on a phase-locked loop as described in claim 4, characterized in that: The steps for adjusting the lead-lag compensation based on the doubly fed wind turbine data include: When the doubly fed fan experiences frequency oscillation, a real-time frequency signal is extracted from the doubly fed fan data. By calculating the fluctuation of the real-time frequency signal, the oscillation amplitude and oscillation period of the real-time frequency signal are obtained. When the difference between the oscillation amplitude and the oscillation amplitude when the frequency oscillation does not occur is a positive number, the lead time constant in the lead-lag compensation is increased to X times; When the difference between the oscillation period and the oscillation period when the frequency oscillation does not occur is positive, the lag time constant in the lead-lag compensation is reduced to a factor of Y.

6. The method for suppressing frequency variation in a doubly-fed induction generator (DFIG) based on a phase-locked loop as described in claim 5, characterized in that: The steps for obtaining the compensation signal include: The phase adjustment signal is aligned with the adjusted lead time constant to advance the phase phase. The phase adjustment signal after data alignment is re-aligned using the adjusted hysteresis time constant to obtain a compensation signal.

7. The method for suppressing frequency variation in a doubly-fed induction generator (DFIG) based on a phase-locked loop as described in claim 6, characterized in that: The steps for adjusting the operating parameters of the doubly fed wind turbine include: Based on the compensation signal, the proportional and integral parameters in the phase-locked loop are adjusted through a transfer function.

8. A doubly-fed induction generator (DFIG) frequency variation suppression system based on a phase-locked loop, employing the doubly-fed induction generator frequency variation suppression method based on a phase-locked loop as described in any one of claims 1 to 7, characterized in that, include: The data acquisition module collects grid voltage and doubly-fed induction generator (DFIG) data. The output signal acquisition module inputs the grid terminal voltage into the phase-locked loop for processing, acquires the initial output signal, and filters the initial output signal through a phase threshold to acquire the final output signal. The phase adjustment signal acquisition module determines the frequency change trend of the internal potential of the doubly fed fan based on the doubly fed fan data, and combines the change trend with the output signal to obtain the phase adjustment signal of the phase-locked loop. The compensation signal acquisition module adjusts the lead-lag compensation based on the doubly fed fan data when the doubly fed fan experiences frequency oscillation, and processes the phase adjustment signal based on the adjusted lead-lag compensation to acquire the compensation signal. The feedback adjustment module feeds back the compensation signal to the doubly fed fan to adjust the operating parameters of the doubly fed fan.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the doubly fed wind turbine frequency variation suppression method based on phase-locked loop as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the doubly fed wind turbine frequency variation suppression method based on phase-locked loop as described in any one of claims 1 to 7.

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