Equivalent circuit of LTCC (Low Temperature Co-Fired Ceramic) multilayer triplexer and triplexer thereof
The LTCC multilayer triode, designed using LTCC technology, employs a stacked structure and a combination of inductors and capacitors to solve the problem of signal separation in miniaturized electronic devices. This results in a high-reliability and low-loss multilayer triode suitable for 5G mobile communication facilities and other communication equipment.
Patent Information
- Application Number
- CN202511749114.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-26
- Publication Date
- 2026-02-24
AI Technical Summary
Existing technologies struggle to design highly reliable, low-loss multilayer trippers in miniaturized, high-frequency electronic devices, especially in 5G mobile communication facilities and other communication equipment, where the requirements for spectrum resource separation and signal processing are not effectively met.
An LTCC multilayer triode is designed using LTCC technology. Through the stacked structure in a low-temperature co-fired ceramic matrix, combined with the equivalent circuits of low-frequency, mid-frequency and high-frequency filters, including low-pass, band-pass and high-pass filters, and utilizing the combination of inductors, capacitors and resonators, signal separation in a specific frequency band is achieved.
This technology enables the use of LTCC multilayer triodes, which are characterized by small size, high reliability, low loss, and low cost, making them suitable for mass production and meeting the integration and miniaturization requirements of electronic devices.
Smart Images

Figure CN121567091A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to an LTCC multilayer triplexer, which can be used in 5G mobile communication facilities and various other communication devices. Background Technology
[0002] Low-Temperature Co-fired Ceramic (LTCC), as a widely applicable high-density packaging technology, has become the preferred method for the integration and modularization of future electronic components due to its excellent electronic, mechanical, and thermal properties. It is widely used in the modular design of multilayer chip circuits. RF microwave components and modules designed and manufactured based on LTCC technology include balun filters, filters, multiplexers, duplexers, antennas, couplers, bridges, baluns, receiver front-end modules, and antenna switch modules. Besides its advantages in cost and integrated packaging, it also offers many advantages in wiring linewidth and spacing, low-impedance metallization, design versatility, and high-frequency performance. With the continuous development of modern electronic devices towards miniaturization and high frequency, these technologies are now widely used in miniaturized electronic devices.
[0003] In the field of mobile communications, communication products are becoming increasingly feature-rich, making available spectrum resources particularly important. This necessitates filters for various frequency bands to separate different signals. In communication product design, LTCC multilayer trippers, manufactured using LTCC technology, offer advantages such as high reliability, low insertion loss, high selectivity, small size, light weight, ease of integration, and low cost, making them suitable for mass production. Therefore, they are widely used. Summary of the Invention
[0004] To address the aforementioned problems, this invention provides an equivalent circuit for an LTCC multilayer triode. The equivalent circuit comprises a low-pass filter at a low-frequency end, a band-pass filter at an intermediate-frequency end, and a high-pass filter at a high-frequency end. The low-frequency end includes a first inductor L1, a second inductor L2, and a third inductor L3 connected in series at the antenna end and the first end. The third inductor L3 is connected in parallel with a tenth grounding capacitor C1. A second grounding capacitor C2 is located between the second inductor L2 and the third inductor L3. The third inductor L3 and the third grounding capacitor C3 at the first end are connected in parallel. The intermediate-frequency end includes a first inductor L1, a fourth capacitor C4, a sixth capacitor C6, a fourth inductor L4, and a fifth resonator inductor L5 located at the antenna end and the second end. The fourth capacitor C4 and the fifth resonator inductor L5 are connected in parallel. The six capacitors C6 are connected in series with a sixth inductor L6 and a fifth grounded capacitor C5. A seventh grounded capacitor C7 is connected between the fourth inductor L4 and the fifth resonator inductor L5. The fifth resonator inductor L5 is connected in parallel with an eighth capacitor C8. The high-frequency end includes a ninth capacitor C9, an eleventh capacitor C11, a thirteenth capacitor C13, and a ninth inductor L9 located at the antenna end and the third end. A seventh inductor L7 and a tenth grounded capacitor C10 are connected in series with the ninth capacitor C9 and the eleventh capacitor C11. An eighth inductor L8 and a twelfth grounded capacitor C12 are connected in series with the eleventh capacitor C11 and the thirteenth capacitor C13. A fourteenth capacitor C14 is connected between the thirteenth capacitor C13 and the ninth inductor L9.
[0005] An LTCC multilayer triode includes a ceramic substrate and a circuit structure layer disposed inside the ceramic substrate, the circuit structure layer comprising: The first layer has a first metal plane conductor printed on a ceramic dielectric substrate, as well as the point pillar planes of the first connection point pillar, the second connection point pillar, the third connection point pillar, and the fourth connection point pillar. The first metal plane conductor of the first layer is insulated from the second layer and the second metal plane, the second metal plane, the second metal plane, the second metal plane, the second metal plane, the second metal plane, the second metal plane, the second metal plane, the fifth metal plane, and the sixth metal plane of the second layer respectively form the tenth grounding capacitor C10, the twelfth grounding capacitor C12, the fifth grounding capacitor C5, the third capacitor C3, the second grounding capacitor C2, and the seventh grounding capacitor C7. The first layer serves as the grounding plane of the three-way circuit. The second layer consists of six mutually insulated metal planes: a first metal plane, a second metal plane, a third metal plane, a fourth metal plane, a fifth metal plane, and a sixth metal plane. These metal planes are connected to the upper metal plane via fifth, sixth, seventh, eighth, and ninth post points. The second ends of the fifth metal plane and the third metal plane form a first capacitor C1, and the sixth metal plane and the second metal plane form an eighth capacitor C8. Additionally, mutually insulated first, second, third, and fourth connection post points are printed and connected to the upper metal plane conductors. The third layer consists of three metal planes printed on the ceramic dielectric substrate: the first metal plane of the third layer, the second metal plane of the third layer, and the third metal plane of the third layer. The first and second ends of the third metal plane of the third layer are connected to the upper inductor through post. Additionally, the first, fifth, sixth, seventh, tenth, eighth, and ninth post, which are mutually insulated, are printed and connected to the conductors of the upper metal plane. The tenth post forms the fourteenth capacitor C14 with the conductor of the first metal plane of the first layer on the third layer. The fourth layer consists of three metal substrates printed on a ceramic dielectric substrate: the first metal plane, the second metal plane, and the third metal plane of the fourth layer, as well as the first, fifth, seventh, tenth, twelfth, thirteenth, and fourteenth interconnecting pillars that are insulated from each other. The fifth layer consists of five metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane of the fifth layer, the second metal plane of the fifth layer, the third metal plane of the fifth layer, the fourth metal plane of the fifth layer, the fifth metal plane of the fifth layer, and the metal planes of the first connection point post, the tenth point post, the twelfth point post, the thirteenth point post, the fourteenth point post, the fifteenth point post, and the sixteenth point post that are mutually insulated. The sixth layer consists of six metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane, the second metal plane, the third metal plane, the fourth metal plane, the fifth metal plane, and the sixth metal plane of the sixth layer, as well as the first connection point post, the tenth post, the twelfth post, the thirteenth post, the fifteenth post, and the sixteenth post, which are mutually insulated from each other. The seventh layer consists of seven metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane of the seventh layer, the second metal plane of the seventh layer, the third metal plane of the seventh layer, the fourth metal plane of the seventh layer, the fifth metal plane of the seventh layer, the sixth metal plane of the seventh layer, the seventh metal plane of the seventh layer, and the seventh metal plane of the seventh layer, as well as the first connection point post, the tenth post, the thirteenth post, the fifteenth post, and the sixteenth post that are insulated from each other. The eighth layer consists of seven metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane, the second metal plane, the third metal plane, the fourth metal plane, the fifth metal plane, the sixth metal plane, and the seventh metal plane of the eighth layer, as well as the first connection point post, the tenth point post, and the fifteenth point post that are mutually insulated. The ninth layer consists of six metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane, the second metal plane, the third metal plane, the fourth metal plane, the fifth metal plane, and the sixth metal plane of the ninth layer, as well as the first connection point post and the seventeenth point post that are mutually insulated. The tenth layer consists of four metal substrates printed on a ceramic dielectric substrate: the first metal plane, the second metal plane, the third metal plane, and the fourth metal plane of the tenth layer, as well as interconnected connection point planes with the first connection point pillar, the eighteenth connection point pillar, the nineteenth connection point pillar, and the twentieth connection point pillar. The third metal plane of the tenth layer is connected to the seventh inductor L7 and forms the ninth capacitor C9 with the third metal plane of the eleventh layer. The fourth metal plane of the tenth layer is connected to the eighth inductor L8 and forms the eleventh capacitor C11 with the fourth metal plane of the eleventh layer and the thirteenth capacitor C13 with the fifth metal plane of the eleventh layer. The second metal plane of the tenth layer and the first metal plane of the eleventh layer form the fourth capacitor C4. The first metal plane of the tenth layer and the second metal plane of the eleventh layer form the sixth capacitor C6. The eleventh layer consists of five metal substrates printed on a ceramic dielectric substrate: the first metal plane, the second metal plane, the third metal plane, the fourth metal plane, and the fifth metal plane of the eleventh layer. The third metal plane of the eleventh layer connects to the bottom pad via the first connection point pillar to form the first inductor L1; The fifth metal plane of the fifth layer, the first metal plane of the sixth layer, the fifth metal plane of the seventh layer, and the first metal plane of the eighth layer form the second inductor L2; The fourth layer first metal plane, the sixth layer second metal plane, the seventh layer sixth metal plane, and the eighth layer second metal plane form the third inductor L3; The fourth inductor L4 is formed by the fourth layer (third metal plane), the fifth layer (first metal plane), the sixth layer (sixth metal plane), the seventh layer (third metal plane), and the ninth layer (second metal plane). The third metal plane of the eighth layer forms the fifth resonator inductor L5; The fifth layer second metal plane, the sixth layer fifth metal plane, the seventh layer second metal plane, and the eighth layer fourth metal plane form the sixth inductor L6; The fifth layer fourth metal plane, the sixth layer third metal plane, the seventh layer fourth metal plane, the eighth layer seventh metal plane, and the ninth layer fourth metal plane form the seventh inductor L7; The fourth layer second metal plane, the fifth layer third metal plane, the sixth layer fourth metal plane, the seventh layer first metal plane, the eighth layer sixth metal plane, and the ninth layer fifth metal plane form the eighth inductor L8; The fifth metal plane of the eighth layer and the sixth metal plane of the ninth layer form the ninth inductor L9.
[0006] Furthermore, the first layer of first metal planar conductor is cross-shaped.
[0007] Furthermore, the fourth layer first metal plane, fourth layer second metal plane, and fourth layer third metal plane are strip-shaped.
[0008] Furthermore, the fifth layer first metal plane, fifth layer second metal plane, fifth layer third metal plane, fifth layer fourth metal plane, and fifth layer fifth metal plane are strip-shaped.
[0009] Furthermore, the sixth layer first metal plane, sixth layer second metal plane, sixth layer third metal plane, sixth layer fourth metal plane, sixth layer fifth metal plane, and sixth layer sixth metal plane are strip-shaped.
[0010] Furthermore, the seventh layer first metal plane, seventh layer second metal plane, seventh layer third metal plane, seventh layer fourth metal plane, seventh layer fifth metal plane, seventh layer sixth metal plane and seventh layer seventh metal plane are strip-shaped.
[0011] Furthermore, the eighth layer first metal plane, eighth layer second metal plane, eighth layer third metal plane, eighth layer fourth metal plane, eighth layer fifth metal plane, eighth layer sixth metal plane, and eighth layer seventh metal plane are strip-shaped.
[0012] Furthermore, the ninth layer first metal plane, ninth layer second metal plane, ninth layer third metal plane, ninth layer fourth metal plane, ninth layer fifth metal plane, and ninth layer sixth metal plane are strip-shaped.
[0013] The beneficial effects of this invention are as follows: Based on LTCC (Low Temperature Co-fired Ceramic) technology, this invention uses a lumped parameter model to design and realize the special electrical performance requirements of dielectric LTCC multilayer triodes. This invention effectively realizes the characteristics of dielectric LTCC multilayer triodes and has advantages such as low loss, small size, high reliability, low cost, and suitability for large-scale production. In addition, it also adapts to the new trend of electronic component integration and miniaturization. Attached Figure Description
[0014] Figure 1 This is a perspective view of the internal structure of the LTCC multilayer tripod of the present invention; Figure 2 This is a perspective view of the internal structure of the intermediate frequency and low frequency ends of the LTCC multilayer triode of the present invention; Figure 3 This is a perspective view of the internal structure of the high-frequency end of the LTCC multilayer triode of the present invention; Figure 4 This is an external view of the LTCC multilayer tripod of the present invention; Figure 5 This is the equivalent circuit diagram of the LTCC multilayer tripod of the present invention; Figure 6 This is a diagram of the bottom electrode of the LTCC multilayer triode of the present invention; Figure 7 This is a schematic diagram of the first layer planar structure of the present invention; Figure 8 This is a schematic diagram of the second layer planar structure of the present invention; Figure 9 This is a schematic diagram of the third layer planar structure of the present invention; Figure 10 This is a schematic diagram of the fourth layer planar structure of the present invention; Figure 11 This is a schematic diagram of the fifth layer planar structure of the present invention; Figure 12 This is a schematic diagram of the sixth layer planar structure of the present invention; Figure 13 This is a schematic diagram of the seventh layer planar structure of the present invention; Figure 14 This is a schematic diagram of the eighth layer planar structure of the present invention; Figure 15 This is a schematic diagram of the ninth layer planar structure of the present invention; Figure 16 This is a schematic diagram of the tenth layer planar structure of the present invention; Figure 17 This is a schematic diagram of the eleventh layer planar structure of the present invention; Figure 18 This is a schematic diagram of the top-level structure of the present invention; Figure 19The product's electrical frequency response curve shows that the LTCC multilayer triode operates in the following frequency bands: low frequency (0.5GHz~0.96GHz, transmission loss S(02,01)), mid frequency (1.47GHz~2.69GHz, transmission loss S(03,01)), and high frequency (3.3GHz~5.95GHz, transmission loss S(04,01); and the ANT return loss curve is S(01,01). Detailed Implementation
[0015] The present invention will be further explained and described below with reference to the accompanying drawings.
[0016] This invention provides a novel LTCC multilayer triode, which employs a lumped parameter design structure. This LTCC multilayer triode utilizes LTCC technology and is then co-fired at a low temperature of approximately 800℃~900℃. The novel LTCC multilayer triode includes an LTCC ceramic substrate, terminals disposed on the outer side of the substrate, and circuit layers disposed inside the substrate, wherein the circuit layers inside the substrate have a stacked structure.
[0017] Figure 5 This is the equivalent circuit diagram of an LTCC multilayer tripod.
[0018] The LTCC multilayer triode circuit consists of a low-pass filter at the low-frequency end, a band-pass filter at the intermediate-frequency end, and a high-pass filter at the high-frequency end. The low-pass filter at the low-frequency end is formed by connecting a second inductor L2 in series with a second ground capacitor C2, and a third inductor L3 in parallel with a first capacitor C1 in parallel to form a resonator, creating a transmission zero outside the passband and improving the suppression specification. The band-pass filter at the intermediate-frequency end is formed by connecting a fourth capacitor C4 and a sixth capacitor C6 in series with a fifth ground capacitor C5 and a sixth inductor L6 in series to form a resonator, creating a high-pass filter. Then, the fourth inductor L4 in series is connected with the fifth resonator inductor L5 in parallel with an eighth capacitor C8 and a seventh ground capacitor C7 to form a low-pass filter. Finally, the band-pass filter at the intermediate-frequency end is realized. The high-pass filter at the high-frequency end is formed by connecting the ninth capacitor C9, the eleventh capacitor C11, the thirteenth capacitor C13 in series, the tenth grounding capacitor C10 in series with the seventh inductor L7, and the twelfth grounding capacitor C12 in series with the eighth inductor L8. It is also connected to the fourteenth grounding capacitor C14 and the ninth inductor L9 in series at the port to form a single-order low-pass filter, thus forming an ultra-wideband high-pass filter.
[0019] Figure 4 It is a new type of LTCC multilayer triode appearance structure. The ceramic body 1 of the product is mainly composed of alumina (Al2O3), calcium oxide (CaO), magnesium oxide (MgO) and silicon oxide (SiO2). The orientation indicator 2 of the product is mainly made by co-firing the color glaze with the ceramic body.
[0020] Figure 6 This is the bottom pad of the new LTCC multilayer triode, with pins 2, 4, 6, 8, and 9. Pin 1 is the antenna input (ANT) of the LTCC multilayer triode, pin 3 is the low-frequency (Low Band) antenna input, pin 5 is the mid-frequency (Mid Band) antenna input, and pin 7 is the high-frequency (High Band) antenna input.
[0021] Figure 18 This is a schematic diagram of the top-level structure of the present invention, wherein the top layer is provided with product identification 62.
[0022] The internal structure of the LTCC multilayer triode is as follows: Figure 1-3 As shown, the circuit structure is distributed inside the ceramic substrate. The internal structure of the LTCC multilayer triode has a total of 12 layers.
[0023] The internal structure of the product, from bottom to top, consists of: The first layer has a first metal planar conductor 11 printed on a ceramic dielectric substrate, and first connection point post 10a, second connection point post 10b, third connection point post 10c, and fourth connection point post 10d connected to the upper layer (second layer) metal planar conductor. The first metal planar conductor 11 is insulated from the second layer by the second layer first metal plane 21, second metal plane 22, second metal plane 23, second metal plane 24, second metal plane 25, and second metal plane 26, which respectively form the tenth grounding capacitor C10, the twelfth grounding capacitor C12, the fifth grounding capacitor C5, the third capacitor C3, the second grounding capacitor C2, and the seventh grounding capacitor C7. The first layer serves as the grounding plane of the three-way circuit. The second layer consists of six mutually insulated second-layer first metal planes 21, 22, 23, 24, 25, and 26 printed on a ceramic dielectric substrate. The second-layer first metal planes 21, 22, 23, 25, and 26 are connected to the upper (third-layer) metal substrate via fifth post 11a, sixth post 12a, seventh post 13a, eighth post 15a, and ninth post 16a. The second end 33b of the second-layer fifth metal plane 25 and the third-layer third metal plane forms a first capacitor C1, and the second-layer sixth metal plane 26 and the third-layer second metal plane 32 form an eighth capacitor C8. Additionally, mutually insulated first connection post 10a, second connection post 10b, third connection post 10c, and fourth connection post 10d are printed and connected to the upper (third-layer) metal plane conductors.
[0024] The third layer consists of three metal planes printed on a ceramic dielectric substrate: a first metal plane 31, a second metal plane 32, and a third metal plane. The first end 33a and the second end 33b of the third metal plane are connected to the upper (fourth layer) inductor via post-printed points. Additionally, mutually insulated post-printed points 10a, 11a, 12a, 13a, 13b, 15a, and 16a are connected to the upper (fourth layer) metal plane conductors. Post 13b forms the fourteenth capacitor C14 with the first metal plane conductor 11 on the third layer metal plane. The fourth layer consists of three metal substrates printed on a ceramic dielectric substrate: a first metal plane 41, a second metal plane 42, and a third metal plane 43 of the fourth layer, along with mutually insulated connection point posts 10a, 11a, 13a, 13b, 17a, 18a, and 19c. The first metal plane 41, the second metal plane 42, and the third metal plane 43 of the fourth layer are the connecting coils of the third inductor L3, the eighth inductor L8, and the fourth inductor L4, respectively.
[0025] The fifth layer consists of five metal wire substrates printed on a ceramic dielectric substrate. These are the first metal plane 51, the second metal plane 52, the third metal plane 53, the fourth metal plane 54, and the fifth metal plane 55 of the fifth layer, along with mutually insulated connection point posts 10a, 13b, 17a, 18a, 19c, 20a, and 21a. The first metal plane 51, the second metal plane 52, the third metal plane 53, the fourth metal plane 54, and the fifth metal plane 55 of the fifth layer are the connecting coils for the fourth inductor L4, the sixth inductor L6, the eighth inductor L8, the seventh inductor L7, and the second inductor L2, respectively.
[0026] The sixth layer consists of six metal wire substrates printed on a ceramic dielectric substrate. These are the first metal plane 61, the second metal plane 62, the third metal plane 63, the fourth metal plane 64, the fifth metal plane 65, and the sixth metal plane 66 of the sixth layer, along with mutually insulated connection points: the first connection point post 10a, the tenth connection point post 13b, the twelfth connection point post 17a, the thirteenth connection point post 18a, the fifteenth connection point post 20a, and the sixteenth connection point post 21a. Among them, the first metal plane 61, the second metal plane 62, the third metal plane 63, the fourth metal plane 64, the fifth metal plane 65, and the sixth metal plane 66 of the sixth layer are the connecting coils of the second inductor L2, the third inductor L3, the seventh inductor L7, the eighth inductor L8, the sixth inductor L6, and the fourth inductor L4, respectively.
[0027] The seventh layer consists of seven metal wire substrates printed on a ceramic dielectric substrate. These are the first metal plane 71, the second metal plane 72, the third metal plane 73, the fourth metal plane 74, the fifth metal plane 75, the sixth metal plane 76, and the seventh metal plane 77 of the seventh layer, along with mutually insulated connection points: the first connection point post 10a, the tenth connection point post 13b, the thirteenth connection point post 18a, the fifteenth connection point post 20a, and the sixteenth connection point post 21a. Among these, the first metal plane 71, the second metal plane 72, the third metal plane 73, the fourth metal plane 74, the fifth metal plane 75, and the sixth metal plane 76 of the seventh layer are the connecting coils for the eighth inductor L8, the sixth inductor L6, the fourth inductor L4, the seventh inductor L7, the second inductor L2, and the third inductor L3, respectively.
[0028] The eighth layer consists of seven metal wire substrates printed on a ceramic dielectric substrate. These are the first metal plane 81, the second metal plane 82, the third metal plane 83, the fourth metal plane 84, the fifth metal plane 85, the sixth metal plane 86, and the seventh metal plane 87 of the eighth layer, along with mutually insulated connection point posts 10a, 13b, and 20a. The first metal plane 81, the second metal plane 82, the third metal plane 83, the fourth metal plane 84, the fifth metal plane 85, the sixth metal plane 86, and the seventh metal plane 87 of the eighth layer are the connecting coils for the second inductor L2, the third inductor L3, the fifth resonator inductor L5, the sixth inductor L6, the ninth inductor L9, the eighth inductor L8, and the seventh inductor L7, respectively.
[0029] The ninth layer consists of six metal wire substrates printed on a ceramic dielectric substrate. These are the first metal plane 91, the second metal plane 92, the third metal plane 93, the fourth metal plane 94, the fifth metal plane 95, and the sixth metal plane 96 of the ninth layer, along with mutually insulated first connection point posts 10a and seventeenth connection point posts 44a. The first metal plane 91, the second metal plane 92, the third metal plane 93, the fourth metal plane 94, the fifth metal plane 95, and the sixth metal plane 96 of the ninth layer are the connecting coils for the third inductor L3, the fourth inductor L4, the second inductor L2, the seventh inductor L7, the eighth inductor L8, and the ninth inductor L9, respectively.
[0030] The tenth layer consists of four metal substrates printed on a ceramic dielectric substrate: the first metal plane 101, the second metal plane 102, the third metal plane 103, and the fourth metal plane 104 of the tenth layer, along with interconnected insulated connection points: the first connection point post 10a, the eighteenth connection point post 48a, the nineteenth connection point post 49a, and the twentieth connection point post 52a. The third metal plane 103 of the tenth layer is connected to the seventh inductor L7 and forms the ninth capacitor C9 with the third metal plane 113 of the eleventh layer. The fourth metal plane 104 of the tenth layer is connected to the eighth inductor L8 and forms the eleventh capacitor C11 with the fourth metal plane 114 and the thirteenth capacitor C13 with the fifth metal plane 115 of the eleventh layer, respectively. The second metal plane 102 of the tenth layer and the first metal plane 111 of the eleventh layer form the fourth capacitor C4. The first metal plane 101 of the tenth layer and the second metal plane 112 of the eleventh layer form the sixth capacitor C6.
[0031] On the eleventh layer, five metal substrates are printed on the ceramic dielectric substrate, namely the first metal plane 111, the second metal plane 112, the third metal plane 113, the fourth metal plane 114, and the fifth metal plane 115 of the eleventh layer. The first metal plane 111 is connected to the second inductor L2 through the nineteenth point post 49a. The second metal plane 112 is connected to the fourth inductor L4 through the eighteenth point post 48a. The third metal plane 113 is connected to the bottom pad through the first connection point post 10a and serves as the first inductor L1. The fourth metal plane 114 is connected to the seventh inductor L7. The fifth metal plane 115 is connected to the ninth inductor L9.
[0032] The eleventh layer third metal plane 113 connects to the bottom pad via the first connection point post 10a, serving as the first inductor L1; the fifth layer fifth metal plane 55, the sixth layer first metal plane 61, the seventh layer fifth metal plane 75, and the eighth layer first metal plane 81 form the second inductor L2; the fourth layer first metal plane 41, the sixth layer second metal plane 62, the seventh layer sixth metal plane 76, and the eighth layer second metal plane 82 form the third inductor L3; the fourth layer third metal plane 43, the fifth layer first metal plane 51, the sixth layer sixth metal plane 66, the seventh layer third metal plane 73, and the ninth layer second metal plane 92 form the fourth inductor L4. The third metal plane 83 of the eighth layer forms the fifth resonator inductor L5; the second metal plane 52 of the fifth layer, the fifth metal plane 65 of the sixth layer, the second metal plane 72 of the seventh layer, and the fourth metal plane 84 of the eighth layer form the sixth inductor L6; the fourth metal plane 54 of the fifth layer, the third metal plane 63 of the sixth layer, the fourth metal plane 74 of the seventh layer, the seventh metal plane 87 of the eighth layer, and the fourth metal plane 94 of the ninth layer form the seventh inductor L7; the second metal plane 42 of the fourth layer, the third metal plane 53 of the fifth layer, the fourth metal plane 64 of the sixth layer, the first metal plane 71 of the seventh layer, the sixth metal plane 86 of the eighth layer, and the fifth metal plane 95 of the ninth layer form the eighth inductor L8; the fifth metal plane 85 of the eighth layer and the sixth metal plane 96 of the ninth layer form the ninth inductor L9.
Claims
1. An equivalent circuit for an LTCC multilayer triode, characterized in that, The equivalent circuit of the aforementioned tripod consists of a low-pass filter at the low-frequency end, a band-pass filter at the intermediate-frequency end, and a high-pass filter at the high-frequency end. The low-frequency end includes a first inductor L1, a second inductor L2, and a third inductor L3 connected in series at the antenna end and the first end. The third inductor L3 is connected in parallel with a tenth grounded capacitor C1. A second grounded capacitor C2 is located between the second inductor L2 and the third inductor L3. The third inductor L3 is connected to a third grounded capacitor C3 at the first end. The intermediate-frequency end includes a first inductor L1, a fourth capacitor C4, a sixth capacitor C6, a fourth inductor L4, and a fifth resonator inductor L5 located at the antenna end and the second end. The fourth capacitor C4 and the sixth capacitor C6 are connected in series with a sixth grounded inductor. L6 and the fifth grounding capacitor C5; a seventh grounding capacitor C7 is provided between the fourth inductor L4 and the fifth resonator inductor L5; the fifth resonator inductor L5 and an eighth capacitor C8 are connected in parallel; the high-frequency end includes a ninth capacitor C9, an eleventh capacitor C11, a thirteenth capacitor C13 and a ninth inductor L9 located at the antenna end and the third end; a seventh inductor L7 and a tenth grounding capacitor C10 are provided in series between the ninth capacitor C9 and the eleventh capacitor C11; an eighth inductor L8 and a twelfth grounding capacitor C12 are provided in series between the eleventh capacitor C11 and the thirteenth capacitor C13; and a fourteenth capacitor C14 is provided between the thirteenth capacitor C13 and the ninth inductor L9.
2. A tripod that implements the equivalent circuit of an LTCC multilayer tripod as described in claim 1, characterized in that, The aforementioned three-way device includes a ceramic substrate and a circuit structure layer disposed inside the ceramic substrate, wherein the circuit structure layer includes: The first layer has a first metal planar conductor (11) printed on a ceramic dielectric substrate, as well as the point pillar planes of the first connection point pillar (10a), the second connection point pillar (10b), the third connection point pillar (10c), and the fourth connection point pillar (10d). The first layer serves as the ground plane of the three-way circuit. The second layer consists of six mutually insulated second-layer first metal planes (21), second-layer second metal planes (22), second-layer third metal planes (23), second-layer fourth metal planes (24), second-layer fifth metal planes (25), and second-layer sixth metal planes (26) printed on a ceramic dielectric substrate. The second-layer first metal planes (21), second-layer second metal planes (22), second-layer third metal planes (23), second-layer fifth metal planes (25), and second-layer sixth metal planes (26) are connected to the upper metal planes via fifth point pillars (11a), sixth point pillars (12a), seventh point pillars (13a), eighth point pillars (15a), and ninth point pillars (16a). In addition, mutually insulated first connection point pillars (10a), second connection point pillars (10b), third connection point pillars (10c), and fourth connection point pillars (10d) are printed to connect to the conductors of the upper metal planes. The third layer consists of three metal planes printed on a ceramic dielectric substrate: the first metal plane (31), the second metal plane (32), and the third metal plane. The first end (33a) and the second end (33b) of the third metal plane are connected to the upper inductor via post. Additionally, the first connection post (10a), the fifth post (11a), the sixth post (12a), the seventh post (13a), the tenth post (13b), the eighth post (15a), and the ninth post (16a), which are mutually insulated, are printed and connected to the conductor of the upper metal plane. The fourth layer consists of three metal substrates printed on a ceramic dielectric substrate, namely the first metal plane (41), the second metal plane (42), the third metal plane (43) of the fourth layer, and the first connection point pillars (10a), the fifth point pillar (11a), the seventh point pillar (13a), the tenth point pillar (13b), the twelfth point pillar (17a), the thirteenth point pillar (18a), and the fourteenth point pillar (19c) that are insulated from each other. The fifth layer consists of five metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane (51), the second metal plane (52), the third metal plane (53), the fourth metal plane (54), the fifth metal plane (55) of the fifth layer, and the metal planes of the first connection point post (10a), the tenth point post (13b), the twelfth point post (17a), the thirteenth point post (18a), the fourteenth point post (19c), the fifteenth point post (20a), and the sixteenth point post (21a) that are mutually insulated. The sixth layer consists of six metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane (61), the second metal plane (62), the third metal plane (63), the fourth metal plane (64), the fifth metal plane (65), and the sixth metal plane (66) of the sixth layer, as well as mutually insulated connection points: the first connection point post (10a), the tenth connection point post (13b), the twelfth connection point post (17a), the thirteenth connection point post (18a), the fifteenth connection point post (20a), and the sixteenth connection point post (21a). The seventh layer consists of seven metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane (71), the second metal plane (72), the third metal plane (73), the fourth metal plane (74), the fifth metal plane (75), the sixth metal plane (76), and the seventh metal plane (77) of the seventh layer, as well as mutually insulated connection points: the first connection point post (10a), the tenth connection point post (13b), the thirteenth connection point post (18a), the fifteenth connection point post (20a), and the sixteenth connection point post (21a). The eighth layer consists of seven metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane (81), the second metal plane (82), the third metal plane (83), the fourth metal plane (84), the fifth metal plane (85), the sixth metal plane (86), the seventh metal plane (87) of the eighth layer, and the first connection point post (10a), the tenth point post (13b), and the fifteenth point post (20a) that are mutually insulated. The ninth layer consists of six metal wire substrates printed on a ceramic dielectric substrate, namely the first metal plane (91), the second metal plane (92), the third metal plane (93), the fourth metal plane (94), the fifth metal plane (95), the sixth metal plane (96), and the first connection point pillar (10a) and the seventeenth point pillar (44a) which are mutually insulated. The tenth layer consists of four metal substrates printed on a ceramic dielectric substrate: the first metal plane (101), the second metal plane (102), the third metal plane (103), the fourth metal plane (104) of the tenth layer, and the first connection point pillar (10a), the eighteenth point pillar (48a), the nineteenth point pillar (49a), and the twentieth point pillar (52a) of the interconnected connection point planes. In the eleventh layer, five metal substrates are printed on the ceramic dielectric substrate, namely the first metal plane (111), the second metal plane (112), the third metal plane (113), the fourth metal plane (114), and the fifth metal plane (115) of the eleventh layer.
3. The tripod of the equivalent circuit of an LTCC multilayer tripod as described in claim 2, characterized in that, The aforementioned three-stage equipment is manufactured using LTCC technology and then co-fired at a low temperature of approximately 800℃~900℃.