Upflow test simulation method based on substation equipment

Abstract

The invention relates to the technical field of substation equipment electrical testing, and discloses a substation equipment-based up-current test simulation method, which comprises the following steps of: acquiring a voltage signal and a current signal in real time by adopting a fixed-frequency test power supply; calculating a voltage and current phase difference to generate a phase error; adjusting a trigger delay angle of the electric control adjustable reactive power compensation device according to the phase error so as to lock the dynamic resonance point at the power supply frequency; carrying out current signal spectrum analysis in parallel to monitor harmonic waves and judge nonlinear faults; according to the invention, through closed-loop phase-locked control, self-adaptive tracking of dynamic impedance drift caused by heating of the equipment at a fixed frequency is realized, stable proceeding of a current rising test is facilitated, and dynamic parameters and nonlinear fault information of the equipment are synchronously acquired.

Description

TECHNICAL FIELD

[0001] The application relates to a substation equipment current rise test simulation method, and belongs to the technical field of substation equipment electrical testing. BACKGROUND

[0002] Currently, in the operation and maintenance of substations and power distribution systems, large-current current rise tests are performed on key devices such as circuit breakers, busbars and disconnectors, which are the core procedures for testing the rated current-carrying capacity and thermal stability of the devices. In order to avoid using extremely bulky, expensive and power-consuming power frequency test transformers to achieve thousands of amperes of large current, the industry currently generally adopts a series resonance technology. This technology combines reactors and compensation capacitors to cause the test loop to resonate near the power frequency, at which time the total impedance of the loop is extremely small, and the test power supply only needs to provide a small power to generate the required large current on the device under test. However, this widely used resonance method relies on a premise that is easily changed during testing, that is, the resonance frequency of the test loop must be constant. One of the core purposes of the current rise test is to examine the heating characteristics of the device under large current. When thousands of amperes of test current flow through the device under test, it inevitably heats up rapidly, and the increase in temperature will immediately cause real-time changes in its own physical parameters such as resistance and inductance. Since the device under test is an important part of the entire resonance loop, the drift of its parameters will directly cause the resonance point of the entire loop to shift dynamically. The output frequency of the traditional test power supply is fixed and cannot be changed. When the resonance point of the loop shifts, the system quickly detunes, the total impedance rises sharply, and eventually the test current rapidly decreases or is interrupted, making it impossible to maintain the test stably.

[0003] The problems of the prior art not only lie in the inability to effectively respond to the dynamic changes in the physical parameters of the device under test, but also lie in the lack of diagnostic dimensions in the control strategy. Some existing solutions attempt to stabilize the current by adjusting the power supply output or the loop parameters, but often focus on a single target and fail to establish a closed-loop control mechanism that adapts to the dynamic impedance drift of the device. Moreover, they do not synchronize to obtain rich diagnostic information. For example, a Chinese invention patent with publication number CN115248353A discloses a substation relay protection pre-start load test system. This patent mainly focuses on functional testing of the relay protection system, and its core is to simulate load working conditions to verify the correctness of the protection logic, rather than addressing the resonance detuning problem caused by the impedance drift of the primary device during the large current heating process. This solution fails to propose a closed-loop phase-locked control based on phase difference to track the dynamic resonance point in real time, and it does not associate the control quantities in the test process with the dynamic electrical and thermal parameter evolution characteristics of the device under test. The test system still stays at the level of judging single fault results and cannot provide dynamic diagnostic data during the current rise heating process.

[0004] Therefore, how to provide a current rise test simulation method capable of adaptively tracking a dynamic resonance point to maintain current stability and synchronously achieving dynamic diagnosis of device parameters and nonlinear fault monitoring becomes a technical problem to be solved by the present application. SUMMARY

[0005] The present application provides a substation device current rise test simulation method, which mainly aims to solve the problem that the test current cannot be stabilized due to the resonance point drift caused by device heating in the prior art, and the test process lacks dynamic diagnosis and nonlinear fault monitoring means.

[0006] To achieve the above-mentioned purpose, the present application provides a substation device current rise test simulation method applied to a harmonic test loop composed of a fixed frequency test power supply, a compensation capacitor and an electrically controlled adjustable reactive compensation device, and the method comprises the following steps: Step S1, real-time acquisition of voltage signals output by the fixed frequency test power supply and current signals of the harmonic test loop; Step S2, calculation of the phase difference between the voltage signals and the current signals and generation of a phase error based on the voltage signals and the current signals; Step S3, adjustment of the trigger delay angle of the electrically controlled adjustable reactive compensation device to change the equivalent reactance parameter of the harmonic test loop according to the phase error, so as to force the dynamic resonance point of the harmonic test loop to be locked at the frequency of the fixed frequency test power supply; Step S4, real-time monitoring of the amplitude of the current signal, and adjustment of the output voltage of the fixed frequency test power supply according to the deviation of the amplitude from a preset target current amplitude; Step S5, parallel frequency spectrum analysis of the current signal to obtain harmonic components in the current signal; Step S6, comparison of the harmonic components with a preset harmonic reference threshold, and determination of the occurrence of a nonlinear fault and termination of the current rise test when the harmonic components exceed the preset harmonic reference threshold; Step S7, continuous recording of the time series data of the trigger delay angle of step S3 and the time series data of the output voltage of step S4; Step S8, inversion of the dynamic inductance and the dynamic resistance of the substation device based on the time series data of the trigger delay angle and the time series data of the output voltage; Step S9, output of the dynamic inductance and the dynamic resistance.

[0007] Preferably, the electrically controlled adjustable reactive compensation device is an electrically controlled adjustable reactor, and in step S3, the adjustment of the trigger delay angle is used to change the equivalent reactance value of the electrically controlled adjustable reactor.

[0008] Preferably, the electrically controlled adjustable reactive compensation device is an electrically controlled adjustable capacitor bank, and in step S3, the adjustment of the trigger delay angle is used to change the equivalent capacitance value of the electrically controlled adjustable capacitor bank.

[0009] Preferably, in step S8, the inversion of the dynamic resistance is based on the fact that the amplitude of the current signal is maintained stable at the preset target current amplitude in step S4, the total dynamic resistance of the harmonic test loop is calculated based on the time series data of the output voltage and the preset target current amplitude, and the Ohm's law.

[0010] Preferably, in step S8, the inversion of the dynamic inductance is calculated by the time series data of the trigger delay angle, according to the preset corresponding relationship between the trigger delay angle of the electrically controlled adjustable reactive compensation device and the equivalent reactance parameter, and the equivalent reactance parameter of the harmonic test loop is calculated, and the total dynamic inductance of the harmonic test loop is calculated based on the resonance formula is inverted; wherein is the frequency of the fixed frequency test power supply, is the total dynamic inductance of the harmonic test loop, is the total dynamic capacitance of the harmonic test loop.

[0011] Preferably, in step S2, the phase error is generated by comparing the phase difference with the preset zero-degree target phase, and the zero-degree target phase corresponds to the working state of the harmonic test loop in pure resistive resonance.

[0012] Preferably, in step S6, when it is determined that a nonlinear fault occurs and the current rise test is terminated, the method further comprises: step S601, generating an alarm signal.

[0013] Preferably, in step S5, the frequency spectrum analysis is realized by performing fast Fourier transform.

[0014] Preferably, in step S2, the phase difference is calculated by a digital quadrature demodulation method.

[0015] Preferably, in step S4, the output voltage of the fixed frequency test power supply is adjusted by adjusting the tap or voltage regulator of the test transformer connected in series with the fixed frequency test power supply.

[0016] Compared with the prior art, the beneficial effects of the present application are: 1. The method establishes a closed-loop feedback adjustment mechanism based on the phase difference, and converts the dynamic impedance parameter caused by the heating of the measured device during the test into a control variable that can be tracked in real time. It no longer tries to resist or ignore this physical process, but continuously adjusts the output frequency of the variable reactor by real-time calculation of the phase difference between the voltage and the current, so that the test loop is always automatically locked at the real-time drift resonance point, avoiding the detuning and test current collapse caused by parameter drift in the traditional fixed frequency resonance test, and ensuring the continuity and stability of the current rise test during the entire simulation period.

[0017] 2、The method further utilizes the control signal generated in the above-mentioned closed-loop regulation process to achieve deep diagnosis of the physical characteristics of the device under test. In the first phase of the dynamic adjustment of the phase and voltage, the time series data of the output trigger delay angle and the time series data of the voltage itself constitute a direct reflection of the evolution of the inductance and resistance parameters of the device under test during the current rise heating process. By physically inverting the data in these two control processes, the current rise test is transformed from an execution process that only outputs a pass / fail result into a diagnostic process that can real-time depict the evolution characteristics of the electrical and thermal parameters of the device under test under extreme working conditions. This diagnostic capability is obtained without relying on any additional physical sensors.

[0018] 3、In addition to the regulation loop based on the fundamental phase, a monitoring path for non-linear fault characteristics is constructed in parallel. It is recognized that the phase locking mechanism of the main scheme will filter out high harmonic signals when focusing on tracking the fundamental wave (to deal with thermal drift), and these harmonics are exactly the representation of sudden faults such as arc or partial discharge occurring inside the substation equipment. By performing parallel frequency spectrum analysis on the collected current signal, the change of harmonic components is monitored in real time. The method establishes a safety sentinel that is completely orthogonal to the sensing dimension of the main control loop. This design enables the scheme to simultaneously deal with the slowly varying linear thermal drift and the sudden non-linear insulation or contact fault, constituting a more complete test system in the diagnosis dimension. BRIEF DESCRIPTION OF DRAWINGS

[0019] Fig. 1 Flow chart of the closed-loop control and fault monitoring method of the present application; Fig. 2 Test curve graph of the dynamic resonance locking control effect of the present application; Fig. 3 Implementation architecture block diagram of the closed-loop control system of the present application. DETAILED DESCRIPTION

[0020] In order to make the purpose and technical scheme and advantages of the present application more clear and explicit, the present application will be further described in detail below in combination with the drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0021] This invention discloses a simulation method for current boosting tests of substation equipment. The method constructs a harmonic test loop consisting of a fixed-frequency test power supply, a compensation capacitor, and an electrically adjustable reactive power compensation device. This loop operates on a closed-loop control logic, which includes a main control loop for dynamic resonant point locking, an outer control loop for stabilizing the test current amplitude, a parallel processing path for nonlinear fault monitoring, and a data recording and calculation module for dynamic inversion of equipment parameters. These loops and modules work collaboratively to acquire equipment status diagnostic information while maintaining test stability. In a current boosting test application for substation equipment, such as a busbar or circuit breaker, the test current flowing through the tested equipment causes it to heat up, thereby increasing its resistance. and inductor The parameter drift, a physical process, will cause the inherent resonant frequency of the entire harmonic test circuit to change. To address dynamic changes, this method employs a fixed-frequency test power supply, which can be a 50Hz or 60Hz power frequency obtained through a test transformer. This power supply is connected in series or parallel with an electrically controlled adjustable reactive power compensation device. This device can be an electrically controlled adjustable reactor (TCR) or an electrically controlled adjustable capacitor bank (TSC). The device utilizes thyristor valve groups to adjust the connection of a fixed reactor or capacitor at the millisecond level, thereby changing the total equivalent reactance parameter of the entire harmonic test circuit in real time, forcing the circuit's dynamic resonant point... It is locked to the frequency of a fixed-frequency test power supply.

[0022] The method executes step S1, which involves setting up voltage and current transformers in the test circuit to acquire the instantaneous voltage signal output by the fixed-frequency test power supply in real time. and the instantaneous current signal flowing through the harmonic test circuit A controller, such as a digital signal processor (DSP) or a field-programmable gate array (FPGA), receives... and The sampled data is processed, and step S2 is executed. In step S2, the controller uses a digital quadrature demodulation method to convert the sampled data into a digital quadrature demodulation method. and Each is orthogonal to a set of local reference signals, i.e. and ,in The power supply angular frequency is used for mixing and low-pass filtering to calculate the phase difference between the two in real time. The actual measurement Then resonate with a preset target phase. In comparison, the In a purely resistive resonance state, the value is determined to be zero degrees, thus generating a phase error. ,this As a control input, it is sent to a proportional-integral-derivative controller, i.e. a PID controller or a phase-locked loop PLL control logic, which performs step S3, whose output signal is used to adjust the triggering delay angle of the thyristor valve group in the electrically controllable adjustable reactive power compensation device in real time, dynamically adjusting the resonant point of the entire test loop When the measured device generates heat, causing the resonant point to deviate from the fixed power supply frequency , Correspondingly deviating , the controller detects and immediately adjusts , thereby changing the equivalent reactance value of the TCR or the equivalent capacitance value of the TSC This adjustment changes the resonant parameters of the entire loop, causing to re-lock on the power supply frequency, and then returning to achieve adaptive tracking of the dynamic resonant point; at the same time, the rise in the total resistance of the loop caused by the heat generated by the measured device will cause the current amplitude to drop, so the method performs step S4, an outer loop control logic that monitors the amplitude of the current signal in real time, such as calculating its root mean square RMS value, and compares the measured amplitude with a preset target current amplitude, such as 5000A, and the resulting amplitude deviation is used to adjust the output voltage of the fixed frequency test power supply. In a specific engineering implementation, the voltage adjustment is achieved by controlling the on-load voltage regulating taps of the test transformer connected in series with the power supply or an independent voltage regulator, which cooperates with the inner loop phase-locked control to keep the test current stable in amplitude while locking the resonance in phase.

[0023] The proportional-integral-derivative (PID) parameters of the dynamic resonant point locking inner loop controller of step S3 and the test current amplitude stabilizing outer loop controller of step S4 are determined through experimental optimization of the critical proportionality method of the system model, on the premise of ensuring that the system has a fast response (regulation time less than 1 second) to the slow drift (time constant in minutes) of the impedance of the measured device; to balance the transient response speed of the inner loop and the steady-state current accuracy of the outer loop, the two control loops are designed to be decoupled, with the response speed of the inner loop controller set to one-fifth to one-tenth of that of the outer loop controller, to prevent disturbances caused by rapid changes in the triggering delay angle to the output voltage adjustment, ensuring the smoothness of the test current amplitude ; the inner loop PID controller , , The initial value was determined by disconnecting the outer amplitude loop and conducting a small-amplitude phase disturbance experiment in an unloaded resonant circuit with only the reactive power compensation device involved. The value was calculated based on the oscillation period and critical proportionality of the system under critical oscillation conditions. Subsequently, optimization was performed by introducing the maximum dynamic impedance change rate onto the simulated load to ensure that the phase error was within acceptable limits. When it changes, trigger delay angle The adjustment can achieve zero overshoot and zero phase difference regression, thereby maintaining the circuit in a purely resistive resonance state. Furthermore, since the main phase-locked loop is insensitive to higher harmonics and may ignore nonlinear fault signals, this method performs step S5 in parallel while executing fundamental wave control. This step reuses the instantaneous current signal acquired in step S1. It is then fed into a parallel frequency domain analysis path, which calculates the frequency domain value in real time by performing a Fast Fourier Transform (FFT) algorithm or a set of digital bandpass filters. The system calculates the total harmonic distortion (THD) value or the amplitude of a specific higher harmonic in the harmonic components. Step S6 then compares the real-time harmonic component characteristics with a preset harmonic reference threshold. This reference threshold can be calibrated in a low-current pre-test phase by measuring the baseline harmonic level and adding a margin, such as 200% of the baseline THD. During the test, once a harmonic component is detected, if the THD value exceeds the reference threshold, the system immediately determines that a nonlinear fault has occurred and triggers the emergency stop procedure and alarm signal of the test.

[0024] This method also performs step S7, in which the trigger delay angle output in step S3 is recorded synchronously and continuously in a data processing module. The time series data, and the output voltage output in step S4. The time series data is then used, followed by step S8 to perform parameter inversion; for dynamic resistance... The inversion is due to step S4 maintaining the current amplitude stable at the preset target current amplitude. Furthermore, step S3 causes the circuit to operate at the resonant point, at which point the total impedance... The system can be based on Ohm's law, through... Derive the total dynamic resistance of the circuit; for the dynamic inductance The inversion, the system first relies on The time-series data is used, and based on a pre-calibrated correspondence between the trigger delay angle and equivalent reactance parameters of the electrically adjustable reactive power compensation device, which can be a lookup table or a polynomial function, the real-time equivalent reactance parameters of the compensation device are calculated, such as... or Because the main control loop has forced the entire harmonic test circuit to operate at a fixed power supply frequency. The resonance formula is always satisfied. wherein, is the power frequency, is the total dynamic inductance of the circuit, is the total dynamic capacitance of the circuit, and and or are known, the system can solve the dynamic inductance of the measured substation equipment by algebraic operation, and finally, step S9 outputs or stores the two dynamic parameter curves and for evaluating the electro-thermal stability of the equipment under the working condition; the inversion of the dynamic resistance is based on the fact that the current amplitude is maintained at the preset target current amplitude by step S4, and the circuit works in a resonant state by step S3; to correct the impedance error introduced by the actual phase-locked accuracy , the total dynamic resistance of the circuit is obtained by calculating and correcting the real-time measured output voltage and current , that is, wherein and are the fundamental effective values; for the inversion of the dynamic inductance , the corresponding relationship between the trigger delay angle of the electrically controlled adjustable reactive compensation device and the equivalent reactance parameter or is determined based on the multi-point calibration experiments under various working temperatures, through high-order polynomial fitting or table lookup interpolation, the model fitting residual of the relationship is controlled within 0.5%, to ensure the inversion accuracy; the determination of the preset harmonic reference threshold for the nonlinear fault judgment adopts a two-level threshold strategy, the first-level warning threshold is set to twice the total harmonic distortion under the low current steady state, for monitoring slight and continuous background distortion; and the second-level test termination threshold is set to an absolute value of 3.0%, which is based on the engineering statistical results of the instantaneous harmonic energy of typical nonlinear faults such as substation equipment contact micro-arc and partial discharge.

[0025] Example 1: In an application to assess the thermal stability of the main busbar connection points in a 220kV substation that has been in operation for many years, the test objective is to apply a test current of 4000A for 60 minutes to evaluate its long-term heating characteristics and connection reliability under rated current. Due to its long service life, the connection points of this busbar not only exhibit linear changes in resistance and inductance parameters due to the cumulative Joule heating effect, but also nonlinear faults such as poor contact or transient micro-arcs caused by minor oxidation or loosening at the connection points under high temperature and high current. At the start of the test, the system constructs a harmonic test circuit consisting of a 50Hz fixed-frequency test power supply, a main compensation capacitor, and an electrically controlled adjustable reactor (TCR). The TCR is connected in series in the circuit to adjust the total reactance. The system first executes steps S1 to S4, adjusting the taps of the test transformer to raise the circuit current amplitude to the target current amplitude of 4000A. Simultaneously, the phase calculation module in step S2 calculates the phase difference between voltage and current in real time. and with Phase error is generated by comparing the preset target phase. The control logic of step S3 is based on Adjust the trigger delay angle of the TCR This allows the circuit to reach a resonant state at a frequency of 50Hz. Stable at During the 30-minute test run, as a 4000A current continued to flow, the temperature of the busbar and its connection points gradually increased, and its equivalent resistance... The equivalent inductance increases due to the temperature coefficient. Due to slight drift caused by thermal expansion, changes in these two parameters together lead to the dynamic resonance point of the circuit. Attempting to deviate from 50Hz, the phase calculation module in step S2 detects this. Start to deviate The PID control logic in step S3 immediately responds to this phase error. Dynamically adjust the trigger delay angle of the TCR This changes its equivalent reactance value. This adjustment forces a change in the total reactance parameter of the entire circuit, making... It was forcibly pulled back and locked at the 50Hz power frequency.

[0026] At the same time, due to the total resistance The upward trend attempting to reduce the 4000A current amplitude is monitored in real time by the outer loop control logic in step S4. This logic adjusts the output voltage of the test transformer accordingly to offset the resistance increment. During this stage, the phase-locked loop in step S3 and the amplitude-stabilizing loop in step S4 operate in parallel; the former forces the phase difference... return With tracking the resonance point, the latter adjusts the output voltage to maintain the current amplitude of 4000A, both of which achieve adaptive tracking of linear thermal drift; at the 42nd minute of the test, due to the combined effect of thermal stress and electric force inside an aging connection point of the bus, transient contact failure and micro-arc discharge occur, which is physically manifested as transient distortion of the current waveform, i.e. high-order harmonic components such as 3rd, 5th, 7th, etc. At this time, the main control loop of step S3, whose control target is to track the 50Hz fundamental phase, does not respond to such high-frequency nonlinear phenomena, and is still stably locked in the vicinity of , the step S5, i.e. the FFT spectrum analysis path, which is executed in parallel, detects that the total harmonic distortion THD value jumps from the baseline of less than 0.5% to 3.8% in real time when performing frequency domain analysis on the collected current signal, The comparison logic of step S6 determines that the THD value has exceeded the preset harmonic reference threshold of 2.5%, and the system immediately rules that a nonlinear fault has occurred; the system then executes step S601, triggering the emergency abort procedure of the test, cutting off the power output, and sending an alarm signal to the operation terminal indicating the fault type, i.e. nonlinear fault, harmonic overrun. Throughout the process, the data processing module of step S7 has recorded the time series data of the trigger delay angle and the output voltage from the start of the test to the moment of abortion. After the test is completed, the operator invokes the inversion logic of step S8 based on the recorded data to obtain the evolution curves of the dynamic resistance and the dynamic inductance of the bus during the current rise process until the 42nd minute before the fault occurs.

[0027] Example 2: To quantitatively verify the current stability maintenance capability of the method of the present application in response to the thermal-induced impedance drift of the device under test, a comparative test is set up to compare the test current stability under simulated dynamic impedance changes using the method of the present application, i.e. the test group, and the traditional fixed-frequency series resonance method, i.e. the control group; the test platform is constructed as follows: a programmable resistance-inductance load simulator is used to simulate the heating effect of the bus section during the current rise process, with the initial parameters set as resistance , inductance , and set to increase linearly to , i.e. , and inductance to , i.e. within 10 minutes after the start of the test; the test circuit uses a 50Hz fixed-frequency test power supply, whose output voltage can be continuously adjusted by a voltage regulator; a main compensation capacitor ; the control group is connected in series with a fixed reactor in the loop, the inductance value of which is adjusted to achieve 50Hz resonance in the initial state; the test group replaces the fixed reactor and connects a controllable reactor TCR in series; the TCR is controlled by a controller based on DSP according to steps S1 to S4 of the method; the test loop is equipped with 0.2-grade voltage and current transformers and a device capable of calculating the phase difference in real time and a measurement and control unit for performing FFT spectrum analysis, the data sampling frequency is set to 10kHz, which is used to capture the 50Hz fundamental wave and its main harmonic components and meet the processing capacity requirement of the controller, the target current amplitude of the test is set to 3000A; the test process is as follows: the current rise test is performed on the control group and the test group respectively, at the beginning of the test, the output voltage of the power supply is adjusted to make the current reach 3000A, and the parameter drift program of the simulated load is started, the root mean square value of the test current and the voltage-current phase difference are recorded at intervals of 1 minute within a test period of 10 minutes ; the test data are shown in Table 1.

[0028] Table 1: Comparison of test data

[0029] Referring to Table 1, the control group reaches the current of 3000A and the phase difference close to zero at the beginning of the test, but as the simulated resistance and inductance increase, the degree of loop detuning increases, the phase difference continuously increases, and the test current correspondingly decreases to 1130A, about 37.7% of the target value at the end of the 10-minute test; in contrast, the test group maintains the actual current at the target value of 3000A (±1A) during the entire 10-minute test period, the phase difference is maintained within , and the trigger delay angle of the TCR increases from the initial to , which corresponds to the closed-loop control logic of step S3, which compensates for the parameter drift of the simulated load by adjusting the equivalent reactance value of the TCR, locks the dynamic resonance point at 50Hz, and the outer loop control, i.e., step S4, maintains the current amplitude by adjusting the power supply voltage; the total harmonic distortion THD of the current recorded during the test is less than 0.5%; the test results show that the method can effectively cope with the dynamic impedance drift of the device under test caused by heating by introducing a controllable adjustable reactive power compensation device based on phase difference feedback adjustment mechanism, and can maintain the test current stable within the test period under the condition of using only a fixed frequency test power supply.

[0030] ​Example 3: In order to further illustrate the technical effect of the method of the present application, the following comparative example test was carried out. The same test platform and simulated load parameter drift setting as in Example 2 were used, and the target current amplitude was set to 3000 A, and the test power supply was a 50 Hz fixed frequency test power supply. The comparative example did not use an electrically controlled adjustable reactive compensation device based on phase difference feedback control, but used a fixed frequency series resonance method, and a fixed reactor was connected in series in the loop. The inductance value of the fixed reactor was adjusted to achieve resonance at the initial state, i.e. , the simulated resistance , the simulated inductance , and the main compensation capacitor achieved resonance at a frequency of 50 Hz. The test process was consistent with the control group of Example 2: at the start of the test, the output voltage of the power supply was adjusted to make the current reach 3000 A, at which point the voltage-current phase difference was close to zero, and then the parameter drift program of the simulated load was started, the simulated resistance was linearly increased from to , the simulated inductance was linearly increased from to , and the duration was 10 minutes. During this period, no loop reactance parameter adjustment based on phase feedback was performed, and the root mean square value of the test current and the voltage-current phase difference were recorded at intervals of 1 minute. The test data recording results are shown in Table 2.

[0031] Table 2: Test data table of comparative example

[0032] As shown in Table 2, the comparative example using the fixed frequency, fixed reactor resonance method, when facing the simulated dynamic impedance drift, the voltage-current phase difference increased from the initial near zero degree to , indicating that the loop deviated from the resonance state, and at the same time, the test current decreased from the initial 3000 A to 1130 A, with a decrease of 62.3%, failing to maintain the target current stable.

[0033] Example 4: This example combines Figs. 1 to 3 to illustrate a method for simulating the current rise test of a substation device, as shown in Fig. 1As shown, the process starts from the beginning and enters step S1, real-time signal acquisition, which acquires voltage and current signals. The acquired signals are then processed in step S2, phase error calculation, to calculate the phase difference and generate the phase error. Simultaneously, they are processed in step S5, parallel spectrum analysis, to obtain the harmonic components in the current signal. The output of step S2 is processed in step S3, dynamic resonant point locking, which adjusts the trigger delay angle based on the phase error. At the same time, the acquired signal from step S1 is also processed in step S4, test current amplitude stabilization, which adjusts the output voltage based on the amplitude deviation. The analysis results of step S5 are processed in step S6, nonlinear fault determination, to determine whether the harmonic components exceed the threshold. If a nonlinear fault is determined, the test is stopped and an alarm is generated. If no normal operation is determined, the process and the outputs of steps S3 and S4 are combined into step S7, timing data recording, which records the trigger delay angle and output voltage data. The data from step S7 is then processed in step S8, dynamic parameter inversion, to invert the dynamic inductance and dynamic resistance, and finally realize the output dynamic parameters.

[0034] like Fig. 2 As shown, the horizontal axis represents time in minutes, ranging from 0 to 10; the left vertical axis represents the phase difference, ranging from 0 to 0.50; and the right vertical axis represents the firing angle, ranging from 85 to 110. The graph contains two curves, with the experimental group's phase difference curve (represented by the solid line) at... to It fluctuates within a very small range, while the TCR trigger angle curve (represented by the dashed line) changes over time from... steadily rising to approximately ;like Fig. 3 As shown, the system is based on a DSP / FPGA controller, which includes a phase calculation module, an amplitude stabilization control loop, a frequency domain analysis path FFT, nonlinear fault judgment logic, a data recording module, and a parameter inversion module. The controller obtains signals from the physical circuit through voltage transformers and current transformers. The physical circuit consists of a fixed frequency test power supply, a voltage regulating device test transformer, an electrically controlled adjustable reactor (TCR), the tested equipment such as a busbar, a circuit breaker, and a compensation capacitor connected in series. The control signals issued by the DSP / FPGA controller are directed to the voltage regulating device and the electrically controlled adjustable reactor (TCR), and the processed dynamic parameter outputs and alarm signals are sent to the operation terminal.

[0035] Example 5: This example describes the process of determining the preset harmonic reference threshold in step S6 and the trigger delay angle of the electrically adjustable reactive power compensation device in step S8 before performing the current rise test simulation. The calibration procedure corresponding to the equivalent reactance parameters is illustrated here using an electrically controlled adjustable reactor (TCR) as an example. With equivalent inductance value The corresponding relationship is calibrated; to calibrate the preset harmonic reference threshold, a copper busbar with known resistance and inductance is selected as a standard linear load connected to the harmonic test circuit. The test environment maintains the electromagnetic background noise level during the actual test. The controller adopts the FFT algorithm and parameter settings, starts the fixed frequency test power supply, applies a test current of 10% of the target current amplitude, and runs continuously for 15 minutes under this condition. The system continuously monitors the current signal according to step S5. Spectral analysis was performed, and time-series data of total harmonic distortion (THD) were recorded. The calibration procedure then calculated the average value of this set of THD data. and standard deviation Preset harmonic reference threshold Based on the statistical results, it is set as ,in, The coefficient, determined by balancing the required detection sensitivity and false alarm resistance, ranges from 3 to 6; alternatively, the threshold can be set to... ,in It is a multiple factor, with a value range of 2 to 3. If measured , ,Pick ,but Set as This threshold is stored in the controller and serves as the benchmark for real-time comparison in step S6.

[0036] To calibrate the TCR trigger delay angle With equivalent inductance value The corresponding relationship is established by using the aforementioned standard linear load in the harmonic test circuit, with the test power supply frequency set at a fixed frequency far from 50Hz. For example, at 45Hz, the controller sequentially adjusts the trigger delay angle of the TCR. From near Step to approach The step interval is In each fixed At an angle, the system acquires voltage signals under steady-state conditions. and current signal amplitude and and phase difference Based on measured values ​​and known compensation capacitors and standard load inductance Calculate The equivalent inductance value of TCR corresponding to the angle The calculation process is as follows: First, calculate the magnitude of the total impedance of the loop. Then calculate the total reactance. Due to total reactance Solve traversal all the set values, a series of data point pairs are obtained, which are stored as a lookup table or fitted as a function , constituting the corresponding relationship required in step S8; when performing the up-flow test simulation, the inversion calculation module of step S8 calls the above-calibrated lookup table or function converts the value of the at each time recorded in step S7 into the corresponding equivalent inductance value , and then, since the system has made the entire loop work in the resonant state at the fixed power frequency in step S3, it satisfies , wherein , is the dynamic inductance of the device under test, is the fixed inductance of the loop wiring, etc., is the total capacitance, and the system inverses the dynamic inductance of the device under test by solving the resonance formula ; the calibration procedure described in this embodiment provides a clear determination method for the preset harmonic reference threshold and the trigger delay angle-equivalent reactance relationship of TCR, which is used for nonlinear fault detection and dynamic inductance inversion calculation.

[0037] It is obvious to those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, and the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application.

[0038] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not limiting. Although the present application has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A simulation method for current boosting tests of substation equipment, applied to a harmonic test circuit consisting of a fixed-frequency test power supply, a compensation capacitor, and an electrically adjustable reactive power compensation device, characterized in that... The method includes: Step S1: Real-time acquisition of the voltage signal output by the fixed frequency test power supply and the current signal of the harmonic test circuit; Step S2: Calculate the phase difference between the voltage signal and the current signal and generate the phase error; Step S3: Adjust the trigger delay angle of the electronically controlled adjustable reactive power compensation device according to the phase error to change the equivalent reactance parameter of the harmonic test circuit, so as to force the dynamic resonance point of the harmonic test circuit to lock at the frequency of the fixed frequency test power supply. Step S4: Monitor the amplitude of the current signal in real time, and adjust the output voltage of the fixed frequency test power supply according to the deviation between the amplitude and the preset target current amplitude. Step S5: Perform spectrum analysis on the current signal in parallel to obtain the harmonic components in the current signal; Step S6: Compare the harmonic components with the preset harmonic reference threshold, and when the harmonic components exceed the preset harmonic reference threshold, determine that a nonlinear fault has occurred and stop the current rise test. Step S7: Continuously record the time series data of the trigger delay angle in step S3 and the time series data of the output voltage in step S4; Step S8: Based on the time series data of the trigger delay angle and the time series data of the output voltage, reverse the dynamic inductance and dynamic resistance of the power plant equipment; Step S9: Output dynamic inductance and dynamic resistance.

2. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, The electrically controlled adjustable reactive power compensation device is an electrically controlled adjustable reactor. In step S3, adjusting the trigger delay angle is used to change the equivalent reactance value of the electrically controlled adjustable reactor.

3. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, The electrically adjustable reactive power compensation device is an electrically adjustable capacitor bank. In step S3, adjusting the trigger delay angle is used to change the equivalent capacitance value of the electrically adjustable capacitor bank.

4. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S8, the inversion of dynamic resistance is based on the fact that step S4 maintained the amplitude of the current signal at a preset target current amplitude. The total dynamic resistance of the harmonic test circuit is calculated using the time series data of the output voltage and the preset target current amplitude, and based on Ohm's law.

5. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S8, the inversion of the dynamic inductance is performed by using the time series data of the trigger delay angle, based on the preset correspondence between the trigger delay angle and the equivalent reactance parameters of the electronically controlled adjustable reactive power compensation device, to calculate the equivalent reactance parameters of the harmonic test circuit, and then using the resonance formula. Inversion is performed; among which The frequency of the fixed-frequency test power supply, The total dynamic inductance of the harmonic test circuit. This is the total dynamic capacitance of the harmonic test circuit.

6. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S2, the phase error is generated by comparing the phase difference with the preset zero-degree target phase, which corresponds to the harmonic test circuit operating in a purely resistive resonance state.

7. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S6, when a nonlinear fault is determined to have occurred and the current rise test is stopped, the method further includes: step S601, generating an alarm signal.

8. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S5, the spectrum analysis is performed by executing a fast Fourier transform.

9. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S2, the phase difference is calculated using digital quadrature demodulation.

10. The method for simulating current boosting tests of substation equipment according to claim 1, characterized in that, In step S4, adjusting the output voltage of the fixed frequency test power supply is achieved by adjusting the tap or voltage regulator of the test transformer connected in series with the fixed frequency test power supply.

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