Online test method for board-level function of surge protection device

Abstract

The invention discloses a surge protection device board-level function on-line test method, particularly relates to the technical field of electric measurement and power electronic protection, and is used for solving the problem that fine on-line evaluation on the real protection capability and the degradation state of a plurality of surge protection devices on a circuit board is difficult under the condition that equipment is not stopped and the board is not disassembled. A node topology model and baseline equivalent parameters of a circuit board bus, a load and each surge protection device are established, a fluctuation-controlled online test window is selected during operation, controlled micro-surge excitation is applied to a target node, and a state index of each surge protection device is solved by combining multiple rounds of combined tests on the basis of multi-node synchronous acquisition; therefore, the real protection capability of a plurality of surge protectors on the board is subjected to refined online evaluation under the conditions of no shutdown and no board disassembly, degenerated but incompletely invalid devices are identified in time, and the surge protection margin of the credible circuit board is given.

Description

Technical Field

[0001] This invention relates to the field of electrical measurement and power electronic protection technology, specifically to an online testing method for the board-level function of surge protectors. Background Technology

[0002] Currently, in power distribution systems, communication power supply systems, and industrial control systems, circuit boards are commonly equipped with board-level surge protectors such as varistors, transient voltage suppressor diodes, and gas discharge tubes to limit surge overvoltages and improve equipment immunity. Verification of surge protection capabilities in existing projects often relies on type testing at the whole-machine or module level. For example, applying surge impacts to the equipment with standard waveforms in an offline state and observing whether it breaks down or fails; during operation, methods such as built-in indicator lights, fuse structures, or simple leakage current monitoring are often used to determine whether the surge protector has a clear open circuit or short circuit. These methods can detect completely failed or severely abnormal devices, but they can usually only be performed when the equipment is shut down or out of service, and are mostly for individual protection modules or the whole machine, without detailing the operating status of the individual surge protector devices within the circuit board.

[0003] On the other hand, existing solutions for online testing of board-level surge protectors typically involve collecting voltage and current data at the power supply bus or a fixed measurement point, combining this with simple thresholds to determine whether the surge protection circuit is conducting, or applying a small trial voltage without changing the operating conditions to detect whether the leakage current exceeds a set range. While these online monitoring methods are simple to implement, they mostly fail to establish the overall node topology of the circuit board, nor do they consider parasitic wiring parameters or the coupling effects between multiple levels of protectors. They cannot distinguish the degree of degradation of surge protectors at different locations and levels. Furthermore, they usually only provide a rough "normal / abnormal" judgment, which is insufficient to reflect changes in key electrical performance characteristics such as residual voltage capability and response characteristics under actual wiring conditions and long-term operation, and cannot quantify the board-level surge protection margin. In addition, existing online monitoring often lacks precise control over the timing of tests and the magnitude of disturbances. In scenarios with continuous equipment operation and large load fluctuations, it is difficult to perform representative functional tests without affecting business operations.

[0004] Against this backdrop, for applications such as data center communication boards, power monitoring boards, and industrial control boards that operate under long-term power conditions, existing technologies generally suffer from the following problem: without stopping equipment operation or disassembling the circuit board, there is a lack of a testing method that can perform targeted online testing of the functional status of each surge protector on the entire circuit board and multiple surge protectors, taking into account the actual wiring topology and parasitic parameters, under the premise of controlled service disturbances, and thereby reflect the overall surge protection capability of the circuit board. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides an online testing method for the board-level functions of surge protectors, thereby resolving the problems mentioned in the background section.

[0006] To achieve the above objectives, the present invention provides the following technical solution: an online testing method for the board-level function of surge protectors, comprising: S1. Establish a node topology model of the circuit board bus, load and each surge protector, collect the power-on voltage and current and obtain the baseline equivalent parameters of each surge protector according to the equivalent circuit model; S2. Monitor the bus voltage and branch current during operation, and select the time period when the fluctuation is below the limit value based on the rate of change and ripple amplitude as the online test window; S3. Apply a micro-surge excitation with an amplitude lower than the surge protector's operating voltage to the target node through the onboard test injection network within the test window, and control the main power supply output offset to not exceed a predetermined offset amount. S4. During the micro-surge, synchronously collect the voltage and current of the bus and the nodes at both ends of each surge protector according to a unified time base. Subtract the reference waveform from the excitation waveform to obtain the incremental waveform and substitute it into the node topology model to solve the instantaneous equivalent parameters of each surge protector. S5. By controlling the bypass switch, change the combination of surge protectors participating in the micro-surge in no less than two rounds of testing, repeatedly apply the micro-surge and solve the parameters, and jointly estimate the parameters of each round according to the surge protector number to form a status index. S6. Compare the status indicators with the baseline equivalent parameters, classify the health level of the surge protector according to the judgment rules, and record the circuit board surge protection capability assessment results and the next online test time.

[0007] In a preferred embodiment, S1 includes: The field control unit constructs a node topology model based on the target circuit board. The node topology model records the electrical connection relationships between bus nodes, load nodes, surge protector end nodes, test injection nodes, and measurement nodes, as well as the range of auxiliary impedance values ​​for each connection branch. With the circuit board powered on and no test excitation applied, the bus voltage, branch current and the node voltage and current at both ends of each surge protector are synchronously collected within the observation window under a unified time base constraint. The collected sequence is then aligned and noise suppressed according to the node topology model. Based on the preset equivalent circuit model, each surge protector is represented as an equivalent branch consisting of nonlinear impedance elements, parasitic capacitance, and parasitic inductance. The baseline equivalent parameters of the equivalent branch are obtained and a corresponding relationship is established with the corresponding surge protector number.

[0008] In a preferred embodiment, S2 includes: When the equipment is running online, the field control unit monitors the bus voltage and branch current using a sliding observation window under a unified time base, and calculates the rate of change and ripple amplitude for each sliding observation window. Based on the window selection rules, determine whether the limit conditions are met, and register the sliding observation window that meets the limit conditions as an online test candidate window; When the number of online test candidate windows reaches a predetermined number and the time interval between the current time and the completion time of the previous round of online tests is not less than the preset minimum interval, an online test window is selected from the online test candidate windows according to a predetermined priority strategy, and the window number, start and end time, time anchor identifier, and window selection rule version number of the online test window are written into the task record of the audit area.

[0009] In a preferred embodiment, S3 includes: Within the online testing window, the field control unit determines the target node associated with the surge protector under test based on the node identifiers and connection relationships registered in the node topology model. The target node is one of the bus node, branch node, or two-terminal nodes of the surge protector that can reflect the conduction behavior of the surge protector through short-time voltage changes; The field control unit controls the energy storage components and controllable switches that are electrically connected to the target node in the onboard test injection network; Under a unified time base, a controllable switch is triggered to release energy from the pre-charged energy storage element to the target node, forming a transient voltage waveform with an amplitude smaller than the nominal operating voltage of the surge protector as a micro-surge excitation based on the bus voltage. The onboard test injection network is configured to switch coupling positions between different target nodes and adjust the energy release of the energy storage element according to the preset energy range in the parameter table.

[0010] In a preferred embodiment, during the application of micro-surge excitation, the field control unit acquires the bus voltage through a measurement channel connected to the bus node; Calculate the deviation of the bus voltage relative to the rated operating voltage of the circuit board, and compare the deviation as the main power output deviation with the predetermined deviation and alarm threshold configured for the circuit board in the parameter table. When the bus voltage deviation reaches the predetermined deviation amount, the controllable switch of the onboard test injection network is turned off to terminate the current micro-surge excitation, and the corresponding online test cycle is marked as a restricted test cycle.

[0011] In a preferred embodiment, S4 includes: When a micro-surge excitation is applied within the online test window, the field control unit synchronously collects the voltage and current of the bus node and the nodes at both ends of each surge protector based on a unified time base. A measurement sequence is selected from the running window adjacent to the online test window and without applied test stimulus, and then aligned and amplitude-calibrated to form a reference waveform; The incremental waveform of each measurement node is obtained by subtracting the measurement sequence containing micro-surge excitation from the reference waveform point by point. The incremental waveform is then substituted into the node topology model and the instantaneous equivalent parameters of each surge protector are adjusted iteratively. The instantaneous equivalent parameters are determined when the difference between the model-predicted waveform and the incremental waveform is less than the convergence threshold, the number of iterations does not exceed the upper limit of the number of iterations, and the computation time does not exceed the upper limit of the computation time. If the convergence threshold is not met by the end of the iteration and the computation time reaches the upper limit of the computation time, the immediate equivalent parameter set of this round will be marked as a computation failure and written to the audit area along with the online test window identifier.

[0012] In a preferred embodiment, S5 includes: When multiple surge protectors are installed on the circuit board, the field control unit assigns a unique number to each surge protector according to the predetermined test plan, and controls the bypass switch electrically connected to each surge protector to adopt different on and off combinations in the first and second test rounds, so that the set of surge protectors in the main participation state in the first test round is different from the set of surge protectors in the main participation state in the second test round.

[0013] In a preferred embodiment, the field control unit, for each surge protector, jointly estimates the instantaneous equivalent parameters obtained from the first and second test rounds according to predetermined parameter weights and confidence levels to obtain a status index including residual voltage offset, equivalent impedance change, and response time offset. The status index is then registered in a status index table corresponding to the circuit board identifier, surge protector number, and test task identifier. The status index table is stored by the field control unit and used for subsequent health level classification and surge protection capability assessment.

[0014] In a preferred embodiment, S6 includes: After obtaining the status indicators of each surge protector, the field control unit compares the status indicators with the corresponding baseline equivalent parameters according to the set of judgment rules to obtain the health level of the surge protector. Based on the positional relationship of the surge protector in the node topology model, calculate the surge protection capability assessment results of the circuit board and the next online test time; Write the health level, surge protection capability assessment results, next online test time, board identifier, time anchor identifier, test window number, test round summary, node topology model version, judgment rule version, status indicator set and evidence chain identifier as task records into the audit area; Write is performed only after confirming, based on the evidence chain identifier, that there are no task records with the same evidence chain identifier in the audit area.

[0015] Compared with the prior art, the present invention has the following beneficial effects: 1. By establishing the node topology model and baseline equivalent parameters of the circuit board bus, load and each surge protector, a controlled fluctuation online test window is selected during operation. Controlled micro-surge excitation is applied to the target node, and the status indicators of each surge protector are obtained by combining multiple rounds of combined tests based on synchronous acquisition of multiple nodes. This achieves a refined online evaluation of the actual protection capability of multiple surge protectors on the board without stopping the machine or removing the board, and timely identifies degraded but not completely failed devices and provides a reliable surge protection margin for the circuit board.

[0016] 2. By uniformly encapsulating information such as the test window selection process, micro-surge excitation configuration, node topology model version, judgment rule version, and status indicators of each surge protector into task records and evidence chains, which are only appended to the audit area, and outputting the health level, surge protection capability assessment results, and the next online test time to the operation and maintenance system through the agreed interface, the goal of making the detection process fully traceable and verifiable, allowing the online test rhythm to be adaptively adjusted according to the equipment status and environment, and reducing the risk of operation and maintenance misjudgment and missed detection is achieved. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating the online testing method for the surge protector board-level function of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Example: Figure 1 A flowchart illustrating the online testing method for the board-level function of the surge protector according to the present invention is provided. The online testing method for the board-level function of the surge protector includes: S1. Establish a node topology model of the circuit board bus, load and each surge protector, collect the power-on voltage and current and obtain the baseline equivalent parameters of each surge protector according to the equivalent circuit model; S2. Monitor the bus voltage and branch current during operation, and select the time period when the fluctuation is below the limit value based on the rate of change and ripple amplitude as the online test window; S3. Apply a micro-surge excitation with an amplitude lower than the surge protector's operating voltage to the target node through the onboard test injection network within the test window, and control the main power supply output offset to not exceed a predetermined offset amount. S4. During the micro-surge, synchronously collect the voltage and current of the bus and the nodes at both ends of each surge protector according to a unified time base. Subtract the reference waveform from the excitation waveform to obtain the incremental waveform and substitute it into the node topology model to solve the instantaneous equivalent parameters of each surge protector. S5. By controlling the bypass switch, change the combination of surge protectors participating in the micro-surge in no less than two rounds of testing, repeatedly apply the micro-surge and solve the parameters, and jointly estimate the parameters of each round according to the surge protector number to form a status index. S6. Compare the status indicators with the baseline equivalent parameters, classify the health level of the surge protector according to the judgment rules, and record the circuit board surge protection capability assessment results and the next online test time.

[0020] The technical connections and implementation logic of the six steps are as follows: First, in step S1, a node topology model of the bus, load, and each surge protector is established for the target circuit board. Voltage and current at each node are collected when power is on and no test excitation is applied. The baseline equivalent parameters of each surge protector are calculated using a preset equivalent circuit model, providing structural and parameter benchmarks for subsequent online testing. In step S2, during online operation, the bus voltage and current of each branch are continuously monitored. The monitoring sequence is analyzed using a sliding time window to determine the rate of change and ripple amplitude. Time periods with smaller fluctuations are selected based on limits and marked as online test windows to ensure the accuracy of subsequent testing. The impact on business operations is controllable. Subsequently, in step S3, within the selected online test window, a micro-surge excitation with a peak value lower than the surge protector's operating voltage is applied to the target node associated with the surge protector via the onboard test injection network. Simultaneously, the bus voltage deviation is monitored in real time and constrained within a predetermined range, enabling the surge protector to generate an identifiable response under conditions close to actual surge conditions while ensuring safe operation. In step S4, the voltage and current of the bus and the nodes at both ends of each surge protector are synchronously acquired at a unified time base before and after the micro-surge, and the excitation waveform is compared with that of adjacent operating windows. The incremental waveform is obtained by subtracting the reference waveform and then substituting the incremental waveform into the node topology model to solve for the instantaneous equivalent parameters of each surge protector under the current micro-surge conditions, thereby obtaining a set of parameter characteristics that reflect the current working state. In step S5, the combination of surge protectors participating in the micro-surge excitation is changed in no less than two rounds of testing by controlling the bypass switch. The micro-surge application and instantaneous equivalent parameter solution are repeated for each round. The parameters obtained from different combinations and different rounds are jointly estimated according to the surge protector number to form a cross-round comprehensive state index, which is used to stably characterize each The surge protector's residual voltage offset, impedance change, and response time offset are measured. Finally, in step S6, the above status indicators are compared with the corresponding baseline equivalent parameters. Based on the judgment rules pre-established according to the equipment model and application scenario, the health level of each surge protector is divided. The surge protection capability assessment results of the circuit board are registered in combination with its position in the node topology. At the same time, the next online test time is generated. This constitutes a complete technical chain from board-level structure modeling, test window selection, micro-surge excitation, parameter identification, multi-round combined assessment to health judgment and protection capability quantification.

[0021] S1. Establish a node topology model of the circuit board bus, load, and each surge protector; collect the power-on voltage and current; and calculate the baseline equivalent parameters of each surge protector according to the equivalent circuit model. The specific implementation is as follows: For a target circuit board in a state to be measured, first, at the production debugging station or the on-site installation station, the on-site control unit constructs a node topology model among the bus, the load, and each surge protector. Here, the circuit board refers to a printed circuit board assembly that carries the power bus, service loads, and board-level surge protectors. The bus is a common power supply conductor that provides energy for each branch on the circuit board. The load is a functional circuit unit that is electrically connected to the bus and consumes electrical energy. The surge protector is a voltage limiter device arranged between the bus and the load, or between the signal terminal and the reference ground, and is used to conduct and discharge energy when a surge voltage appears. The reference ground refers to the protection ground node or signal ground node on the circuit board, which is used as the potential reference point for surge discharge. The node topology model refers to a model that records the electrical connection relationships among bus nodes, load nodes, nodes at both ends of surge protectors, test injection nodes for applying test stimuli, and measurement nodes for collecting measurement values with nodes as the basic units, and gives the value ranges of the auxiliary impedances in each connecting branch. The auxiliary impedance preferably includes three types of parameters: series resistance, parasitic inductance, and parasitic capacitance, and their value ranges are recorded in the node topology model. The on-site control unit is a control and measurement device supporting the circuit board, with a measurement module and a timing source internally. The measurement module is preferably a multi-channel voltage and current acquisition unit, and the timing source is preferably an on-board clock module or a synchronous pulse signal from the outside, which is used to provide a unified time reference for each sampling channel.

[0022] The node topology model is preferably version-managed with a node topology model version identifier. The node topology model version identifier can be set as a non-repeating string formed by combining the circuit board model, hardware version, and configuration date, which is used to distinguish different circuit board structures or wiring methods. The circuit board itself has a circuit board identifier, which can be set as an identifier that uniquely marks the identity of the circuit board in the upper-level operation and maintenance system. The two are stored separately in the record. All types of nodes in the node topology model adopt a unified naming rule, and the auxiliary impedance parameters adopt a unified unit identifier, and are entered through the configuration interface of the on-site control unit or imported during the design stage.

[0023] In the state where the circuit board is wired, powered on, and no test stimuli are superimposed, the test stimulus refers to a controlled excitation waveform applied to the bus or node during the subsequent online test stage to elicit the response of the surge protector. At this time, the on-site control unit drives the measurement module to synchronously collect the bus voltage, currents in each branch, node voltages at both ends of each surge protector, and the current in the branch where the surge protector is located under the constraint of a unified time base. The unified time base refers to the time reference provided by the aforementioned timing source to ensure the consistency of the sampling time marks of each measurement channel. The observation window refers to a period of continuous acquisition under the unified time base. The length of the observation window preferably covers several power frequency cycles and can be set as a time length determined according to the system power frequency and the desired sampling accuracy.

[0024] The acquired measurement sequences are aligned in the field control unit according to the node naming of the node topology model. Preferably, the noise level and measurement error are controlled within a predetermined amplitude range by removing isolated samples that deviate significantly from the overall trend, suppressing high-frequency interference components, and interpolating adjacent legal samples at short-term sampling loss locations. The predetermined amplitude range can be set as a certain percentage of the rated voltage or rated current of the bus, for example, it can be set to no more than five percent of the rated value, thereby ensuring the stability and repeatability of the subsequent solution results during repeated measurements.

[0025] After completing the above processing, the field control unit combines the processed measurement sequence with the connection relationships and auxiliary impedance ranges recorded in the node topology model. Based on a pre-defined equivalent circuit model scope, it fits the behavior of each surge protector under healthy conditions. Preferably, the equivalent circuit model scope abstracts the surge protector as an equivalent branch composed of a nonlinear impedance element combined with parasitic capacitance and inductance. This equivalent branch structure is determined during the design phase and managed using a model version number. Through the above fitting, the equivalent impedance characteristics of each surge protector near the power frequency and under slight overcurrent conditions are obtained. The equivalent residual voltage characteristics under overvoltage conditions and the leakage characteristics under long-term steady state are described. The slight overvoltage condition preferably refers to the voltage range where the bus voltage is higher than the bus rated voltage and lower than the nominal operating voltage of the surge protector. It can be set to within a few times the bus rated voltage. The above equivalent impedance characteristics, residual voltage characteristics and leakage characteristics are collectively referred to as baseline equivalent parameters in this embodiment. The baseline equivalent parameters are preferably associated with the corresponding surge protector number in the form of a vector or field group. The surge protector number can be set as an identifier that uniquely identifies each surge protector within the circuit board.

[0026] After obtaining the baseline equivalent parameters of all surge protectors, the field control unit encapsulates the node topology model version identifier, circuit board identifier, time anchor identifier used to mark the baseline measurement time, and the baseline equivalent parameter set of each surge protector into a baseline record. The time anchor identifier can be set as a timestamp or sequence number that can uniquely locate a certain reference time point, which is used to establish time association with other online test tasks in the future. The baseline record is preferably stored in the append-only area reserved in the internal storage space of the field control unit in the form of a structured record. The append-only area means that only adding records is allowed and modifying or deleting existing records is not allowed, in order to meet the traceability requirements of baseline information, and the summary information of the baseline record is sent to the upper operation and maintenance system through the onboard bus.

[0027] The onboard bus can be a serial bus or a parallel bus adapted to field applications. The upper-level operation and maintenance system can be a monitoring platform for centralized management of multiple circuit boards, so as to establish a correlation between the operation and maintenance level and the subsequent online test results. To ensure that the baseline record can be uniquely identified and verified throughout the entire equipment life cycle, the field control unit preferably generates an evidence chain identifier when generating the baseline record. The evidence chain identifier can be set as a unique identifier calculated based on the circuit board identifier, node topology model version identifier, time anchor identifier, and the storage location of the baseline record in the append-only area. It is used to quickly locate the baseline record and verify its integrity and version status during subsequent online testing, health assessment, and fault tracing, so as to realize version locking and full traceability of baseline information.

[0028] S2. During operation, monitor the bus voltage and branch current, and select the time period when the fluctuation is below the limit based on the rate of change and ripple amplitude as the online test window. The specific implementation is as follows: When the equipment is in online operation, the field control unit continuously monitors the bus voltage and branch current of the circuit board under a unified time base. The unified time base is the timing reference maintained by the field control unit, used to align the sampling times of each measurement channel, so that the correspondence between different measurements on the time axis is clear. During the monitoring process, the field control unit performs segmented analysis of the measurement sequence of bus voltage and branch current according to a sliding observation window. The sliding observation window is a time segment with a fixed length on the time axis that moves forward at a fixed step size. The length of the observation window is preferably set to cover a time range of several power frequency cycles, and the step size is preferably set to a part of this time range, so as to achieve a balance between time resolution and statistical stability.

[0029] For each sliding observation window, the field control unit calculates at least the rate of change and ripple amplitude of the bus voltage and the current of each branch within that window to characterize the degree of change of the measured quantity over time and the intensity of periodic fluctuations near the power frequency. Preferably, it can further calculate the spectral energy distribution, high-frequency energy, and DC offset. The spectral energy distribution is used to characterize the energy proportion in different frequency bands. The high-frequency energy can be obtained by summing the energy of the spectral components above the predetermined lower limit of the frequency band. The predetermined lower limit of the frequency band can be set as a frequency threshold determined by combining the circuit board's operating frequency band and interference sensitivity. The DC offset is used to characterize the average offset of the measured quantity relative to the rated value.

[0030] The field control unit judges each sliding observation window according to the pre-established window selection rules locked by version number. The window selection rules include that the bus voltage change rate is not higher than the first limit, the branch current change rate is not higher than the second limit, and the bus voltage ripple amplitude is not higher than the third limit. Preferably, it also includes that the high-frequency energy is not higher than the fourth limit. The first to fourth limits can be set as a certain percentage relative to the rated voltage or rated current or the amplitude range of the corresponding physical quantity. They are determined in combination with the voltage level, load type, power quality requirements of the monitored equipment, and the statistical results of offline tests and initial online observations, and are stored in the form of a parameter table. The parameter table is a structured record set used by the field control unit to store thresholds and rule configurations, and is uniformly managed by the window selection rule version number.

[0031] Under the above rules, a sliding observation window that meets all the corresponding limit requirements is marked as an online test candidate window. The start and end times of the observation window, the time anchor identifier under the unified time base, the window selection rule version number, and the window number corresponding to the circuit board identifier are recorded. The time anchor identifier is used to uniquely mark a certain time position so that subsequent test records can be associated with the evidence chain.

[0032] During operation, the field control unit maintains a candidate window count counter and the completion time of the previous online test, and pre-sets a maximum observation period. The maximum observation period is the maximum time range for continuous monitoring without triggering online tests. When the number of candidate windows reaches a predetermined number and the time interval between the current time and the completion time of the previous online test is not less than the minimum interval, a segment is selected from the candidate windows as the current online test window according to a pre-set priority strategy. The priority strategy can be set to prioritize candidate windows that are far from the previous test in time and have a load level close to normal operating conditions, or to select according to the order in which the candidate windows were formed. The predetermined number of times and the minimum interval can be set to limit the test frequency while ensuring online test coverage, taking into account the allowable intervention frequency of the equipment, the impact of micro-surge excitation on the equipment lifespan, and the time range given by the operation and maintenance strategy.

[0033] When the number of candidate windows remains below a predetermined number of times within the preset maximum observation period, the field control unit can select a candidate window with relatively small change rate, ripple amplitude, and high-frequency energy from the existing candidate windows as the online test window. This online test window is then marked in the task record as a test window formed under relaxed conditions for reference during subsequent evaluation. After selecting the online test window, the field control unit registers the window number, start and end times, time anchor identifier, and window selection rule version number of this online test window. This information is associated with the corresponding online test task and written to an append-only storage area as the foundation of the task record.

[0034] To ensure that the online testing process remains within a controllable range in terms of time and resources, the field control unit preferably sets an upper limit for the duration and an upper limit for the computational delay for each online test task. The upper limit for the duration can be set as the maximum time allowed from the start of the online test window to the end of this round of micro-surge excitation and related measurements. The upper limit for the computational delay can be set as the maximum time allowed from the end of the online test window to the completion of this round of parameter solving. Both are determined based on the computing power of the control unit and the tolerance of the protected services to disturbances. When the same control unit manages multiple circuit boards, an upper limit for the number of concurrent test tasks can also be set, which is the maximum number of online test tasks allowed to be in the execution state within the same time period. When the number of online test tasks to be executed exceeds this upper limit,

[0035] The field control unit can queue and schedule tasks according to first-in-first-out or circuit board priority, and record the queue start time and actual start time in the task record for subsequent analysis. For online test tasks that have been scheduled and executed, if the actual duration exceeds the duration limit or the parameter solving time exceeds the computation delay limit, the task is marked as not completed on time, and the task status flag is written in the task record.

[0036] Task status markers, window numbers, and time anchor identifiers are stored together in the audit area. The audit area is an append-only storage area set up in the field control unit, used to register online test task records and judgment records in chronological order. This allows subsequent health assessment stages to identify the validity and completeness of the results corresponding to the test window, and, if necessary, trigger the rescheduling of online tests or manual review, thereby forming a complete technical chain for online test window selection while ensuring business continuity.

[0037] S3. Within the test window, apply a micro-surge excitation with an amplitude lower than the surge protector's operating voltage to the target node through the onboard test injection network, and control the main power supply output offset to not exceed a predetermined offset amount. Specifically, this is implemented as follows: Within the selected online test window, the field control unit determines the target node associated with the surge protector under test based on the node identifiers and connection relationships registered in the aforementioned node topology model. The target node is at least one of the following types: bus node, branch node, or nodes at both ends of the surge protector, which can reflect the conduction behavior of the surge protector through short-time voltage changes, and is marked with a node identifier in the node topology model.

[0038] The field control unit configures the controllable switches and energy storage elements of the onboard test injection network according to the distribution of target nodes and the transient disturbance levels that the circuit board can withstand. The onboard test injection network includes energy storage elements connected to target nodes via wires, resistors, inductors, or electromagnetic coupling elements, as well as controllable switches for connecting or disconnecting the energy storage elements from the target nodes. The controllable switches can be semiconductor switching devices or small electromagnetic switches, and the energy storage elements can be capacitors or a combination of elements with equivalent capacitance characteristics. The onboard test injection network has the ability to switch coupling positions between different target nodes and adjust the energy release within the energy range specified in the parameter table to adapt to the testing requirements of different circuit board topologies and surge protectors of different levels. At a specified moment within the online test window, the field control unit triggers the controllable switch according to a unified time base, causing the pre-charged energy storage element to release energy to the target node through the onboard test injection network, forming a short-term transient voltage change based on the bus voltage. This short-term transient voltage change is defined as a micro-surge excitation in this specification. The micro-surge excitation is a transient voltage waveform superimposed on the bus voltage, which has a limited rise and decay phase in time and an amplitude lower than the nominal operating voltage of the corresponding surge protector. It is used to bring out the nonlinear characteristics of the surge protector without entering the rated current condition.

[0039] The micro-surge excitation capability should be able to cover the amplitude range from near the rated operating voltage of the circuit board to below the nominal operating voltage of the surge protector. Preferably, the peak value of the micro-surge can be set to about half of the nominal operating voltage of the surge protector. Specifically, it can be determined according to the insulation level of the circuit board, the characteristics of the surge protector, and the results of type test or field test. The duration of the micro-surge is preferably limited to the surge front time range specified in national or industry standards or a time interval slightly larger than that range. When configuring the energy storage element capacity and pre-charge voltage, the field control unit combines the wiring impedance, power supply capacity, and load sensitivity recorded in the node topology model to ensure that the projection of the micro-surge excitation on the bus is within an acceptable disturbance range.

[0040] During the application of micro-surge excitation, the field control unit continuously monitors the bus voltage deviation through the measurement channel connected to the bus node. In this specification, the bus voltage deviation is defined as the deviation of the transient bus voltage from the rated operating voltage of the circuit board. This deviation can be expressed as a voltage difference or a voltage percentage. The bus voltage deviation can be regarded as the main power supply output deviation, which is used to constrain the voltage disturbance level on the main power supply side during online testing. The field control unit configures a predetermined deviation and alarm threshold for different circuit boards in the parameter table. The predetermined deviation is preferably no higher than the proportion of the rated operating voltage of the circuit board, for example, it can be set to within five percent of the rated operating voltage of the circuit board. When the real-time monitored bus voltage deviation approaches or reaches the predetermined deviation, the field control unit immediately shuts off the controllable switch of the onboard test injection network to terminate the current round of micro-surge excitation and marks this round of test as a restricted test round for differentiation in subsequent evaluation.

[0041] The peak value, leading edge time, number of repetitions, and time interval between two adjacent surge excitations are verified based on electromagnetic compatibility requirements, insulation coordination requirements, and the cumulative energy allowed by the surge protector. Preferably, recommended parameter combinations for different equipment models and application scenarios are obtained through type testing or field trial operation, in accordance with the limits of conducted and radiated interference in relevant electromagnetic compatibility standards and the provisions of relevant insulation coordination standards. These parameters are then registered in the field control unit in the form of a parameter table. The parameter table records items such as the upper limit of the micro-surge peak value, the allowable frequency band range, the spectral energy distribution constraints, the maximum number of consecutive triggers, and the minimum interval time. Version locking is achieved through parameter version numbers. Different parameter versions correspond one-to-one with the circuit board identifier and hardware version. The relevant version numbers are written into the test record along with this online test task for evidence chain management and consistency traceability.

[0042] In a preferred embodiment, in addition to being generated by directly releasing energy to the target node through energy storage elements, micro-surge excitation can also be generated by superimposing narrowband transient disturbance waveforms or voltage sequences composed of multiple stepped voltage segments on the bus side or branch side. As long as the generated transient waveform is lower than the nominal operating voltage limit of the aforementioned surge protector in amplitude, does not exceed the allowable transient energy of the surge protector and related conductors in energy, meets the limit requirements of relevant electromagnetic compatibility standards in spectral distribution, and can generate incremental waveforms at the measurement node that are sufficient to distinguish the differences in the states of different surge protectors under the constraints of the node topology model, it can be regarded as a micro-surge excitation implementation method that is functionally equivalent to the direct injection method using energy storage elements. Different implementation methods are constrained and managed by the same set of parameter tables, version management strategies, and bus voltage deviation monitoring logic in the field to ensure that the repeatability and comparability of excitation conditions are maintained during the process of applying micro-surge excitation to the target node within the online test window, while also meeting the boundary requirements of safe operation of the circuit board and compliance with relevant standards.

[0043] S4. During the micro-surge, synchronously collect the voltage and current of the bus and the nodes at both ends of each surge protector according to a unified time base. Subtract the reference waveform from the excitation waveform to obtain the incremental waveform, and substitute it into the node topology model to solve for the instantaneous equivalent parameters of each surge protector. The specific implementation is as follows: During the period when micro-surge excitation is applied within the online test window, the field control unit synchronously samples each measurement node on the circuit board based on the aforementioned unified time base. The unified time base refers to the time reference calibrated by an internal clock or an external time source, which is used to ensure that the bus nodes, the nodes at both ends of the surge protector, and the nodes related to the bypass switch complete voltage and current sampling at the same time scale, thereby facilitating point-by-point comparison of the waveforms of each node based on the time position in the subsequent test.

[0044] The operating baseline here refers to the average level or slow change trajectory of the voltage and current of each measurement node within an observation window when no test excitation is superimposed and the window selection rule conditions are met. It is used to characterize the steady-state behavior of the device under normal operating conditions. The observation window can be set to the time length of several power frequency cycles. The operating window refers to the time period during which only daily monitoring is performed and no test excitation is applied. The online test window refers to the operating window that meets the window selection rules and is selected for applying micro-surge excitation.

[0045] The sampling rhythm can be set to a higher sampling frequency than that used in daily monitoring. Preferably, it can be set to a frequency range sufficient to analyze the leading edge and main attenuation process of the micro-surge waveform. For example, it can be set to a number of sampling points that include several feature points in both the rising and attenuation phases of the micro-surge. The feature points can include the peak point, zero crossing point, or pre-selected inflection point of the voltage or current waveform. The sampling duration covers the entire process from the preparation period before the micro-surge excitation begins, the peak excitation interval, until the voltage and current of each measurement node recover to near the operating baseline, so as to ensure a complete characterization of the response trajectory of each surge protector under the current micro-surge conditions.

[0046] During this time period, each measurement node generates a series of voltage and current measurements ordered according to a unified time base. These measurements, arranged in chronological order, are collectively referred to as measurement sequences in this embodiment. To mitigate the impact of slow load fluctuations and slow power supply drift on this round of online testing, before initiating micro-surge excitation within the current online testing window, a measurement sequence is selected as a reference measurement sequence from the operating window adjacent to the target online testing window and without any superimposed test excitations. Preferably, the selection of the reference measurement sequence satisfies that the load level is close to the target online testing window and the bus fluctuation meets the aforementioned limit conditions. After unified time base alignment and amplitude calibration, the reference measurement sequence forms a reference waveform that corresponds one-to-one with the current online testing window on the time axis and measurement channel. The reference waveform is used to characterize the expected voltage and current changes of each measurement node at the same time position under conditions without micro-surge excitation.

[0047] After completing the sampling of this round of online test window, the field control unit performs point-by-point calculations on the measurement sequence and reference waveform according to the node identifier and time position. The measured value containing the influence of micro-surge excitation is subtracted from the corresponding reference measured value to obtain the incremental waveform of each measurement node. The incremental waveform refers to the time sequence composed of voltage increment and current increment, which is used to characterize the additional response caused by micro-surge excitation relative to normal operating conditions.

[0048] The incremental waveform, along with the aforementioned node topology model and the baseline equivalent parameters obtained under healthy conditions, are used in the circuit board electrical response solution process. The node topology model defines the electrical connection relationship between each node through wires, components, and parasitic parameters. The baseline equivalent parameters define the equivalent impedance, residual voltage characteristics, and response characteristic range of each surge protector when there is no significant degradation. The field control unit uses the instantaneous equivalent parameters of each surge protector as the set of parameters to be determined. The instantaneous equivalent parameters preferably include the equivalent residual voltage characteristics, equivalent impedance change, and response time offset of the surge protector under the current micro-surge excitation, which are used to characterize the actual working state of the surge protector under the current test conditions.

[0049] During the solution process, the field control unit calculates the expected incremental response of each measurement node based on the node topology model and compares it with the corresponding measured incremental waveform. The instantaneous equivalent parameters of each surge protector are adjusted iteratively to gradually reduce the difference between the calculated incremental response and the measured incremental waveform. The difference is preferably measured by comprehensively considering the amplitude deviation and time position offset over the entire observation period. For example, the deviation level can be determined by comparing the arrival time of the feature point with the corresponding amplitude difference.

[0050] To prevent the continuous iteration process from affecting the overall timing of the online test, the field control unit can set a convergence threshold and a maximum number of iterations. The convergence threshold is preferably set so that the maximum deviation between the calculated increment and the measured increment during the entire observation period is not higher than a predetermined amplitude limit or the cumulative deviation is not higher than a predetermined error limit. The maximum number of iterations can be set to an order of magnitude that is compatible with the computing power of the control unit and the field time constraints. At the same time, it is stipulated that the calculation time for each round of instantaneous equivalent parameter solution should not exceed the sum of the durations of several micro-surge waveforms, for example, not exceeding several times the average time of the micro-surge decaying to the operating baseline. This ensures that the calculation results of this round can be completed before the next online test window and can be used by the subsequent state determination stage.

[0051] If the convergence threshold is not met when the maximum number of iterations is reached, or if a set of instantaneous equivalent parameters that meet the physical constraints cannot be obtained even after the calculation time reaches the preset upper limit, the field control unit can mark the entire set of instantaneous equivalent parameters corresponding to this round as a calculation failure or insufficient confidence, and write the original measurement sequence, reference waveform, incremental waveform, and model prediction waveform obtained from the latest iteration of each measurement node in this round into the audit area associated with the circuit board. The audit area is preferably set as an append-only storage area inside the field control unit for long-term retention of diagnostic-related records.

[0052] Simultaneously, the time identifier, online test window identifier, node topology model version, and baseline equivalent parameter version are registered, and an evidence chain identifier is generated or updated for this round of online testing. The evidence chain identifier can be set as a unique identifier calculated based on the circuit board identifier, online test window identifier, and iterative process summary. Subsequently, when determining the health status of surge protectors, the field control unit can preferably use the real-time equivalent parameters obtained from other rounds to participate in the determination, or within the scope allowed by the rules, mark the surge protector status corresponding to the round marked as calculation failure as a pending verification status, thereby maintaining the robustness and traceability of the overall method under the premise of meeting time and resource constraints.

[0053] S5. By controlling the bypass switch, change the combination of surge protectors participating in the micro-surge in no less than two rounds of testing, repeatedly apply the micro-surge and solve the parameters, and jointly estimate the parameters of each round according to the surge protector number to form a status index. The specific implementation is as follows: When multiple surge protectors are configured on the circuit board, the field control unit preferably has the ability to adjust the participation mode of the surge protectors in multiple rounds according to a predetermined test plan. The test plan assigns a unique number to each surge protector and specifies the participation combination and the target state of the corresponding bypass switch for each round of micro-surge excitation. The bypass switch is a controllable switching element that is connected in series or parallel with the surge protector and enables the surge protector to be in a main participation state or a support state in a certain round of test. The main participation state means that the surge protector directly receives the micro-surge excitation applied by the onboard test injection network within the online test window, and the support state means that it receives a small-amplitude disturbance through the coupling path determined by the node topology model.

[0054] According to the test plan, the field control unit changes the on / off combination of the bypass switch in no less than two rounds of testing, causing the set of surge protectors in the main participation state to change in different rounds. This forms a distinguishable excitation mode for the contribution of each numbered surge protector in multiple rounds of observation. Each round of testing is performed within the aforementioned online test window. Micro-surge excitation is applied to the onboard test injection network according to a unified time base. The voltage and current sequences of the bus and the measurement nodes at both ends of each surge protector are collected synchronously. The incremental waveform is constructed by combining the reference waveform obtained from adjacent non-overlapping excitation windows and the node topology model and corresponding base. After obtaining the line equivalent parameters, the instantaneous equivalent parameters of each surge protector in this round are obtained through iterative calculation. The instantaneous equivalent parameters are a set of parameters used to characterize the residual voltage characteristics, equivalent impedance changes, and dynamic response time offset under the current micro-surge conditions, and are accompanied by credibility information such as convergence degree and data integrity. For test rounds that have been marked as micro-surge-limited or whose calculations have not converged in the previous stage, the field control unit preferably removes its instantaneous equivalent parameters from the subsequent joint estimation, or significantly reduces its impact according to a predetermined weight. Such weights and processing rules can be set to be pre-configured in the test plan and managed by version number.

[0055] When all planned rounds are completed, or when the change in the instantaneous equivalent parameters in a new round relative to the existing rounds is lower than a preset threshold and the state reliability level is not lower than a preset level, the reliability requirement can be considered met. The reliability requirement can be set to the change in residual voltage offset, equivalent impedance change, and response time offset in the new rounds being lower than the limits determined based on type test and field statistical results. At this time, the field control unit jointly estimates the instantaneous equivalent parameters obtained by each surge protector in different rounds according to the parameter weight, reliability level, and the difference in the corresponding excitation combination to obtain a set of state indicators. The state indicators are a set of characteristic quantities obtained across rounds, used to characterize the residual voltage offset, equivalent impedance change, and response time offset of the surge protector over a longer working period, and to give the overall reliability level. At the same time, the associated test task identifier, test window number, and participating round set are recorded. The test task identifier can be set as a unique identifier composed of circuit board identifier and test start time, and the test window number can be set as an incrementing sequence number.

[0056] To control resource consumption and time delay when multiple circuit boards are simultaneously conducting online testing, the field control unit preferably sets an upper limit on the number of test tasks allowed to run within the same time period. This upper limit is determined based on the control unit's computing power, storage space, and communication bandwidth. When the number of running test tasks reaches the upper limit, subsequent test tasks are queued in the order of arrival, and the corresponding circuit board is kept in normal monitoring mode during the queuing period. At the same time, it is stipulated that the time interval between two adjacent rounds of micro-surge excitation should not be less than a certain multiple of the micro-surge decay time. The specific multiple can be set according to the recovery characteristics of the surge protector and the circuit board's tolerance to transient disturbances. It is also stipulated that the calculation delay of each test task is preferably limited to a certain multiple of the control cycle of the system where the circuit board is located. The specific multiple can be set according to the control unit's computing power and the upper-level system's requirements for the timeliness of the results, so as to ensure that the joint estimation is completed within the time and resource constraints.

[0057] The status indicators of each surge protector and its corresponding baseline equivalent parameters are registered together in the status indicator table. The status indicator table can be set as a structured record set within the field control unit, indexed by circuit board identification, surge protector number, and test task identification, for direct reference in subsequent health level classification and surge protection capability assessment. In a preferred embodiment, the circuit board can be set to contain several surge protectors with nominal operating voltages in the range of several hundred volts. The peak amplitude of the micro-surge can be set to approximately half of the nominal operating voltage, and the online test window length can be set to several power frequency cycles. For example, through three rounds of micro-surge excitation with different combinations, the joint estimation results may show that the residual voltage offset and response time offset of a certain surge protector number significantly exceed the baseline allowable range, while the status indicators of other surge protectors deviate only slightly. This situation will be clearly reflected in the status indicator table, providing a basis for subsequently classifying the surge protector number as severely degraded and providing replacement recommendations.

[0058] As an alternative approach, the number of rounds, combination design methods, and joint estimation methods of state indicators in the test plan can be adjusted according to the application scenario. As long as each circuit board performs at least two rounds of testing, and preferably each surge protector participates in the micro-surge excitation in at least a few rounds as the main participant, and is in a supporting state in some rounds when necessary, so as to form an observation combination that distinguishes the contributions of different surge protectors, and can form a stable set of state indicators under the aforementioned time and resource constraints, it can be regarded as an equivalent implementation within the capabilities and scope specified in this method.

[0059] S6. Compare the status indicators with the baseline equivalent parameters, classify the health level of the surge protector according to the judgment rules, and record the circuit board surge protection capability assessment results and the next online test time. The specific implementation is as follows: After the status indicators are generated, the field control unit compares the status indicators of each surge protector with the corresponding baseline equivalent parameters one by one, and calls the set of judgment rules pre-established and locked by version according to the equipment model and application scenario to obtain the health level of the surge protector. The status indicators preferably consist of residual voltage offset, equivalent impedance change, dynamic response time offset, and the corresponding confidence level. The baseline equivalent parameters are the set of reference parameters obtained by calibrating the circuit board in a healthy state through the node topology model.

[0060] The set of judgment rules is preferably stored in the rule area of ​​the field control unit in the form of a rule table, and managed by associating the rule version number with the node topology model version. Each rule defines the range of residual voltage offset, equivalent impedance change and dynamic response time offset, and maps different ranges to health levels. The health levels preferably include normal, mild degradation, severe degradation and failure. The corresponding thresholds can be set based on the results of accelerated aging test and long-term field statistical results.

[0061] Once the health level of a single surge protector is obtained, the field control unit, in conjunction with the location of the surge protector, its connection relationship with the bus and load, and the configuration of the preceding and following stages recorded in the node topology model, calculates the surge protection capability assessment result of the circuit board. The surge protection capability assessment result preferably includes the estimated range of the surge level that can be withstood, the remaining margin on the critical path, and a summary of maintenance recommendations for operation and maintenance. At the same time, based on the current assessment result, the degree of environmental surge exposure, and the operation and maintenance strategy, the next online test time is generated. The next online test time can be set to a specific time point or time range to arrange the subsequent online test schedule.

[0062] The aforementioned health level, surge protection capability assessment results, and next online test time are written into the audit area of ​​the field control unit in the form of task records. The audit area is preferably set to an append-only area. Each task record includes at least the board identifier, time anchor identifier, test window number, test round summary, node topology model version, judgment rule version, status indicator set, health level, surge protection capability assessment results, next online test time, and evidence chain identifier. The board identifier is used to uniquely identify the circuit board, the time anchor identifier is used to indicate the unified time base reference corresponding to this judgment, the test window number is used to trace back the corresponding online test window, the test round summary is used to summarize the number and combination characteristics of the micro-surge test rounds used in this judgment, the node topology model version and judgment rule version are used to restore the model and threshold caliber on which the current judgment is based, the status indicator set is the set of status indicators of each surge protector, and the evidence chain identifier is preferably generated by deterministic rules based on the board identifier, test window number, test round sequence, node topology model version, and judgment rule version, and is used to uniquely associate a complete test process in different systems and at different time points.

[0063] Before writing the task record, the field control unit checks the evidence chain identifier. If the evidence chain identifier is the same and a complete record already exists, it only updates the time-related fields or external confirmation information without repeating the online test and judgment process to achieve idempotency and deduplication. If the evidence chain identifier is the same but the record is incomplete, it can be set to restore the incomplete link according to the rules or mark the record as terminated, and start a new test process under the new evidence chain identifier.

[0064] After the task record is successfully written, the field control unit sends the summary field of the task record to the operation and maintenance management system and alarm system through the onboard communication bus or fieldbus according to the agreed interface field format. The interface field format preferably includes at least the task identifier field, board identifier field, time anchor field, health level summary field, surge protection capability assessment summary field, next online test time field, task status field, and status code field. The task status field is used to indicate whether the task is completed, awaiting manual review, or has failed. The status code field can be set to mark reasons such as missing health information, limited micro-surge excitation, failure to converge the instantaneous equivalent parameter solution, communication failure, or configuration version mismatch. The communication process preferably adopts a request-response method. If no response is received within the specified time window, the message will be resent a preset number of times. If no response is received after the maximum number of resentments, the current communication is marked as a transmission failure, the corresponding status code is written to the task record, and a trace is left in the audit area.

[0065] To improve the reliability and adaptability of the judgment results in different application scenarios, preferably, a certain number of circuit boards and their corresponding evidence chain identifiers can be manually reviewed periodically. Within a set statistical period, the misjudgment and omission rates of health levels, the maximum deviation amplitude and duration of micro-surge excitation on bus voltage, and the impact of online testing on business operations can be summarized. The sample size preferably covers major equipment types and application scenarios. Based on the statistical results, the threshold settings, amplitude and frequency of micro-surge excitation, and calculation strategies for the next online test time in the judgment rule set can be adjusted. The adjusted parameters and rules are registered with the new version number and retained at the same time as the old version so that the historical records can be interpreted by version in subsequent analysis.

[0066] The field control unit can be implemented using a microcontroller, programmable logic device, or industrial control equipment. As long as it has the ability to manage a unified time base, schedule synchronous acquisition of measurement signals, control micro-surge excitation, calculate status indicators, determine health levels, assess surge protection capabilities, and manage task records and evidence chains, and executes each step in the aforementioned order and constraints, it can be considered an equivalent implementation of this method. Preferably, the field control unit can independently complete the above functions on the same circuit board, or it can work in conjunction with an external data processing unit. As long as the consistency of the node topology model version, the judgment rule version, and the evidence chain identifier is maintained during the collaboration process, and the electrical boundaries of the online test meet the relevant electromagnetic compatibility and insulation coordination requirements, it is considered to be within the scope of application of this method.

[0067] All calculations involved in the embodiments are dimensionless numerical calculations, and the preset parameters and thresholds in the calculations are set by those skilled in the art according to the actual situation.

[0068] It should be noted that this invention can be deployed on the device itself to realize embedded applications, or it can run on a PC or other terminal with a user interface, thereby meeting various hardware environments and usage requirements.

[0069] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wireless or wired transmission; wired transmission methods include optical fiber, twisted pair, coaxial cable, etc.; wireless transmission includes infrared, microwave, etc. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center containing one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.

[0070] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and modules described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0071] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0072] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0073] In addition, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0074] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0075] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0076] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An online testing method for the board-level function of surge protectors, characterized in that, include: S1. Establish a node topology model of the circuit board bus, load and each surge protector, collect the power-on voltage and current and obtain the baseline equivalent parameters of each surge protector according to the equivalent circuit model; S2. Monitor the bus voltage and branch current during operation, and select the time period when the fluctuation is below the limit value based on the rate of change and ripple amplitude as the online test window; S3. Apply a micro-surge excitation with an amplitude lower than the surge protector's operating voltage to the target node through the onboard test injection network within the test window, and control the main power supply output offset to not exceed a predetermined offset amount. S4. During the micro-surge, synchronously collect the voltage and current of the bus and the nodes at both ends of each surge protector according to a unified time base. Subtract the reference waveform from the excitation waveform to obtain the incremental waveform and substitute it into the node topology model to solve the instantaneous equivalent parameters of each surge protector. S5. By controlling the bypass switch, change the combination of surge protectors participating in the micro-surge in no less than two rounds of testing, repeatedly apply the micro-surge and solve the parameters, and jointly estimate the parameters of each round according to the surge protector number to form a status index. S6. Compare the status indicators with the baseline equivalent parameters, classify the health level of the surge protector according to the judgment rules, and record the circuit board surge protection capability assessment results and the next online test time.

2. The online testing method for the board-level function of surge protector according to claim 1, characterized in that, S1 includes: The field control unit constructs a node topology model based on the target circuit board. The node topology model records the electrical connection relationships between bus nodes, load nodes, surge protector end nodes, test injection nodes, and measurement nodes, as well as the range of auxiliary impedance values ​​for each connection branch. With the circuit board powered on and no test excitation applied, the bus voltage, branch current and the node voltage and current at both ends of each surge protector are synchronously collected within the observation window under a unified time base constraint. The collected sequence is then aligned and noise suppressed according to the node topology model. Based on the preset equivalent circuit model, each surge protector is represented as an equivalent branch composed of nonlinear impedance elements, parasitic capacitance, and parasitic inductance. The baseline equivalent parameters of the equivalent branch are obtained and a corresponding relationship is established with the corresponding surge protector number.

3. The online testing method for surge protector board-level function according to claim 1, characterized in that, S2 include: When the equipment is running online, the field control unit monitors the bus voltage and branch current using a sliding observation window under a unified time base, and calculates the rate of change and ripple amplitude for each sliding observation window. Based on the window selection rules, determine whether the limit conditions are met, and register the sliding observation window that meets the limit conditions as an online test candidate window; When the number of online test candidate windows reaches a predetermined number and the time interval between the current time and the completion time of the previous round of online tests is not less than the preset minimum interval, an online test window is selected from the online test candidate windows according to a predetermined priority strategy, and the window number, start and end time, time anchor identifier, and window selection rule version number of the online test window are written into the task record of the audit area.

4. The online testing method for the board-level function of surge protector according to claim 1, characterized in that, S3 includes: Within the online testing window, the field control unit determines the target node associated with the surge protector under test based on the node identifiers and connection relationships registered in the node topology model. The target node is one of the bus node, branch node, or two-terminal nodes of the surge protector that can reflect the conduction behavior of the surge protector through short-time voltage changes; The field control unit controls the energy storage components and controllable switches that are electrically connected to the target node in the onboard test injection network; Under a unified time base, a controllable switch is triggered to release energy from the pre-charged energy storage element to the target node, forming a transient voltage waveform with an amplitude smaller than the nominal operating voltage of the surge protector as a micro-surge excitation based on the bus voltage. The onboard test injection network is configured to switch coupling positions between different target nodes and adjust the energy release of the energy storage element according to the preset energy range in the parameter table.

5. The online testing method for the board-level function of surge protector according to claim 4, characterized in that: During the application of micro-surge excitation, the field control unit obtains the bus voltage through the measurement channel connected to the bus node; Calculate the deviation of the bus voltage relative to the rated operating voltage of the circuit board, and compare the deviation as the main power output deviation with the predetermined deviation and alarm threshold configured for the circuit board in the parameter table. When the bus voltage deviation reaches the predetermined deviation amount, the controllable switch of the onboard test injection network is turned off to terminate the current micro-surge excitation, and the corresponding online test cycle is marked as a restricted test cycle.

6. The online testing method for the board-level function of surge protector according to claim 1, characterized in that, S4 includes: When a micro-surge excitation is applied within the online test window, the field control unit synchronously collects the voltage and current of the bus node and the nodes at both ends of each surge protector based on a unified time base. A measurement sequence is selected from the running window adjacent to the online test window and without applied test stimulus, and then aligned and amplitude-calibrated to form a reference waveform; The incremental waveform of each measurement node is obtained by subtracting the measurement sequence containing micro-surge excitation from the reference waveform point by point. The incremental waveform is then substituted into the node topology model and the instantaneous equivalent parameters of each surge protector are adjusted iteratively. The instantaneous equivalent parameters are determined when the difference between the model-predicted waveform and the incremental waveform is less than the convergence threshold, the number of iterations does not exceed the upper limit of the number of iterations, and the computation time does not exceed the upper limit of the computation time. If the convergence threshold is not met by the end of the iteration and the computation time reaches the upper limit of the computation time, the immediate equivalent parameter set of this round will be marked as a computation failure and written to the audit area along with the online test window identifier.

7. The online testing method for surge protector board-level function according to claim 1, characterized in that, S5 include: When multiple surge protectors are installed on the circuit board, the field control unit assigns a unique number to each surge protector according to the predetermined test plan, and controls the bypass switch electrically connected to each surge protector to adopt different on and off combinations in the first and second test rounds, so that the set of surge protectors in the main participation state in the first test round is different from the set of surge protectors in the main participation state in the second test round.

8. The online testing method for the board-level function of surge protector according to claim 7, characterized in that: For each surge protector, the field control unit jointly estimates the instantaneous equivalent parameters obtained from the first and second test rounds according to predetermined parameter weights and reliability, resulting in a status index that includes residual voltage offset, equivalent impedance change, and response time offset. The status index is then registered in a status index table, corresponding to the circuit board identifier, surge protector number, and test task identifier. The status index table is stored by the field control unit and used for subsequent health level classification and surge protection capability assessment.

9. The online testing method for the board-level function of a surge protector according to claim 1, characterized in that, S6 include: After obtaining the status indicators of each surge protector, the field control unit compares the status indicators with the corresponding baseline equivalent parameters according to the set of judgment rules to obtain the health level of the surge protector. Based on the positional relationship of the surge protector in the node topology model, calculate the surge protection capability assessment results of the circuit board and the next online test time; Write the health level, surge protection capability assessment results, next online test time, board identifier, time anchor identifier, test window number, test round summary, node topology model version, judgment rule version, status indicator set and evidence chain identifier as task records into the audit area; Write is performed only after confirming, based on the evidence chain identifier, that there are no task records with the same evidence chain identifier in the audit area.

Images