Display system capable of automatically brushing pictures

Abstract

The invention relates to the technical field of display, in particular to a display system capable of automatically brushing pictures, which comprises a TDDI chip integrating a main control function and a display driving function, and a storage module which is in communication connection with the TDDI chip and is used for storing background picture data and windowing picture data, a software application layer, a register block, a storage controller and an RGB time sequence generator are arranged in the TDDI chip, the software application layer configures automatic picture brushing enabling and related parameters to the register block, and the storage controller automatically reads picture data in a storage module according to configuration and achieves automatic switching between a background picture and a windowing picture. The RGB timing generator generates a display timing and drives the display panel. The system can also be selectively provided with an external MCU which is only used for image switching. Through the TDDI chip master control and display integrated design, an external master control does not need to participate in storage, reading and continuous transmission of image data, and the problems that a traditional display system is high in complexity, large in power consumption, high in master control requirement and large in resource occupation are solved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display system for autonomous image brushing. Background Technology

[0002] In recent years, TDDI chips have effectively simplified the hardware architecture design of electronic devices by integrating touch and display driving functions. However, in existing technologies, TDDI chips still operate passively in the image display stage, relying entirely on external main control MCUs for display data. Figure 1 As shown, the main control MCU needs to read the raw image data from external memory, perform complex image processing operations such as stitching the background image and the windowed image into a complete frame, and then transmit the processed complete frame data to the TDDI chip through a high-speed interface. This process places stringent requirements on the main control MCU: it must be equipped with sufficient RAM to store single-frame image data and possess powerful real-time image processing capabilities. Especially in smart wearable devices such as smartwatches, wristbands, and IoT terminals, the requirements for display power consumption, integration, and response speed are increasing, making the inherent defects of traditional architectures increasingly prominent.

[0003] Traditional display systems typically employ a discrete design, comprising a separate main control MCU, display driver chip, and touch chip. This structure significantly increases system complexity: multi-chip solutions require complex PCB routing, increasing not only device size but also design difficulty and material costs. Simultaneously, the main control MCU must continuously transmit image data to the display driver chip via high-speed interfaces such as SPI or MIPI. In high refresh rate or dynamic content switching scenarios, data transmission consumes a large amount of power, placing a severe burden on portable devices with limited battery capacity.

[0004] Furthermore, all image content updates require the main control MCU to participate in processing and transmission throughout the process. When the main control MCU is under high load, it is prone to display delays and screen stuttering, directly affecting the user's interactive experience. More importantly, the continuous screen refresh tasks occupy the core computing resources and interface bandwidth of the main control MCU for a long time, severely restricting its ability to process sensor data, wireless communication and other critical tasks, thus limiting the overall performance of the device.

[0005] The aforementioned problems are particularly prominent in resource-constrained low-power devices, and there is an urgent need to break through existing technological bottlenecks through architectural innovation. Summary of the Invention

[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution.

[0007] Design an autonomous image-scrolling display system, including... TDDI chip integrates main control function and display driver function; The storage module, which is communicatively connected to the TDDI chip, is used to store image data, including background image data and at least one set of windowed image data. The TDDI chip internally includes a software application layer, register set, memory controller, and RGB timing generator; The software application layer is used to configure the startup of autonomous image brushing and to configure the address information of the image data in the storage module and the display row and column information of the display panel to the register group; The storage controller is used to read the corresponding image data from the storage module according to the configuration information in the register group; The RGB timing generator is used to generate RGB display timing from the read image data and output it to the display panel for image display; The TDDI chip automatically switches between background image data and windowed image data through a storage controller.

[0008] Furthermore, the register group includes a background image start address register and at least one windowed image start address register. The address information includes the start address of the background image in the storage module and the start address of each windowed image in the storage module.

[0009] Furthermore, the displayed row and column information includes the starting row and starting column information of each windowed image in the display panel.

[0010] Furthermore, when the storage controller reads image data, when it displays the starting row and column position corresponding to the windowed image, it automatically jumps to the starting address of the windowed image in the storage module to read the windowed image data; when the windowed image data is read, it automatically jumps to the continuation address of the background image data to continue reading the remaining background image data.

[0011] Furthermore, the storage module is either a FLASH memory or a RAM memory, and the storage module can be external or internal.

[0012] Furthermore, it also includes an external master control MCU, which is communicatively connected to the TDDI chip. The external master control MCU is only used to control image switching and does not participate in the storage, reading and continuous transmission of image data.

[0013] Furthermore, the TDDI chip communicates with the storage module via a QSPI interface.

[0014] Furthermore, the storage controller reads the corresponding image data by sending instructions and address information to the storage module. The instructions are the 0xeb four-line load data instruction.

[0015] The beneficial effects of this invention are as follows: This invention integrates main control functions through a TDDI chip and autonomously completes the configuration, reading, and switching operations of image data. It eliminates the need for an external main control MCU to participate in data transmission and processing, and has advantages such as reducing system complexity, reducing power consumption, improving display response speed, and freeing up external main control MCU resources. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a traditional TDDI display system architecture; Figure 2 This is a block diagram of the internal structure of the TDDI chip; Figure 3 This is a schematic diagram of register configuration and display panel row and column information; Figure 4 This is a timing diagram for data reading from the FLASH storage module; Figure 5 This is a diagram illustrating the switching between the background image and the windowed image addresses; Figure 6 This is a schematic diagram of a system architecture with an external master controller, representing another embodiment. Detailed Implementation

[0017] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention. Example

[0018] A display system for autonomous image refresh, such as Figures 2 to 5 As shown, including The TDDI chip integrates main control and display driver functions. In practical applications, a TDDI chip can be understood as a single chip integrating touch and display driver functions. The combination of its main control and display driver functions enables the chip to independently complete image data processing and transmission tasks. For example, the TDDI chip can perform data parsing and logic control operations through its built-in processor unit, thereby replacing the combination of an external main control MCU and display driver chip in the traditional architecture. It serves as the core processing unit of the system, undertaking the autonomous reading, switching, and display driving tasks of image data.

[0019] The storage module, which communicates with the TDDI chip, is used to store image data, including background image data and at least one set of windowed image data. This data is stored in blocks in different storage areas, supporting windowed display functionality to save image data storage space. The storage module can be either FLASH memory or RAM memory, and can be installed externally or internally; if internal FLASH is used, external pins can be saved.

[0020] Specifically, a storage module refers to a hardware unit used to store image data. It can be implemented using non-volatile storage media such as FLASH memory, or high-speed random access storage media such as RAM memory. An external design refers to connecting the storage module as an independent device to the main chip via an interface. Figure 2 As shown, the built-in design integrates the storage module inside the main chip. The purpose of introducing this design is to flexibly configure the storage solution according to different application scenarios, thereby optimizing system performance, power consumption, and cost.

[0021] In detail, the above technical solution allows the display system to dynamically adjust according to actual needs by providing options for storage module types and installation methods. For example, in smart wearable devices, choosing an external FLASH memory can leverage its non-volatility and cost-effectiveness to reduce the additional energy consumption caused by frequent refreshes, while facilitating the updating and maintenance of stored content. In IoT terminals, choosing an internal RAM memory can utilize its high-speed read characteristics to ensure reduced latency when the TDDI chip directly reads image data, while simplifying PCB layout and reducing power consumption and interference risks in signal transmission. Furthermore, this flexibility allows system designers to balance power consumption, cost, and performance requirements in different application scenarios, effectively solving the high complexity and high power consumption problems caused by rigid storage solutions. By combining the TDDI chip's autonomous image refresh function, the above storage module design further improves the system's integration and response speed, meeting the low power consumption and fast response requirements of smart wearable devices and IoT terminals.

[0022] The TDDI chip communicates with the storage module via the QSPI interface. Of course, in some embodiments, other adapted communication interfaces can be used, not limited to QSPI. The TDDI chip establishes a high-efficiency data channel with the storage module through the QSPI interface, utilizing a four-wire parallel transmission mechanism to quickly read background and windowed image data from the storage module. This design allows the TDDI chip to maintain low latency and low power consumption even in scenarios with high refresh rates or frequent windowed image switching. Furthermore, the application of the QSPI interface not only improves data transmission rates but also reduces hardware resource consumption through a simplified communication protocol, thus providing reliable technical support for applications with stringent requirements for real-time response and energy efficiency, such as smart wearable devices. In addition, combined with the automatic switching function of the storage controller, the QSPI interface further enhances the overall system performance, ensuring the smoothness and stability of the displayed content.

[0023] The TDDI chip includes a software application layer, a register group, a memory controller, and an RGB timing generator. Each unit has a clear division of labor and works together to form a complete autonomous data processing link.

[0024] The software application layer is used to configure the startup of autonomous image brushing and to configure the address information of the image data in the storage module and the display row and column information of the display panel to the register group. This process is completed based on preset parameters and does not require real-time intervention from the external master controller, thereby reducing the occupation of master controller resources during runtime.

[0025] Furthermore, the functions of the software application layer can be implemented through preset initialization scripts, such as loading fixed configuration parameters into the register group when the system starts, thereby reducing dynamic intervention at runtime and ensuring that the system can autonomously execute the image-brushing task after startup.

[0026] A register set can be implemented in the form of multiple register arrays, with each register array storing different types of data, such as address information and display row and column information.

[0027] Furthermore, the register group includes a background image start address register and at least one windowed image start address register, used to store address information and display row and column information. The address information includes the start address of the background image in the storage module and the start address of each windowed image in the storage module.

[0028] Specifically, the background image start address register is a register specifically used to store the starting position of the background image data in the storage module. It can be implemented using a separate hardware register unit to ensure that the reading of the background image data has a clear starting point and avoids confusion with other image data. The windowed image start address register is an independent register allocated to each windowed image to store the starting address of the corresponding windowed image in the storage module. It can be implemented using multiple parallel register units to support independent management of multiple windowed images and reduce latency during address switching. Address information refers to the specific storage location identifier of the background image and each windowed image in the storage module. It can be represented in the form of absolute or relative addresses to provide the storage controller with accurate positioning information.

[0029] In detail, the above solution achieves fine-grained management of image address information through the design of a dedicated register structure. The background image start address register allows the system to independently store the starting position of the background image. When the storage controller reads background image data, it directly obtains the address information from this register, avoiding potential confusion caused by general-purpose address registers during the background display stage, thus ensuring the continuity and stability of background image data reading. The introduction of at least one windowed image start address register provides a dedicated address storage space for each windowed image. When the display position reaches the windowed area, the storage controller automatically jumps according to the pre-stored start address in this register, locating the windowed image data without external intervention. This supports parallel management of multiple windowed images and eliminates the risk of address jump delays. Furthermore, the clear division and mapping of address information enables the storage controller to accurately identify the storage location of different image data, achieving seamless transitions during the switching between background and windowed images. This reduces dependence on external controllers, improves the response speed of autonomous image loading, and enhances the overall system efficiency. The above solution, together with the software application layer, memory controller and RGB timing generator inside the TDDI chip, solves the problem of non-automatic address switching and significantly improves the system's integration and operating efficiency.

[0030] The storage controller is implemented based on a state machine model. As the core logic unit for the TDDI chip to perform read and write operations on the storage module, it is used to read the corresponding image data from the storage module according to the configuration information in the register group.

[0031] The storage controller is a logical unit capable of dynamically adjusting the access address based on real-time display status and data stream information. It can be implemented using hardware circuitry, such as a state machine-based address management circuit, or a programmable logic device. Its purpose is to ensure seamless switching of image data during display, avoiding display delays or image interruptions caused by untimely address switching. A windowed image refers to a small image embedded within a specific area of ​​the background image, which can be positioned and displayed using preset row and column coordinates. Automatic jump refers to the storage controller's ability to switch addresses automatically based on the current display position and data reading status without external intervention.

[0032] In detail, the storage controller monitors the row and column information of the display panel in real time. When it detects that the display position has reached the starting row and column of the windowed image, it immediately triggers an address jump mechanism to read the corresponding windowed image data from the storage module. This position-triggered mechanism effectively avoids the latency problem of relying on the master controller to send commands in traditional solutions, thereby improving the display response speed. After the windowed image data is read, the storage controller calculates the continuation address of the background image based on the data stream end signal and automatically resumes the reading of the background image data. This process achieves fully autonomous address switching through dual triggering of position and state, significantly reducing dependence on external resources. In addition, the storage controller, together with the register group and RGB timing generator modules inside the TDDI chip, forms an efficient image rendering process, which not only optimizes storage access efficiency but also ensures the smoothness and consistency of the displayed content.

[0033] In one preferred implementation, the RGB timing generator generates RGB display timing from the read image data and outputs it to the display panel for image display. Thus, the system achieves end-to-end autonomous processing from data reading to image presentation, without requiring external main controller involvement in timing generation, further simplifying the overall process.

[0034] The RGB timing generator can be implemented using hardware circuitry, such as by using a counter and clock signal to generate RGB timing signals that meet the requirements of the display panel.

[0035] Furthermore, the TDDI chip automatically switches between background image data and windowed image data through a storage controller, and uses internal logic to complete image synthesis. This avoids the computational overhead of the main controller stitching the entire image in traditional solutions, ensuring real-time display switching and low latency. In summary, this technical solution, by integrating the main control function into the TDDI chip and building a complete autonomous data processing chain, fundamentally eliminates the dependence on an external main controller. This effectively reduces system complexity, power consumption, and improves response speed, solving the problems of high system complexity, high power consumption, and main controller resource occupation caused by relying on an external main controller to process image data in traditional display systems.

[0036] The innovation of this application lies in integrating the main control function and display driver function into the TDDI chip and constructing a complete autonomous data processing link, fundamentally eliminating the dependence on an external main control MCU. Specifically, the software application layer, register group, memory controller, and RGB timing generator inside the TDDI chip form a collaborative working system, enabling the system to complete key settings and achieve autonomous image processing during the initialization phase. This design avoids the need for the main control MCU to participate in the entire image stitching and transmission process in traditional architectures, directly reducing the number of chips and interface complexity required by the system, while significantly reducing data transmission power consumption and main control resource consumption.

[0037] Therefore, the display system proposed in this application completes image synthesis and switching through internal logic, avoiding the computational overhead of the main controller needing to stitch the entire image in traditional solutions, ensuring the real-time performance and low latency of display switching, thereby achieving efficient response in power-sensitive scenarios such as smart wearables.

[0038] The working principle of this application embodiment is as follows: A display system with autonomous image processing achieves autonomous image data processing and switching through the collaborative work of a TDDI chip, a storage module, and internal logic units. The TDDI chip integrates main control and display driver functions, serving as the core processing unit and undertaking some of the responsibilities of the main control MCU in a traditional architecture. The storage module communicates with the TDDI chip and stores background image data and at least one set of windowed image data, providing a localized data source for the system and avoiding the need for frequent access to an external main control unit.

[0039] This application further proposes displaying row and column information, including the starting row and starting column information of each windowed image in the display panel. For example... Figure 3 The first image in the middle panel starts in row 4 and column 2, while the second image starts in row 5 and column 6. Through dedicated register settings, fine-grained management of image address and display position information is achieved, providing the storage controller with precise positioning data.

[0040] Specifically, the display row and column information refers to the coordinate data used to define the exact position of the windowed image on the display panel. This can be implemented using hardware register storage or software variable configuration, with the aim of providing the system with clear switching trigger conditions. The starting row information can be understood as the starting coordinates of the windowed image in the vertical direction of the display panel, while the starting column information is the starting coordinate in the horizontal direction. In practical applications, this information is written to the register set through the software application layer, ensuring that the storage controller can perform data switching operations based on these precise coordinates.

[0041] In detail, this solution refines the display row and column information into specific coordinates of the starting row and column, enabling the system to accurately locate the starting point of the windowed area. During the configuration phase, the software application layer writes these precise coordinates into the register set, providing the storage controller with explicit triggering conditions. When the display scan reaches the corresponding starting row and column position, the storage controller automatically jumps to the starting address of the windowed image data to read the content based on this row and column information, thus ensuring that the windowed image is displayed only in the designated area. This precise control mechanism based on the starting row and column information not only solves the problem of ambiguous position recognition during autonomous image scanning but also reduces the main control resource consumption and enhances the TDDI chip's ability to autonomously handle image switching. Furthermore, since this mechanism can achieve seamless image data connection without external intervention, it effectively eliminates display anomalies caused by incomplete position definitions, laying the foundation for reducing system power consumption and improving response speed.

[0042] This application further proposes that when the storage controller reads image data, it sends instructions and address information to the storage module to read the corresponding image data. The instruction is the 0xeb four-line load data instruction, such as... Figure 4 As shown, the specific process is as follows: The TDDI chip software application layer writes relevant registers to the register group (including start-up image brushing enable and address information) (S501). After receiving the relevant information mapped by the register group (S502), the memory controller sends a 0xeb four-wire read data instruction to the memory module (S503.Instruction), and simultaneously sends address information to the memory module (S503.ADDR). This address is the starting address of the image data stored in the memory. Then, the memory sends the display data to the TDDI chip's internal memory controller in a Burst manner starting from this address (S503.Display Data). The memory controller then receives the image data and passes it to the RGB timing logic to generate the display timing (S504). Burst transmission is a high-speed data transmission method that can transmit large amounts of data in a short time. The principle of Burst transmission is to package multiple data packets into a large data block and then send it out at once. This reduces communication latency and bandwidth usage, improving data transmission efficiency.

[0043] To ensure the integrity of the background image, the hardware automatically skips the address range corresponding to the windowed image when continuating the background image data, for example... Figure 5 In the diagram, A is the background image, and its background image data is divided into two segments, S601 and S602. B is the windowed image, and the address segment corresponding to the windowed image data has a length of 3 columns. Therefore, the address of S602 is S601+1+3, ensuring that the background image data is not interfered with by the windowed image data and achieving seamless connection.

[0044] Specifically, the storage control logic needs to automatically calculate the starting address of the second half of the background image S602: where S601 is the end address of the column before the starting column of the window image in the background image. Then, the window image is read, and the starting address of the window image is S603. The window is configured with three columns and two rows. The background image is sent again, and at this time, the starting address of the background image S602 is 'S601+1+3'. +1 represents the next address, and +3 corresponds to skipping the 3 columns occupied by the window image. Finally, the starting address of the second half of the background image is located through 'S601+1+3', so as to seamlessly connect the loading of the remaining data of the background image after the window image is loaded.

[0045] In summary, when the autonomous image-scrolling display system of this embodiment is working, it first completes the initialization configuration through the software application layer, writing the image data address and display row and column information into the register group; then, according to the configuration of the register group, the storage controller autonomously reads the background image data from the storage module through the QSPI interface, and the RGB timing generator generates the display timing and drives the display panel to display the background image; when the display scans to the starting row and column position corresponding to the windowed image, it automatically jumps to the starting address of the windowed image in the storage module to read the windowed image data; after the windowed image data is read, it jumps to the continuation address of the background image data to continue reading the remaining background image data, and so on to realize autonomous image scrolling. Example

[0046] An autonomous image-scrolling display system, which differs from embodiment 1 in that, as Figure 6 As shown, this includes an external master control MCU, which is a low-performance MCU. The external master control MCU communicates with the TDDI chip and is only used to control image switching; it does not participate in image data storage, retrieval, or continuous transmission. When it is necessary to change the windowed image data, only the external master control MCU needs to burn the new windowed image data to the storage module; the background image data does not need to be modified, saving operating costs and storage space. This configuration can greatly reduce the storage space requirements of the master control chip, lower the performance requirements of the master control MCU, and also reduce the performance requirements of the TDDI's internal software application layer.

[0047] Specifically, the external master MCU refers to a microcontroller unit independent of the TDDI chip, which can be implemented using a general-purpose MCU or a dedicated control chip. In practical applications, the external master MCU communicates with the TDDI chip through lightweight instructions, aiming to avoid the burden of handling complex data transmissions that the master controller must handle in traditional architectures. Furthermore, the functional boundaries of the external master MCU are strictly limited to only handling the transmission of trigger instructions for image switching, thereby effectively freeing up master controller resources and reducing system power consumption.

[0048] In detail, the aforementioned display system implements a lightweight instruction triggering mechanism through a communication connection design between an external main control MCU and the TDDI chip. Based on this, the external main control MCU triggers image switching events with simple control signals without intervening in the image data processing flow. Simultaneously, the system delegates the complete image data processing task to the TDDI chip autonomously, ensuring that the main control MCU does not need to participate in the data generation or configuration process, thus significantly reducing the main control MCU's computational overhead. Furthermore, the external main control MCU's non-involvement in the constraints of image data storage, retrieval, and continuous transmission further ensures that the TDDI chip can independently manage the data flow, avoiding continuous bandwidth occupation by the main control MCU. This design not only reduces power consumption but also improves the real-time performance of the display response, making it particularly suitable for scenarios with stringent requirements for low power consumption and fast response, such as smart wearable devices.

[0049] In the two embodiments above, the TDDI chip can be selected as the AXS15232 chip with a power consumption of 20mw.

[0050] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A display system for autonomous image brushing, characterized in that, include TDDI chip integrates main control function and display driver function; The storage module, which is communicatively connected to the TDDI chip, is used to store image data, including background image data and at least one set of windowed image data. The TDDI chip internally includes a software application layer, register set, memory controller, and RGB timing generator; The software application layer is used to configure the startup of autonomous image brushing and to configure the address information of the image data in the storage module and the display row and column information of the display panel to the register group; The storage controller is used to read the corresponding image data from the storage module according to the configuration information in the register group; The RGB timing generator is used to generate RGB display timing from the read image data and output it to the display panel for image display; The TDDI chip automatically switches between background image data and windowed image data through a storage controller.

2. The autonomous image-scrolling display system as described in claim 1, characterized in that: The register group includes a background image start address register and at least one windowed image start address register. The address information includes the start address of the background image in the storage module and the start address of each windowed image in the storage module.

3. The autonomous image-scrolling display system as described in claim 1, characterized in that: The displayed row and column information includes the starting row and starting column information for each windowed image in the display panel.

4. The autonomous image-scrolling display system as described in claim 1, characterized in that: When reading image data, the storage controller automatically jumps to the starting address of the windowed image in the storage module to read the windowed image data when the display reaches the starting row and column position corresponding to the windowed image; after the windowed image data is read, it automatically jumps to the continuation address of the background image data to continue reading the remaining background image data.

5. The autonomous image-scrolling display system as described in claim 1, characterized in that: The storage module is either a FLASH memory or a RAM memory, and it can be external or internal.

6. The autonomous image-scrolling display system as described in claim 1, characterized in that: It also includes an external master control MCU, which is communicatively connected to the TDDI chip. The external master control MCU is only used to control image switching and does not participate in the storage, reading and continuous transmission of image data.

7. The autonomous image-scrolling display system as described in claim 1, characterized in that: The TDDI chip communicates with the storage module via the QSPI interface.

8. The autonomous image-scrolling display system as described in claim 1, characterized in that: The storage controller reads the corresponding image data by sending instructions and address information to the storage module. The instruction is the 0xeb four-line load data instruction.

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