Memory chip adaptive memory detection method based on artificial intelligence

Abstract

The invention discloses a memory chip adaptive memory detection method based on artificial intelligence, and relates to the technical field of artificial intelligence, and the method comprises the steps: generating a path response integral sorting sequence based on path response integral of a topological node, obtaining priority intervals where the topological node is located through turning point judgment, extracting boundary values from each priority interval, and obtaining a path response integral sorting sequence; obtaining a path response integral boundary value set, and determining a path response integral detection period; performing hierarchical detection on the topological nodes through the path response integral boundary value set, and generating a resolution path response integral sequence according to a path response integral detection period; and constructing a resolution accumulation slope sequence according to the resolution path response integral sequence and the path response integral detection period, and performing state judgment on the topological nodes. According to the method, adaptive division of the priority interval and dynamic setting of the path response integral detection period are realized, and the detection frequency and resolution can be flexibly adjusted under different risk levels.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of artificial intelligence, and in particular to a storage chip adaptive memory detection method based on artificial intelligence. BACKGROUND

[0002] As a core component of high-performance computing and information storage, the reliability of the storage chip directly affects the stability and security of data processing. With the refinement of process technology and the improvement of storage unit density, the detection scene presents the characteristics of complex working conditions and diverse indicators. The conventional detection method usually relies on standardized interfaces and working condition simulation devices, and by changing the power voltage, temperature, frequency and access mode, the running performance indicators including error count, retry count and access latency are collected to complete performance verification and reliability evaluation. The conventional detection method has been widely used in production screening, quality monitoring and process improvement, and has important significance for ensuring the stable operation of the storage chip.

[0003] However, the conventional method still stays in the static comparison of single-point results when dealing with multi-working-condition dynamic evolution and multi-indicator interaction, and lacks analysis of the cumulative effect of indicators during continuous progress of working conditions. At the same time, the detection process mostly adopts fixed sampling method, which cannot flexibly adjust the detection frequency and resolution according to different risk levels, resulting in insufficient resource utilization and potential missing of unstable trends. SUMMARY

[0004] In view of the above existing problems, the present application is proposed.

[0005] Therefore, the present application provides a storage chip adaptive memory detection method based on artificial intelligence, which solves the problems of lack of cumulative effect analysis under multi-working-condition dynamic evolution and inability to adaptively adjust the detection resolution.

[0006] To solve the above technical problems, the present application provides the following technical solutions:

[0007] The present application provides a storage chip adaptive memory detection method based on artificial intelligence, which includes collecting observation data on the topology node of the storage chip and performing risk proxy quantity calculation and robustness processing to obtain the path response integral of the topology node;

[0008] Based on the path response integral of the topology node, a path response integral sorting sequence is generated, a priority interval in which the topology node is located is obtained through a turning point determination, a demarcation value is extracted in each priority interval to obtain a path response integral demarcation value set, and a path response integral detection period is determined;

[0009] The topology node is detected by the path response integral demarcation value set, and a resolution path response integral sequence is generated according to the path response integral detection period.

[0010] According to the resolution path response integral sequence and the path response integral detection period, a resolution cumulative slope sequence is constructed, and state determination of the topology node is performed;

[0011] Based on the priority interval in which the topology node is located and the state determination of the topology node, fusion determination of the topology node is performed, the risk level of the topology node is obtained, and the risk levels of all topology nodes are integrated to form a detection judgment atlas.

[0012] As a preferred scheme of the storage chip adaptive memory detection method based on artificial intelligence, wherein: the risk agent quantity calculation and robust processing includes, on the topology node of the storage chip, based on the starting working condition vector under the stable working condition and the safe micro-step working condition increment, a linear interpolation is used to generate a working condition trajectory function;

[0013] In the advancing proportion interval of the working condition trajectory function, a plurality of advancing proportion value points are selected, observation data is collected at each advancing proportion value point, the observation data is converted into risk agent quantities by using the normalized maximum value method, and the risk agent quantities at the same advancing proportion value point are collected to form a sample set;

[0014] The sample set is subjected to robust processing to determine the median, upper median and median absolute deviation of the risk agent quantity;

[0015] The difference between the upper median of the risk agent quantity and the median of the risk agent quantity is taken as the offset of the risk agent quantity, and based on the proportional relationship between the offset of the risk agent quantity and the median absolute deviation of the risk agent quantity, the standardized statistic of the topology node is obtained.

[0016] As a preferred scheme of the storage chip adaptive memory detection method based on artificial intelligence, wherein: the path response integral of the topology node includes repeating the whole process of risk agent quantity calculation and robust processing to obtain the topology node standardized statistic corresponding to each advancing proportion value point;

[0017] The topology node standardized statistics corresponding to all advancing proportion value points are accumulated point by point in the order of advancing proportion to form a path response integral sequence of the topology node;

[0018] At the end point of the advancing proportion interval, the last item of the path response integral sequence is taken as the path response integral of the topology node.

[0019] As a preferred scheme of the adaptive memory detection method for the storage chip based on artificial intelligence, the method comprises the following steps: obtaining a path response integral of each topology node in the topology graph; determining a priority interval in which each topology node is located through a turning point determination; obtaining a path response integral demarcation value set and determining a path response integral detection period; and performing hierarchical detection on the topology nodes through the path response integral demarcation value set.

[0020] The adjacent path response integrals in the path response integral sorting sequence are sequentially subtracted to obtain path response integral adjacent differences, and the path response integral adjacent differences are sequentially subtracted to obtain path response integral adjacent difference changes, thereby forming a path response integral adjacent difference sequence and a path response integral adjacent difference change sequence;

[0021] The median and the median absolute deviation of the path response integral adjacent difference sequence are calculated, the median of the path response integral adjacent difference sequence is summed with the median absolute deviation of the path response integral adjacent difference sequence, and a turning point determination threshold is obtained;

[0022] In the path response integral adjacent difference change sequence, when the absolute value of the path response integral adjacent difference change is greater than the turning point determination threshold, the position of the current path response integral adjacent difference change is taken as a turning point;

[0023] According to the sorting position of the turning point in the path response integral sorting sequence, the path response integral sorting sequence is divided into a high priority interval, a medium priority interval and a low priority interval.

[0024] As a preferred scheme of the adaptive memory detection method for the storage chip based on artificial intelligence, the method comprises the following steps: obtaining a path response integral of each topology node in the topology graph; determining a priority interval in which each topology node is located through a turning point determination; obtaining a path response integral demarcation value set and determining a path response integral detection period; and performing hierarchical detection on the topology nodes through the path response integral demarcation value set.

[0025] In the high priority interval, the medium priority interval and the low priority interval, according to the total length, the median sorting position, the turning point sorting position and the tail sorting position of the path response integral sorting sequence, a first period, a second period and a third period are respectively set, and a path response integral detection period is formed.

[0026] As a preferred scheme of the adaptive memory detection method for the storage chip based on artificial intelligence, the method comprises the following steps: obtaining a path response integral of each topology node in the topology graph; determining a priority interval in which each topology node is located through a turning point determination; obtaining a path response integral demarcation value set and determining a path response integral detection period; and performing hierarchical detection on the topology nodes through the path response integral demarcation value set.

[0027] When the path response integral is less than or equal to the low priority demarcation value, the topology node is divided into a low-risk topology node.

[0028] When the path response integral is between the low priority boundary value and the high priority boundary value and there is a medium priority boundary value, the topology node is divided into a medium risk topology node.

[0029] As a preferred scheme of the adaptive memory detection method for storage chips based on artificial intelligence, the resolution path response integral sequence is generated, including, in a high-risk topology node, performing high-density sampling detection according to a first period to obtain a high-resolution path response integral sequence.

[0030] In a medium-risk topology node, interval sampling detection is performed according to a second period to obtain a medium-resolution path response integral sequence.

[0031] In a low-risk topology node, periodic detection is performed according to a third period to obtain a low-resolution path response integral sequence.

[0032] As a preferred scheme of the adaptive memory detection method for storage chips based on artificial intelligence, the resolution path response integral sequence is generated, including, in a high-risk topology node, performing high-density sampling detection according to a first period to obtain a high-resolution path response integral sequence.

[0033] In the high-resolution cumulative slope sequence, it is determined that the topology node has a sustained accumulation effect and is in a high-risk stable state.

[0034] In the medium-resolution cumulative slope sequence, it is determined that the topology node has an early release effect and maintains a medium-risk balanced accumulation.

[0035] In the low-resolution cumulative slope sequence, it is determined that the topology node has a potential instability trend and is in a low-risk stable state.

[0036] As a preferred scheme of the adaptive memory detection method for storage chips based on artificial intelligence, the resolution path response integral sequence is generated, including, in a high-risk topology node, performing high-density sampling detection according to a first period to obtain a high-resolution path response integral sequence.

[0037] As a preferred scheme of the storage chip adaptive memory detection method based on artificial intelligence, wherein: the fusion determination of the topology node comprises: when the priority interval of the topology node is consistent with the risk level corresponding to the state determination of the topology node, it is determined that the topology node is at the corresponding risk level.

[0038] When the priority interval of the topology node is inconsistent with the risk level corresponding to the state determination of the topology node, the party with a higher risk level is selected as the risk level of the topology node in the order from high to low according to the risk level.

[0039] The application has the advantages that: through risk proxy quantity calculation and robust processing, the robust extraction and standardized quantification of observation data under multiple working conditions are realized, and the risk accumulation characteristics of the topology node in the working condition advancing process can be comprehensively reflected; through the turning point determination and extraction of the demarcation value, the adaptive division of the priority interval and the dynamic setting of the path response integral detection period are realized, and the detection frequency and resolution can be flexibly adjusted under different risk levels. BRIEF DESCRIPTION OF DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0041] Fig. 1 The flowchart of the adaptive memory detection method for the storage chip based on artificial intelligence.

[0042] Fig. 2 The flowchart of risk proxy quantity calculation and robust processing.

[0043] Fig. 3 The flowchart of turning point determination and priority interval division.

[0044] Fig. 4 The flowchart of hierarchical detection and state determination. DETAILED DESCRIPTION

[0045] In order to make the above-mentioned purposes, features and advantages of the application more obvious and easy to understand, the specific embodiments of the application will be described in detail below with reference to the drawings of the specification.

[0046] In the following description, many specific details are set forth in order to provide a thorough understanding of the application, but the application can also be implemented in other ways different from those described herein, and those skilled in the art can make similar generalizations without departing from the connotation of the application, therefore the application is not limited by the specific embodiments disclosed below.

[0047] Second, the "one embodiment" or "an embodiment" referred to herein means a specific feature, structure, characteristic, or combination of features and / or characteristics described herein that can be included in at least one implementation of the present application. The various appearances of "in one embodiment" or "an embodiment" are not necessarily all referring to the same embodiment, although they can. Rather, they are each referring to one of a possible number of alternative embodiments that can be implemented separately or in any combination.

[0048] Referring to Figs. 1-4 For one embodiment of the present application, the embodiment provides an artificial intelligence-based storage chip adaptive memory detection method, comprising the following steps:

[0049] S1, collecting observation data on the topology nodes of the storage chip and performing risk proxy quantity calculation and robustness processing to obtain path response integrals of the topology nodes.

[0050] Among them, the topology node refers to a set of monitorable physical or logical positions formed by different functional units inside the storage chip, including but not limited to: a storage array node, i.e. a set of units located at the intersection position of the storage array row and column, used to represent the read-write stability and error occurrence characteristics of the storage unit; a channel control node, i.e. a control and buffer port located on the data access path, used to represent the transmission correctness and retry behavior of the access channel; a timing management node, i.e. a sampling position corresponding to the refresh control and clock synchronization register, used to represent the access delay and timing offset state; a power and interface node, i.e. a state register unit corresponding to the power monitoring point and external access interface, used to represent the power voltage and interface feedback response.

[0051] Each topology node establishes a mapping relationship with the external test interface through the bus structure inside the chip, and the test equipment can access the corresponding monitoring unit through the node number, which is used to implement parallel sampling or time-sharing sampling operation on multiple nodes at the same collection time.

[0052] Further, on the topology nodes of the storage chip, the power voltage, environmental temperature, working frequency, refresh interval and access pattern are changed in sequence through the control interface, so that the storage chip is in different working conditions, and observation data is collected synchronously under each working condition. The observation data includes correctable error count, uncorrectable error indication, retry count and access delay.

[0053] Among them, the storage array node outputs the correctable error count; the channel control node outputs the retry count; the timing management node outputs the access delay; and the power and interface node outputs the uncorrectable error indication and voltage state information.

[0054] The control interface is a standardized interface in the memory chip for external access and debugging, which can receive power voltage adjustment commands, clock frequency configuration commands, refresh interval setting commands and access pattern instructions issued by the test equipment, and return the running results (including correctable error count, uncorrectable error indication, retry count and instantaneous value of access delay) to the test end.

[0055] Under each working condition, the test equipment synchronously collects the running results multiple times to form observation data. Further, in the collected observation data, the multiple sampling results of the instantaneous values of the correctable error count, the uncorrectable error indication, the retry count and the access delay are recorded for each group of working conditions composed of the power voltage, the environmental temperature, the working frequency, the refresh interval and the access pattern; in the continuous multiple sampling results, when the correctable error count remains constant throughout the sampling period, the uncorrectable error indication is always zero, the retry count is zero in each access process, and the difference between the maximum value and the minimum value of the access delay at all sampling points does not exceed five percent of the average access delay, it is determined that this working condition is a stable working condition.

[0056] Under the stable working condition, the measured value of the power voltage is recorded as the starting value of the power voltage, the measured value of the environmental temperature is recorded as the starting value of the environmental temperature, the measured value of the working frequency is recorded as the starting value of the working frequency, the measured value of the refresh interval is recorded as the starting value of the refresh interval, and the selection of the access pattern is recorded as the starting selection of the access pattern; the starting value of the power voltage, the starting value of the environmental temperature, the starting value of the working frequency, the starting value of the refresh interval and the starting selection of the access pattern jointly constitute a starting working condition vector.

[0057] On the basis of the stable working condition, increments are gradually applied along the change direction of the power voltage, the environmental temperature, the working frequency, the refresh interval and the access pattern, and when the continuous three sampling results meet the conditions that the correctable error count remains unchanged, the uncorrectable error indication is still zero, the retry count is still zero, and the difference between the maximum value and the minimum value of the access delay does not exceed five percent of the average access delay, the actual change amount of the power voltage, the environmental temperature, the working frequency, the refresh interval and the access pattern obtained in the stable working condition detection is recorded as the safe micro-step working condition increment of the corresponding parameter.

[0058] The power voltage change amount is limited within ±5% of the rated working voltage; the environmental temperature change amount is limited within a range of not more than 5℃ in the allowed working temperature interval; the working frequency change amount is limited within ±3% of the rated working frequency; the refresh interval change amount is limited within ±2% of the initial refresh interval value; and the access pattern switching is limited to switching once between adjacent access patterns.

[0059] When the power voltage variation, the ambient temperature variation, the working frequency variation, the refresh interval variation or the access pattern switching causes the correctable error count to be no longer constant, the uncorrectable error indication to be not zero, the retry count to be not zero, or the difference between the maximum and minimum values of the access latency to exceed five percent of the average access latency, the last variation or access pattern switching that still satisfies the condition is taken as the safe micro-step working condition increment of the corresponding parameter.

[0060] When the power voltage variation, the ambient temperature variation, the working frequency variation, the refresh interval variation or the access pattern switching exceeds the allowed range, the parameter stepping is stopped and the last valid value is kept.

[0061] The safe micro-step working condition increments corresponding to the power voltage, the ambient temperature, the working frequency, the refresh interval and the access pattern are combined together as the safe micro-step working condition increment.

[0062] A working condition trajectory function is generated based on the starting working condition vector and the safe micro-step working condition increment using linear interpolation, and is expressed as:

[0063] ;

[0064] wherein, represents the working condition trajectory function, used to describe the continuous process of the change of the working condition with the advancing ratio represents the starting working condition vector, represents the safe micro-step working condition increment, represents the advancing ratio, used to describe the advancing degree of the working condition between the starting point and the ending point.

[0065] When , the function value of is equal to the starting working condition vector.

[0066] When , the function value of is equal to the ending working condition formed by respectively superimposing the corresponding safe micro-step working condition increment on each parameter of the starting working condition vector.

[0067] When takes a value within the interval , the function value of represents the linear interpolation result between the starting working condition and the ending working condition.

[0068] Further, based on the working condition trajectory function, a plurality of value points of the advancing ratio are selected within the interval , at each value point, a plurality of read-write accesses are performed on the topological nodes of the memory chip, and each access synchronously collects observation data through the control interface. ​

[0069] In each visit, the observed data is uniformly converted into a risk proxy using the normalized maximum method, denoted as:

[0070] ;

[0071] ;

[0072] wherein, represents the risk proxy, represents the correctable error count, in units of times, with an example value range of , represents the uncorrectable error indication, in units of times, with an example value range of , 0 when there is no error, represents the retry count, in units of times, with an example value range of , fixed as 0 when the retry mechanism is turned off, represents the access delay, in units of milliseconds, with an example value range of , used to reflect the response time of one visit, represents the median of the access delay in multiple visits under the same topology node and the same promotion ratio, serving as the local normalization reference of the current topology node, represents taking the median, represents taking the larger value between the correctable error count and the uncorrectable error indication , represents taking the larger value between the error type index and the delay type index.

[0073] The error type index refers to taking the larger value between the correctable error count and the uncorrectable error indication as the error type index.

[0074] The delay type index refers to performing a function transformation on the retry count to form a retry factor, combining the retry factor with the access delay, and normalizing it using the median of the access delay under the current working condition to obtain the delay type index.

[0075] For the same topology node, all the risk proxies obtained from the visits are recorded and summarized in sequence to form a sample set.

[0076] In the risk proxy calculation formula, when sampling noise, overflow, or error flags occur (e.g., error code, negative value returned in the unsampled state), take ; when or the number of samples in the sampling window (i.e., the sample set of multiple visits continuously performed under the same topology node and the same promotion ratio) is less than 3, use the last valid In the alternative, and in the case of missing samples, the risk proxy quantity of the last valid sampling period (i.e. the complete observation time interval between two adjacent sampling windows) is maintained.

[0077] It should be noted that, since the risk proxy quantity in the sample set can be affected by incidental noise or extreme values, it is necessary to robustly process all risk proxy quantities of the same topology node in the sample set to obtain the standardized statistic of the topology node.

[0078] Specifically, first, the median of the risk proxy quantity in the sample set is determined as the center position of the overall distribution; second, the upper median of the risk proxy quantity is determined in the upper half of the sample set to depict the concentration trend of the higher risk level part; the difference between the upper median of the risk proxy quantity and the median of the risk proxy quantity is defined as the offset of the risk proxy quantity; then, the median absolute deviation of the risk proxy quantity is calculated to measure the overall fluctuation range of the sample set relative to the center position; finally, the proportional relationship between the offset of the risk proxy quantity and the median absolute deviation of the risk proxy quantity is taken as the standardized statistic of the topology node.

[0079] It should also be noted that, after obtaining the standardized statistic of the topology node, the cumulative performance of the standardized statistic of the topology node in the process of advancing under different working conditions needs to be evaluated to obtain the path response integral of the topology node, so as to reflect the overall trend of the risk level with the change of the working condition.

[0080] Specifically, based on the working condition trajectory function, multiple value points are selected at equal intervals within the advancing proportion interval, and at each value point, the whole process of observation data collection, risk proxy quantity calculation and robust processing is repeatedly executed to obtain the standardized statistic of the topology node corresponding to each advancing proportion value point.

[0081] The standardized statistics of the topology node corresponding to all value points are sequentially accumulated point by point according to the order of the advancing proportion to form a path response integral sequence of the topology node; at the end point of the advancing proportion interval, the last item of the path response integral sequence is taken as the path response integral of the topology node.

[0082] The path response integral of the topology node is used to describe the cumulative effect of the risk level of the topology node in the process of gradually advancing the working condition; when the path response integral of the topology node presents a gentle increasing trend between different value points, it means that the risk accumulation process of the topology node under different working conditions is stable and controllable; when the path response integral of the topology node obviously increases in a continuous section, it means that the topology node has potential instability under the corresponding working condition.

[0083] S2, generating a path response integral ranking sequence based on the path response integral of the topology node, determining the priority interval where the topology node is located through the turning point judgment, extracting the demarcation value in each priority interval, obtaining the path response integral demarcation value set, and determining the path response integral detection period.

[0084] Further, all path response integrals of the topology nodes are arranged in descending order of numerical value to obtain a path response integral ranking sequence; the path response integral ranking sequence records the position of each topology node in the overall ranking.

[0085] In the path response integral ranking sequence, the difference between each path response integral and the path response integral immediately following it is calculated in turn from the first item in the ranking position to obtain the path response integral adjacent difference, and all path response integral adjacent differences are arranged in order of ranking position to form a path response integral adjacent difference sequence.

[0086] In the path response integral adjacent difference sequence, the difference between each path response integral adjacent difference and the path response integral adjacent difference immediately following it is calculated in turn to obtain the path response integral adjacent difference change, and all path response integral adjacent difference changes are arranged in order of ranking position to form a path response integral adjacent difference change sequence.

[0087] By calculating the median and median absolute deviation of the path response integral adjacent difference sequence, in each detection period, the median and median absolute deviation of the statistical sample are calculated respectively by taking the path response integral adjacent difference sequence formed by all topology nodes in the current detection period as the statistical sample, and the sum of the two is taken as the turning point judgment threshold of the current detection period.

[0088] The median and median absolute deviation of the statistical sample are refreshed synchronously when the detection period is updated, and when a new detection period is entered, the path response integral adjacent difference sequence formed by all topology nodes in the current detection period is re-estimated to obtain the median and median absolute deviation of the new statistical sample, which is used to reflect the overall fluctuation level of the path response integral adjacent difference sequence in real time, thereby realizing dynamic updating of the turning point judgment threshold.

[0089] In the path response integral adjacent difference change sequence, the absolute value of each path response integral adjacent difference change is checked one by one, and when the absolute value of the path response integral adjacent difference change is greater than the turning point judgment threshold, the position of the current path response integral adjacent difference change is taken as the turning point.

[0090] Further, according to the ranking position of the turning point in the path response integral ranking sequence, the path response integral ranking sequence is divided into a high priority interval, a medium priority interval and a low priority interval.

[0091] All the topological nodes before the turning point ranking position in the path response integral ranking sequence are divided into a high priority interval.

[0092] All the topological nodes after the turning point ranking position and before the median ranking position in the path response integral ranking sequence are divided into a medium priority interval.

[0093] All the topological nodes after the median ranking position in the path response integral ranking sequence are divided into a low priority interval.

[0094] It should be noted that when the turning point ranking position is equal to or later than the median ranking position of the path response integral ranking sequence, the medium priority interval is no longer divided separately, and all the topological nodes after the turning point ranking position are divided into a low priority interval.

[0095] When there is no path response integral adjacent difference change with an absolute value greater than the turning point determination threshold in the path response integral adjacent difference change sequence, the upper quartile of the path response integral ranking sequence is calculated, and the position of the upper quartile of the path response integral ranking sequence is taken as the alternative turning point.

[0096] Further, in the high priority interval, the path response integral at the end ranking position of the high priority interval is recorded as a high priority boundary value.

[0097] In the medium priority interval, the path response integral at the median ranking position of the path response integral ranking sequence is recorded as a medium priority boundary value.

[0098] In the low priority interval, the absolute values of the path response integral adjacent differences in the path response integral adjacent difference sequence are checked from the last term to the first term of the ranking position; when three consecutive path response integral adjacent differences with absolute values not greater than the turning point determination threshold are found, the first term of the three terms corresponding to the next ranking position is recorded as an end stable boundary ranking position; and the path response integral at the end stable boundary ranking position is recorded as a low priority boundary value.

[0099] When the number of ranking positions corresponding to the low priority interval is less than four, the median ranking position of the low priority interval is recorded as an end stable boundary ranking position, and the path response integral at the end stable boundary ranking position is recorded as a low priority boundary value.

[0100] When three consecutive path response integral adjacent differences with absolute values not greater than the turning point determination threshold are not found within the ranking position range corresponding to the low priority interval, the median ranking position of the low priority interval is recorded as an end stable boundary ranking position, and the path response integral at the end stable boundary ranking position is recorded as a low priority boundary value.

[0101] It should be noted that when the turning point ranking position is equal to or later than the median ranking position of the path response integral ranking sequence, resulting in no medium priority interval being formed, the high priority boundary value and the low priority boundary value are combined to form the path response integral boundary value set.

[0102] When the medium priority interval is formed, the high priority boundary value, the medium priority boundary value and the low priority boundary value are combined to form the path response integral boundary value set.

[0103] It should also be noted that in the high priority interval, the medium priority interval and the low priority interval, the path response integral detection period is set, including the first period, the second period and the third period.

[0104] In the high priority interval, the first period is set, and the length of the first period is determined by the ratio between the total length of the path response integral ranking sequence and the median ranking position of the path response integral ranking sequence.

[0105] In the medium priority interval, the second period is set, and the length of the second period is determined by the ratio between the total length of the path response integral ranking sequence and the turning point ranking position.

[0106] In the low priority interval, the third period is set, and the length of the third period is determined by the ratio between the total length of the path response integral ranking sequence and the tail ranking position of the path response integral ranking sequence.

[0107] Wherein, the median ranking position is the index position corresponding to half of the length of the path response integral ranking sequence; the tail ranking position is the index position of the last term of the path response integral ranking sequence.

[0108] Since the period length is inversely proportional to the sampling frequency, the sampling frequency corresponding to the first period is the highest, which is used for high-density sampling detection; the sampling frequency corresponding to the second period is medium, which is used for interval sampling detection; the sampling frequency corresponding to the third period is the lowest, which is used for periodic detection; the three detection methods automatically form a sampling frequency gradient through the difference in period length, thereby realizing adaptive matching of detection density and node risk degree in different priority intervals.

[0109] S3, performing hierarchical detection on the topology nodes through the path response integral boundary value set, and generating a resolution path response integral sequence according to the path response integral detection period.

[0110] Further, based on the path response integral boundary value set, hierarchical detection is performed on the topology nodes, and the specific operation is to check the path response integral of each topology node one by one in the path response integral ranking sequence from the first term of the ranking position.

[0111] When the path response integral of the topology node is greater than or equal to the high priority boundary value, the topology node is divided into a high-risk topology node.

[0112] When the path response integral of the topology node is less than or equal to the low priority boundary value, the topology node is divided into a low-risk topology node.

[0113] When the path response integral of the topology node is between the low priority boundary value and the high priority boundary value and there is a medium priority boundary value, the topology node is divided into a medium-risk topology node.

[0114] Further, in the high-risk topology node, high-density sampling detection is performed, the high-density sampling detection selects a plurality of advance ratios according to a sampling frequency corresponding to a first period in an advance ratio interval of the working condition trajectory function to obtain an advance ratio interval of the first period, and repeatedly performs the whole process of observation data collection, risk proxy quantity calculation, robustness processing and path response integral calculation in the advance ratio interval of the first period to obtain a high-resolution path response integral sequence.

[0115] In the medium-risk topology node, interval sampling detection is performed, the interval sampling detection selects a plurality of advance ratios according to a sampling frequency corresponding to a second period in an advance ratio interval of the working condition trajectory function to obtain an advance ratio interval of the second period, and repeatedly performs the whole process of observation data collection, risk proxy quantity calculation, robustness processing and path response integral calculation in the advance ratio interval of the second period to obtain a medium-resolution path response integral sequence.

[0116] In the low-risk topology node, periodic detection is performed, the periodic detection selects a plurality of advance ratios according to a sampling frequency corresponding to a third period in an advance ratio interval of the working condition trajectory function to obtain an advance ratio interval of the third period, and repeatedly performs the whole process of observation data collection, risk proxy quantity calculation, robustness processing and path response integral calculation in the advance ratio interval of the third period to obtain a low-resolution path response integral sequence.

[0117] It should be noted that by implementing different detection intensities in different risk topology nodes, the resolution path response integral sequence can be ensured to be comprehensive while reducing redundant detection resource consumption, and the optimal detection coverage and detection resolution are dynamically converged in the detection process, thereby improving the detection efficiency and detection accuracy of the storage chip adaptive memory detection method.

[0118] S4, according to the resolution path response integral sequence and the path response integral detection period, a resolution cumulative slope sequence is constructed to determine the state of the topology node.

[0119] Further, in the high-resolution path response integral sequence, the difference between two adjacent path response integrals is taken in turn according to the advancing proportion interval of the first period to obtain a first difference value, and a ratio relationship is established between the first difference value and the advancing proportion interval of the first period to obtain a high-resolution path response integral cumulative slope.

[0120] In the medium-resolution path response integral sequence, the difference between two adjacent path response integrals is taken in turn according to the advancing proportion interval of the second period to obtain a second difference value, and a ratio relationship is established between the second difference value and the advancing proportion interval of the second period to obtain a medium-resolution path response integral cumulative slope.

[0121] In the low-resolution path response integral sequence, the difference between two adjacent path response integrals is taken in turn according to the advancing proportion interval of the third period to obtain a third difference value, and a ratio relationship is established between the third difference value and the advancing proportion interval of the third period to obtain a low-resolution path response integral cumulative slope.

[0122] All the cumulative slopes corresponding to each period are recorded in turn according to the order of the advancing proportions to form a high-resolution cumulative slope sequence, a medium-resolution cumulative slope sequence and a low-resolution cumulative slope sequence.

[0123] Further, in the high-resolution cumulative slope sequence, when the high-resolution path response integral cumulative slopes corresponding to more than three consecutive advancing proportion positions are greater than zero and the values are increasing, it is determined that the topological node has a sustained accumulation effect; when the high-resolution path response integral cumulative slopes corresponding to more than three consecutive advancing proportion positions are close to zero, it is determined that the topological node is in a high-risk stable state.

[0124] In the medium-resolution cumulative slope sequence, when the average value of the first half section of the medium-resolution path response integral cumulative slope is greater than the average value of the second half section of the medium-resolution path response integral cumulative slope, it is determined that the topological node has an early release effect; when the average value of the first half section of the medium-resolution path response integral cumulative slope and the average value of the second half section of the medium-resolution path response integral cumulative slope are close, it is determined that the topological node maintains a medium-risk balanced accumulation.

[0125] In the low-resolution cumulative slope sequence, when the low-resolution path response integral cumulative slopes corresponding to more than three consecutive advancing proportion positions at the end are greater than zero and greater than the average value of the first half section of the low-resolution cumulative slope sequence, it is determined that the topological node has a potential instability trend; when the low-resolution path response integral cumulative slopes corresponding to more than three consecutive advancing proportion positions at the end are close to zero, it is determined that the topological node is in a low-risk stable state.

[0126] It should be noted that in the resolution accumulation slope sequence, the first half section is all the accumulation slopes contained in the resolution accumulation slope sequence from the first item to the median sorting position, and the second half section is all the accumulation slopes contained in the resolution accumulation slope sequence from the median sorting position to the last item; the median sorting position is the middle position of the resolution accumulation slope sequence arranged in the order of the advancing proportion.

[0127] The resolution path response integral accumulation slope is close to zero, indicating that the value of the resolution path response integral accumulation slope falls within , wherein is a tolerance parameter, and the value of the tolerance parameter is determined according to the overall fluctuation level of the corresponding resolution path response integral sequence, for example, the percentage of the average value of the corresponding resolution path response integral sequence can be taken as an example value, which is used to offset the interference of accidental fluctuations on the determination of the topology node state; when the absolute value of the resolution path response integral accumulation slope falls within , it is determined to be close to zero.

[0128] It should also be noted that when determining the continuity condition, the standard of setting three or more advancing proportion positions is to avoid the interference of single or two abnormal points on the determination of the topology node state, and to ensure the robustness and reliability of the determination; when the resolution path response integral accumulation slopes corresponding to the three or more advancing proportion positions simultaneously satisfy the determination condition, it can be confirmed that the topology node is in the corresponding risk state or effect state, thereby ensuring that the topology node state determination is not affected by local accidental fluctuations.

[0129] S5, based on the priority interval in which the topology node is located and the state determination of the topology node, performing fusion determination on the topology node to obtain a risk level of the topology node, and integrating the risk levels of all topology nodes to form a detection determination map.

[0130] Further, based on the priority interval in which the topology node is located and the state determination of the topology node, performing fusion determination on the topology node to generate a risk level of the topology node.

[0131] Wherein, the high priority interval, the medium priority interval and the low priority interval in the priority interval correspond to the high risk level, the medium risk level and the low risk level respectively; the state determination is the analysis result of different resolution accumulation slope sequences, wherein the continuous accumulation effect and the high risk stable state correspond to the high risk level, the advance release effect and the medium risk balanced accumulation correspond to the medium risk level, and the potential instability trend and the low risk stable state correspond to the low risk level.

[0132] When the priority interval of the topology node is consistent with the risk level corresponding to the state determination of the topology node, it is determined that the topology node is in the corresponding risk level.

[0133] For example, when the topology node is in the high priority interval, and the state determination of the topology node is the sustained cumulative effect or the high risk stable state, it is determined that the topology node is in the high risk level.

[0134] When the priority interval of the topology node is inconsistent with the risk level corresponding to the state determination of the topology node, the risk level with higher risk level is selected as the risk level of the topology node in the order from high to low according to the risk level.

[0135] For example, when the topology node is in the medium priority interval, and the state determination of the topology node is the sustained cumulative effect or the high risk stable state, it is determined that the topology node is in the high risk level; when the topology node is in the low priority interval, and the state determination of the topology node is the early release effect or the medium risk balanced accumulation, it is determined that the topology node is in the medium risk level.

[0136] Further, the risk levels of all topology nodes are integrated in sequence according to the order of the topology nodes in the storage chip topology structure, to generate a detection determination atlas.

[0137] The detection determination atlas displays the distribution of the high risk level, the medium risk level and the low risk level in the storage chip topology structure in units of topology nodes.

[0138] It should be noted that when there are a plurality of topology nodes with high risk levels in the detection determination atlas, it indicates that the storage chip has a tendency of overall instability in the current working condition advancing process, and protection measures or termination of testing need to be taken immediately; when the detection determination atlas is mainly composed of topology nodes with medium risk levels and low risk levels, and the topology nodes with high risk levels are scattered and discontinuous, it indicates that the storage chip is in a controllable state in the current working condition advancing process, and the advancing process can continue.

[0139] In summary, the present application realizes the robust extraction and standardized quantification of observation data under multiple working conditions through risk proxy calculation and robust processing, which can comprehensively reflect the risk accumulation characteristics of the topology nodes in the working condition advancing process; through the turning point determination and the extraction of the demarcation value, the adaptive division of the priority interval and the dynamic setting of the path response integral detection period are realized, which can flexibly adjust the detection frequency and resolution under different risk levels.

[0140] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit it, although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the present application, and they should be covered in the scope of the claims of the present application.

Claims

1. An adaptive memory detection method for memory chips based on artificial intelligence, characterized in that: include, Observational data is collected on the topology nodes of the memory chip and subjected to risk proxy quantity calculation and robustness processing to obtain the path response integral of the topology nodes. The path response integral is generated based on the path response integral of the topology node. The priority interval of the topology node is determined by the inflection point. The boundary value is extracted in each priority interval to obtain the path response integral boundary value set. At the same time, the path response integral detection period is determined. The topology nodes are detected hierarchically by using the path response integral boundary value set, and a resolution path response integral sequence is generated according to the path response integral detection period. Based on the resolution path response integral sequence and the path response integral detection period, a resolution cumulative slope sequence is constructed to determine the state of the topology nodes. Based on the priority range of the topology node and the state determination of the topology node, the risk level of the topology node is obtained by fusion determination, and the risk levels of all topology nodes are integrated to form a detection and determination map.

2. The adaptive memory detection method for memory chips based on artificial intelligence as described in claim 1, characterized in that: The risk proxy quantity calculation and robustness processing includes generating a working condition trajectory function by linear interpolation on the topology node of the memory chip, based on the initial working condition vector under stable operating conditions and the safety micro-step working condition increment. Within the propulsion ratio range of the working condition trajectory function, several propulsion ratio value points are selected, and observation data are collected at each propulsion ratio value point. The normalized maximum value method is used to convert the observation data into risk agency quantity, and the risk agency quantities at the same propulsion ratio value point are summarized to form a sample set. The sample set is robustned to determine the median, upper median, and absolute deviation of the median of the risk agency amount; The difference between the upper median of the risk proxy quantity and the median of the risk proxy quantity is used as the offset of the risk proxy quantity. Based on the proportional relationship between the offset of the risk proxy quantity and the absolute deviation of the median of the risk proxy quantity, the standardized statistics of the topology node are obtained.

3. The adaptive memory detection method for memory chips based on artificial intelligence as described in claim 2, characterized in that: The path response integral of the topology node is obtained by repeatedly performing the entire process of risk proxy quantity calculation and robustness processing to obtain the standardized statistics of the topology node corresponding to each advancement ratio value point. The standardized statistics of the topological nodes corresponding to all advancement ratio points are accumulated point by point in order of advancement ratio to form the path response integral sequence of the topological nodes. At the end of the advancement ratio interval, the last term of the path response integral sequence is taken as the path response integral of the topology node.

4. The adaptive memory detection method for memory chips based on artificial intelligence as described in claim 3, characterized in that: The step of determining the priority interval of a topological node by identifying the turning point includes arranging the path response integrals of all topological nodes in descending order of their values ​​to obtain a path response integral sorting sequence. The path response integrals in the sorted sequence are subtracted sequentially to obtain the path response integral adjacent difference. The path response integral adjacent difference is subtracted sequentially to obtain the path response integral adjacent difference change, thus forming the path response integral adjacent difference sequence and the path response integral adjacent difference change sequence, respectively. The turning point determination threshold is obtained by summing the median and absolute deviation of the adjacent difference sequence of the path response integral. In the sequence of adjacent differences in the path response integral, when the absolute value of the adjacent difference in the path response integral is greater than the turning point threshold, the current position of the adjacent difference in the path response integral is taken as the turning point. Based on the position of the inflection point in the path response integral sorting sequence, the path response integral sorting sequence is divided into high-priority intervals, medium-priority intervals, and low-priority intervals.

5. The AI-based adaptive memory detection method for memory chips as described in claim 4, characterized in that: The process of obtaining the path response integral boundary value set and determining the path response integral detection period includes extracting high-priority boundary values, medium-priority boundary values, and low-priority boundary values ​​from the high-priority interval, medium-priority interval, and low-priority interval, respectively, to form the path response integral boundary value set. In the high-priority interval, medium-priority interval, and low-priority interval, the first period, the second period, and the third period are set according to the total length of the path response integral sorting sequence, the median sorting position, the inflection point sorting position, and the tail sorting position, respectively, to form the path response integral detection period.

6. The AI-based adaptive memory detection method for memory chips as described in claim 5, characterized in that: The method of performing hierarchical detection of topology nodes through the path response integral boundary value set includes classifying topology nodes as high-risk topology nodes when the path response integral is greater than or equal to the high priority boundary value. When the path response integral is less than or equal to the low priority threshold, the topology node is classified as a low-risk topology node. When the path response integral is between the low-priority boundary and the high-priority boundary, and there is a medium-priority boundary, the topology node is classified as a medium-risk topology node.

7. The artificial intelligence-based adaptive memory detection method for memory chips as described in claim 6, characterized in that: The method of generating the resolution path response integral sequence includes performing high-density sampling detection in high-risk topology nodes according to the first cycle to obtain the high-resolution path response integral sequence. In medium-risk topology nodes, interval sampling and detection are performed according to the second cycle to obtain a medium-resolution path response integral sequence; In low-risk topology nodes, periodic detection is performed according to the third cycle to obtain a low-resolution path response integral sequence.

8. The artificial intelligence-based adaptive memory detection method for memory chips as described in claim 7, characterized in that: The construction of the resolution cumulative slope sequence and the state determination of the topology nodes include, based on the high-resolution path response integral sequence, the medium-resolution path response integral sequence and the low-resolution path response integral sequence, according to the advance ratio interval of the first period, the second period and the third period, calculating the ratio of the difference between adjacent path response integrals to the advance ratio interval of each period, to form the high-resolution cumulative slope sequence, the medium-resolution cumulative slope sequence and the low-resolution cumulative slope sequence respectively. In high-resolution cumulative slope sequences, it is determined that topological nodes exhibit a continuous cumulative effect and are in a high-risk stable state; In the medium-resolution cumulative slope sequence, it is determined that the topological nodes have an early release effect and maintain a medium-risk equilibrium accumulation. In the low-resolution cumulative slope sequence, it is determined that the topological nodes have a potential tendency to become unstable or are in a low-risk stable state.

9. The artificial intelligence-based adaptive memory detection method for memory chips as described in claim 8, characterized in that: The determination of the topology node's status based on its priority interval and the node's state includes defining that a high-priority interval, continuous cumulative effect, and high-risk stable state correspond to a high-risk level; a medium-priority interval, early release effect, and medium-risk balanced accumulation correspond to a medium-risk level; and a low-priority interval, potential instability trend, and low-risk stable state correspond to a low-risk level.

10. The artificial intelligence-based adaptive memory detection method for memory chips as described in claim 9, characterized in that: The fusion determination of topology nodes includes determining that the topology node is at the corresponding risk level when the priority range of the topology node is consistent with the risk level corresponding to the state determination of the topology node. When the priority range of a topology node is inconsistent with the risk level corresponding to the state determination of the topology node, the one with the higher risk level is selected as the risk level of the topology node in descending order of risk level.

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