Coplanar packaging structure of optical sensor
By using a coplanar packaging structure and a gradient transition layer design for thermal expansion coefficients, the optical path offset and signal crosstalk problems caused by the height difference between the transmitter and receiver in optical sensors are solved, thus achieving collimation and stability of the optical signal.
Patent Information
- Application Number
- CN202511636626.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-10
- Publication Date
- 2026-02-27
AI Technical Summary
The existing optical sensors have a height difference between the transmitter and receiver, which causes the optical path to be tilted or misaligned, resulting in signal crosstalk problems.
The coplanar packaging structure is adopted, with both the light-emitting chip and the light-receiving chip located on one side of the substrate. The light-emitting chip is raised by a pad so that it is arranged coplanarly with the light-receiving chip. A gradient transition layer of thermal expansion coefficient is formed through the substrate and the pad to reduce thermal stress.
Reduce optical signal leakage and background noise, improve optical path collimation, avoid signal crosstalk, and ensure structural stability over a wide temperature range.
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Figure CN121586337A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of optical sensors, in particular to a coplanar packaging structure of an optical sensor. BACKGROUND
[0002] At present, optical sensors are widely used in industrial automation, consumer electronics, automotive electronics and medical devices, etc. The core of the optical sensor is a transmitter and a receiver, which can detect the parameters of the target object according to the characteristic changes of the transmitted and received light signals, and can realize functions such as counting positioning, distance measurement, speed measurement, visual imaging and environmental monitoring.
[0003] For example, Chinese utility model patent CN218334709U discloses an optical sensor packaging piece and device. The optical sensor packaging piece includes a packaging piece substrate, a transmitter die, a sensor die and a cover. The transmitter die is mounted to the upper surface of the packaging piece substrate. The transmitter die includes a light emitting area at the front surface of the die, which can be a vertical cavity surface emitting laser diode. The sensor die is positioned to cover the transmitter die. The integrated circuit of the sensor die includes a first light sensitive area and a second light sensitive area at the front surface of the die. The cover is mounted to the packaging piece substrate. The cover includes a first opening and a second opening. The first opening is aligned with the light emitting area, and the second opening is aligned with the second light sensitive area.
[0004] The optical sensor packaging piece in the prior art adopts a design form in which the light emitting area (equivalent to the "transmitter") and the second light sensitive area (equivalent to the "receiver") are stacked vertically. The transmitter and the receiver have a height difference, which can cause light path tilt or misalignment, resulting in signal crosstalk. SUMMARY
[0005] The technical problem to be solved by the present application is that the transmitter and the receiver of the existing optical sensor have a height difference, which can cause light path tilt or misalignment, resulting in signal crosstalk.
[0006] To solve the above technical problems, the present application provides a coplanar packaging structure of an optical sensor: The coplanar packaging structure of the optical sensor has a first direction and includes: a substrate having a first side surface facing the first direction; a light emitting chip disposed on one side of the substrate close to the first side surface, and the light emitting chip is electrically connected to the substrate; along the first direction, the light emitting chip is arranged apart from the first side surface; a light receiving chip disposed on one side of the substrate close to the first side surface, and the light receiving chip is electrically connected to the substrate; along the first direction, the light receiving chip and the light emitting chip are arranged apart from the first side surface in orthographic projection. a spacer disposed between the light-emitting chip and the substrate; the light-emitting chip has a light-emitting region away from the substrate, the light-receiving chip has a light-receiving region away from the substrate, the light-emitting region and the light-receiving region are coplanarly arranged, and both are parallel to the first side surface; wherein a thermal expansion coefficient of the substrate is α1, a thermal expansion coefficient of the light-emitting chip is α2, and a thermal expansion coefficient of the spacer is α3, α1≥α3≥α2.
[0007] Further, the thermal expansion coefficient of the substrate α1=6ppm / ℃~10ppm / ℃, the thermal expansion coefficient of the light-emitting chip α2=2ppm / ℃~6ppm / ℃, and the thermal expansion coefficient of the spacer α3=6ppm / ℃~9ppm / ℃.
[0008] Further, the spacer is made of any one of W-Cu alloy, Mo-Cu alloy, Cu-Mo-Cu laminated alloy, Kovar alloy, and Fe-Ni42 alloy.
[0009] Further, the thermal conductivity of the spacer is λ, and λ≥150W / (m·K).
[0010] Further, the spacer is provided with a conductive portion on the side close to the substrate, the conductive portion is in contact with the substrate, the spacer is provided with a second side surface on the side away from the substrate, and the second side surface supports the light-emitting chip; the surface area of the conductive portion is S1, and the area of the second side surface is S2, and S1≤S2.
[0011] Further, along the first direction, the orthogonal projection of the conductive portion is located in the middle part of the second side surface.
[0012] Further, the spacer is further provided with a supporting portion on the side close to the substrate, and the supporting portion is in contact with the substrate; within the first side surface, the supporting portion is arranged in a spaced manner with the conductive portion, and the spacing between the supporting portion and the conductive portion forms a heat dissipation channel.
[0013] Further, the light-emitting chip has a first pole and a second pole opposite along the first direction, the first pole is electrically connected with the spacer, the second pole is electrically connected with the substrate through a wire, and the wire is arranged in a spaced manner with the spacer.
[0014] Further, the coplanar packaging structure of the optical sensor further comprises a transparent plastic encapsulation layer, a light shielding layer, and a light shielding wall, the transparent plastic encapsulation layer is arranged on the first side surface and encapsulates the light-emitting chip and the light-receiving chip. The light shielding layer is arranged on the outer surface of the transparent plastic sealing layer, and the light shielding layer is provided with a light emitting window corresponding to the light emitting area and a light receiving window corresponding to the light receiving area. The transparent plastic sealing layer is provided with an isolation groove between the light emitting chip and the light receiving chip, and the light shielding wall is filled in the isolation groove and connected with the light shielding layer.
[0015] Further, the coplanar packaging structure of the optical sensor further comprises an ASIC chip, and the light receiving chip is arranged spaced apart from the substrate along the first direction, and the ASIC chip is arranged between the first side and the light receiving chip.
[0016] Compared with the prior art, the coplanar packaging structure of the optical sensor has the beneficial effects that: the coplanar packaging structure of the optical sensor adopts the design form of the substrate, the light emitting chip, the light receiving chip and the spacer, the light emitting chip and the light receiving chip are arranged on the side of the substrate close to the first side, and the light emitting chip and the light receiving chip are electrically connected with the substrate; and along the first direction, the orthographic projections of the light emitting chip and the light receiving chip are arranged spaced apart on the first side, and the spaced apart distribution form can effectively reduce the direct leakage of the light signal of the light emitting chip to the light receiving chip, and reduce the background noise and optical crosstalk.
[0017] The light emitting chip is arranged spaced apart from the first side, and the spacer is arranged between the light emitting chip and the substrate, and the light emitting chip is raised by the spacer, so that the light emitting area and the light receiving area of the light receiving chip are on the same plane parallel to the first side. The coplanar structure of the light emitting area and the light receiving area makes the light signal emitted by the light emitting chip and the light receiving area of the light receiving chip in an ideal alignment state, reducing the loss of coupling efficiency of the light signal caused by the height difference. Moreover, the coplanar structure can ensure the collimation of the optical path, improve the consistency of the emitted light and the received light path, and avoid the crosstalk problem of the optical signal.
[0018] In addition, the thermal expansion coefficient of the substrate α1 is greater than or equal to the thermal expansion coefficient of the spacer α3, and the thermal expansion coefficient of the spacer α3 is greater than or equal to the thermal expansion coefficient of the light emitting chip α2. The spacer forms a gradient transition layer of the thermal expansion coefficient between the light emitting chip and the substrate. The thermal stress is concentrated on the bonding interface of different components, and the spacer is designed to buffer, which effectively reduces the thermal stress of the bonding interface of the light emitting chip and the spacer and the bonding interface of the spacer and the substrate, prevents the light emitting chip from cracking or the risk of solder fatigue fracture due to temperature cycling. This design also avoids the problem that the spacer expands or shrinks excessively due to temperature changes, thereby damaging the coplanar structure and causing the optical path to deviate, ensuring the stability of the coplanar structure in a wide temperature range. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 is a perspective view of the coplanar packaging structure of the optical sensor of the embodiment of the present application (without the transparent plastic sealing layer, the light shielding layer and the light shielding wall). Figure 2 is Figure 1 a front view schematic diagram of a coplanar packaging structure of an optical sensor in the embodiment of the present application; Figure 3 is Figure 1 a top view schematic diagram of a coplanar packaging structure of an optical sensor in the embodiment of the present application; Figure 4 is a perspective schematic diagram of a coplanar packaging structure of an optical sensor in the embodiment of the present application; Figure 5 is Figure 4 a sectional view schematic diagram of a coplanar packaging structure of an optical sensor in the embodiment of the present application; Figure 6 is a structural schematic diagram of a light emitting chip and a spacer in the embodiment of the present application; Figure 7 is a sectional view schematic diagram of a light emitting chip and a spacer in other embodiments of the present application; In the figure: 1, substrate; 11, first side; 2, light emitting chip; 21, light emitting area; 22, first pole; 23, second pole; 3, light receiving chip; 31, light receiving area; 4, spacer; 41, conductive part; 42, second side; 43, support part; 44, heat dissipation channel; 45, lead wire; 5, transparent plastic encapsulation layer; 50, isolation groove; 6, light shielding layer; 60, light shielding wall; 61, light emitting window; 62, light receiving window; 7, ASIC chip; X, first direction. DETAILED DESCRIPTION
[0020] The specific embodiments of the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following embodiments are used to illustrate the present application, but not to limit the scope of the present application.
[0021] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise" and the like in the present application are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.
[0022] In addition, the terms "first", "second", "third", etc. are used only for descriptive purposes and should not be construed as indicating or implying relative importance or an indicated number of technical features. Therefore, the features defined as "first", "second", etc. can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified and limited.
[0023] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood in a broad sense, for example, it can be fixed connection, or detachable connection, or integrated; it can be directly connected, or indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0024] As shown in Figure 1 The coplanar packaging structure of the optical sensor of the embodiment of the present application has a first direction X, comprising: a substrate 1, a light emitting chip 2, a light receiving chip 3 and a spacer 4; the substrate 1 has a first side surface 11 facing the first direction X; the light emitting chip 2 is arranged on one side of the substrate 1 close to the first side surface 11, and the light emitting chip 2 is electrically connected with the substrate 1; along the first direction X, the light emitting chip 2 is arranged spaced apart from the first side surface 11; the light receiving chip 3 is arranged on one side of the substrate 1 close to the first side surface 11, and the light receiving chip 3 is electrically connected with the substrate 1; along the first direction X, the light receiving chip 3 and the orthographic projection of the light emitting chip 2 on the first side surface 11 are arranged spaced apart.
[0025] The spacer 4 is arranged between the light emitting chip 2 and the substrate 1; the light emitting chip 2 has a light emitting area 21 away from the substrate 1, and the light receiving chip 3 has a light receiving area 31 away from the substrate 1, the light emitting area 21 and the light receiving area 31 are arranged coplanarly and parallel to the first side surface 11; wherein the thermal expansion coefficient of the substrate 1 is α1, the thermal expansion coefficient of the light emitting chip 2 is α2, and the thermal expansion coefficient of the spacer 4 is α3, α1≥α3≥α2.
[0026] The coplanar packaging structure of the optical sensor adopts the design form of the substrate 1, the light emitting chip 2, the light receiving chip 3 and the spacer 4, the light emitting chip 2 and the light receiving chip 3 are arranged on one side of the substrate 1 close to the first side surface 11, and the light emitting chip 2 and the light receiving chip 3 are electrically connected with the substrate 1; and along the first direction X, the light emitting chip 2 and the light receiving chip 3 are arranged spaced apart on the first side surface 11, the spaced apart distribution form can effectively reduce the direct leakage of the light signal of the light emitting chip 2 to the light receiving chip 3, and reduce the background noise and optical crosstalk.
[0027] The light emitting chip 2 is arranged apart from the first side surface 11, and the spacer 4 is arranged between the light emitting chip 2 and the substrate 1. The light emitting chip 2 is raised by the spacer 4, so that the light emitting area 21 and the light receiving area 31 of the light receiving chip 3 are in the same plane parallel to the first side surface 11. The coplanar structure of the light emitting area 21 and the light receiving area 31 ensures that the light signal emitted by the light emitting chip 2 is in an ideal alignment state with the light receiving area 31 of the light receiving chip 3, thereby reducing the loss of coupling efficiency of the light signal caused by the height difference. Moreover, the coplanar structure can ensure the collimation of the optical path, thereby improving the consistency of the emitting light path and the receiving light path, and avoiding the problem of optical signal crosstalk.
[0028] In addition, the thermal expansion coefficient of the substrate 1 is α1≥ the thermal expansion coefficient of the spacer 4 is α3≥ the thermal expansion coefficient of the light emitting chip 2 is α2. The spacer 4 forms a gradient transition layer of the thermal expansion coefficient between the light emitting chip 2 and the substrate 1. The thermal stress is concentrated at the bonding interface of different components, and the thermal stress at the bonding interface between the light emitting chip 2 and the spacer 4 and the bonding interface between the spacer 4 and the substrate 1 is effectively reduced by the buffering design of the spacer 4, thereby preventing the light emitting chip 2 from cracking or the risk of solder fatigue fracture caused by temperature cycling. This design also avoids the problem that the spacer 4 is excessively expanded or contracted due to temperature changes, thereby destroying the coplanar structure and causing the optical path to deviate, and ensures the stability of the coplanar structure in a wide temperature range.
[0029] As a further preferred embodiment, the thermal expansion coefficient of the substrate 1 is α1=6ppm / ℃~10ppm / ℃, the thermal expansion coefficient of the light emitting chip 2 is α2=2ppm / ℃~6ppm / ℃, and the thermal expansion coefficient of the spacer 4 is α3=6ppm / ℃~9ppm / ℃. Specifically, the spacer 4 can be made of any one of W-Cu alloy, Mo-Cu alloy, Cu-Mo-Cu laminated alloy, Kovar alloy, and Fe-Ni42 alloy. Correspondingly, the thermal conductivity of the spacer 4 is λ, which satisfies: λ≥150W / (m·K).
[0030] In the embodiment, the thermal expansion coefficient of the substrate 1 is α1=10ppm / ℃, and the light emitting chip 2 is made of Si material, and the thermal expansion coefficient of the light emitting chip 2 is α2=2.6ppm / ℃~4.1ppm / ℃. For example, the spacer 4 is made of W-Cu alloy, and when the material composition is W: 80% and Cu: 20%, the thermal expansion coefficient of the spacer 4 is α3=7.6ppm / ℃~9ppm / ℃, and the thermal conductivity λ=200W / (m·K)~220W / (m·K), which satisfies the requirement of forming a gradient transition layer between the substrate 1 and the light emitting chip 2.
[0031] In some embodiments, the light emitting chip 2 can be made of GaAs material, and the thermal expansion coefficient of the light emitting chip 2 is α2=5.8ppm / ℃; or the light emitting chip 2 is made of InP material, and the thermal expansion coefficient of the light emitting chip 2 is α2=4.5ppm / ℃.
[0032] Correspondingly, the spacer 4 can be made of W-Cu alloy, when the material composition is W: 90%, Cu: 10%, the thermal expansion coefficient is α3 = 5.6 ppm / ℃ ~ 6.5 ppm / ℃, and the thermal conductivity λ = 180 W / (m·K) ~ 190 W / (m·K). At this time, the thermal expansion coefficient, the thermal conductivity and the electrical conductivity of the spacer 4 can all meet the use requirements.
[0033] In some embodiments, the spacer 4 can be made of Mo-Cu alloy, when the material composition is Mo: 70%, Cu: 30%, the thermal expansion coefficient is α3 = 6.5 ppm / ℃ ~ 7.5 ppm / ℃, and the thermal conductivity λ = 160 W / (m·K) ~ 200 W / (m·K). Alternatively, the spacer 4 is made of Cu-Mo-Cu laminated alloy, when the material composition ratio is Cu: Mo: Cu = 1: 1: 1, the thermal expansion coefficient is α3 = 8.8 ppm / ℃, and the thermal conductivity λ = 305 W / (m·K). Alternatively, the spacer 4 is made of Cu-Mo-Cu laminated alloy, when the material composition ratio is Cu: Mo: Cu = 1: 4: 1, the thermal expansion coefficient is α3 = 6.0 ppm / ℃, and the thermal conductivity λ = 220 W / (m·K).
[0034] In some embodiments, the spacer 4 can be made of Kovar alloy, when the material composition is Fe: 54%, Ni: 29%, Co: 17%, the thermal expansion coefficient is α3 = 6.0 ppm / ℃ ~ 6.4 ppm / ℃, but the thermal conductivity λ is slightly poor. Alternatively, the spacer 4 can be made of Fe-Ni42 alloy, when the material composition is Fe: 58%, Ni: 42%, the thermal expansion coefficient is α3 = 6.5 ppm / ℃ ~ 7.5 ppm / ℃, and the thermal conductivity λ is also slightly poor at this time.
[0035] As shown in Figure 2 , Figure 6 , the spacer 4 is provided with a conductive part 41 close to the substrate 1, the conductive part 41 is in contact with the substrate 1, and the spacer 4 is provided with a second side surface 42 away from the substrate 1, the second side surface 42 supports the light emitting chip 2; the surface area of the conductive part 41 is S1, and the area of the second side surface 42 is S2, which satisfies: S1≤S2. The second side surface 42 can provide a larger support area for accommodating two or more light emitting chips 2, and the surface area of the conductive part 41 is smaller, which is conducive to the precise wiring of the substrate 1 and saves the board space of the substrate 1.
[0036] Among them, along the first direction X, the orthogonal projection of the conductive part 41 is located in the middle of the second side surface 42, which ensures the structural stability of the spacer 4 on the substrate 1. In some embodiments, as shown in Figure 7As shown, the cushion block 4 is also provided with a support part 43 close to one side of the substrate 1, and the support part 43 is in contact with the substrate 1; in the first side surface 11, the support part 43 is arranged in a spaced manner with the conductive part 41, and the spacing between the support part 43 and the conductive part 41 forms a heat dissipation channel 44.
[0037] In the embodiment, as shown in the drawings, Figure 3 , Figure 5 The light emitting chip 2 has a first pole 22 and a second pole 23 opposite to each other along the first direction X, the first pole 22 is electrically connected with the cushion block 4, and the second pole 23 is electrically connected with the substrate 1 through a wire 45, and the wire 45 is arranged in a spaced manner with the cushion block 4, so as to ensure the reliable electrical connection between the light emitting chip 2 and the substrate 1.
[0038] As shown in the drawings, Figure 4 , Figure 5 The coplanar packaging structure of the optical sensor further comprises a transparent plastic packaging layer 5, a light shielding layer 6 and a light shielding wall 60, the transparent plastic packaging layer 5 is arranged on the first side surface 11 and covers the light emitting chip 2 and the light receiving chip 3; the light shielding layer 6 is arranged on the outer surface of the transparent plastic packaging layer 5, the light shielding layer 6 is provided with a light emitting window 61 corresponding to the light emitting area 21, and the light shielding layer 6 is provided with a light receiving window 62 corresponding to the light receiving area 31; the transparent plastic packaging layer 5 is provided with a separation groove 50 between the light emitting chip 2 and the light receiving chip 3, and the light shielding wall 60 is filled in the separation groove 50 and connected with the light shielding layer 6. The light shielding wall 60 can solve the problems of light signal leakage and crosstalk in the packaging structure.
[0039] In addition, the coplanar packaging structure of the optical sensor further comprises an ASIC chip 7, along the first direction X, the light receiving chip 3 is arranged in a spaced manner with the substrate 1, the ASIC chip 7 is arranged between the first side surface 11 and the light receiving chip 3, the light receiving chip 3 is used for converting the optical signal into an electrical signal, and the ASIC chip 7 is used for processing the electrical signal converted by the light receiving chip 3. In some embodiments, the ASIC chip 7 can be omitted, and the light receiving chip 3 is directly arranged on the first side surface 11 of the substrate 1.
[0040] The above only describes the preferred embodiments of the present application, and it should be pointed out that for ordinary skilled in the art, without departing from the technical principles of the present application, a number of improvements and replacements can be made, and these improvements and replacements should be considered as the protection scope of the present application.
Claims
1. A coplanar packaging structure for an optical sensor, having a first orientation, characterized in that, include: The substrate has a first side facing the first direction; A light-emitting chip is disposed on the side of the substrate near the first side surface, and the light-emitting chip is electrically connected to the substrate; along the first direction, the light-emitting chip and the first side surface are arranged at intervals. A light-collecting chip is disposed on the side of the substrate near the first side, and the light-collecting chip is electrically connected to the substrate; along the first direction, the orthographic projections of the light-collecting chip and the light-emitting chip are arranged at intervals on the first side. A spacer is disposed between the light-emitting chip and the substrate; the light-emitting chip has a light-emitting area away from the substrate, and the light-receiving chip has a light-receiving area away from the substrate. The light-emitting area and the light-receiving area are arranged on the same plane and are both parallel to the first side surface. Wherein, the coefficient of thermal expansion of the substrate is α1, the coefficient of thermal expansion of the light-emitting chip is α2, and the coefficient of thermal expansion of the pad is α3, where α1≥α3≥α2.
2. The coplanar packaging structure of the optical sensor according to claim 1, characterized in that, The thermal expansion coefficient of the substrate is α1 = 6ppm / ℃~10ppm / ℃, the thermal expansion coefficient of the light-emitting chip is α2 = 2ppm / ℃~6ppm / ℃, and the thermal expansion coefficient of the pad is α3 = 6ppm / ℃~9ppm / ℃.
3. The coplanar packaging structure of the optical sensor according to claim 2, characterized in that, The pad is made of any one of the following materials: W-Cu alloy, Mo-Cu alloy, Cu-Mo-Cu laminated alloy, Kovar alloy, and Fe-Ni42 alloy.
4. The coplanar packaging structure of the optical sensor according to claim 1, 2, or 3, characterized in that, The thermal conductivity of the pad is λ, which satisfies: λ≥150W / (m·K).
5. The coplanar packaging structure of the optical sensor according to claim 1, 2, or 3, characterized in that, The pad has a conductive part on the side close to the substrate, and the conductive part is in contact with the substrate. The pad has a second side surface on the side away from the substrate, and the second side surface supports the light-emitting chip. The surface area of the conductive part is S1, and the area of the second side surface is S2, satisfying: S1≤S2.
6. The coplanar packaging structure of the optical sensor according to claim 5, characterized in that, Along the first direction, the orthographic projection of the conductive part is located at the center of the second side surface.
7. The coplanar packaging structure of the optical sensor according to claim 6, characterized in that, The pad is also provided with a support portion on the side near the substrate, and the support portion is in contact with the substrate; in the first side, the support portion and the conductive portion are arranged at intervals, and the interval between the support portion and the conductive portion forms a heat dissipation channel.
8. The coplanar packaging structure of the optical sensor according to claim 1, 2, or 3, characterized in that, The light-emitting chip has a first electrode and a second electrode opposite to each other along the first direction. The first electrode is electrically connected to the pad, and the second electrode is electrically connected to the substrate through a wire, and the wire is arranged at intervals from the pad.
9. The coplanar packaging structure of the optical sensor according to claim 1, 2, or 3, characterized in that, The coplanar packaging structure of the optical sensor further includes a transparent molding layer, a light-shielding layer, and a light-shielding wall. The transparent molding layer is disposed on the first side and covers the light-emitting chip and the light-receiving chip. The light-shielding layer is disposed on the outer surface of the transparent plastic sealant layer, and the light-shielding layer has a light-emitting window corresponding to the light-emitting area and a light-receiving window corresponding to the light-receiving area; The transparent molding layer has an isolation groove between the light-emitting chip and the light-receiving chip, and the light-shielding wall fills the isolation groove and is connected to the light-shielding layer.
10. The coplanar packaging structure of the optical sensor according to claim 1, 2, or 3, characterized in that, The coplanar packaging structure of the optical sensor also includes an ASIC chip. Along the first direction, the light-receiving chip is arranged at a distance from the substrate, and the ASIC chip is disposed between the first side and the light-receiving chip.
Citation Information
Patent Citations
Optical sensor packages and devices
CN218334709U