Heterogeneous integrated electro-optical modulator and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, and discloses a heterogeneous integrated electro-optical modulator and a preparation method thereof, and the method comprises the steps: forming an initial first barrier layer on the inner wall of a first groove of an initial waveguide core wafer and the upper surface of a first dielectric layer; filling the remaining unfilled second groove with an electrode layer; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer; depositing an initial second barrier layer in the remaining unfilled third groove and on the surface of the first dielectric layer; removing the initial second barrier layer and the initial first barrier layer above the first dielectric layer to form a first barrier layer and a second barrier layer respectively; the first barrier layer coats the lower surface and the side surface of the electrode layer; the second barrier layer covers the upper surface of the electrode layer; the width of the second barrier layer is equal to that of the electrode layer; and forming a second dielectric layer above the first dielectric layer, and bonding an electro-optical material layer. According to the invention, the optical loss of the composite waveguide caused by electrode metal ion diffusion and the second barrier layer can be reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and specifically to a heterogeneous integrated electro-optic modulation device and its fabrication method. Background Technology

[0002] In related technologies, the fabrication of buried electrode layers in electro-optic modulators suffers from reduced compatibility with CMOS processes. When metal electrodes are formed using the damascus process, the distance between the waveguide core and the electro-optic material layer in heterogeneous integrated electro-optic modulators is relatively short to form a composite waveguide core. This results in a short distance (less than 100 nm) between the metal electrode and the electro-optic material layer, leading to the formation of a parasitic composite waveguide. This increases the optical propagation loss of the composite waveguide core. Furthermore, the presence of a barrier layer above the electrode inserts an uneven layer into the already thin interlayer coupling layer between the waveguide core and the electro-optic material layer, increasing the difficulty of controlling the thickness of the interlayer coupling layer. Additionally, the width of the barrier layer above the electrode is greater than the width of the electrode. This portion of the barrier layer extending beyond the electrode width increases the optical propagation loss of the waveguide core-electro-optic material layer composite waveguide. Increasing the electrode spacing to reduce the impact of parasitic composite waveguides on the composite waveguide reduces the modulation efficiency of the electro-optic modulator.

[0003] Therefore, a solution is needed to form a barrier layer above the electrode layer while reducing the impact of the barrier layer on the electro-optic modulation device, and to increase the chemical mechanical polishing process window of the interlayer coupling layer between the waveguide core and the electro-optic material layer, thereby reducing the process difficulty. Summary of the Invention

[0004] This invention provides a heterogeneous integrated electro-optic modulation device and its fabrication method, which solves the problems in related technologies where the distance between the barrier layer above the electrode and the electro-optic material layer is too close, which increases the light propagation loss of the composite waveguide core and reduces the modulation efficiency of the electro-optic modulation device, and the barrier layer above the electrode increases the polishing process difficulty of the interlayer coupling layer.

[0005] In a first aspect, the present invention provides a method for fabricating a heterogeneous integrated electro-optic modulation device, the method comprising: An initial waveguide core wafer is formed, which includes a first substrate, a lower cladding layer, a waveguide core, and a first dielectric layer stacked from bottom to top; the first dielectric layer covers the upper surface and side surface of the waveguide core. A plurality of first grooves are formed by openings on one side of the upper surface of the first dielectric layer. The first grooves are located on both sides of the waveguide core along its length. The first grooves penetrate the first dielectric layer and extend into part of the lower cladding. An initial first barrier layer is formed on the inner wall of the first groove and the upper surface of the first dielectric layer, and the remaining unfilled portion forms a second groove; An electrode layer is filled into the second groove; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer; the remaining unfilled portion forms a third groove. An initial second barrier layer is deposited within the third groove and on the surface of the first dielectric layer, and the initial second barrier layer also covers the upper surface of the electrode layer; the initial second barrier layer and the initial first barrier layer above the first dielectric layer are removed using a chemical mechanical polishing process; the remaining initial first barrier layer forms the first barrier layer; the remaining initial second barrier layer forms the second barrier layer; the first barrier layer covers the lower surface and side surface of the electrode layer; the second barrier layer covers the upper surface of the electrode layer; the first barrier layer covers the side portion of the second barrier layer; the width of the second barrier layer is equal to the width of the electrode layer. A second dielectric layer is formed above the first dielectric layer, and an electro-optic material layer is bonded to the side surface of the second dielectric layer facing away from the waveguide core; the electro-optic material layer corresponds to at least a portion of the waveguide core.

[0006] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention involves forming an initial first barrier layer on the inner wall of a first groove and the upper surface of a first dielectric layer, and filling the remaining unfilled second groove with an electrode layer; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer; a recessed structure (i.e., a third groove) relative to the first dielectric layer can be formed above the electrode, and then an initial second barrier layer is formed to fill the recessed structure. The first and second barrier layers, formed after chemical mechanical polishing, jointly cover the electrode layer, with the width of the second barrier layer equal to the width of the electrode layer; finally, a second dielectric layer is formed and an electro-optic material layer is bonded. On one hand, the formed first and second barrier layers can completely encapsulate the electrode layer and prevent the metal elements of the electrode layer from diffusing into the surrounding dielectric. Simultaneously, the width of the second barrier layer, equal to the width of the electrode layer, can confine the barrier layer at the top of the electrode within the electrode area, reducing the impact of the top barrier layer on the performance of the electro-optic modulation device. On the other hand, the upper surface of the second barrier layer is not higher than the upper surface of the first dielectric layer, meaning the second barrier layer above the electrode layer is completely located within the groove of the first dielectric layer. This reduces the difficulty of controlling the thickness of the subsequent second dielectric layer. Simultaneously, it increases the distance between the second barrier layer and the composite waveguide core formed by the waveguide core and the electro-optic material layer, reducing the optical propagation loss of the composite waveguide and avoiding a decrease in modulation efficiency of the electro-optic modulator caused by increasing the electrode spacing. Therefore, the second barrier layer formed by the fabrication method of the heterogeneous integrated electro-optic modulator provided by this invention is located within the length and width range of the electrode, which can reduce the optical loss of the waveguide core-electro-optic material layer composite waveguide, while also reducing the difficulty of controlling the thickness of the second dielectric layer and avoiding a decrease in the modulation efficiency of the electro-optic modulator.

[0007] In one alternative embodiment, in the step of depositing an initial second barrier layer in the third groove and on the surface of the first dielectric layer, the upper surface of the initial second barrier layer at the bottom of the third groove is higher than the upper surface of the first dielectric layer; the thickness of the initial second barrier layer is greater than the height difference between the upper surface of the first dielectric layer and the upper surface of the electrode layer. After the chemical mechanical polishing process, the upper surface of the second barrier layer is flush with the upper surface of the first dielectric layer; the top surface of the first barrier layer is flush with the upper surface of the first dielectric layer.

[0008] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by the present invention involves sequentially performing chemical mechanical polishing on the first and second blocking layers, which simplifies the process flow. Simultaneously, the upper surface of the second blocking layer is flush with the upper surface of the first dielectric layer, ensuring that the second blocking layer above the electrode layer is completely located within the groove of the first dielectric layer, reducing the difficulty of controlling the thickness of the subsequent second dielectric layer. Furthermore, the formed second blocking layer is located within the width of the electrode, which reduces the optical loss of the waveguide core-electro-optic material layer composite waveguide and prevents a decrease in the modulation efficiency of the electro-optic modulation device.

[0009] In one alternative embodiment, in the step of depositing an initial second barrier layer in the third groove and on the surface of the first dielectric layer, the upper surface of the initial second barrier layer at the bottom of the third groove is lower than the upper surface of the first dielectric layer; the thickness of the initial second barrier layer is less than the height difference between the upper surface of the first dielectric layer and the upper surface of the electrode layer. Following the step of depositing an initial second barrier layer within the third groove and on the surface of the first dielectric layer, the method further includes: An initial third dielectric layer is formed above the initial second barrier layer; the third dielectric layer fills the remaining third groove; The chemical mechanical polishing process also removes the initial third dielectric layer above the first dielectric layer, leaving the remaining initial third dielectric layer as the third dielectric layer; after the chemical mechanical polishing process, the upper surface of the third dielectric layer is flush with the upper surface of the first dielectric layer; the top surface of the first barrier layer is flush with the upper surface of the first dielectric layer; the top surface of the second barrier layer is flush with the upper surface of the first dielectric layer.

[0010] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention involves placing a third dielectric layer above a second blocking layer within a third groove. This third dielectric layer has a removal rate similar to that of the first dielectric layer, protecting the second blocking layer from excessive polishing and loss of its blocking effect. This improves the blocking effect of the first and second blocking layers on the electrode layer, thereby ensuring the performance of the electro-optic modulation device. Furthermore, the upper surface of the second blocking layer is lower than the upper surface of the first dielectric layer, which further reduces the optical loss of the waveguide core-electro-optic material layer composite waveguide.

[0011] In one optional embodiment, the height of the upper surface of the electrode layer below the upper surface of the first dielectric layer is 5 nm to 100 nm. The thickness of the second barrier layer is 2nm~50nm.

[0012] In one alternative embodiment, an electrode layer is filled within the second groove, comprising: An initial electrode layer is formed above the initial first barrier layer, and the initial electrode layer also fills a second groove; The initial metal layer outside the second groove is removed by chemical mechanical polishing, and an intermediate electrode layer is formed in the second groove; the upper surface of the intermediate electrode layer is flush with the upper surface of the initial first barrier layer. A portion of the intermediate electrode layer is etched, and the remaining intermediate electrode layer is the electrode layer; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer.

[0013] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention uses a first barrier layer as a stop layer during the chemical mechanical polishing process to form the intermediate electrode layer, thus avoiding damage to the first dielectric layer and the waveguide core. In the step of etching a portion of the intermediate electrode layer to form the third groove, the etching rate of the intermediate electrode layer is much higher than that of the first barrier layer. During the etching process, the initial first barrier layer can protect the first dielectric layer from damage. By etching the intermediate electrode layer after fabricating it using the Damascus process to form the electrode layer and the third groove above it, the upper surface of the second barrier layer can be kept no higher than the upper surface of the first dielectric layer. This increases the distance between the second barrier layer and the waveguide core, reduces the optical propagation loss of the composite waveguide core, and prevents a decrease in the modulation efficiency of the electro-optic modulation device.

[0014] In one optional embodiment, in the step of bonding the electro-optic material layer to the side surface of the second dielectric layer facing away from the waveguide core, the first dielectric layer and the second dielectric layer above the waveguide core serve as an interlayer coupling layer between the electro-optic material layer and the waveguide core. The thickness of the first dielectric layer above the waveguide core is the first thickness; the thickness of the second dielectric layer is the second thickness; The sum of the first and second thicknesses is 10nm~300nm.

[0015] In one alternative embodiment, the material of the first substrate is silicon; The material of the lower cladding layer is silicon dioxide; the material of the first dielectric layer is silicon dioxide; The material of the second dielectric layer includes silicon dioxide and / or aluminum oxide; The waveguide core has a structure of silicon nitride layer, silicon layer, silicon nitride / silicon dioxide stack, or silicon / silicon dioxide stack; The structure of the first barrier layer is one or more layers of titanium, titanium nitride, tantalum, or tantalum nitride. The structure of the second barrier layer is one or more layers of silicon nitride, titanium, titanium nitride, tantalum, or tantalum nitride. The electrode layer can be made of copper, aluminum, or tungsten. The materials for the electro-optic material layer include lithium niobate, barium titanate, or lithium tantalate.

[0016] In one optional embodiment, the distance between the upper surface of the waveguide core and the upper surface of the first dielectric layer is 0~200nm; The depth of the first groove is 0.2μm to 2μm, and the width of the first groove is 5μm to 200μm; The thickness of the first barrier layer is 5nm~100nm; The thickness of the electro-optic material layer is 100nm~500nm.

[0017] In a second aspect, the present invention provides a heterogeneous integrated electro-optic modulation device, which is fabricated by the method for fabricating the heterogeneous integrated electro-optic modulation device of the first aspect described above, comprising: The first substrate, lower cladding, waveguide core, and first dielectric layer are stacked from bottom to top; the first dielectric layer covers the upper surface and side surface of the waveguide core; Several electrode layers are located within a lower cladding layer of partial thickness and a first dielectric layer of partial thickness; the electrode layers are located on both sides of the waveguide core along its length. The first barrier layer covers the lower surface and sides of the electrode layer; The second barrier layer covers the upper surface of the electrode layer; the first barrier layer covers the side of the second barrier layer. The second dielectric layer is located above the first dielectric layer and covers the top surface of the first barrier layer and the second barrier layer; An electro-optic material layer is located on the surface of the second dielectric layer facing away from the waveguide core; the electro-optic material layer corresponds to at least a portion of the waveguide core.

[0018] In one alternative embodiment, the second barrier layer includes a middle region and an edge region; the thickness of the middle region is less than the thickness of the edge region; the upper surface of the middle region is lower than the upper surface of the edge region; and the first barrier layer covers the side portion of the edge region. It also includes: a third dielectric layer, located between the middle region of the second barrier layer and the second dielectric layer; the upper surface of the third dielectric layer is flush with the upper surface of the edge region; The second dielectric layer simultaneously covers the upper surface of the third dielectric layer, the top surface of the first barrier layer, and the upper surface of the edge region. Attached Figure Description

[0019] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 This is a schematic flowchart of a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 2 This is a schematic flowchart illustrating a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention. Figure 3 This is a schematic diagram of the waveguide core formed in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of the initial waveguide core wafer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure forming the first groove in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of forming the initial first blocking layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 7 This is a schematic diagram of the structure for forming the initial electrode layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 8 This is a schematic diagram of the structure for forming an intermediate electrode layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 9 This is a schematic diagram of the structure of the electrode layer formed in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 10 This is a schematic diagram of the structure of forming the initial second barrier layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 11 This is a schematic diagram of the structure for forming a second barrier layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 12 This is a schematic diagram of the structure for forming the second dielectric layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 13This is a schematic diagram of the structure of the bonding electro-optic material layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 14 This is a schematic flowchart illustrating another method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention. Figure 15 This is a schematic diagram of the structure of the electrode layer formed in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 16 This is a schematic diagram of the structure of forming the initial second barrier layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 17 This is a schematic diagram of the structure forming the initial third dielectric layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 18 This is a schematic diagram of the structure forming the third dielectric layer and the second barrier layer in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention; Figure 19 This is a schematic diagram of the structure in which a second dielectric layer is formed and an electro-optic material layer is bonded in a method for fabricating a heterogeneous integrated electro-optic modulation device according to an embodiment of the present invention.

[0021] Figure label: 10. First substrate; 11. Lower cladding layer; 12. Waveguide core; 13. First dielectric layer; 14. First barrier layer; 140. Initial first barrier layer; 15. Electrode layer; 150. Initial electrode layer; 151. Intermediate electrode layer; 16. Second barrier layer; 160. Initial second barrier layer; 17. Second dielectric layer; 18. Third dielectric layer; 180. Initial third dielectric layer; 22. Electro-optic material layer; 91. First groove; 92. Second groove; 93. Third groove. Detailed Implementation

[0022] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the invention and not all structures. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0023] In the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These drawings are not to scale, and some details are enlarged for clarity, and some details may be omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0024] In fields such as optical communication, optical computing, and optical sensing, phase modulation is fundamental to complex optical signal processing. Commonly used integrated photonics platforms, such as silicon and silicon nitride, lack sufficient electro-optic coefficients in their waveguide core materials, hindering the development of efficient electro-optic modulation devices. However, by heterogeneously integrating electro-optic material thin films (such as lithium niobate) with silicon or silicon nitride waveguide cores to form composite waveguide cores, and utilizing the excellent electro-optic properties of these thin films, low-power, high-frequency electro-optic modulation can be achieved on silicon and silicon nitride photonics platforms.

[0025] In existing electro-optic modulation devices, a pair of electrodes are typically placed on both sides of a composite waveguide core formed by a silicon or silicon nitride waveguide core and an electro-optic material thin film to provide the electric field required for electro-optic modulation. These electrodes can: ① be placed on top of the electro-optic material thin film. Since electro-optic material thin films, such as lithium niobate, are incompatible with CMOS process equipment, they are usually formed on the surface of the optical chip, and then the electrodes are fabricated on the electro-optic material thin film. ② be placed below the electro-optic material thin film. This allows the electro-optic material thin film to be bonded last after other optical components, electrodes, and interconnect structures have been fabricated, improving the CMOS process compatibility and integration of the entire optical chip. Furthermore, because the electrodes are pre-laid out, the electro-optic material thin film can even be bonded to grooves formed on the chip surface, forming a composite waveguide with the underlying waveguide core, reducing the insertion loss of the electro-optic modulation device.

[0026] Both of the above electrode placement methods have certain drawbacks. ① The electrode is placed on top of the electro-optic material film. On the one hand, the waveguide core, mainly distributed at the bottom layer, needs to undergo multiple interlayer couplings to reach the vicinity of the optical chip surface, forming a composite waveguide with the electro-optic material film, increasing the complexity of the device structure and optical loss. On the other hand, other processes after bonding the electro-optic material film, such as electrode fabrication, have reduced compatibility with CMOS processes. ② The electrode is placed below the electro-optic material film. The problem with this structure is that commonly used metal electrode materials usually need to be wrapped with a barrier layer to prevent metal diffusion (diffused metal ions will adversely affect electrical devices and optical losses). For example, in the Damascus copper interconnect process, tantalum nitride / tantalum is used at the bottom and sidewalls of the copper wire, and silicon nitride film is used at the top as a diffusion barrier layer. However, when the waveguide core and the electro-optic material layer form a composite waveguide core, the distance between them is very close (~100nm). If the top still uses a traditional silicon nitride film as a barrier layer, it will adversely affect the optical loss and / or modulation efficiency of the device. Especially when the waveguide core is made of low-optical-loss silicon nitride using low-pressure chemical vapor deposition, the metal electrodes cannot withstand the process temperature and must be formed after the silicon nitride waveguide core (e.g., using the damascus process). At this time, the distance between the metal electrodes and the electro-optic material layer is very small (<100nm). The silicon nitride blocking layer above the metal electrodes (even if patterned) will increase the optical propagation loss of the composite waveguide core and / or reduce the modulation efficiency of the electro-optic modulator (due to the increase in electrode spacing to reduce the optical propagation loss caused by the blocking layer). At the same time, it increases the process difficulty (requiring chemical mechanical polishing process to control the film thickness between the electro-optic material layer and the silicon nitride blocking layer).

[0027] In existing processes and structures, the fabrication method of placing the electrode under the electro-optic material thin film can employ copper interconnect technology. The fabrication process is as follows: ① A tantalum and tantalum nitride stack (a barrier layer below and on the sides of the electrode) and a copper plug or line (electrode) are formed within a groove in the silicon dioxide dielectric layer using a damascus process; ② A complete silicon nitride thin film is deposited on the silicon dioxide and copper plug / line as a barrier layer (corresponding to the barrier layer above the electrode in heterogeneous integrated electro-optic modulators); ③ A silicon dioxide thin film is deposited and patterned to form a groove exposing the copper plug / line; ④ Steps ① to ③ are repeated until the last copper plug / line is formed. When copper interconnect technology is used to fabricate heterogeneous integrated electro-optic modulation devices, the upper surface of the electrode is usually flush with the surface of the silicon dioxide dielectric layer. Even if the top barrier layer of the electrode is patterned, in order for the top barrier layer of the electrode to have a blocking effect, and due to the limitations of the alignment accuracy and overlay deviation of the photolithography process, the top barrier layer of the electrode should be wider and longer than the electrode. At this time, the part of the top barrier layer of the electrode that exceeds the width of the electrode will increase the optical propagation loss of the composite waveguide composed of the waveguide core and the electro-optic material layer. If the top barrier layer of the electrode is made of conductive materials such as titanium, titanium nitride, tantalum, or tantalum nitride, it will cause significant optical absorption loss, thereby increasing the optical propagation loss of the composite waveguide. If the top barrier layer of the electrode is made of insulating materials such as silicon nitride, its refractive index is greater than that of the silicon dioxide cladding and may be similar to that of the waveguide core (when the waveguide core material is also silicon nitride). Furthermore, the top barrier layer is very close to the electro-optic material layer, forming a parasitic composite waveguide. This increases the propagation loss of the adjacent waveguide core-electro-optic material layer composite waveguide. Increasing the electrode spacing to reduce the propagation loss caused by the parasitic composite waveguide will reduce the modulation efficiency of the electro-optic modulation device.

[0028] In summary, the fabrication of buried electrode layers in conventional electro-optic modulators suffers from reduced compatibility with CMOS processes. When metal electrodes are formed using the damascus process, the proximity between the waveguide core and the electro-optic material layer in heterogeneous integrated electro-optic modulators, designed to form a composite waveguide core, results in a similarly close distance (less than 100 nm) between the metal electrode and the electro-optic material layer. This leads to an even smaller distance between the silicon nitride blocking layer above the metal electrode and the electro-optic material layer, forming a parasitic composite waveguide. This increases the optical propagation loss of the composite waveguide core or reduces the modulation efficiency of the electro-optic modulator. The blocking layer above the electrode inserts an uneven layer into the already thin interlayer coupling layer between the waveguide core and the electro-optic material layer, increasing the fabrication difficulty of the interlayer coupling layer. Furthermore, the width of the blocking layer above the electrode is greater than the width of the electrode. This portion of the blocking layer extending beyond the electrode width increases the optical propagation loss of the waveguide core-electro-optic material layer composite waveguide or reduces the modulation efficiency of the electro-optic modulator.

[0029] Therefore, a solution is needed to form a barrier layer above the electrode layer while reducing the impact of the barrier layer on the electro-optic modulation device, and to increase the chemical mechanical polishing process window of the interlayer coupling layer between the waveguide core and the electro-optic material layer, thereby reducing the process difficulty.

[0030] like Figure 1 As shown, this embodiment provides a method for fabricating a heterogeneous integrated electro-optic modulation device, which includes, but is not limited to, steps S101 to S106.

[0031] Step S101: Provide an initial waveguide core wafer, which includes a first substrate 10, a lower cladding layer 11, a waveguide core 12, and a first dielectric layer 13 stacked from bottom to top; the first dielectric layer 13 covers the upper surface and sides of the waveguide core 12, such as... Figure 4 As shown.

[0032] In step S102, a plurality of first grooves 91 are formed by opening on one side of the upper surface of the first dielectric layer 13. The first grooves 91 are located on both sides of the waveguide core 12 along its length. The first grooves 91 penetrate the first dielectric layer 13 and extend into part of the lower cladding layer 11, such as... Figure 5 As shown.

[0033] In step S103, an initial first barrier layer 140 is formed on the inner wall of the first groove 91 and the upper surface of the first dielectric layer 13, and the remaining unfilled portion forms a second groove 92, as shown below. Figure 6 As shown.

[0034] In step S104, the electrode layer 15 is filled into the second groove 92; the upper surface of the electrode layer 15 is lower than the upper surface of the first dielectric layer 13; the remaining unfilled portion forms the third groove 93, as shown below. Figure 9 As shown.

[0035] In step S105, an initial second barrier layer 160 is deposited within the third groove 93 and on the surface of the first dielectric layer 13. The initial second barrier layer 160 also covers the upper surface of the electrode layer 15, such as... Figure 10 As shown; the initial second barrier layer 160 and the initial first barrier layer 140 above the first dielectric layer 13 are removed using a chemical mechanical polishing process; the remaining initial first barrier layer 140 forms the first barrier layer 14; the remaining initial second barrier layer 160 forms the second barrier layer 16; the first barrier layer 14 covers the lower surface and side surface of the electrode layer 15; the second barrier layer 16 covers the upper surface of the electrode layer 15; the first barrier layer 14 covers the side portion of the second barrier layer 16; the width of the second barrier layer 16 is equal to the width of the electrode layer 15, as shown. Figure 11 As shown.

[0036] Step S106: A second dielectric layer 17 is formed above the first dielectric layer 13, and an electro-optic material layer 22 is bonded to the surface of the second dielectric layer 17 facing away from the waveguide core 12; the electro-optic material layer 22 corresponds at least to a portion of the waveguide core 12, such as... Figure 12 and Figure 13 As shown.

[0037] In specific implementation, by providing the first barrier layer 14, the metal elements within the electrode layer 15 can be prevented from diffusing from below and to the sides of the electrode layer 15 into the surrounding dielectric layer at the deposition temperature of subsequent film layers, thus preventing any impact on the performance of electrical and optical devices. By providing the second barrier layer 16, the metal elements within the electrode layer 15 can be prevented from diffusing from above the electrode into the surrounding dielectric layer at the deposition temperature of subsequent film layers, thus preventing any impact on the performance of electrical and optical devices.

[0038] In related technologies, the top barrier layer of the electrode is located entirely above the first dielectric layer 13, occupying part of the thickness space from the electro-optic material layer 22 to the waveguide core 12, which increases the difficulty of controlling the thickness of the second dielectric layer 17 through chemical mechanical polishing.

[0039] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention involves forming an initial first barrier layer on the inner wall of a first groove and the upper surface of a first dielectric layer, and filling the remaining unfilled second groove with an electrode layer; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer; a recessed structure (i.e., a third groove) relative to the first dielectric layer can be formed above the electrode, and then an initial second barrier layer is formed to fill the recessed structure. The first and second barrier layers, formed after chemical mechanical polishing, jointly cover the electrode layer, with the width of the second barrier layer equal to the width of the electrode layer; finally, a second dielectric layer is formed and an electro-optic material layer is bonded. On one hand, the formed first and second barrier layers can completely encapsulate the electrode layer and prevent the metal elements of the electrode layer from diffusing into the surrounding dielectric. Simultaneously, by making the width of the second barrier layer equal to the width of the electrode layer, the barrier layer at the top of the electrode can be confined within the electrode area, reducing the impact of the top barrier layer on the performance of the electro-optic modulation device. On the other hand, the upper surface of the second barrier layer is not higher than the upper surface of the first dielectric layer, meaning the second barrier layer above the electrode layer is completely located within the groove of the first dielectric layer. This reduces the difficulty of controlling the thickness of the subsequent second dielectric layer. Simultaneously, it increases the distance between the second barrier layer and the waveguide core, reducing the optical propagation loss of the composite waveguide core and preventing a decrease in the modulation efficiency of the electro-optic modulator. Therefore, the second barrier layer formed by the fabrication method of the heterogeneous integrated electro-optic modulator provided by this invention is located within the length and width range of the electrode, which can reduce the optical loss of the waveguide core-electro-optic material layer composite waveguide, while also reducing the difficulty of controlling the thickness of the second dielectric layer and preventing a decrease in the modulation efficiency of the electro-optic modulator.

[0040] In some alternative embodiments, after the chemical mechanical polishing process, the top surface of the first barrier layer 14 is flush with the upper surface of the first dielectric layer 13. Specifically, the first barrier layer 14 includes a central portion located at the bottom of the first groove 91 and an edge portion located on the sidewall of the first groove 91. Here, the top surface of the first barrier layer 14 refers to the upper surface of the edge portion of the first barrier layer 14.

[0041] In some alternative embodiments, a second dielectric layer 17 is formed above the first dielectric layer 13. This includes: first forming a relatively thick initial second dielectric layer 17, and then polishing and thinning the second dielectric layer 17 by chemical mechanical polishing (CMP) to control the surface roughness of the second dielectric layer 17 to meet the bonding requirements and the thickness to a second thickness. Since the upper surfaces of the first dielectric layer 13 and the second barrier layer 16 have been flush with each other by CMP, the process difficulty of controlling the thickness of the second dielectric layer 17 by CMP is reduced.

[0042] In some alternative implementations, such as Figure 10 As shown, in the step of depositing the initial second barrier layer 160 in the third groove 93 and on the surface of the first dielectric layer 13, the upper surface of the initial second barrier layer 160 at the bottom of the third groove 93 is higher than the upper surface of the first dielectric layer 13; the thickness of the initial second barrier layer 160 is greater than the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15. After chemical mechanical polishing, the upper surface of the second barrier layer 16 is flush with the upper surface of the first dielectric layer 13, and the top surface of the first barrier layer 14 is flush with the upper surface of the first dielectric layer 13, as shown below. Figure 11 As shown. Ultimately, the upper surface of the second barrier layer 16, the top surface of the first barrier layer 14, and the upper surface of the first dielectric layer 13 are on the same plane.

[0043] In specific implementation, such as Figure 10 As shown, the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15 is the depth of the third groove 93. The initial thickness of the second barrier layer 160 is greater than the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15, that is, the initial thickness of the second barrier layer 160 is greater than the depth of the third groove 93; that is, the initial second barrier layer 160 completely fills the third groove 93.

[0044] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention involves sequentially performing chemical mechanical polishing on the first and second blocking layers, which simplifies the process flow. Simultaneously, the upper surface of the second blocking layer is flush with the upper surface of the first dielectric layer, ensuring that the second blocking layer above the electrode layer is completely located within the groove of the first dielectric layer, reducing the difficulty of controlling the thickness of the subsequent second dielectric layer. Furthermore, the formed second blocking layer is located within the width of the electrode, which reduces the optical loss of the waveguide core-electro-optic material layer composite waveguide, while also reducing the difficulty of controlling the thickness of the second dielectric layer and preventing a decrease in the modulation efficiency of the electro-optic modulation device.

[0045] In some alternative embodiments, the height of the upper surface of the electrode layer 15 below the upper surface of the first dielectric layer 13 is 5 nm to 100 nm; the depth of the third groove 93 is 5 nm to 100 nm.

[0046] In practice, ideally, chemical mechanical polishing stops at the first dielectric layer 13, and the thickness of the second barrier layer 16 above the electrode is equal to the height of the electrode's depression relative to the first dielectric layer 13 (5~100nm). In reality, chemical mechanical polishing also removes a small amount of the first dielectric layer 13, resulting in the thickness of the second barrier layer 16 above the electrode being less than the initial height of the electrode's depression relative to the first dielectric layer 13 (5~100nm).

[0047] In some alternative implementations, such as Figure 16 As shown, in the step of depositing the initial second barrier layer 160 in the third groove 93 and on the surface of the first dielectric layer 13, the upper surface of the initial second barrier layer 160 at the bottom of the third groove 93 is lower than the upper surface of the first dielectric layer 13; the thickness of the initial second barrier layer 160 is less than the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15. Following the step of depositing the initial second barrier layer 160 within the third groove 93 and on the surface of the first dielectric layer 13, the method further includes: An initial third dielectric layer 180 is formed above the initial second barrier layer 160; the third dielectric layer 180 fills the remaining third groove 93, as shown. Figure 17 As shown; The chemical mechanical polishing process also removes the initial third dielectric layer 180 above the first dielectric layer 13, leaving the remaining initial third dielectric layer 180 to form the third dielectric layer 18. After the chemical mechanical polishing process, the upper surface of the third dielectric layer 18 is flush with the upper surface of the first dielectric layer 13, the top surface of the first barrier layer 14 is flush with the upper surface of the first dielectric layer 13, and the top surface of the second barrier layer 16 is flush with the upper surface of the first dielectric layer 13. Figure 18 As shown.

[0048] In some alternative embodiments, after a chemical mechanical polishing process, the top surface of the second barrier layer 16 is flush with the upper surface of the first dielectric layer 13. The second barrier layer 16 includes a central region and an edge region; the thickness of the central region is less than the thickness of the edge region; the upper surface of the central region is lower than the upper surface of the edge region; the first barrier layer 14 covers the sides of the edge region; here, the top surface of the second barrier layer 16 refers to the upper surface of the edge region. Finally, the upper surface of the third dielectric layer 18, the top surface of the first barrier layer 14, the top surface of the second barrier layer 16, and the upper surface of the first dielectric layer 13 are all located in the same plane.

[0049] In specific implementation, such as Figure 16 As shown, the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15 is the depth of the third groove 93. The thickness of the initial second barrier layer 160 is less than the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15, that is, the thickness of the initial second barrier layer 160 at the bottom of the third groove 93 is less than the depth of the third groove 93, and the initial second barrier layer 160 does not completely fill the third groove 93.

[0050] When removing the initial second barrier layer 160 and the initial first barrier layer 140 above the first dielectric layer 13 using chemical mechanical polishing, a certain degree of over-polishing is usually performed to completely remove the initial second barrier layer 160 and the initial first barrier layer 140 outside the groove. When the electrode is wide and the removal rate of the second barrier layer 16 is faster than that of the first dielectric layer 13, the surface of the polishing pad deforms under pressure. Continuing to polish and remove the second barrier layer 16 within the groove creates a depression. The thickness of the second barrier layer 16 located at the center of the electrode is less than that located at the edge of the electrode. In some cases, the second barrier layer 16 at the center of the electrode may be completely removed, exposing the electrode, thus weakening or even eliminating the blocking effect of the second barrier layer 16. Therefore, adding a third dielectric layer 18 above the second barrier layer 16 at the third groove 93 can prevent the second barrier layer 16 above the electrode from becoming depressed due to excessive chemical mechanical polishing, thus reducing its thickness or even exposing the electrode and losing its blocking effect.

[0051] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention involves placing a third dielectric layer above a second blocking layer within a third groove. This third dielectric layer has a removal rate similar to that of the first dielectric layer, protecting the second blocking layer from excessive polishing and loss of its blocking effect. This improves the blocking effect of the first and second blocking layers on the electrode layer, thereby ensuring the performance of the electro-optic modulation device. Furthermore, the upper surface of the second blocking layer is lower than the upper surface of the first dielectric layer, which further reduces the optical loss of the waveguide core-electro-optic material layer composite waveguide.

[0052] In some alternative implementations, such as Figure 12As shown, in the step of forming the second dielectric layer 17 above the first dielectric layer 13, the second dielectric layer 17 also covers the upper surface of the third dielectric layer 18.

[0053] In some optional embodiments, the height of the upper surface of the electrode layer 15 below the upper surface of the first dielectric layer 13 is 5nm to 100nm; that is, the height of the upper surface of the electrode layer 15 below the upper surface of the first dielectric layer 13 is 5nm to 100nm; and the thickness of the second barrier layer 16 is 2nm to 50nm.

[0054] In some alternative embodiments, the second groove 92 is filled with an electrode layer 15, including: An initial electrode layer 150 is formed above the initial first barrier layer 140, and the initial electrode layer 150 is also filled with a second groove 92, such as Figure 7 As shown; The initial metal layer outside the second groove 92 is removed by a chemical mechanical polishing process, and an intermediate electrode layer 151 is formed within the second groove 92; the upper surface of the intermediate electrode layer 151 is flush with the upper surface of the initial first barrier layer 140, such as... Figure 8 As shown; The etched portion of the intermediate electrode layer 151 forms a third groove 93, and the remaining intermediate electrode layer 151 is the electrode layer 15; the upper surface of the electrode layer 15 is lower than the upper surface of the first dielectric layer 13, such as... Figure 9 As shown.

[0055] The method for fabricating a heterogeneous integrated electro-optic modulation device provided by this invention uses a first barrier layer as a stop layer during the chemical mechanical polishing process to form the intermediate electrode layer, thus avoiding damage to the first dielectric layer and the waveguide core. In the step of etching a portion of the intermediate electrode layer to form the third groove, the etching rate of the intermediate electrode layer is much higher than that of the first barrier layer. During the etching process, the initial first barrier layer can protect the first dielectric layer from damage. By etching the intermediate electrode layer after fabricating it using the Damascus process to form the electrode layer and the third groove above it, the upper surface of the second barrier layer can be kept no higher than the upper surface of the first dielectric layer. This increases the distance between the second barrier layer and the waveguide core, reduces the optical propagation loss of the composite waveguide core, and prevents a decrease in the modulation efficiency of the electro-optic modulation device.

[0056] In some alternative embodiments, the electrode layer 15 is made of copper; The step of etching the intermediate electrode layer 151 of a certain thickness includes: The intermediate electrode layer 151 is etched cyclically using the following process: the surface of the electrode layer 15 is oxidized with hydrogen peroxide at a mass fraction of 1% to 5%; it is then cleaned with deionized water; the oxidized surface of the electrode layer 15 is removed with an acid solution at a mass fraction of 0.01% to 1%; and finally cleaned with deionized water.

[0057] In some optional embodiments, in the step of bonding the electro-optic material layer 22 to the side surface of the second dielectric layer 17 facing away from the waveguide core 12, the first dielectric layer 13 above the waveguide core 12 and the second dielectric layer 17 serve as an interlayer coupling layer between the electro-optic material layer 22 and the waveguide core 12. The thickness of the first dielectric layer 13 above the waveguide core 12 is the first thickness; the thickness of the second dielectric layer 17 is the second thickness; The sum of the first and second thicknesses is 10nm~300nm.

[0058] In some alternative embodiments, the material of the first substrate 10 is silicon; The material of the lower cladding layer 11 is silicon dioxide; the material of the first dielectric layer 13 is silicon dioxide; The material of the second dielectric layer 17 includes silicon dioxide and / or aluminum oxide; The waveguide core 12 has a structure of silicon nitride layer, silicon layer, silicon nitride / silicon dioxide stack, or silicon / silicon dioxide stack; The structure of the first barrier layer 14 is one or a stack of titanium, titanium nitride, tantalum, and tantalum nitride. The structure of the second barrier layer 16 is one or a stack of silicon nitride, titanium, titanium nitride, tantalum, and tantalum nitride. The electrode layer 15 may be made of copper, aluminum, or tungsten. The electro-optic material layer 22 is made of lithium niobate, barium titanate, or lithium tantalate.

[0059] In some optional embodiments, the thickness of the lower cladding 11 is 2 μm to 20 μm; The distance between the upper surface of the waveguide core 12 and the upper surface of the first dielectric layer 13 is 0~200nm; The depth of the first groove 91 is 0.2μm~2μm, and the width of the first groove 91 is 5μm~200μm; The height of the upper surface of the electrode layer 15 below the upper surface of the first dielectric layer 13 is 5nm~100nm; The thickness of the first barrier layer 14 is 5nm~100nm; The thickness of the electro-optic material layer 22 is 100nm~500nm.

[0060] In some alternative embodiments, the height of the upper surface of the electrode layer 15 below the upper surface of the first dielectric layer 13 is 5 nm to 100 nm.

[0061] In some optional embodiments, bonding the electro-optic material layer 22 to the side surface of the second dielectric layer 17 facing away from the waveguide core 12 includes: providing an electro-optic material chip; the electro-optic material chip including a stacked second substrate, a buried layer, and the electro-optic material layer 22; bonding the electro-optic material chip to the side surface of the second dielectric layer 17 facing away from the waveguide core 12; the first dielectric layer 13 and the second dielectric layer 17 serving as interlayer coupling layers between the electro-optic material layer 22 and the waveguide core 12; the projection of the electro-optic material layer 22 on the first substrate 10 partially overlapping the projection of the waveguide core 12 on the first substrate 10; and removing the second substrate.

[0062] In some alternative embodiments, the fabrication method further includes: forming a pad window by opening a window on the surface of the electrode layer 15 facing away from the first substrate, the pad window being located on the side of the electro-optic material layer 22.

[0063] Example 1 like Figure 2 As shown, the present invention also provides a detailed flowchart of a method for fabricating a heterogeneous integrated electro-optic modulation device, including but not limited to steps S201 to S210.

[0064] Step S201: Provide an initial waveguide core wafer, which includes a first substrate 10, a lower cladding layer 11, a waveguide core 12, and a first dielectric layer 13 stacked from bottom to top; the first dielectric layer 13 covers the upper surface and sides of the waveguide core 12, such as... Figure 4 As shown.

[0065] In specific implementation, the initial waveguide core wafer is formed in the following ways: First, as... Figure 3 As shown, a lower cladding layer 11 and an initial waveguide core layer are formed on the first substrate 10, and the initial waveguide core layer is patterned to form a waveguide core 12; then as shown... Figure 4 As shown, a first dielectric layer 13 is formed on the surface of the lower cladding layer 11, and the first dielectric layer 13 also covers the waveguide core 12, and the first dielectric layer 13 is planarized. The material of the first substrate 10 can be silicon or the like; the material of the lower cladding layer 11 can be silicon dioxide or the like, and the thickness of the lower cladding layer 11 is 2μm to 20μm; the material of the waveguide core 12 can be a single layer of silicon nitride, silicon, or a stack of silicon dioxide; the material of the first dielectric layer 13 can be silicon dioxide; the distance from the upper surface of the waveguide core 12 to the upper surface of the first dielectric layer 13 is 0 to 200 nm.

[0066] In step S202, a plurality of first grooves 91 are formed by opening on one side of the upper surface of the first dielectric layer 13. The first grooves 91 are located on both sides of the waveguide core 12 along its length. The first grooves 91 penetrate the first dielectric layer 13 and extend into part of the lower cladding layer 11, such as... Figure 5 As shown.

[0067] In specific implementation, the depth of the first groove 91 is 0.2μm to 2μm, and the width of the first groove 91 is 5μm to 200μm. The spacing between the first grooves 91 is set according to requirements; in some examples, the spacing between adjacent sidewalls of two grooves can be 4μm to 10μm.

[0068] In step S203, an initial first barrier layer 140 is formed on the inner wall of the first groove 91 and the upper surface of the first dielectric layer 13, and the remaining unfilled portion forms a second groove 92, as shown below. Figure 6 As shown.

[0069] In specific implementation, the initial first barrier layer 140 has a structure of one or more layers of titanium, titanium nitride, tantalum, or tantalum nitride. The thickness of the initial first barrier layer 140 is 5 nm to 100 nm.

[0070] Step S204: An initial electrode layer 150 is formed on the surface of the initial first barrier layer 140, and the initial electrode layer 150 also fills the second groove 92, such as... Figure 7 As shown.

[0071] In specific implementations, the initial electrode layer 150 may be made of copper, aluminum, or tungsten. In some examples, the initial electrode layer 150 may be made of copper. The upper surface of the initial electrode layer 150 is higher than the upper surface of the initial first barrier layer 140.

[0072] Step S205: The initial metal layer outside the second groove 92 is removed by chemical mechanical polishing, forming an intermediate electrode layer 151 within the second groove 92; the upper surface of the intermediate electrode layer 151 is flush with the upper surface of the initial first barrier layer 140, as shown below. Figure 8 As shown.

[0073] In practice, the first barrier layer 14 outside the second groove 92 can protect the first dielectric layer 13, and can also be used as a protective layer for the next etching step.

[0074] In step S206, a portion of the intermediate electrode layer 151 is etched to form a third groove 93, and the remaining intermediate electrode layer 151 forms the electrode layer 15; the upper surface of the electrode layer 15 is lower than the upper surface of the first dielectric layer 13, such as... Figure 9 As shown.

[0075] In specific implementation, the height of the upper surface of the electrode layer 15 below the upper surface of the first dielectric layer 13 is 5nm to 100nm, that is, the depth of the third groove 93 is 5nm to 100nm. In some examples, the material of the electrode layer 15 is copper; the intermediate electrode layer 151 is etched cyclically using the following process: the surface layer of the electrode layer 15 is oxidized with hydrogen peroxide at a mass fraction of 1% to 5%; it is then rinsed with deionized water; the oxidized surface layer of the electrode layer 15 is removed with an acid solution at a mass fraction of 0.01% to 1%; and finally, it is rinsed with deionized water. By controlling the thickness of the etching removal through multiple cycles, the thickness of the remaining electrode layer 15 is controlled.

[0076] In step S207, an initial second barrier layer 160 is deposited within the third groove 93 and on the surface of the first dielectric layer 13. The initial second barrier layer 160 also covers the upper surface of the electrode layer 15. The upper surface of the initial second barrier layer 160 at the bottom of the third groove 93 is higher than the upper surface of the first dielectric layer 13. The thickness of the initial second barrier layer 160 is greater than the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15. Figure 10 As shown.

[0077] In specific implementation, the material of the initial second barrier layer 160 can be silicon nitride, titanium, titanium nitride, tantalum, tantalum nitride, or a stack thereof. The thickness of the initial second barrier layer 160 is greater than the depth of the third groove 93, that is, the initial second barrier layer 160 completely fills the third groove 93.

[0078] Step S208: A chemical mechanical polishing process is used to remove the initial second barrier layer 160 and the initial first barrier layer 140 above the first dielectric layer 13. The remaining initial first barrier layer 140 forms the first barrier layer 14, and the remaining initial second barrier layer 160 forms the second barrier layer 16. The upper surface of the second barrier layer 16 and the top surface of the first barrier layer 14 are flush with the upper surface of the first dielectric layer 13. The first barrier layer 14 covers the lower surface and side surfaces of the electrode layer 15. The second barrier layer 16 covers the upper surface of the electrode layer 15. The first barrier layer 14 covers the side of the second barrier layer 16. The width of the second barrier layer 16 is equal to the width of the electrode layer 15. Figure 11 As shown.

[0079] In practice, after the chemical mechanical polishing process, the upper surface of the second barrier layer 16 is flush with the upper surface of the first barrier layer 14, and together they cover the electrode layer 15.

[0080] Step S209: A second dielectric layer 17 is formed above the first dielectric layer 13, such as... Figure 12 As shown.

[0081] In specific implementation, the material of the second dielectric layer 17 is silicon dioxide, aluminum oxide, or a combination thereof; the first dielectric layer 13 and the second dielectric layer 17 above the waveguide core 12 serve as an interlayer coupling layer between the electro-optic material layer 22 and the waveguide core 12. The sum of the first thickness and the second thickness is 10 nm to 300 nm, meaning the sum of the thicknesses of the first dielectric layer 13 and the second dielectric layer 17 above the waveguide core 12 is 10 nm to 300 nm.

[0082] Step S210: The electro-optic material layer 22 is bonded to the surface of the second dielectric layer 17 facing away from the waveguide core 12; the electro-optic material layer 22 corresponds at least to a portion of the waveguide core 12, such as... Figure 13 As shown.

[0083] In specific implementation, the material of the electro-optic material layer 22 can be lithium niobate, barium titanate, and lithium tantalate, etc., and the thickness of the electro-optic material layer 22 is 100nm~500nm.

[0084] Example 2 like Figure 14 As shown, the present invention also provides a specific flowchart of another method for fabricating a heterogeneous integrated electro-optic modulation device, including but not limited to steps S301 to S311.

[0085] Steps S301 to S306 are the same as steps S201 to S206, and will not be described again here. The resulting electrode upper surface is lower than the upper surface of the first dielectric layer 13, as shown in the following structure. Figure 15 As shown.

[0086] In step S307, an initial second barrier layer 160 is deposited within the third groove 93 and on the surface of the first dielectric layer 13. The initial second barrier layer 160 also covers the upper surface of the electrode layer 15. The upper surface of the initial second barrier layer 160 at the bottom of the third groove 93 is lower than the upper surface of the first dielectric layer 13. The thickness of the initial second barrier layer 160 is less than the height difference between the upper surface of the first dielectric layer 13 and the upper surface of the electrode layer 15. Figure 16 As shown.

[0087] In specific implementation, the material of the initial second barrier layer 160 can be silicon nitride, titanium, titanium nitride, tantalum, tantalum nitride, or a stack thereof. The thickness of the initial second barrier layer 160 is less than the depth of the third groove 93, that is, the initial second barrier layer 160 does not completely fill the third groove 93.

[0088] Step S308: An initial third dielectric layer 180 is formed above the initial second barrier layer 160; the initial third dielectric layer 180 fills the remaining third groove 93, as shown. Figure 17 As shown.

[0089] In practice, the material of the initial third dielectric layer 180 is silicon dioxide.

[0090] Step S309: A chemical mechanical polishing process is used to remove the initial third dielectric layer 180, the initial second barrier layer 160, and the initial first barrier layer 140 above the first dielectric layer 13. The remaining initial third dielectric layer 180 forms the third dielectric layer 18, the remaining initial first barrier layer 140 forms the first barrier layer 14, and the remaining initial second barrier layer 160 forms the second barrier layer 16. The upper surface of the third dielectric layer 18, the top surface of the first barrier layer 14, and the top surface of the second barrier layer 16 are all flush with the upper surface of the first dielectric layer 13. The first barrier layer 14 covers the lower surface and side surfaces of the electrode layer 15. The second barrier layer 16 covers the upper surface of the electrode layer 15. The first barrier layer 14 covers the side of the second barrier layer 16. The width of the second barrier layer 16 is equal to the width of the electrode layer 15. Figure 18 As shown.

[0091] In practice, after the chemical mechanical polishing process, the upper surface of the second barrier layer 16 is flush with the upper surface of the first barrier layer 14, and together they cover the electrode layer 15.

[0092] In step S310, a second dielectric layer 17 is formed above the first dielectric layer 13, and the second dielectric layer 17 also covers the upper surface of the third dielectric layer 18, such as... Figure 19 As shown.

[0093] In specific implementation, the material of the second dielectric layer 17 is silicon dioxide, aluminum oxide, or a combination thereof; the first dielectric layer 13 and the second dielectric layer 17 above the waveguide core 12 serve as an interlayer coupling layer between the electro-optic material layer 22 and the waveguide core 12. The sum of the first thickness and the second thickness is 10 nm to 300 nm, meaning the sum of the thicknesses of the first dielectric layer 13 and the second dielectric layer 17 above the waveguide core 12 is 10 nm to 300 nm.

[0094] Step S311: The electro-optic material layer 22 is bonded to the surface of the second dielectric layer 17 facing away from the waveguide core 12; the electro-optic material layer 22 corresponds at least to a portion of the waveguide core 12, such as... Figure 19 As shown.

[0095] The implementation method of step S311 is the same as that of step S210, and will not be described again here.

[0096] The present invention also provides a heterogeneous integrated electro-optic modulation device, such as Figure 13 As shown, the heterogeneous integrated electro-optic modulation device is fabricated using the above-described method, comprising: The first substrate 10, the lower cladding layer 11, the waveguide core 12 and the first dielectric layer 13 are stacked from bottom to top; the first dielectric layer 13 covers the upper surface and the side surface of the waveguide core 12. Several electrode layers 15 are located within a partial thickness of the lower cladding layer 11 and a partial thickness of the first dielectric layer 13; the electrode layers 15 are located on both sides of the waveguide core 12 along its length. The first barrier layer 14 covers the lower surface and side surface of the electrode layer 15; The second barrier layer 16 covers the upper surface of the electrode layer 15; the first barrier layer 14 covers the side of the second barrier layer 16. The second dielectric layer 17 is located above the first dielectric layer 13 and covers the top surface of the first barrier layer 14 and the second barrier layer 16. The electro-optic material layer 22 is located on the side surface of the second dielectric layer 17 facing away from the waveguide core 12; the electro-optic material layer 22 corresponds to at least a portion of the waveguide core 12.

[0097] In some alternative implementations, such as Figure 19 As shown, the second barrier layer 16 includes a middle region and an edge region; the thickness of the middle region is less than the thickness of the edge region; the upper surface of the middle region is lower than the upper surface of the edge region; the first barrier layer 14 covers the side of the edge region; It also includes: a third dielectric layer 18, located between the middle region of the second barrier layer 16 and the second dielectric layer 17; the upper surface of the third dielectric layer 18 is flush with the upper surface of the edge region; The second dielectric layer 17 simultaneously covers the upper surface of the third dielectric layer 18, the top surface of the first barrier layer 14, and the upper surface of the edge region.

[0098] In the description of this specification, the references to terms such as "this embodiment," "an embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0099] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0100] The above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described above, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of protection of the present invention is determined by the scope of the appended claims.

Claims

1. A method for fabricating a heterogeneous integrated electro-optic modulation device, characterized in that, The preparation method includes: An initial waveguide core wafer is provided, the initial waveguide core wafer comprising a first substrate, a lower cladding layer, a waveguide core, and a first dielectric layer stacked from bottom to top; the first dielectric layer covers the upper surface and side surface of the waveguide core; A plurality of first grooves are formed by openings on one side of the upper surface of the first dielectric layer. The first grooves are located on both sides of the waveguide core along its length. The first grooves penetrate the first dielectric layer and extend into part of the lower cladding layer. An initial first barrier layer is formed on the inner wall of the first groove and the upper surface of the first medium layer, and the remaining unfilled portion forms a second groove; An electrode layer is filled into the second groove; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer; the remaining unfilled portion forms a third groove; An initial second barrier layer is deposited within the third groove and on the surface of the first dielectric layer, the initial second barrier layer also covering the upper surface of the electrode layer; the initial second barrier layer and the initial first barrier layer above the first dielectric layer are removed using a chemical mechanical polishing process; the remaining initial first barrier layer forms the first barrier layer; the remaining initial second barrier layer forms the second barrier layer; the first barrier layer covers the lower surface and side surface of the electrode layer; the second barrier layer covers the upper surface of the electrode layer; the first barrier layer covers the side portion of the second barrier layer; the width of the second barrier layer is equal to the width of the electrode layer; A second dielectric layer is formed above the first dielectric layer, and an electro-optic material layer is bonded to the side surface of the second dielectric layer facing away from the waveguide core; the electro-optic material layer corresponds to at least a portion of the waveguide core.

2. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 1, characterized in that, In the step of depositing an initial second barrier layer in the third groove and on the surface of the first dielectric layer, the upper surface of the initial second barrier layer at the bottom of the third groove is higher than the upper surface of the first dielectric layer; The thickness of the initial second barrier layer is greater than the height difference between the upper surface of the first dielectric layer and the upper surface of the electrode layer; After the chemical mechanical polishing process is applied, the upper surface of the second barrier layer is flush with the upper surface of the first dielectric layer; the top surface of the first barrier layer is flush with the upper surface of the first dielectric layer.

3. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 1, characterized in that, In the step of depositing an initial second barrier layer in the third groove and on the surface of the first dielectric layer, the upper surface of the initial second barrier layer at the bottom of the third groove is lower than the upper surface of the first dielectric layer; The thickness of the initial second barrier layer is less than the height difference between the upper surface of the first dielectric layer and the upper surface of the electrode layer; After the step of depositing the initial second barrier layer in the third groove and on the surface of the first dielectric layer, the method further includes: An initial third dielectric layer is formed above the initial second barrier layer; The third dielectric layer fills the remaining third groove; The chemical mechanical polishing process further removes the initial third medium layer above the first medium layer, leaving the remaining initial third medium layer as the third medium layer; after the chemical mechanical polishing process, the upper surface of the third medium layer is flush with the upper surface of the first medium layer; the top surface of the first barrier layer is flush with the upper surface of the first medium layer; and the top surface of the second barrier layer is flush with the upper surface of the first medium layer.

4. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 3, characterized in that, The height difference between the upper surface of the first dielectric layer and the upper surface of the electrode layer is 5nm~100nm; The thickness of the second barrier layer is 2nm~50nm.

5. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 1, characterized in that, The step of filling the second groove with an electrode layer includes: An initial electrode layer is formed above the initial first barrier layer, and the initial electrode layer further fills the second groove; The initial metal layer outside the second groove is removed by chemical mechanical polishing, and an intermediate electrode layer is formed in the second groove; the upper surface of the intermediate electrode layer is flush with the upper surface of the initial first barrier layer. The intermediate electrode layer is etched to a certain thickness, and the remaining intermediate electrode layer is the electrode layer; the upper surface of the electrode layer is lower than the upper surface of the first dielectric layer.

6. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 1, characterized in that, In the step of bonding the electro-optic material layer to the side surface of the second dielectric layer facing away from the waveguide core, the first dielectric layer and the second dielectric layer above the waveguide core serve as an interlayer coupling layer between the electro-optic material layer and the waveguide core. The thickness of the first dielectric layer above the waveguide core is a first thickness; the thickness of the second dielectric layer is a second thickness; The sum of the first thickness and the second thickness is 10nm~300nm.

7. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 1, characterized in that, The material of the first substrate is silicon; The material of the lower cladding layer is silicon dioxide; the material of the first dielectric layer is silicon dioxide; The material of the second dielectric layer includes silicon dioxide and / or aluminum oxide; The waveguide core has a structure of silicon nitride layer, silicon layer, silicon nitride / silicon dioxide stack, or silicon / silicon dioxide stack; The structure of the first barrier layer is one or more layers of titanium, titanium nitride, tantalum, or tantalum nitride. The structure of the second barrier layer is one or more layers of silicon nitride, titanium, titanium nitride, tantalum, or tantalum nitride. The electrode layer is made of copper, aluminum, or tungsten. The electro-optic material layer is made of lithium niobate, barium titanate, or lithium tantalate.

8. The method for fabricating a heterogeneous integrated electro-optic modulation device according to claim 1, characterized in that, The distance between the upper surface of the waveguide core and the upper surface of the first dielectric layer is 0~200nm; The depth of the first groove is 0.2μm to 2μm, and the width of the first groove is 5μm to 200μm; The thickness of the first barrier layer is 5nm~100nm; The thickness of the electro-optic material layer is 100nm~500nm.

9. A heterogeneous integrated electro-optic modulation device, characterized in that, The heterogeneous integrated electro-optic modulation device is prepared by the method described in any one of claims 1 to 8, comprising: The waveguide core and the first dielectric layer are stacked from bottom to top; the first dielectric layer covers the upper surface and the side surface of the waveguide core. Several electrode layers are located within a lower cladding layer of a certain thickness and a first dielectric layer of a certain thickness; the electrode layers are located on both sides of the waveguide core along its length. A first barrier layer covers the lower surface and side surface of the electrode layer; A second barrier layer covers the upper surface of the electrode layer; the first barrier layer covers the side of the second barrier layer. The second dielectric layer is located above the first dielectric layer and covers the top surface of the first barrier layer and the second barrier layer; An electro-optic material layer is located on the side surface of the second dielectric layer facing away from the waveguide core; the electro-optic material layer corresponds at least to a portion of the waveguide core.

10. The heterogeneous integrated electro-optic modulation device according to claim 9, characterized in that, The second barrier layer includes a middle region and an edge region; the thickness of the middle region is less than the thickness of the edge region; the upper surface of the middle region is lower than the upper surface of the edge region. The first barrier layer covers the side of the edge region; It also includes: a third dielectric layer, located between the middle region of the second barrier layer and the second dielectric layer; the upper surface of the third dielectric layer is flush with the upper surface of the edge region; The second dielectric layer simultaneously covers the upper surface of the third dielectric layer, the top surface of the first barrier layer, and the upper surface of the edge region.

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