Extended display identification data management apparatus and method

Abstract

An extended display identification data management apparatus and method, the extended display identification data management apparatus being suitable for a plurality of displays each storing an extended display identification data and a chip module, a microprocessor generating a first control signal and a second control signal to control a first multiplexer and a second multiplexer, and the chip module is used for transmitting the extended display identification data to the corresponding storage device to be stored and used as stored identification data, reading the stored identification data and respectively generating display pictures of the display according to the stored identification data. The memory address of the extended display identification data is managed by the microprocessor, so that the function of locking the extended display identification data can be performed by the microprocessor even if the memory address of the extended display identification data cannot be fixed in the chip module.

Description

Technical Field

[0001] This invention relates to an information storage management method and device, and more particularly to an information storage management method and device related to a display screen. Background Technology

[0002] See Figure 1 An existing multi-screen display control architecture includes four screens 9 and a central processing unit 8 electrically connected to the screens. The central processing unit 8 is limited to use only with a specific brand of central processing unit 8 (e.g., Intel) and operating system (e.g., Microsoft) to obtain extended display identification information from each screen 9 to indicate the resolution of that screen 9, and to generate and send display information to the corresponding screen 9 based on the extended display identification information. The central processing unit 8 can store the extended display identification information and lock the display information corresponding to each screen 9, so that when one of the screens 9 is changed or removed, the display of the other screens 9 remains unaffected, thus achieving the function of locking the extended display identification information.

[0003] However, a drawback of existing technology is that if CPUs from other manufacturers (such as AMD) are used, such as... Figure 2 As shown, this will cause the function of locking the extended display identification information to be disabled, so that when one of the screens 9 is changed or removed, the other screens 9 may be affected and displayed incorrectly. Summary of the Invention

[0004] The purpose of this invention is to provide an extended display recognition data management method that can be used with different brands of central processing units and operating systems, achieving cross-platform usability.

[0005] The present invention provides an extended display recognition data management method applicable to multiple displays and a chip module, wherein each display stores extended display recognition data, and the extended display recognition data management method includes the following steps:

[0006] Step (S1): A microprocessor transmits each of the extended display identification data to a corresponding storage device for storage, generating a stored identification data.

[0007] In step (T1), the chip module reads each of the stored identification data and controls the display according to the stored identification data.

[0008] Preferably, step (S1) further includes steps (A), (B) and (C).

[0009] Step (A): The microprocessor generates a first control signal based on an enable signal. The first control signal is used to control a first multiplexer to select one of a first connection and a second connection. The first connection is defined as signal transmission between each of the displays and the microprocessor, and the second connection is defined as signal transmission between each of the displays and the chip module.

[0010] Step (B): When the first control signal controls the first multiplexer to select the first connection, the extended display identification data from each of the displays is transmitted to the microprocessor. The microprocessor generates a storage identification data and a second control signal based on an interface information and the extended display identification data. The storage identification data has a storage address number corresponding to the interface information and the temporarily stored extended display identification data. The second control signal is used to control a second multiplexer to select one of a third connection and a fourth connection. The third connection is defined as the signal transmission between the microprocessor and each storage device. The fourth connection is defined as the signal transmission between each storage device and the chip module. The storage address number corresponds to one of the plurality of storage devices.

[0011] Step (C): When the second control signal controls the second multiplexer to select the third connection, the microprocessor executes a processing program related to the processing method of each of the identification data to be stored according to a user instruction, stores each of the identification data to be stored in the corresponding storage device as the stored identification data, and each stored identification data has one of the storage address numbers and the corresponding extended display identification data.

[0012] Preferably, step (T1) further includes steps (D) and (E).

[0013] Step (D): When the second control signal controls the second multiplexer to select the fourth connection, the microprocessor generates a notification signal to the chip module, and the chip module reads each of the stored identification data according to the notification signal.

[0014] Step (E): When the first control signal controls the first multiplexer to select the second connection, the chip module generates a display screen according to each of the stored identification data and transmits it to the corresponding display screen, and the display screen corresponds to the extended display identification data respectively.

[0015] Preferably, it also includes step (A0).

[0016] Step (A0): Each of the displays sends a connection notification signal to a microprocessor and sends the extended display identification data to a first multiplexer. Each connection notification signal is used to notify the microprocessor that the display corresponding to it has been connected to an interface, and each interface corresponds to interface information.

[0017] Preferably, the enable signal is used to indicate a bypass mode and a general mode, and step (T1) further includes step (F).

[0018] Step (F): When the enable signal indicates a bypass mode and the first control signal controls the first multiplexer to select the second connection, the extended display identification data from each of the displays is transmitted to the chip module.

[0019] Preferably, the processing program further includes a reading program, an overwrite program, and a locking program. The reading program is used to read the data stored in the storage device corresponding to one of the storage address numbers. The overwrite program is used to clear the data stored in the storage device corresponding to one of the storage address numbers and to store the extended display identification data in the storage device. The locking program is used to prevent changes to the data stored in the storage device corresponding to one of the storage address numbers.

[0020] Another object of the present invention is to provide an extended display recognition data management device.

[0021] The extended display recognition data management device is applicable to multiple displays and a chip module. Each display stores extended display recognition data and includes a microprocessor, multiple storage devices, a first multiplexer, and a second multiplexer.

[0022] The microprocessor is electrically connected to the display and is used to receive an enable signal and a user instruction, and to generate a first control signal and a second control signal according to the enable signal and the user instruction.

[0023] The storage device is used to store the extended display identification data.

[0024] The first multiplexer is electrically connected between the display and the microprocessor and the chip module to receive the first control signal. The first control signal is used to control the first multiplexer to select one of a first connection and a second connection. The first connection is defined as the signal transmission between each display and the microprocessor, and the second connection is defined as the signal transmission between each display and the chip module.

[0025] The second multiplexer is electrically connected to the microprocessor, the storage device, and the chip module to receive the second control signal. The second control signal is used to control the second multiplexer to select one of a third connection and a fourth connection. The third connection is defined as the signal transmission between the microprocessor and each storage device, and the fourth connection is defined as the signal transmission between each storage device and the chip module.

[0026] When the first control signal controls the first multiplexer to select the first connection, the extended display identification data from each of the displays is transmitted to the microprocessor. The microprocessor generates identification data to be stored and a second control signal based on interface information and the extended display identification data. The identification data to be stored has a storage address number corresponding to the interface information and the temporarily stored extended display identification data. The storage address number corresponds to one of the plurality of storage devices.

[0027] When the second control signal controls the second multiplexer to select the third connection, the microprocessor executes a processing program related to the processing method of each of the identification data to be stored according to a user instruction, storing each of the identification data to be stored in the corresponding storage device as a stored identification data, and each stored identification data has one of the storage address numbers and the corresponding extended display identification data.

[0028] When the second control signal controls the second multiplexer to select the fourth connection, the microprocessor generates a notification signal to the chip module, and the chip module reads each of the stored identification data according to the notification signal.

[0029] When the first control signal controls the first multiplexer to select the second connection, the chip module generates a display screen according to each of the stored identification data and transmits it to the corresponding display screen, and the display screens correspond to the extended display identification data respectively.

[0030] Preferably, the storage device is an electronically eraseable rewritable read-only memory (EEPROM).

[0031] Preferably, each of the displays sends a connection notification signal to the microprocessor and sends the extended display identification data to the first multiplexer. Each connection notification signal is used to notify the microprocessor that the display corresponding to it has been connected to an interface, and each interface corresponds to interface information.

[0032] Preferably, the processing program further includes a reading program, an overwrite program, and a locking program. The reading program is used to read the data stored in the storage device corresponding to one of the storage address numbers. The overwrite program is used to clear the data stored in the storage device corresponding to one of the storage address numbers and to store the extended display identification data in the storage device. The locking program is used to prevent changes to the data stored in the storage device corresponding to one of the storage address numbers.

[0033] The advantage of this invention is that by managing the storage address of the extended display identification data through the microprocessor and storing the extended display identification data in the designated storage device, the microprocessor can still perform the function of locking the extended display identification data even if the chip module cannot fix the storage address of the extended display identification data. Attached Figure Description

[0034] Other features and effects of the present invention will be clearly presented with reference to the embodiments in the accompanying drawings, wherein:

[0035] Figure 1 It is a block diagram illustrating an existing multi-screen display control architecture;

[0036] Figure 2 This is a front view illustrating the display on the four screens;

[0037] Figure 3 This is a block diagram illustrating the architecture of an embodiment of the extended display identification data management device of the present invention;

[0038] Figure 4 This is a flowchart illustrating the extended display recognition data management method implemented in this embodiment;

[0039] Figure 5 This is a front view illustrating the display screens of the four displays in this embodiment. Detailed Implementation

[0040] Before the invention is described in detail, it should be noted that similar components are represented by the same numbers in the following description.

[0041] See Figure 3This invention discloses an embodiment of an Extended Display Identification Data (EDID) management device. The EDID management device 100 is electrically connected to a chip module 6 and multiple displays 51-54. Each of the displays 51-54 stores EDID data related to information such as resolution, manufacturer name, and clock speed. The EDID management device 100 includes a microprocessor (MCU) 1, multiple storage devices 21-24, an input / output interface 25, a first multiplexer 3, and a second multiplexer 4. In this embodiment, the chip module 6 includes a central processing unit (CPU, not shown) and a memory (not shown) electrically connected to the CPU. The aforementioned storage devices 21-24 can be implemented using random access memory (RAM), read-only memory (ROM), programmable ROM (PROM), firmware, and / or flash memory.

[0042] The microprocessor 1 is electrically connected to the displays 51-54 via the input / output interface 25 and is used to receive an enable signal and a user instruction. The enable signal is used to instruct the extended display recognition data management device 100 to switch between a bypass mode and a general mode. The user instruction relates to the processing method of the extended display recognition data, and the relevant data and processing program of the user instruction are pre-programmed into the microprocessor by a user.

[0043] In the bypass mode, the extended display identification data is bypassed to the chip module 6, where the chip module 6 identifies and processes the extended display identification data. In the general mode, the extended display identification data is sent to the microprocessor 1, and the microprocessor 1 manages the memory address where the extended display identification data is stored, and the chip module 6 reads the extended display identification data corresponding to the memory address specified by the microprocessor 1.

[0044] The storage devices 21-24 are electrically connected to the microprocessor 1 and are used to store extended display identification data corresponding to the displays 51-54. The extended display identification data stored in the storage devices 21-24 comes from one of the specific displays 51-54. Taking the extended display identification data of the display 51 as an example, the extended display identification data of the display 51 is transmitted and stored in the storage device 21 via the interface on the input / output interface 25, that is, the interface on the input / output interface 25 corresponds to the storage device 21, but is not limited thereto.

[0045] The first multiplexer 3 is electrically connected to the microprocessor 1, the displays 51-54, and the chip module 6, and has a first terminal 31, a second terminal 32, and a third terminal 33. The first multiplexer 3 selects one of a first connection and a second connection based on a first control signal generated by the microprocessor 1. The first connection is defined as the signal transmission between each of the displays 51-54 and the microprocessor 1, and the second connection is defined as the signal transmission between each of the displays 51-54 and the chip module 6. Further, the first connection is used to establish a signal transmission channel between the first terminal 31 and the second terminal 32 of the first multiplexer 3, and the second connection is used to establish a signal transmission channel between the first terminal 31 and the third terminal 33 of the first multiplexer 3.

[0046] The second multiplexer 4 is electrically connected to the microprocessor 1, the storage devices 21-24, and the chip module 6, and has a first terminal 41, a second terminal 42, and a third terminal 43. The second multiplexer 4 selects one of a third connection and a fourth connection based on a second control signal generated by the microprocessor 1. The third connection is defined as the signal transmission between the microprocessor 1 and each of the storage devices 21-24, and the fourth connection is defined as the signal transmission between each of the storage devices 21-24 and the chip module 6. Furthermore, the third connection is used to establish a signal transmission channel between the first terminal 41 and the second terminal 42 of the second multiplexer 4, and the fourth connection is used to establish a signal transmission channel between the first terminal 41 and the third terminal 43 of the second multiplexer 4.

[0047] The first control signal and the second control signal can be transmitted through the general-purpose input / output (GPIO) ports of the microprocessor (e.g., the first control signal is implemented by GPIO[5:8] and the second control signal is implemented by GPIO[1:4]), and the first control signal and the second control signal can be implemented by one-hot encoding, binary encoding or Gray code encoding, but are not limited thereto.

[0048] The following will describe the operational details of the displays 51-54, the microprocessor 1, the storage devices 21-24, and the chip module 6 in this embodiment through an extended display recognition data management method.

[0049] See Figure 4 The extended display recognition data management device 100 performs an extended display recognition data management method, including steps (A0), (S1), and (T1).

[0050] Step (A0): Each of the displays 51 to 54 sends a connection notification signal to the microprocessor 1 and sends the extended display identification data to the first multiplexer 3. The connection notification signal is used to notify the microprocessor 1 that each display 51 to 54 has been connected to the interface on the input / output interface 25. For example, the input / output interface has four interfaces (not shown in the figure), and the four interfaces are electrically connected to the aforementioned displays 51 to 54 respectively. Each interface corresponds to an interface information.

[0051] Step (S1): The microprocessor 1 transmits each of the extended display identification data to a corresponding storage device 21-24 for storage, generating a stored identification data. Step (S1) includes steps (A), (B), and (C).

[0052] Step (A): The microprocessor 1 determines whether the enable signal is in general mode. When the enable signal is determined to be in general mode, the first control signal controls the first multiplexer 3 to select the first connection, and proceeds to step (B). When the enable signal is determined to be in bypass mode, the first control signal controls the first multiplexer 3 to select the second connection, and proceeds to step (F).

[0053] Step (B): When the first control signal controls the first multiplexer 3 to select the first connection, the extended display identification data from each of the displays 51-54 is transmitted to the microprocessor 1. The microprocessor 1 generates a storage identification data and a second control signal based on an interface information and the extended display identification data, and proceeds to step (C). The storage identification data has a storage address number corresponding to the interface information and the temporarily stored extended display identification data.

[0054] Step (C): When the second control signal controls the second multiplexer 4 to select the third connection, the microprocessor 1 executes a processing program related to the processing method of each piece of identification data to be stored according to a user instruction, storing each piece of identification data to be stored in one of the corresponding storage devices 21 to 24 as stored identification data, and each stored identification data has one of the storage address numbers and the corresponding extended display identification data. When each piece of stored identification data has been stored in one of the corresponding storage devices 21 to 24, proceed to step (D).

[0055] It should be further explained that each storage device 21 to 24 may correspond to one of the displays 51 to 54. For example, the extended display identification data of the stored identification data stored in storage device 21 originates from display 51, the extended display identification data of the stored identification data stored in storage device 22 originates from display 52, the extended display identification data of the stored identification data stored in storage device 23 originates from display 53, and the extended display identification data of the stored identification data stored in storage device 24 originates from display 54, but this storage relationship is not limited.

[0056] Another point to note is that the processing procedure also includes a read procedure, an overwrite procedure, and a locking procedure. The read procedure reads the data stored in one of the storage devices 21-24 corresponding to one of the storage address numbers. The overwrite procedure clears the data stored in one of the storage devices 21-24 corresponding to one of the storage address numbers and stores the extended display identification data of the identification data to be stored in the storage devices 21-24. The locking procedure prevents changes to the data stored in one of the storage devices 21-24 corresponding to one of the storage address numbers, thereby avoiding changes to the data stored in one of the storage devices 21-24 corresponding to that storage address number.

[0057] Step (T1): The chip module 6 reads each of the stored identification data and controls the displays 51-54 respectively according to the stored identification data. Step (T1) includes steps (D), (E), and (F).

[0058] Step (D): When the second control signal controls the second multiplexer 4 to select the fourth connection, the microprocessor 1 generates a notification signal to the chip module 6. The chip module 6 reads each of the stored identification data according to the notification signal and proceeds to step (E).

[0059] It should be further explained that the notification signal generated by the microprocessor 1 can instruct the chip module 6 to read the stored identification data from one of the designated storage devices 21 to 24, so that the chip module 6 can obtain the extended display identification data from one of the displays 51 to 54. For example, the microprocessor 1 generates a notification signal instructing the chip module 6 to read the storage device 21 to obtain the extended display identification data from the display 51, but this is not a limitation.

[0060] Step (E): When the first control signal controls the first multiplexer 3 to select the second connection, the chip module 6 generates a display screen according to each of the stored identification data and transmits it to one of the corresponding displays 51-54. The display screen corresponds to one of the extended display identification data (e.g., Figure 5 (As shown).

[0061] Step (F): When the enable signal indicates a bypass mode and the first control signal controls the first multiplexer 3 to select the second connection, the extended display identification data from each of the displays is transmitted to the chip module 6 and proceeds to step (E).

[0062] In summary, the above embodiments manage the storage address of the extended display identification data through the microprocessor 1, storing the four sets of extended display identification data from different displays 51-54 into four designated storage devices 21-24 respectively, thereby achieving the function of locking the extended display identification data. This ensures that even if the chip module 6 cannot fix the storage address of the extended display identification data, the microprocessor 1 can still perform the function of locking the extended display identification data. Therefore, it is not limited by the CPU brand of the chip module 6. Figure 5 As shown, for example, when one of the displays 51 to 54 loses connection, the chip module 6 can still obtain the extended display identification data corresponding to the display 51 to 53 from the storage devices 21 to 23, and continue to generate and send the display screen to the remaining displays 51 to 53.

[0063] The above description is merely a preferred embodiment of the present invention and should not be construed as limiting the scope of the present invention. Any simple equivalent changes and modifications made in accordance with the claims and description of the present invention shall still fall within the scope of the present invention.

Claims

1. A method for managing extended display recognition data, applicable to multiple displays and a chip module, wherein each display stores extended display recognition data, characterized in that, The extended display recognition data management method includes: (S1) A microprocessor transmits each of the extended display recognition data to a corresponding storage device for storage, generating stored recognition data; and (T1) The chip module reads each of the stored identification data and controls the display according to the stored identification data.

2. The extended display recognition data management method according to claim 1, characterized in that, The step (S1) further includes: (A) The microprocessor generates a first control signal based on an enable signal. The first control signal is used to control a first multiplexer to select one of a first connection and a second connection. The first connection is defined as signal transmission between each of the displays and the microprocessor. The second connection is defined as signal transmission between each of the displays and the chip module. (B) When the first control signal controls the first multiplexer to select the first connection, the extended display identification data from each of the displays is transmitted to the microprocessor. The microprocessor generates a storage identification data and a second control signal based on an interface information and the extended display identification data. The storage identification data has a storage address number corresponding to the interface information and the temporarily stored extended display identification data. The second control signal is used to control a second multiplexer to select one of a third connection and a fourth connection. The third connection is defined as the signal transmission between the microprocessor and each storage device. The fourth connection is defined as the signal transmission between each storage device and the chip module. The storage address number corresponds to one of the plurality of storage devices. (C) When the second control signal controls the second multiplexer to select the third connection, the microprocessor executes a processing program related to the processing method of each of the identification data to be stored according to a user instruction, stores each of the identification data to be stored in the corresponding storage device as the stored identification data, and each of the stored identification data has one of the storage address numbers and the corresponding extended display identification data.

3. The extended display recognition data management method according to claim 2, characterized in that, The step (T1) further includes: (D) When the second control signal controls the second multiplexer to select the fourth connection, the microprocessor generates a notification signal to the chip module, and the chip module reads each of the stored identification data according to the notification signal; (E) When the first control signal controls the first multiplexer to select the second connection, the chip module generates a display screen according to each of the stored identification data and transmits it to the corresponding display screen, and the display screen corresponds to the extended display identification data respectively.

4. The extended display recognition data management method according to claim 1, characterized in that, It also includes step (A0): (A0) Each of the displays sends a connection notification signal to the microprocessor and sends the extended display identification data to a first multiplexer. Each connection notification signal is used to notify the microprocessor that the display corresponding to it has been connected to an interface, and each interface corresponds to interface information.

5. The extended display recognition data management method according to claim 2, characterized in that, The enable signal is used to indicate a bypass mode and a general mode, and step (T1) further includes step (F): (F) When the enable signal indicates a bypass mode and the first control signal controls the first multiplexer to select the second connection, the extended display identification data from each of the displays is transmitted to the chip module.

6. The extended display recognition data management method according to claim 2, characterized in that, The processing program further includes a reading program, an overwrite program, and a locking program. The reading program is used to read the data stored in the storage device corresponding to one of the storage address numbers. The overwrite program is used to clear the data stored in the storage device corresponding to one of the storage address numbers and to store the extended display identification data in the storage device. The locking program is used to prevent changes to the data stored in the storage device corresponding to one of the storage address numbers.

7. An extended display recognition data management device, applicable to multiple displays and a chip module, wherein each display stores extended display recognition data, characterized in that, The extended display recognition data management device includes: A microprocessor, electrically connected to the display, is configured to receive an enable signal and a user terminal instruction, and generate a first control signal and a second control signal based on the enable signal and the user terminal instruction. Multiple storage devices are used to store the extended display identification data; A first multiplexer is electrically connected between the display and the microprocessor and the chip module to receive the first control signal. The first control signal is used to control the first multiplexer to select one of a first connection and a second connection. The first connection is defined as signal transmission between each display and the microprocessor, and the second connection is defined as signal transmission between each display and the chip module. and A second multiplexer, electrically connected to the microprocessor, the storage device, and the chip module, receives a second control signal. The second control signal controls the second multiplexer to select one of a third connection and a fourth connection. The third connection is defined as signal transmission between the microprocessor and each storage device, and the fourth connection is defined as signal transmission between each storage device and the chip module. When the first control signal controls the first multiplexer to select the first connection, the extended display identification data from each of the displays is transmitted to the microprocessor. The microprocessor generates identification data to be stored and a second control signal based on interface information and the extended display identification data. The identification data to be stored has a storage address number corresponding to the interface information and the temporarily stored extended display identification data. The storage address number corresponds to one of the plurality of storage devices. When the second control signal controls the second multiplexer to select the third connection, the microprocessor executes a processing program related to the processing method of each of the identification data to be stored according to a user instruction, storing each of the identification data to be stored in the corresponding storage device as a stored identification data, and each stored identification data has one of the storage address numbers and the corresponding extended display identification data. When the second control signal controls the second multiplexer to select the fourth connection, the microprocessor generates a notification signal to the chip module, and the chip module reads each of the stored identification data according to the notification signal. When the first control signal controls the first multiplexer to select the second connection, the chip module generates a display screen according to each of the stored identification data and transmits it to the corresponding display screen, and the display screens correspond to the extended display identification data respectively.

8. The extended display recognition data management device according to claim 7, characterized in that, The storage device is an electronically erasable rewritable read-only memory.

9. The extended display recognition data management device according to claim 7, characterized in that, Each of the displays sends a connection notification signal to the microprocessor and sends the extended display identification data to the first multitasking unit. Each connection notification signal is used to notify the microprocessor that the display corresponding to it has been connected to an interface, and each interface corresponds to interface information.

10. The extended display recognition data management device according to claim 7, characterized in that, The processing program further includes a reading program, an overwrite program, and a locking program. The reading program is used to read the data stored in the storage device corresponding to one of the storage address numbers. The overwrite program is used to clear the data stored in the storage device corresponding to one of the storage address numbers and to store the extended display identification data in the storage device. The locking program is used to prevent changes to the data stored in the storage device corresponding to one of the storage address numbers.

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