Elastic wave device and manufacturing method of wafer forming elastic wave device

Abstract

The present invention provides an elastic wave device having a device chip as a main body, the elastic wave device comprising a support substrate made of glass, a high-sound-velocity layer formed on the support substrate, and a piezoelectric layer formed on the high-sound-velocity layer, a circuit pattern formed by a resonator for exciting a predetermined surface wave being formed on the piezoelectric layer in the device chip, the high-sound-velocity layer is configured so as to have a body-wave sound velocity that is faster than that of the piezoelectric layer and so as to have a thickness that is at least twice the wavelength of the surface wave, and the thermal expansion coefficient of the glass in the range from the softening point temperature to normal temperature is set so as to differ within + / -3% from the thermal expansion coefficient of the material of the high-sound-velocity layer. The structure of the present invention enables a support substrate and a high-sound-velocity layer to be smoothly integrated while appropriately minimizing the use amount of relatively expensive materials constituting the high-sound-velocity layer.

Description

Technical Field

[0001] This invention relates to an elastic wave device and a method for manufacturing a wafer constituting the elastic wave device. Background Technology

[0002] In elastic wave devices, a structure in which a spinel substrate, which serves as a high-sonic layer, is formed on a silicon substrate as a support substrate, and a piezoelectric layer is formed on the spinel substrate, has been described in patent document JP2019216414.

[0003] In this structure, the SH wave is confined in the piezoelectric layer by reflecting the SH wave in the spinel substrate, thereby giving the elastic wave device the desired characteristics. Summary of the Invention

[0004] The main problem that this invention aims to solve is to provide a structure for an elastic wave device, which is mainly composed of a device chip formed on the support substrate and a piezoelectric layer formed on the high-sonic layer, so as to achieve a smooth integration of the support substrate and the high-sonic layer while appropriately minimizing the amount of relatively expensive materials used to constitute the high-sonic layer.

[0005] To address the aforementioned issues, the present invention provides an elastic wave device from a first aspect, which is based on a device chip. The device chip includes a support substrate made of glass, a hypersonic layer formed on the support substrate, and a piezoelectric layer formed on the hypersonic layer. A circuit pattern consisting of a resonator for exciting a specified surface wave is formed on the piezoelectric layer in the device chip. The hypersonic layer is configured to have a volume wave speed faster than that of the piezoelectric layer, and a thickness more than twice the wavelength of the surface wave. Furthermore, the coefficient of thermal expansion of the glass from its softening point to room temperature is set to be within ±3% of the coefficient of thermal expansion of the material of the hypersonic layer.

[0006] In some implementations, the hypersonic layer is made of spinel.

[0007] In some embodiments, the glass support substrate may be made of borosilicate glass, phosphosilicate glass, or borosilicate-phosphosilicate glass (BPSG), and the coefficient of thermal expansion of the glass support substrate is 7.2 × 10⁻⁶. -6 / K to 7.6×10 -6 / K.

[0008] Furthermore, in order to solve the above-mentioned problems, in a second aspect, the present invention proposes a method for fabricating a wafer, the wafer constituting a device chip of the elastic wave device involved in the first aspect, the wafer comprising a substrate portion serving as a support substrate, a middle layer portion serving as a hypersonic layer, and a surface layer portion serving as a piezoelectric layer. The manufacturing method includes: a cutting process of cutting out a middle layer from an ingot made of a material constituting the hypersonic layer; and a bonding process of bonding the base plate to the middle layer. In the bonding process, the base plate is heated to its softening point temperature, and the middle layer is stacked on top of the base plate and pressure is applied.

[0009] In some embodiments, the surface roughness Ra of the middle layer portion used to adhere to the side of the base plate portion is 0.5 to 5 μm.

[0010] Furthermore, to address the aforementioned issues, a third aspect proposes an elastic wave device, which is based on a device chip. This device chip has a support substrate made of glass, a first hypersonic layer formed on one side of the support substrate, a piezoelectric layer formed on the first hypersonic layer, and a second hypersonic layer formed on the other side of the support substrate. A circuit pattern consisting of resonators for exciting a defined surface wave is formed on the piezoelectric layer of the device chip. The first and second hypersonic layers are both made of the same material, which has a volume wave speed that is faster than that of the piezoelectric layer, and both have the same thickness, which is more than twice the wavelength of the surface wave. Furthermore, the coefficient of thermal expansion of the glass from its softening point to room temperature is within ±6% of the coefficient of thermal expansion of the materials constituting the first and second hypersonic layers.

[0011] In some embodiments, the first hypersonic layer and the second hypersonic layer are made of spinel.

[0012] In some embodiments, the glass support substrate may be made of borosilicate glass, phosphosilicate glass, or borosilicate-phosphosilicate glass (BPSG), and the coefficient of thermal expansion of the glass support substrate is 7.2 × 10⁻⁶. -6 / K to 7.6×10 -6 / K.

[0013] Furthermore, in order to solve the above-mentioned problems, a fourth aspect proposes a method for manufacturing a wafer that constitutes a device chip of the elastic wave device according to the third aspect of the present invention, wherein the wafer includes a substrate portion serving as a support substrate, a first middle layer portion serving as a first hypersonic layer, a second middle layer portion serving as a second hypersonic layer, and a surface layer portion serving as a piezoelectric layer. The manufacturing method includes a cutting process of cutting out the first middle layer portion and the second middle layer portion from an ingot made of a material constituting the first hypersonic layer and the second hypersonic layer; The bonding process includes attaching the second middle layer to one side of the base plate and attaching the first middle layer to the other side of the base plate. In the bonding process, the substrate portion is heated to its softening point temperature and placed between the first middle layer portion and the second middle layer portion. Pressure is applied after the three are stacked to complete the bonding.

[0014] In some embodiments, the surface roughness Ra of the first middle layer and the second middle layer used to adhere to one side of the base plate is 0.5 to 5 μm.

[0015] According to the present invention, for an elastic wave device mainly composed of a device chip formed on the support substrate (a first hypersonic layer in the third and fourth aspects of the invention) and a piezoelectric layer formed on the hypersonic layer (a first hypersonic layer in the third and fourth aspects of the invention), it is possible to achieve smooth integration of the support substrate and the hypersonic layer (a first hypersonic layer and a second hypersonic layer in the third and fourth aspects of the invention) while appropriately minimizing the amount of relatively expensive materials used to constitute the hypersonic layer (a first hypersonic layer and a second hypersonic layer in the third and fourth aspects of the invention). Attached Figure Description

[0016] Figure 1 This is a cross-sectional view of the elastic wave device described in the first embodiment.

[0017] Figure 2 This is a configuration diagram showing an example of a resonator formed on the functional surface of the device chip constituting the elastic wave device.

[0018] Figure 3 This is a configuration diagram showing an example of the circuitry formed on the device chip constituting the elastic wave device.

[0019] Figure 4 This is a cross-sectional view of the elastic wave device described in the second embodiment.

[0020] Figure 5 This is a cross-sectional view showing one step in the manufacturing process of the wafer used to form the device chip in the first and second embodiments.

[0021] Figure 6 yes Figure 5The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the first and second embodiments.

[0022] Figure 7 yes Figure 6 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the first and second embodiments.

[0023] Figure 8 yes Figure 7 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the first and second embodiments.

[0024] Figure 9 yes Figure 8 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the first and second embodiments.

[0025] Figure 10 yes Figure 9 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the first and second embodiments.

[0026] Figure 11 yes Figure 10 The next step is to obtain a cross-sectional view of the wafer used to form the device chip in the first and second embodiments.

[0027] Figure 12 It is shown in Figure 11 The diagram shows a cross-sectional view of a circuit pattern formed on a wafer.

[0028] Figure 13 It is the formation of a circuit pattern Figure 12 The diagram shows a cross-sectional view of a wafer being cut to form a single chip.

[0029] Figure 14 This is a cross-sectional view of the elastic wave device described in the third embodiment.

[0030] Figure 15 This is a cross-sectional view of the elastic wave device described in the fourth embodiment.

[0031] Figure 16 This is a cross-sectional view showing one step in the manufacturing process of the wafer used to form the device chip in the third and fourth embodiments.

[0032] Figure 17 yes Figure 16The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the third and fourth embodiments.

[0033] Figure 18 yes Figure 17 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the third and fourth embodiments.

[0034] Figure 19 yes Figure 18 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the third and fourth embodiments.

[0035] Figure 20 yes Figure 19 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the third and fourth embodiments.

[0036] Figure 21 yes Figure 20 The next step, namely, a cross-sectional view of one step in the manufacturing process of the wafer used to form the device chip in the third and fourth embodiments.

[0037] Figure 22 This is a cross-sectional view of the wafer used to construct the device chip in the third and fourth embodiments.

[0038] Figure 23 It is shown in Figure 22 The diagram shows a cross-sectional view of the circuit pattern formed on the wafer.

[0039] Figure 24 It is the formation of a circuit pattern Figure 22 The diagram shows a cross-sectional view of a wafer being cut to form a single chip.

[0040] Figure label: x direction of propagation d Dust H retainer r rough surface 1. Elastic wave device 2. Device Chips 2a Functional surface 2b Back 2c Side View 3 Supporting substrate 4. Hypersonic Layer 4a First Hypersonic Layer 4b Second Hypersonic Layer 5 piezoelectric layers 6. Circuit diagram 7, 70, 71 resonators 7a IDT electrode 7b Reflector 7c electrode finger 7d busbar 7e electrode finger 7f busbar 8. Protrusion receiving section 9. Packaging substrate 9a Mounting surface 9b pad 9c External Output Pads 10 Encapsulating Resin 11 bumps 12 Interior Space 13 Grounding terminal 14 Support layer 15. Cap layer 16 through holes 17 Wiring inside through-hole 18 bumps 19 wafers 20 Base plate section 21. Middle Sheet Section 21a First Middle Sheet Section 21b Second Middle Sheet Section 22. Surface panel section. Detailed Implementation

[0041] The following will be based on Figures 1 to 24 Typical embodiments of the present invention will be described below. The elastic wave device 1 according to this embodiment is suitable for use as a frequency filter in mobile communication devices and the like.

[0042] (First embodiment) Figure 1 A first embodiment of the elastic wave device 1 is shown.

[0043] The elastic wave device 1 in the first embodiment is mainly composed of a device chip 2.

[0044] The device chip 2 includes a support substrate 3, a hypersonic layer 4, and a piezoelectric layer 5. The device chip 2 presents a flat hexahedral structure consisting of a functional surface 2a formed by the surface of the piezoelectric layer 5, a back surface 2b opposite to the functional surface 2a, and four side surfaces 2c connecting the functional surface 2a and the back surface 2b. In the first embodiment, the back surface 2b is formed by a side of the support substrate 3 opposite to the hypersonic layer 4.

[0045] The support substrate 3 is made of glass. A hypersonic layer 4 is formed on the support substrate 3. A piezoelectric layer 5 is formed on the hypersonic layer 4. Furthermore, a circuit pattern 6 containing a resonator for exciting a specified surface wave (SH wave) is formed on the piezoelectric layer 5 (i.e., on the functional surface 2a).

[0046] The circuit pattern 6 includes multiple resonators 7, multiple bump receivers 8, inter-resonator wiring (not shown) for connecting the resonators 7, and external connection wiring (not shown) for connecting the resonators 7 to the bump receivers 8. The circuit pattern 6 is typically formed on the piezoelectric layer 5 by photolithography using a conductive metal film.

[0047] The elastic wave device 1 described in the first embodiment has a CSP (Chip Size Package) structure. Figure 1 In the diagram, symbol 9 represents the packaging substrate, symbol 9a represents the mounting surface of the packaging substrate 9, symbol 9b represents the pad on the side of the packaging substrate 9, symbol 9c represents the external output pad formed on the back side opposite the mounting surface 9a of the packaging substrate 9, symbol 10 represents the encapsulation resin, symbol 11 represents the bump, and symbol 12 represents the internal space.

[0048] The device chip 2 is mounted on the packaging substrate 9 with its functional surface 2a facing the mounting surface of the packaging substrate 9.

[0049] By fusing the bump 11 formed on the bump receiving portion 8 to the pad 9b, the circuitry on the device chip 2 side and the circuitry on the package substrate 9 side are electrically connected.

[0050] A gap is formed between the functional surface 2a and the mounting surface 9a, which is composed of the thickness of the bump receiving part 8, the bump 11 and the pad 9b.

[0051] The encapsulating resin 10 is made of insulating resin. The encapsulating resin 10 covers the entire back surface 2b opposite to the functional surface 2a of the device chip 2 and the side surface 2c of the device chip 2, and extends into the space between the functional surface 2a and the mounting surface 9a directly below the side surface 2c, thereby forming the internal space 12.

[0052] The hypersonic layer 4 is configured to have a higher volume wave velocity than the piezoelectric layer 5, and has a thickness of more than twice the wavelength of the surface wave.

[0053] For example, if the wavelength of the surface wave is 4 μm, the thickness of the hypersonic layer 4 will be set to 8 μm or more.

[0054] Preferably, the hypersonic layer 4 is made of spinel.

[0055] On the other hand, the support substrate 3 is made of a glass whose coefficient of thermal expansion in the range from softening point temperature to room temperature is within ±3% of the coefficient of thermal expansion of the material constituting the hypersonic layer 4.

[0056] Typically, when the hypersonic layer 4 is composed of spinel, the coefficient of thermal expansion of spinel is 7.4 × 10⁻⁶. -6 / K, therefore, typically, the glass can be made of borosilicate glass, phosphosilicate glass, or borosilicate-phosphosilicate glass (BPSG), and its coefficient of thermal expansion is adjusted to 7.2 × 10⁻⁶. -6 / K to 7.6×10 -6 / K.

[0057] In the borosilicate glass, the coefficient of thermal expansion can be controlled by adjusting the boron (B) content; in the phosphosilicate glass, the phosphorus (P) content can be adjusted; and in the borosilicate-phosphosilicate glass, the boron and phosphorus contents can be adjusted.

[0058] Furthermore, the side of the hypersonic layer 4 that contacts the support substrate 3 (the bonding side described below) is a rough surface r with a surface roughness Ra of 0.5 to 5 μm.

[0059] The rough surface r is formed by creating numerous recesses and numerous protrusions on the surface of the hypersonic layer 4, essentially creating protrusions between recesses and recesses between protrusions.

[0060] like Figure 1 As shown, the material of the support substrate 3 is seamlessly embedded in the recess of the rough surface r, while the protrusion of the rough surface r is embedded inside the support substrate 3.

[0061] By setting the thickness of the hypersonic layer 4 to be more than twice the wavelength of the surface wave, the surface wave can be reflected and confined within the piezoelectric layer 5. This allows the elastic wave device 1 to acquire the desired characteristics.

[0062] Furthermore, by setting the hypersonic layer 4 to at least the aforementioned thickness and supporting the hypersonic layer 4 with this thickness by the support substrate 3, the amount of material used to constitute the relatively expensive hypersonic layer 4 can be minimized while ensuring the required characteristics in the materials constituting the device chip 2.

[0063] In addition, by controlling the coefficient of thermal expansion of the glass constituting the support substrate 3 within ±3% of the coefficient of thermal expansion of the material constituting the hypersonic layer 4, it is possible to effectively suppress the warping of the device chip 2 caused by the heat generated during the driving of the elastic wave device 1, as well as the warping of the wafer 19 that may occur in the manufacturing process of the device chip 2 described later.

[0064] The piezoelectric layer 5 is typically composed of lithium tantalate or lithium niobate, which are piezoelectric elements.

[0065] Typically, the device chip 2 is configured as a rectangular plate structure with one side of 0.5 to 1 mm and a thickness of 0.15 to 0.2 mm, and when viewed from a direction perpendicular to the functional surface 2a, the outline of the functional surface 2a is rectangular.

[0066] Furthermore, the thickness of the piezoelectric layer 5 is typically 0.2 to 2 μm.

[0067] The thickness of the hypersonic layer 4 is typically 2 to 20 μm.

[0068] The thickness of the support substrate 3 is typically 100 to 200 μm.

[0069] It should be noted that, in the accompanying drawings, the thickness of the constituent elements, etc., are exaggerated to facilitate understanding of the structure of the elastic wave device 1.

[0070] The resonator 7 is composed of a conductive metal layer formed on the functional surface 2a.

[0071] Figure 2 An example of the configuration of a resonator 7 is shown. The resonator 7 has an IDT electrode 7a and a reflector 7b formed by sandwiching the IDT electrode 7a on both sides. The IDT electrode 7a is composed of multiple electrode pairs, and each electrode pair is composed of multiple electrode fingers 7c. These electrode fingers 7c are arranged parallel to each other with their length direction intersecting the propagation direction x of the elastic wave, which is the dominant mode, and are connected at one end by a bus bar 7d.

[0072] The reflector 7b consists of multiple electrode fingers 7e, which are also arranged in parallel with the direction of propagation of the elastic wave x in a way that their length direction is intersected by the direction x of the elastic wave, and are connected at their ends by a busbar 7f.

[0073] Figure 3 A conceptual diagram of one possible configuration of a circuit disposed on a device chip 2 is shown. Symbol 70 represents a resonator 7a connected in series between the input and output ports, symbol 71 represents a resonator 7a connected in parallel between the input and output ports, and symbol 13 represents the ground terminal (GND). The number and arrangement of the resonators 7a can be adjusted as needed. That is, Figure 3 The circuit shown constitutes a ladder filter.

[0074] (Second embodiment) Figure 4 A second embodiment of the elastic wave device 1 is shown.

[0075] The elastic wave device 1 in the second embodiment is also mainly composed of device chip 2.

[0076] The second embodiment is an elastic wave device 1 with a WLP (Wafer Level Package) structure.

[0077] exist Figure 4 In the diagram, symbol 14 represents the support layer, symbol 15 represents the capping layer, symbol 16 represents a via, symbol 17 represents wiring inside the via, and symbol 18 represents a bump.

[0078] The support layer 14 is made of insulating resin. The support layer 14 is formed on the functional surface 2a, surrounding the formation region of the resonator 7.

[0079] The cover layer 15 is also made of insulating resin. The cover layer 15 is supported on the support layer 14 and together with the functional surface 2a and the support layer 14, forms the internal space 12 facing the resonator 7.

[0080] The through-hole 16 penetrates the support layer 14 and the cover layer 15, and its bottom is located at the position of the external connection pad 8 on the functional surface 2a in the area outside the internal space 12.

[0081] The wiring 17 inside the through hole is made of conductive metal filling the through hole 16, with its inner end connected to the external connection pad 8 and its outer end connected to the bump 18.

[0082] The second embodiment achieves mounting to the module substrate, etc., through the bump 18.

[0083] It should be noted that the other structures of the device chip 2 constituting the second embodiment are substantially the same as those constituting the device chip 2 in the first embodiment. Therefore, in Figure 4 The same reference numerals as in the first embodiment are attached to it, and its detailed description is omitted.

[0084] (Method for manufacturing wafer 19 of device chip 2 for the first and second embodiments) The wafer 19 of the device chip 2 used to constitute the elastic wave device 1 of the first embodiment and the second embodiment can be manufactured appropriately and reasonably by a manufacturing method including the following steps.

[0085] like Figure 11 As shown, the wafer 19 includes a base plate portion 20 serving as the support substrate 3, a middle layer portion 21 serving as the hypersonic layer 4, and a surface layer portion 22 serving as the piezoelectric layer 5.

[0086] Cutting process: Prepare an ingot (not shown) made of the material constituting the hypersonic layer 4.

[0087] When the hypersonic layer 4 is composed of spinel, the ingot is rod-shaped and made of spinel.

[0088] Then, the ingot is cut along a direction perpendicular to its central axis to cut out a disk-shaped central layer portion 21 (see...) Figure 5 ).

[0089] Typically, the middle layer 21 is cut to a thickness of 50 μm to 100 μm.

[0090] Furthermore, the aforementioned cutting process makes the surface of the middle layer 21 a rough surface r with a surface roughness Ra of 0.5 to 5 μm.

[0091] Before the bonding process, the middle layer 21 is cleaned to remove impurities such as dust generated on its surface due to cutting (see...). Figures 5 to 6 ).

[0092] Bonding process: such as Figure 7 As shown, one side of a base plate portion 20 is overlapped with one side of a middle layer portion 21 and disposed between a pair of retainers H constituting the bonding device.

[0093] The base plate portion 20 is typically made to have substantially the same area as the middle layer portion 21 and a thickness of 100 to 200 μm, and is heated to the softening point temperature before being installed.

[0094] Next, the bonding device is activated to reduce the distance between the pair of retaining bodies H, and a specified pressure is applied to the workpiece (processing object) with the overlapping middle layer plate 21 for pressing.

[0095] Through the aforementioned heating and pressurization, the contact interface between the base plate portion 20 and the middle layer portion 21 is shaped into a complementary surface shape according to the roughness surface r (surface roughness Ra is 0.5 to 5 μm) of the middle layer portion 21, thereby firmly integrating the base plate portion 20 and the middle layer portion 21 (see...). Figure 8 ).

[0096] Grinding process: such as Figure 9 As shown, after the bonding process is completed, the other side of the middle layer 21 opposite to the contact interface with the substrate 20 is ground, typically polished to a mirror finish by CMP processing. Since the rigidity of the workpiece is enhanced by the substrate 20, the workpiece can be processed in the same way as a regular wafer.

[0097] The formation process of piezoelectric layer 5: such as Figure 10As shown, after the grinding process is completed, the other side of the mirror-finished middle layer 21 is placed opposite the other side of the mirror-finished surface layer 22, so that the surface layer 22 is stacked on the middle layer 21, and the other side of the middle layer 21 is directly joined to the other side of the surface layer 22.

[0098] Subsequently, the surface layer portion 22 is polished until it reaches a specified thickness, thereby obtaining the wafer 19, which serves as the device chip 2 (see...). Figure 11 ).

[0099] On the surface layer portion 22 of the wafer 19 thus obtained, the circuit pattern 6 is formed in the region corresponding to each device chip 2 (see...). Figure 12 ).

[0100] Subsequently, the other side of the substrate 20 is back-side ground as needed, and then the wafer 19 is diced, thereby separating multiple device chips 2 from a single wafer 19 (see...). Figure 13 ).

[0101] (Third embodiment) Figure 14 A third embodiment of the elastic wave device 1 is shown.

[0102] The elastic wave device 1 in the third embodiment is mainly composed of device chip 2.

[0103] The device chip 2 includes a support substrate 3, a first hypersonic layer 4a, a second hypersonic layer 4b, and a piezoelectric layer 5.

[0104] The device chip 2 presents a flat hexahedral structure consisting of a functional surface 2a formed by the surface of the piezoelectric layer 5, a back surface 2b opposite to the functional surface 2a, and four side surfaces 2c connecting the functional surface 2a and the back surface 2b. In the third embodiment, the back surface 2b is formed by one side of the second hypersonic layer 4b opposite to the side that is joined to the support substrate 3.

[0105] The support substrate 3 is made of glass.

[0106] The first hypersonic layer 4a is formed on one side of the support substrate 3.

[0107] The second hypersonic layer 4b is formed on the other side of the support substrate 3.

[0108] The piezoelectric layer 5 is formed on the first hypersonic layer 4a. Furthermore, a resonator 7 comprising a function for exciting a specified surface wave (SH wave) is formed on the piezoelectric layer 5 (i.e., on the functional surface 2a). Figure 2 Circuit pattern 6.

[0109] The circuit pattern 6 includes multiple resonators 7, multiple bump receivers 8, inter-resonator wiring (not shown) for connecting the resonators 7, and external connection wiring (not shown) for connecting the resonators 7 to the bump receivers 8. The circuit pattern 6 is typically formed on the piezoelectric layer 5 by photolithography using a conductive metal film.

[0110] The elastic wave device 1 described in the third embodiment has a CSP (Chip Size Package) structure. Figure 14 In the diagram, symbol 9 represents the packaging substrate, symbol 9a represents the mounting surface of the packaging substrate 9, symbol 9b represents the pad on the side of the packaging substrate 9, symbol 9c represents the external output pad formed on the back side opposite the mounting surface 9a of the packaging substrate 9, symbol 10 represents the encapsulation resin, symbol 11 represents the bump, and symbol 12 represents the internal space.

[0111] The device chip 2 is mounted on the packaging substrate 9 with its functional surface 2a facing the mounting surface of the packaging substrate 9.

[0112] By fusing the bump 11 formed on the bump receiving portion 8 to the pad 9b, the circuitry on the device chip 2 side and the circuitry on the package substrate 9 side are electrically connected.

[0113] A gap is formed between the functional surface 2a and the mounting surface 9a, which is composed of the thickness of the bump receiving part 8, the bump 11 and the pad 9b.

[0114] The encapsulating resin 10 is made of insulating resin. The encapsulating resin 10 covers the entire back surface 2b opposite to the functional surface 2a of the device chip 2 and the side surface 2c of the device chip 2, and extends into the space between the functional surface 2a and the mounting surface 9a directly below the side surface 2c, thereby forming the internal space 12.

[0115] The first hypersonic layer 4a and the second hypersonic layer 4b are respectively configured to have a volume wave speed higher than that of the piezoelectric layer 5, and have a thickness of more than twice the wavelength of the surface wave.

[0116] For example, if the wavelength of the surface wave is 4 μm, the thickness of the first hypersonic layer 4a and the second hypersonic layer 4b will be set to 8 μm or more.

[0117] The first hypersonic layer 4a and the second hypersonic layer 4b are preferably made of spinel.

[0118] On the other hand, the support substrate 3 is made of a glass whose coefficient of thermal expansion in the range from softening point temperature to room temperature is controlled within ±6% of the coefficient of thermal expansion of the materials constituting the first hypersonic layer 4a and the second hypersonic layer 4b.

[0119] Typically, when the hypersonic layer 4 is composed of spinel, the coefficient of thermal expansion of spinel is 7.4 × 10⁻⁶. -6 / K, therefore the glass is typically composed of borosilicate glass, phosphosilicate glass, or borophosphosilicate glass (BPSG), and its coefficient of thermal expansion is adjusted to 7.0 × 10⁻⁶. -6 / K to 7.8×10 -6 / K.

[0120] The coefficient of thermal expansion can be adjusted by regulating the boron (B) content in the borosilicate glass, the phosphorus (P) content in the phosphosilicate glass, or the boron and phosphorus content in the borosilicate-phosphosilicate glass.

[0121] Furthermore, in the first hypersonic layer 4a and the second hypersonic layer 4b, the side that contacts the support substrate 3 (the bonding side described below) is a rough surface r with a surface roughness Ra of 0.5 to 5 μm.

[0122] The rough surface r is formed by creating numerous recesses and numerous protrusions on the surfaces of the first hypersonic layer 4a and the second hypersonic layer 4b, such that there are protrusions between the recesses and recesses between the protrusions.

[0123] like Figure 14 As shown, the material of the support substrate 3 is seamlessly embedded in the recess of the rough surface r, while the protrusion of the rough surface r is embedded inside the support substrate 3.

[0124] By setting the thickness of the first hypersonic layer 4a to be more than twice the wavelength of the surface wave, the surface wave can be reflected and confined within the piezoelectric layer 5. This allows the elastic wave device 1 to acquire the desired characteristics.

[0125] Furthermore, by setting the first hypersonic layer 4a and the second hypersonic layer 4b to at least the aforementioned thickness, and by supporting the hypersonic layer having such thickness by the support substrate 3, it is possible to minimize the amount of material used in the relatively expensive first hypersonic layer 4a and the second hypersonic layer 4b, which constitute the device chip 2, while ensuring the required characteristics.

[0126] In addition, by controlling the coefficient of thermal expansion of the glass constituting the support substrate 3 within ±6% of the coefficient of thermal expansion of the materials constituting the first hypersonic layer 4a and the second hypersonic layer 4b, it is possible to effectively suppress the warping of the device chip 2 caused by the heat generated during the driving of the elastic wave device 1, or the warping of the wafer 19 that may occur during the manufacturing process of the device chip 2 described later.

[0127] In particular, in this third embodiment, since a first hypersonic layer 4a is formed on one side of the support substrate 3 and a second hypersonic layer 4b is formed on the other side, the force caused by the difference in thermal expansion coefficients acts on one side of the support substrate 3, thereby causing it to produce... Figure 14 In the case of warping as indicated by the symbol w1, an effect such as [missing information] can be applied to the other side of the support substrate 3. Figure 14 The reaction force, indicated by the symbol w2, acts in the opposite direction to the warping, thus more effectively suppressing the warping.

[0128] Alternatively, a force caused by the difference in thermal expansion coefficients may act on one side of the supporting substrate 3, causing it to produce a force similar to... Figure 14 In the case of warping as shown by the symbol w3, an effect can also be produced on the other side, such as Figure 14 The reaction force, indicated by the symbol w4, is opposite to the direction of warping, in order to more effectively prevent warping from occurring.

[0129] Therefore, unlike the first embodiment, in this third embodiment, the coefficient of thermal expansion of the glass constituting the support substrate 3 will not cause any problems even if it is within ±6% of the coefficient of thermal expansion of the materials constituting the first hypersonic layer 4a and the second hypersonic layer 4b.

[0130] The piezoelectric layer 5 is typically composed of lithium tantalate or lithium niobate, which are piezoelectric elements.

[0131] Typically, the device chip 2 is configured as a rectangular plate structure with one side of 0.5 to 1 mm and a thickness of 0.15 to 0.2 mm, and when viewed from a direction perpendicular to the functional surface 2a, the outline of the functional surface 2a is rectangular.

[0132] Furthermore, the thickness of the piezoelectric layer 5 is typically 0.2 to 2 μm.

[0133] The thickness of the first hypersonic layer 4a and the second hypersonic layer 4b is typically 2 to 20 μm.

[0134] The thickness of the support substrate 3 is typically 100 to 200 μm.

[0135] It should be noted that, in the accompanying drawings, the thickness of the constituent elements of the elastic wave device 1 is exaggerated in order to facilitate understanding of its structure.

[0136] (4th embodiment) Figure 15 The fourth embodiment of the elastic wave device 1 is shown.

[0137] The elastic wave device 1 in the fourth embodiment is also mainly composed of device chip 2.

[0138] The fourth embodiment is an elastic wave device 1 with a WLP (Wafer Level Package) structure.

[0139] exist Figure 15 In the diagram, symbol 14 represents the support layer, symbol 15 represents the capping layer, symbol 16 represents a through hole, symbol 17 represents wiring inside the through hole, and symbol 18 represents a bump.

[0140] The support layer 14 is made of insulating resin. The support layer 14 is formed on the functional surface 2a, surrounding the formation region of the resonator 7.

[0141] The cover layer 15 is also made of insulating resin. The cover layer 15 is supported on the support layer 14 and together with the functional surface 2a and the support layer 14, forms the internal space 12 facing the resonator 7.

[0142] The through-hole 16 penetrates the support layer 14 and the cover layer 15, and its bottom is located at the position of the external connection pad 8 on the functional surface 2a in the area outside the internal space 12.

[0143] The wiring 17 inside the through hole is made of conductive metal filling the through hole 16, with its inner end connected to the external connection pad 8 and its outer end connected to the bump 18.

[0144] The fourth embodiment achieves mounting to the module substrate, etc., through the bump 18.

[0145] It should be noted that the other structures of the device chip 2 constituting this fourth embodiment are substantially the same as those of the device chip 2 constituting the third embodiment. Therefore, in Figure 15 The same reference numerals as those in the third embodiment are attached to it, and its detailed description is omitted.

[0146] (Method for manufacturing wafer 19 of device chip 2 for use in embodiments 3 and 4) The wafer 19 of the device chip 2 used to constitute the elastic wave device 1 of the third and fourth embodiments can be manufactured appropriately and reasonably by a manufacturing method including the following steps.

[0147] like Figure 22 As shown, the wafer 19 includes a base plate portion 20 as the support substrate 3, a first middle layer portion 21a as the first hypersonic layer 4a, a second middle layer portion 21b as the second hypersonic layer 4b, and a surface layer portion 22 as the piezoelectric layer 5.

[0148] Cutting process: Prepare an ingot (not shown in the figure) made of the material constituting the first hypersonic layer 4a and the second hypersonic layer 4b.

[0149] When the first hypersonic layer 4a and the second hypersonic layer 4b are made of spinel, the ingot is rod-shaped and made of spinel.

[0150] Then, the ingot is cut along a direction perpendicular to its central axis to cut out a disk-shaped first central layer portion 21a and a second central layer portion 21b (see...). Figure 16 ).

[0151] Typically, the first middle layer 21a and the second middle layer 21b are cut to a thickness of 50 μm to 100 μm.

[0152] Furthermore, through the aforementioned cutting, the surfaces of the first middle layer 21a and the second middle layer 21b are made into rough surfaces r with a surface roughness Ra of 0.5 to 5 μm.

[0153] Meanwhile, the first middle layer 21a and the second middle layer 21b are made to have substantially the same thickness.

[0154] Before the bonding process, the middle layer 21 is cleaned to remove impurities such as dust generated on its surface due to cutting (see...). Figures 16 to 17 ).

[0155] Bonding process: such as Figure 18 As shown, one side of a base plate portion 20 is placed opposite one side of a first middle layer portion 21a, and the other side of the base plate portion 20 is placed opposite one side of a second middle layer portion 21b, and is disposed between a pair of retainers H constituting the bonding device.

[0156] The base plate portion 20 is typically made to have substantially the same area as the first middle layer portion 21a and the second middle layer portion 21b, and has a thickness of 100 to 200 μm, and is heated to the softening point temperature before being installed.

[0157] Subsequently, the bonding device is activated to reduce the distance between the pair of retainers H, and a specified pressure is applied to the workpiece formed by the first middle layer 21a and the second middle layer 21b being stacked on the base plate 20 to perform the pressing.

[0158] That is, in the bonding process, the base plate portion 20 is heated to the softening point temperature and placed between the first middle layer portion 21a and the second middle layer portion 21b, and pressure is applied after the three are stacked together to perform pressing.

[0159] Through this heating and pressurizing process, the contact interface between the base plate portion 20 and the first middle layer portion 21a will be shaped into a complementary surface shape according to the rough surface r (surface roughness Ra is 0.5 to 5 μm) of the first middle layer portion 21a, thereby making the base plate portion 20 and the first middle layer portion 21a firmly integrated (see...). Figure 19 ).

[0160] Simultaneously, through this heating and pressurizing treatment, the contact interface between the base plate portion 20 and the second middle layer portion 21b will also be shaped into a complementary surface shape according to the rough surface r (surface roughness Ra is 0.5 to 5 μm) of the second middle layer portion 21b, thereby firmly integrating the base plate portion 20 and the second middle layer portion 21b (see...). Figure 19 ).

[0161] Grinding process: such as Figure 20 As shown, after the bonding process is completed, the other side of the first middle layer 21a opposite to the contact interface with the base plate 20 is ground, typically mirror-finished by CMP processing. At the same time, the other side of the second middle layer 21b opposite to the contact interface with the base plate 20 is also ground, typically mirror-finished by CMP processing as well.

[0162] Since the workpiece is reinforced with rigidity by the base plate portion 20, it can be operated and processed like a regular wafer 19.

[0163] The formation process of piezoelectric layer 5: such as Figure 21 As shown, after the grinding process is completed, the other side of the mirror-finished first middle layer 21a is placed opposite the other side of the mirror-finished surface layer 22, so that the surface layer 22 is stacked on the first middle layer 21a, and the other side of the first middle layer 21a is directly joined to the other side of the surface layer 22.

[0164] Subsequently, by grinding the surface layer portion 22 until it reaches a specified thickness, a wafer 19 (see [reference]) can be obtained as the device chip 2. Figure 22 ).

[0165] On the surface layer portion 22 of the wafer 19 thus obtained, the circuit pattern 6 is formed in the region corresponding to each device chip 2 (see...). Figure 23 ).

[0166] Subsequently, by dicing the wafer 19, multiple device chips 2 can be separated from a single wafer 19 (see...). Figure 24 ).

[0167] It should be noted that the present invention is not limited to the embodiments described above. All embodiments that can achieve the purpose of the present invention are included within the scope of the present invention.

Claims

1. An elastic wave device, characterized in that, The device chip is the main body. The device chip includes a support substrate made of glass, a hypersonic layer formed on the support substrate, and a piezoelectric layer formed on the hypersonic layer. A circuit pattern consisting of a resonator for exciting a specified surface wave is formed on the piezoelectric layer in the device chip. The hypersonic layer is configured to have a volume wave speed faster than that of the piezoelectric layer, and has a thickness more than twice the wavelength of the surface wave. Furthermore, the coefficient of thermal expansion of the glass from its softening point to room temperature is set to be within ±3% of the coefficient of thermal expansion of the material of the hypersonic layer.

2. The elastic wave device according to claim 1, characterized in that, The hypersonic layer is composed of spinel.

3. The elastic wave device according to claim 2, characterized in that, The glass support substrate can be made of borosilicate glass, phosphosilicate glass, or borosilicate-phosphosilicate glass (BPSG), and the coefficient of thermal expansion of the glass support substrate is 7.2 × 10⁻⁶. -6 / K to 7.6×10 -6 / K.

4. A method for fabricating a wafer, the wafer constituting the device chip of any of the elastic wave devices as described in claims 1 to 3, characterized in that, The wafer includes a base plate portion serving as the supporting substrate, a middle layer portion serving as the hypersonic layer, and a surface layer portion serving as the piezoelectric layer. The manufacturing method includes: a cutting step of cutting the middle layer portion from an ingot made of a material constituting the hypersonic layer; and a bonding step of bonding the base plate portion to the middle layer portion. In the bonding process, the base plate portion is heated to its softening point temperature, and the middle layer portion is stacked on top of the base plate portion and pressure is applied.

5. A wafer manufacturing method according to claim 4, characterized in that, The surface roughness Ra of the middle layer portion used to adhere to one side of the base plate portion is 0.5 to 5 μm.

6. An elastic wave device, characterized in that, It is based on a device chip, which has a support substrate made of glass, a first hypersonic layer formed on one side of the support substrate, a piezoelectric layer formed on the first hypersonic layer, and a second hypersonic layer formed on the other side of the support substrate. A circuit pattern consisting of a resonator for exciting a specified surface wave is formed on the piezoelectric layer in the device chip. The first hypersonic layer and the second hypersonic layer are both made of the same material, which has a volume wave speed that is faster than that of the piezoelectric layer, and both have the same thickness, which is more than twice the wavelength of the surface wave. In addition, the coefficient of thermal expansion of the glass from the softening point temperature to room temperature falls within ±6% of the coefficient of thermal expansion of the materials constituting the first and second hypersonic layers.

7. An elastic wave device according to claim 6, characterized in that, The first hypersonic layer and the second hypersonic layer are made of spinel.

8. The elastic wave device according to claim 7, characterized in that, The glass support substrate can be made of borosilicate glass, phosphosilicate glass, or borosilicate-phosphosilicate glass (BPSG), and the coefficient of thermal expansion of the glass support substrate is 7.2 × 10⁻⁶. -6 / K to 7.6×10 -6 / K.

9. A method for manufacturing a wafer, the wafer constituting the device chip of any of the elastic wave devices as described in claims 6 to 8, characterized in that, The wafer includes a base plate portion serving as the supporting substrate, a first middle layer portion serving as the first hypersonic layer, a second middle layer portion serving as the second hypersonic layer, and a surface layer portion serving as the piezoelectric layer. The manufacturing method includes a cutting process of cutting out the first middle layer portion and the second middle layer portion from an ingot made of a material constituting the first hypersonic layer and the second hypersonic layer; The bonding process includes attaching the second middle layer to one side of the base plate and attaching the first middle layer to the other side of the base plate. In the bonding process, the substrate portion is heated to its softening point temperature and placed between the first middle layer portion and the second middle layer portion. Pressure is applied after the three are stacked to complete the bonding.

10. A method for manufacturing a wafer according to claim 9, characterized in that, The surface roughness Ra of the first middle layer and the second middle layer used to adhere to one side of the base plate is 0.5 to 5 μm.

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