Circuit board structure and manufacturing method thereof
By introducing an insulating layer and multiple shielding layers into the flexible circuit board for wireless charging, the problems of line edge oxidation and electromagnetic interference are solved, achieving better electromagnetic shielding and high-power applications.
Patent Information
- Application Number
- CN202411148615.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-20
- Publication Date
- 2026-03-03
AI Technical Summary
Traditional wireless charging flexible circuit boards have structural design flaws that cause oxidation and electromagnetic interference due to gaps at the edges of the circuits.
The structure is designed with dielectric layer, circuit layer, cover film layer, insulating layer, first shielding layer and second shielding layer. The electromagnetic shielding effect is improved by setting insulating layer and first shielding layer to fill gaps on the side surface of circuit layer and combining the first and second shielding layers.
It solves the problem of oxidation in the circuit layer and improves the electromagnetic shielding effect, making it suitable for high-power applications.
Smart Images
Figure CN121604252A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit board technology, and in particular to a circuit board structure and its manufacturing method. Background Technology
[0002] Wireless charging technology, with its convenience, is gradually becoming a new trend in charging electronic products. Flexible circuit boards (PCBs) are now commonly used to fabricate wireless charging coils. Traditional wireless charging PCBs use a relatively thick conductor (copper) circuitry paired with a very thin cover film (CVL, which includes an adhesive layer and a substrate layer). Vacuum bonding is typically used to fill the circuitry with the cover film. However, because the adhesive layer of CVL is generally thin, it cannot completely fill the gaps between the circuits. This results in gaps at the edges of the circuitry due to the unfilled adhesive layer, making it prone to air bubbles. After cutting, the board edges are easily separated, leading to oxidation of the circuitry.
[0003] Currently, the commonly used shielding material for flexible circuit boards for wireless charging is ferrite. Ferrite is generally only placed on the upper surface of the circuit board, and the side surface of the coil cannot be shielded and is easily affected by electromagnetic interference. Summary of the Invention
[0004] In view of this, this application proposes a circuit board structure and its manufacturing method to protect the circuit from oxidation and improve the electromagnetic shielding effect.
[0005] One embodiment of this application provides a circuit board structure including a dielectric layer, a circuit layer, a cover film layer, an insulating layer, a first shielding layer, and a second shielding layer. The circuit layer is formed on at least one surface of the dielectric layer. The cover film layer is disposed on the surface of the circuit layer opposite to the dielectric layer and covers a portion of the surface of the dielectric layer exposed from the circuit layer. The insulating layer is disposed on a side surface of the circuit layer. The first shielding layer is disposed on the surface of the insulating layer, and a portion of the surface of the first shielding layer is covered by the cover film layer. The second shielding layer is disposed on the surface of the cover film layer opposite to the circuit layer.
[0006] In one embodiment, the first shielding layer comprises a conductor and fluororubber, and the second shielding layer comprises ferrite.
[0007] In one embodiment, the conductor includes one or more of aluminum, nickel, and graphene, and the fluorinated rubber includes one or more of polytetrafluoroethylene, polychlorotrifluoroethylene, ethylene fluoride, polyvinylidene fluoride, vinylidene fluoride-hexafluoropropylene copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and chlorofluoroethylene-vinylidene fluoride copolymer.
[0008] In one embodiment, the thickness of the first shielding layer is 50 μm to 100 μm.
[0009] In one embodiment, the thickness of the insulating layer is 40 μm to 60 μm.
[0010] In one embodiment, the dielectric layer has a groove. A portion of the insulating layer and a portion of the first shielding layer are located within the groove, the groove having a depth of 10 μm to 14 μm.
[0011] One embodiment of this application provides a method for manufacturing a circuit board structure, comprising the following steps: forming a circuit layer on a dielectric layer; forming a groove on the dielectric layer; providing an insulating layer on a side surface of the circuit layer, with a portion of the insulating layer located within the groove; providing a first shielding layer on the surface of the insulating layer away from the circuit layer, with a portion of the first shielding layer located within the groove; providing a cover film layer on the circuit layer, the cover film layer covering the circuit layer, the insulating layer, the first shielding layer, and the dielectric layer; and providing a second shielding layer on the surface of the cover film layer opposite to the circuit layer.
[0012] The circuit board structure and manufacturing method of this application solve the problem of circuit layer oxidation caused by the presence of such gaps by setting an insulating layer and a first shielding layer on the side surface of the circuit layer. This fills the gap between the circuit layer and the cover film layer. Furthermore, the combination of the first and second shielding layers not only achieves complete coverage of the circuit layer, improving electromagnetic shielding (especially the shielding effect on the side surface of the circuit layer), but also makes the circuit board structure suitable for high-power applications. Attached Figure Description
[0013] Figure 1 This is a cross-sectional view of a circuit board structure according to an embodiment of this application.
[0014] Figures 2A to 2D This is a cross-sectional view of a circuit layer formed on a dielectric layer.
[0015] Figure 3 In order to be in Figure 2D A cross-sectional view of the grooves formed on the dielectric layer of the structure shown.
[0016] Figure 4 In order to be in Figure 3 The diagram shows a cross-sectional view of the structure with an insulating layer.
[0017] Figure 5 In order to be in Figure 4 The diagram shows a cross-sectional view of the structure with a first shielding layer.
[0018] Figure 6 In order to be in Figure 5 The diagram shows a cross-sectional view of the structure with a covering membrane layer.
[0019] Explanation of main component symbols
[0020] Circuit board structure 100
[0021] Dielectric layer 10
[0022] Line layer 20
[0023] Covering membrane layer 30
[0024] Insulation layer 40
[0025] First shielding layer 50
[0026] Second shielding layer 60
[0027] Copper Clad Laminate 70
[0028] Groove 101
[0029] Conductive hole 21
[0030] Adhesive layer 31
[0031] Substrate layer 32
[0032] Copper foil layer 71
[0033] Copper plating layer 72
[0034] Through Hole 701
[0035] The following detailed description, in conjunction with the accompanying drawings, further illustrates the embodiments of this application. Detailed Implementation
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the embodiments of this application pertain. The terminology used herein is for the purpose of describing particular implementations only and is not intended to limit the embodiments of this application. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased commercially.
[0037] It will be understood that when a layer is referred to as "on" another layer, it can be directly on that other layer or there may be an intermediate layer in between. Conversely, when a layer is referred to as "directly on" another layer, there is no intermediate layer. When a component is referred to as "fixed to," "mounted to," or "set on" another component, it can be directly on that other component or there may be an intermediate component. The term "and / or" as used herein includes all and any combination of one or more of the associated listed items.
[0038] Embodiments of this application are described herein with reference to cross-sectional views, which are schematic diagrams of idealized embodiments (and intermediate configurations) of this application. Therefore, variations in the shapes illustrated due to manufacturing processes and / or tolerances are foreseeable. Consequently, embodiments of this application should not be construed as limited to the specific shapes of the areas illustrated herein, but should include, for example, deviations in shape due to manufacturing processes. The areas shown in the figures are merely illustrative, and their shapes are not intended to represent the actual shapes of the illustrated devices, nor are they intended to limit the scope of this application.
[0039] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0040] Please see Figure 1 The first aspect of this application provides a circuit board structure 100, which includes a dielectric layer 10, a circuit layer 20, a cover film layer 30, an insulating layer 40, a first shielding layer 50, and a second shielding layer 60. The circuit board structure 100 can be a cube or a cuboid in shape. Figure 1 The image shown is a partial cross-sectional view of the circuit board structure 100, which shows the circuit layer 20 located in the direction of extension of the dielectric layer 10 (i.e., Figure 1 The structure at the end of the dielectric layer 10 (which can be either the length direction or the width direction of the dielectric layer 10) is located in the horizontal direction.
[0041] The dielectric layer 10 may have a groove 101 that penetrates a portion of the dielectric layer 10 along its thickness direction. In this embodiment, as shown... Figure 1 As shown, the groove 101 can be formed by recessing the upper surface of the dielectric layer 10 towards the lower surface. In other embodiments, the groove 101 can also be formed by recessing the lower surface of the dielectric layer 10 towards the upper surface. The dielectric layer 10 can be made of rigid or flexible materials such as polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate dimethyl acid glycol ester (PEN), polydimethylsiloxane (PDMS), liquid crystal polymer (LCP), and modified polyimide (MPI).
[0042] A circuit layer 20 is formed on at least one surface of the dielectric layer 10. In this embodiment, the circuit layers 20 are formed in the thickness direction of the dielectric layer 10 (i.e., ...). Figure 1In the vertical direction of the dielectric layer 10, two opposing surfaces (i.e., the upper and lower surfaces of the dielectric layer 10) are each covered with a circuit layer 20, and the two circuit layers 20 can be connected through a conductive via 21. In other embodiments, the dielectric layer 10 can have multiple layers, and the circuit layer 20 can have two or more layers. Each dielectric layer 10 is located between two adjacent circuit layers 20, and the two adjacent circuit layers 20 can be electrically connected through a conductive via 21.
[0043] It should be noted that each circuit layer 20 is a coil structure composed of concentric loops. The first loop is the innermost loop of circuit layer 20, and the Mth loop (M is an integer greater than 1) is the outermost loop. Each loop can be a complete 360-degree circle, a loop composed of multiple broken line segments (the angle between adjacent broken line segments can be 90 degrees), or a loop composed of both arc segments and broken line segments. The groove 101 is located in the dielectric layer 10 on the outer side corresponding to the orthographic projection of the outermost loop of circuit layer 20 (i.e., the side away from the center of dielectric layer 10), and circuit layer 20 does not surround the groove 101. The sidewall of the groove 101 near circuit layer 20 may overlap with the edge of circuit layer 20 in the vertical direction.
[0044] A cover film 30 is disposed on the surface of the circuit layer 20 and covers a portion of the surface of the dielectric layer 10 exposed from the circuit layer 20. The portion of the dielectric layer 10 covered by the cover film 30 refers to the surface of the dielectric layer 10 exposed from the pattern gaps in the circuit layer 20, and the surface of the dielectric layer 10 on the side of the groove 101 away from the circuit layer 20 where no circuit layer 20 is disposed. It is understood that when the circuit layer 20 has multiple layers, the cover film 30 is located on the surface of the outermost circuit layer 20. The cover film 30 may include an adhesive layer 31 and a substrate layer 32, with the adhesive layer 31 located between the circuit layer 20 and the substrate layer 32, and the substrate layer 32 located on the surface of the adhesive layer 31 facing away from the circuit layer 20. The adhesive layer 31 may be, but is not limited to, acrylic hot melt adhesive (AD adhesive), and the substrate layer 32 may be, but is not limited to, PI, PET, etc. Figure 1 As shown, the adhesive layer 31 can also be filled into the conductive hole 21 to improve the stability of the overall structure.
[0045] An insulating layer 40 is disposed on the side surface of the circuit layer 20, and a portion of the insulating layer 40 is located within the groove 101. The side surface of the circuit layer 20 refers to the surface of the outermost ring of the circuit layer 20 that connects the upper and lower surfaces of the outermost ring and is located on the outer side (away from the center). The top surface of the insulating layer 40 may be flush with the surface of the circuit layer 20 facing away from the dielectric layer 10. Because a portion of the insulating layer 40 is located within the groove 101 along the thickness direction of the dielectric layer 10, this enhances the fixation of the insulating layer 40, making it more stable.
[0046] In this embodiment, as Figure 1As shown, the circuit layer 20 on the upper surface of the dielectric layer 10 has an insulating layer 40 on its side surface, and the circuit layer 20 on the lower surface of the dielectric layer 10 also has an insulating layer 40 on its side surface. No groove 101 is formed on the lower surface of the dielectric layer 10, and the insulating layer 40 on the lower surface is attached to the side surface of the circuit layer 20 and the lower surface of the dielectric layer 10. It can be understood that because the covering film layer 30 exerts a certain force on the insulating layer 40 during lamination, the top (bottom) surface of the insulating layer 40 (i.e., the surface of the insulating layer 40 away from the dielectric layer 10 along the thickness direction of the dielectric layer 10) is a surface with a certain curvature, rather than a completely flat surface parallel to the horizontal direction.
[0047] The first shielding layer 50 is disposed on the surface of the insulating layer 40, and a portion of the first shielding layer 50 is located within the groove 101. A portion of the surface of the first shielding layer 50 is covered by the covering film layer 30. That is, the first shielding layer 50 and the insulating layer 40 are along the extending direction of the dielectric layer 10 (i.e.,...). Figure 1 The insulating layer 40 and the cover film layer 30 are arranged side by side in a horizontal direction. Along this extension direction, the surface of the insulating layer 40 away from the circuit layer 20 is covered by the first shielding layer 50. The gap between the circuit layer 20 and the cover film layer 30 is filled by the insulating layer 40 and the first shielding layer 50, thus solving the problem of oxidation of the circuit layer 20 due to the presence of this gap. The insulating layer 40 is used to insulate between the circuit layer 20 and the first shielding layer 50. The first shielding layer 50 is used to shield the side surfaces of the circuit layer 20 to prevent electromagnetic interference.
[0048] The second shielding layer 60 is disposed on the surface of the cover film layer 30 facing away from the circuit layer 20. The orthographic projection of the second shielding layer 60 along its thickness direction can overlap with the circuit layer 20, but it does not cover the insulating layer 40 or the first shielding layer 50. The second shielding layer 60 can be formed of ferrite, which has high permeability at high frequencies. Therefore, ferrite has become a widely used non-metallic magnetic material in the field of high-frequency weak current. However, ferrite has low magnetic energy stored per unit volume and low saturation magnetization (usually only 1 / 3 to 1 / 5 of pure iron), thus limiting its application in high-power fields. The combination of the first shielding layer 50 and the second shielding layer 60 can achieve full coverage of the circuit layer 20, improve the electromagnetic shielding effect (especially the shielding effect on the side surface of the circuit layer 20), and make the circuit board structure 100 suitable for high-power applications.
[0049] In some embodiments, the first shielding layer 50 includes a conductor and a fluorinated rubber. The conductor may be, but is not limited to, one or more of aluminum, nickel, and graphene. The fluorinated rubber may be, but is not limited to, polytetrafluoroethylene, polychlorotrifluoroethylene, ethylene fluoride, polyvinylidene fluoride, vinylidene fluoride-hexafluoropropylene copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and chlorofluoroethylene-vinylidene fluoride copolymer. The fluorinated rubber is obtained by modifying the resin with fluorine (increasing CF bonds), where the bond energy of the CF (carbon-fluorine) bond is greater than that of the CH (carbon-hydrogen) bond. Therefore, by modifying the rubber with fluorine to increase the CF bonds, the breaking of bonds between elements due to heat becomes less likely. Furthermore, compared to the case without fluorine modification (i.e., -CH2-), the rotational ease of the CC (carbon-carbon) bonds in the resin backbone is more difficult after fluorine modification, resulting in a higher bond energy. Therefore, thermal decomposition becomes less likely, and heat resistance is improved. In summary, fluororubber helps improve the heat resistance of the first shielding layer 50, thereby improving the overall heat resistance of the circuit board structure 100.
[0050] In some embodiments, such as Figure 1 As shown, the thickness T1 of the first shielding layer 50 is 50μm to 100μm. It can be understood that the thickness direction of the first shielding layer 50 is parallel to the thickness direction of the circuit board structure 100 (i.e.,...). Figure 1 The vertical direction of the dielectric layer 10, the line layer 20, and the thickness direction of the second shielding layer 60 are different. The thickness direction of the first shielding layer 50 is the extension direction of the dielectric layer 10 (i.e., the extension direction of the first shielding layer 50). Figure 1 (Horizontal direction in the circuit). The thickness T1 of the first shielding layer 50 can be 50μm, 60μm, 70μm, 80μm, 90μm, 100μm, or any value between any two adjacent values mentioned above. In this way, the shielding effect can be guaranteed without increasing the overall volume of the circuit board structure 100.
[0051] In some embodiments, such as Figure 1 As shown, the thickness T2 of the insulating layer 40 is 40μm to 60μm. This ensures insulation effectiveness without increasing the overall volume of the circuit board structure 100. The thickness direction of the insulating layer 40 is consistent with the thickness direction of the first shielding layer 50. The thickness T2 of the insulating layer 40 can be 40μm, 42μm, 45μm, 50μm, 55μm, 60μm, or any value between any two adjacent values mentioned above. The insulating layer 40 can be a polyimide film (PI).
[0052] In some embodiments, such as Figure 1 As shown, the depth H of the groove 101 is 10μm to 14μm. The depth direction of the groove 101 is the same as the thickness direction of the dielectric layer 10, that is... Figure 1The vertical direction within. The depth H of the groove 101 can be 10μm, 10.5μm, 11μm, 12μm, 13μm, 14μm or any value between any two adjacent values mentioned above.
[0053] Please see Figures 2A to 6 The second aspect of this application proposes a method for manufacturing the aforementioned circuit board structure 100, which includes steps S10 to S60. It is understood that the numbering of the steps is intended to clearly describe the specific manufacturing method and does not imply a limitation on the order of the steps.
[0054] S10, please refer to Figures 2A to 2D A circuit layer 20 is formed on the dielectric layer 10. S10 may further include steps S11 to S14.
[0055] like Figure 2A As shown in Figure S11, a copper-clad laminate 70 is provided. The copper-clad laminate 70 includes a dielectric layer 10 and copper foil layers 71 located on opposite surfaces in the thickness direction of the dielectric layer 10.
[0056] like Figure 2B As shown, in S12, through holes 701 can be formed on the copper-clad laminate 70 by means of mechanical drilling, laser cutting, etc.
[0057] like Figure 2C As shown, in step S13, a copper plating layer 72 is formed on the surface of the copper foil layer 71 facing away from the dielectric layer 10 and on the inner wall of the through-hole 701. Specifically, a dry film (not shown) can be first laminated onto the surface of the copper foil layer 71 facing away from the dielectric layer 10, and then the dry film is exposed, developed, and etched, leaving only a portion of the dry film. Next, a copper plating layer 72 can be plated onto the surface of the copper foil layer 71 not covered by the dry film and on the inner wall of the through-hole 701 by electroplating, without completely filling the through-hole 701. After the copper plating layer 72 is formed on the inner wall of the through-hole 701, a conductive hole 21 is formed. Finally, the remaining dry film is removed.
[0058] like Figure 2D As shown, in step S14, the copper plating layer 72 and the copper foil layer 71 are etched to form the circuit layer 20. In this embodiment, the dielectric layer 10 is one layer, and the circuit layer 20 is two layers. In other embodiments, additional layers can be added outside the circuit layer 20. That is, the dielectric layer 10 can have multiple layers, and the circuit layer 20 can have more than two layers. Each dielectric layer 10 is located between two adjacent circuit layers 20, and adjacent circuit layers 20 can be electrically connected through conductive vias 21.
[0059] It should be noted that each circuit layer 20 is a coil structure composed of concentric loops. The first loop is the innermost loop of circuit layer 20, and the Mth loop (where M is an integer greater than 1) is the outermost loop of circuit layer 20. Each loop can be a complete 360-degree circle, a loop composed of multiple broken line segments (the angle between adjacent broken line segments can be 90 degrees), or a loop composed of both arc segments and broken line segments.
[0060] S20, please refer to Figure 3 A groove 101 can be formed on the dielectric layer 10 by means of laser, but not limited to laser. The groove 101 can be adjacent to the orthographic projection of the circuit layer 20 on the dielectric layer 10, and the sidewall of the groove 101 near the circuit layer 20 can overlap with the edge of the circuit layer 20 in the vertical direction.
[0061] S30, please refer to Figure 4 An insulating layer 40 is provided on the side surface of the circuit layer 20, and a portion of the insulating layer 40 is located within the groove 101. The side surface of the circuit layer 20 refers to the surface of the outermost ring of the circuit layer 20 that connects the upper and lower surfaces of the outermost ring and is located on the outer side (away from the center). The insulating layer 40 may be a polyimide film.
[0062] S40, please refer to Figure 5 A first shielding layer 50 is disposed on the surface of the insulating layer 40 away from the circuit layer 20, and a portion of the first shielding layer 50 is located within the groove 101. The first shielding layer 50 and the insulating layer 40 are along the extending direction of the dielectric layer 10 (i.e., Figure 5 The two structures (horizontally aligned) are arranged side by side, filling the groove 101 and extending out from it. For example... Figure 5 As shown, before the cover film 30 is applied, along the thickness direction of the dielectric layer 10 and the circuit layer 20 (i.e., Figure 5 (In the vertical direction), the insulating layer 40 and the first shielding layer 50 are away from the surface of the dielectric layer 10 and can be flush with the surface of the circuit layer 20 away from the dielectric layer 10.
[0063] The first shielding layer 50 may include a conductor and a fluorinated rubber. The conductor may be, but is not limited to, one or more of aluminum, nickel, and graphene. The fluorinated rubber may be, but is not limited to, one or more of polytetrafluoroethylene, polychlorotrifluoroethylene, ethylene fluoride, polyvinylidene fluoride, vinylidene fluoride-hexafluoropropylene copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and chlorofluoroethylene-vinylidene fluoride copolymer. The fluorinated rubber helps to improve the heat resistance of the first shielding layer 50, thereby improving the heat resistance of the circuit board structure 100.
[0064] S50, please refer to Figure 6A cover film layer 30 is disposed on the circuit layer 20. The cover film layer 30 covers the circuit layer 20, the insulating layer 40, the first shielding layer 50, and the dielectric layer 10. That is, the exposed surfaces of the circuit layer 20, the insulating layer 40, the first shielding layer 50, and the dielectric layer 10 are all covered by the cover film layer 30. The cover film layer 30 may include an adhesive layer 31 and a substrate layer 32. The adhesive layer 31 is located between the circuit layer 20 and the substrate layer 32, and the substrate layer 32 is located on the surface of the adhesive layer 31 facing away from the circuit layer 20. The adhesive layer 31 may be, but is not limited to, AD adhesive, and the substrate layer 32 may be, but is not limited to, PI, PET, etc. The adhesive layer 31 may also fill the conductive holes 21 to improve the stability of the overall structure.
[0065] like Figure 6 As shown, after the cover film 30 is pressed, the top (bottom) surface of the insulating layer 40 (i.e. the surface of the insulating layer 40 away from the dielectric layer 10 along the thickness direction of the dielectric layer 10) is a surface with a certain curvature, rather than a flat surface that is completely flat with the horizontal direction.
[0066] S60, please refer to Figure 1 A second shielding layer 60 is provided on the surface of the cover film layer 30 opposite to the circuit layer 20, resulting in a circuit board structure 100. The second shielding layer 60 only covers a portion of the surface of the cover film layer 30, and its orthogonal projection along its thickness direction overlaps with the circuit layer 20, but does not cover the insulating layer 40 or the first shielding layer 50. The second shielding layer 60 may be formed of ferrite.
[0067] The circuit board structure 100 and its manufacturing method according to the embodiments of this application solve the problem of oxidation of the circuit layer 20 caused by the presence of the insulating layer 40 and the first shielding layer 50 on the side surface of the circuit layer 20. This is achieved by providing an insulating layer 40 and a first shielding layer 50 on the side surface of the circuit layer 20, thus filling the gap between the circuit layer 20 and the cover film layer 30. Furthermore, the combination of the first shielding layer 50 and the second shielding layer 60 not only achieves complete coverage of the circuit layer 20, improving the electromagnetic shielding effect (especially the shielding effect on the side surface of the circuit layer 20), but also makes the circuit board structure 100 suitable for high-power applications.
[0068] The above description describes some specific embodiments of this application, but in actual applications, the application should not be limited to these embodiments. For those skilled in the art, other modifications and alterations made based on the technical concept of this application should fall within the protection scope of this application.
Claims
1. A circuit board structure, characterized in that, include: Dielectric layer; A circuit layer is formed on at least one surface of the dielectric layer; A cover film layer is disposed on the surface of the circuit layer opposite to the dielectric layer, and covers a portion of the surface of the dielectric layer exposed from the circuit layer; An insulating layer is provided on the side surface of the circuit layer; A first shielding layer is disposed on the surface of the insulating layer, and a portion of the surface of the first shielding layer is covered by the covering film layer; and The second shielding layer is disposed on the surface of the cover film layer opposite to the circuit layer.
2. The circuit board structure as described in claim 1, characterized in that, The first shielding layer comprises a conductor and fluororubber, and the second shielding layer comprises ferrite.
3. The circuit board structure as described in claim 2, characterized in that, The conductor includes one or more of aluminum, nickel, and graphene, and the fluorinated rubber includes one or more of polytetrafluoroethylene, polychlorotrifluoroethylene, polyfluorinated ethylene, polyvinylidene fluoride, vinylidene fluoride-hexafluoropropylene copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and chlorofluoroethylene-vinylidene fluoride copolymer.
4. The circuit board structure as described in claim 1, characterized in that, The thickness of the first shielding layer is 50μm to 100μm.
5. The circuit board structure as described in claim 1, characterized in that, The thickness of the insulating layer is 40μm to 60μm.
6. The circuit board structure as described in claim 1, characterized in that, The dielectric layer has a groove, and a portion of the insulating layer and a portion of the first shielding layer are located within the groove, the groove having a depth of 10 μm to 14 μm.
7. A method for manufacturing a circuit board structure, characterized in that, Includes the following steps: A circuit layer is formed on the dielectric layer; A groove is formed on the dielectric layer; An insulating layer is provided on the side surface of the circuit layer, and a portion of the insulating layer is located within the groove; A first shielding layer is provided on the surface of the insulating layer away from the circuit layer, and a portion of the first shielding layer is located within the groove; A cover film layer is provided on the circuit layer, the cover film layer covering the circuit layer, the insulating layer, the first shielding layer and the dielectric layer; A second shielding layer is provided on the surface of the cover film layer that is opposite to the circuit layer.
8. The method for manufacturing the circuit board structure as described in claim 7, characterized in that, The first shielding layer comprises a conductor and fluororubber, and the second shielding layer comprises ferrite.
9. The method for manufacturing the circuit board structure as described in claim 8, characterized in that, The conductor includes one or more of aluminum, nickel, and graphene, and the fluorinated rubber includes one or more of polytetrafluoroethylene, polychlorotrifluoroethylene, polyfluorinated ethylene, polyvinylidene fluoride, vinylidene fluoride-hexafluoropropylene copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and chlorofluoroethylene-vinylidene fluoride copolymer.
10. The method for manufacturing the circuit board structure as described in claim 7, characterized in that, The thickness of the first shielding layer is 50μm to 100μm.