Nitride semiconductor device

Abstract

The invention provides a nitride semiconductor device capable of further suppressing the occurrence of a current collapse phenomenon. A nitride semiconductor device includes: a first nitride semiconductor layer having a two-dimensional electron gas layer on an upper portion thereof; a second nitride semiconductor layer on the first nitride semiconductor layer, the band gap energy of the second nitride semiconductor layer being greater than that of the first nitride semiconductor layer; the first main electrode and the second main electrode are connected with the two-dimensional electron gas layer; a control electrode on the second nitride semiconductor layer between the first main electrode and the second main electrode; a third nitride semiconductor layer on the second nitride semiconductor layer between the first main electrode and the control electrode, having a band gap energy lower than that of the second nitride semiconductor layer, and having a first two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer; and a first P-type semiconductor layer on the third nitride semiconductor layer, the first P-type semiconductor layer being electrically connected to the first main electrode.

Description

Technical Field

[0001] This disclosure relates to nitride-based semiconductor devices. Background Technology

[0002] In FETs, a representative nitride-based semiconductor device, a phenomenon known as current collapse is prone to occur. Current collapse refers to the phenomenon where, after temporarily turning the device off, the resistance (on-resistance) becomes high (current flow is difficult) when the device is turned on again. Poor current collapse characteristics make high-speed switching difficult and can cause extremely serious problems for device operation.

[0003] Therefore, it is disclosed in Patent Document 1. Figure 7 This is a nitride-based semiconductor device (FET) with such a structure. In this structure, a hole injection portion 141 is formed on the nitride semiconductor layer 123 closer to the drain electrode 132 than the gate electrode 133. The hole injection portion 141 has a p-type nitride semiconductor layer 142 and a hole injection electrode 143 formed on the p-type nitride semiconductor layer 142. The drain electrode 132 and the hole injection electrode 143 are substantially (in relation to) the drain electrode 132 and the hole injection electrode 143. Figure 7 (Connect at different locations on the cross section).

[0004] Furthermore, when the semiconductor element is in the on state, holes are injected from the hole injection section 141. The injected holes recombine with electrons trapped by the surface energy levels of the nitride semiconductor layer 123. Therefore, the electrons trapped by the surface energy levels, which are the cause of current collapse, can be eliminated, thus suppressing the occurrence of current collapse.

[0005] Patent Document 1: Japanese Patent No. 5739564

[0006] As shown in Patent Document 1, the p-type nitride semiconductor layer 142 is an example of Mg-doped p-type GaN, but the activation rate of Mg is low, which cannot increase the effective acceptor concentration. As a result, hole injection is insufficient, and the occurrence of current collapse cannot be adequately suppressed. Summary of the Invention

[0007] This disclosure was made in view of the above-mentioned problems, and its purpose is to provide a nitride-based semiconductor device that can further suppress the occurrence of current collapse.

[0008] To achieve the above objectives, this disclosure provides a nitride-based semiconductor device, characterized in that the nitride-based semiconductor device comprises: a first nitride semiconductor layer having a two-dimensional electron gas layer (also referred to as a 2DEG layer) generated on its upper portion; a second nitride semiconductor layer on the first nitride semiconductor layer, which is composed of a nitride semiconductor material with a band gap energy greater than that of the first nitride semiconductor layer; a first main electrode on a high-potential side electrically connected to the two-dimensional electron gas layer; a second main electrode on a low-potential side electrically connected to the two-dimensional electron gas layer; a control electrode disposed on the second nitride semiconductor layer between the first main electrode and the second main electrode; a third nitride semiconductor layer disposed on the second nitride semiconductor layer between the first main electrode and the control electrode, which is composed of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer, and has a first two-dimensional hole gas layer (also referred to as a 2DHG layer) generated near the interface with the second nitride semiconductor layer; and a first P-type semiconductor layer on the third nitride semiconductor layer, which is electrically connected to the first main electrode.

[0009] In such a nitride-based semiconductor device, the third nitride semiconductor layer has an auxiliary electrode electrically connected to the first main electrode via the first P-type semiconductor layer. When a positive potential is applied to the first main electrode, electrons captured by the surface energy levels of the second nitride semiconductor layer are not only eliminated by holes in the first P-type semiconductor layer, but also by holes in the first two-dimensional hole gas layer in the third nitride semiconductor layer, thus further suppressing the occurrence of current collapse.

[0010] Additionally, the device preferably comprises: a fourth nitride semiconductor layer located between the control electrode and the third nitride semiconductor layer and disposed separately from the third nitride semiconductor layer on the second nitride semiconductor layer, made of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer, and having a second two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer; and a second P-type semiconductor layer electrically connected to the control electrode on the fourth nitride semiconductor layer.

[0011] Thus, the fourth nitride semiconductor layer has a second two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer. Electrons trapped by the surface energy levels of the second nitride semiconductor layer directly below and near the fourth nitride semiconductor layer are also eliminated by holes in the second two-dimensional hole gas layer within the fourth nitride semiconductor layer. With such a nitride-based semiconductor device, electrons trapped by the surface energy levels of the second nitride semiconductor layer directly below and near the third and fourth nitride semiconductor layers can be eliminated, thereby further suppressing the occurrence of current collapse.

[0012] In addition, preferably, the fourth nitride semiconductor layer extends toward the first main electrode side more than the second P-type semiconductor layer.

[0013] If the fourth nitride semiconductor layer extends in this way, the area of ​​the fourth nitride semiconductor layer with a high effective acceptor concentration increases. Therefore, when the nitride-based semiconductor device is in the on state, electrons trapped by the surface of the second nitride semiconductor layer can be eliminated. Furthermore, when the nitride-based semiconductor device is off, the number of holes in the second two-dimensional hole gas layer of the fourth nitride semiconductor layer decreases, mitigating local electric field concentration and making the electric field on the surface of the second nitride semiconductor layer in the PSJ structure more uniform. Consequently, the local electric field peak near the gate electrode is reduced, making it difficult for electrons to be trapped by the surface of the second nitride semiconductor layer near the gate electrode. This further suppresses the occurrence of current collapse.

[0014] Furthermore, preferably, the third nitride semiconductor layer extends toward the control electrode side more than the first P-type semiconductor layer, and the fourth nitride semiconductor layer extends toward the first main electrode side for a longer length than the third nitride semiconductor layer extends toward the control electrode side.

[0015] If the third nitride semiconductor layer is extended further than the first P-type semiconductor layer, the number of holes in the extended portion is reduced when disconnected, which can further reduce current collapse without further increasing the distance between the control electrode and the first main electrode to ensure the withstand voltage.

[0016] Additionally, it is preferable to have a fifth nitride semiconductor layer, which is disposed between the region directly below the second P-type semiconductor layer on the second nitride semiconductor layer and the third nitride semiconductor layer, and in a region separated from the second P-type semiconductor layer and the third nitride semiconductor layer. The fifth nitride semiconductor layer is made of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer, and has a third two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer.

[0017] If a first P-type semiconductor layer, a second P-type semiconductor layer, a third nitride semiconductor layer, or a fourth nitride semiconductor layer is provided, the electron concentration in the two-dimensional electron gas layer directly below them is reduced, resulting in a significant increase in the on-resistance of the nitride semiconductor device. By providing a fifth nitride semiconductor layer in a region between the second P-type semiconductor layer and the fourth nitride semiconductor layer, and separated from the second P-type semiconductor layer and the fourth nitride semiconductor layer, it is possible to suppress the increase in on-resistance while further suppressing the occurrence of current collapse.

[0018] Additionally, preferably, the third nitride semiconductor layer extends toward the control electrode side more than the first P-type semiconductor layer.

[0019] If the third nitride semiconductor layer extends in this way, the area of ​​the fourth nitride semiconductor layer, which has a high effective acceptor concentration, increases. As a result, when the nitride-based semiconductor device is in the on state, electrons trapped by the surface of the second nitride semiconductor layer can be further eliminated.

[0020] As described above, according to the nitride-based semiconductor device of this disclosure, the third nitride semiconductor layer has a first two-dimensional hole gas layer near the interface with the second nitride semiconductor layer. The third nitride semiconductor layer is connected to the first main electrode with a high potential applied via the first P-type semiconductor layer. Therefore, electrons trapped by the surface energy levels of the second nitride semiconductor layer and holes in the third nitride semiconductor layer cancel each other out, suppressing the occurrence of current collapse. Attached Figure Description

[0021] Figure 1 This is a cross-sectional view showing a first embodiment of the nitride-based semiconductor device of this disclosure.

[0022] Figure 2 This is a cross-sectional view showing a second embodiment of the nitride-based semiconductor device of this disclosure.

[0023] Figure 3 This is a cross-sectional view showing a third embodiment of the nitride-based semiconductor device of this disclosure.

[0024] Figure 4 This is a top view showing a third embodiment of the nitride-based semiconductor device of this disclosure.

[0025] Figure 5 This is a cross-sectional view showing a fourth embodiment of the nitride-based semiconductor device of this disclosure.

[0026] Figure 6 This is a cross-sectional view showing a fifth embodiment of the nitride-based semiconductor device of this disclosure.

[0027] Figure 7 This is a cross-sectional view of a conventional nitride-based semiconductor device (FET).

[0028] Label Explanation

[0029] 10…Substrate; 11…Buffer layer; 12…GaN channel layer (first nitride semiconductor layer); 13…AlGaN barrier layer (second nitride semiconductor layer); 14…Two-dimensional electron gas layer (2DEG layer); 15…GaN layer (third nitride semiconductor layer); 16…First two-dimensional hole gas layer (2DHG layer); 17…First P-type semiconductor layer; 18…Hole injection electrode (auxiliary electrode); 19…Drain electrode (first main electrode); 20…Wiring; 21…Gate electrode (control electrode); 22…Second P-type semiconductor layer Body layer; 23…Source electrode (second main electrode); 24…Fourth nitride semiconductor layer; 25…Second two-dimensional hole gas layer (2DHG layer); 26, 27…Fifth nitride semiconductor layer; 28, 29…Third two-dimensional hole gas layer (2DHG layer); 122…Channel layer (nitride semiconductor layer); 123…Nitride semiconductor layer; 132…Drain electrode; 133…Gate electrode; 141…Hole injection section; 142…p-type nitride semiconductor layer; 143…Hole injection electrode; A, B…Length; X, Y…Direction. Detailed Implementation

[0030] As mentioned above, nitride-based semiconductor devices are required that can suppress the occurrence of current collapse.

[0031] Therefore, the inventors conducted in-depth research and discovered the following situation, thus completing this disclosure: by providing a nitride semiconductor layer with a two-dimensional cavitation gas layer and a first P-type semiconductor layer on a second nitride semiconductor layer, and electrically connecting the first main electrode to the first P-type semiconductor layer, it is possible to suppress the occurrence of current collapse phenomenon.

[0032] That is, this disclosure is a nitride-based semiconductor device, characterized in that the nitride-based semiconductor device comprises: a first nitride semiconductor layer having a two-dimensional electron gas layer generated on its upper part; a second nitride semiconductor layer on the first nitride semiconductor layer, which is composed of a nitride semiconductor material with a band gap energy greater than that of the first nitride semiconductor layer; a first main electrode electrically connected to the two-dimensional electron gas layer; a second main electrode electrically connected to the two-dimensional electron gas layer; a control electrode disposed on the second nitride semiconductor layer between the first main electrode and the second main electrode; a third nitride semiconductor layer disposed on the second nitride semiconductor layer between the first main electrode and the control electrode, which is composed of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer, and has a first two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer; and a first P-type semiconductor layer on the third nitride semiconductor layer, which is electrically connected to the first main electrode.

[0033] The present disclosure will now be described in detail with reference to the accompanying drawings, but the disclosure is not limited thereto.

[0034] <First Implementation Method>

[0035] Figure 1 This is a cross-sectional view showing a first embodiment of the nitride-based semiconductor device of this disclosure.

[0036] First, the nitride-based semiconductor device of this embodiment includes: a first nitride semiconductor layer 12 having a two-dimensional electron gas layer (also called a 2DEG layer) 14 generated on its upper part; a second nitride semiconductor layer 13 on the first nitride semiconductor layer 12, which is made of a nitride semiconductor material with a band gap energy greater than that of the first nitride semiconductor layer 12; a first main electrode 19 electrically connected to the two-dimensional electron gas layer 14; a second main electrode 23 electrically connected to the two-dimensional electron gas layer 14; and a control electrode disposed on the second nitride semiconductor layer 13 between the first main electrode 19 and the second main electrode 23. The electrode 21; a third nitride semiconductor layer 15 disposed on the second nitride semiconductor layer 13 between the first main electrode 19 and the control electrode 21, made of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer 13, and having a first two-dimensional hole gas layer (also called a 2DHG layer) 16 generated near the interface with the second nitride semiconductor layer 13; a first P-type semiconductor layer 17 on the third nitride semiconductor layer 15; an auxiliary electrode 18 on the first P-type semiconductor layer 17; and wiring 20 connecting the first main electrode 19 and the auxiliary electrode 18.

[0037] In this nitride-based semiconductor device, the third nitride semiconductor layer 15 has a first two-dimensional hole gas layer (2DHG layer) 16 near the interface with the second nitride semiconductor layer 13. Here, the third nitride semiconductor layer 15 includes an auxiliary electrode 18 connected to the first main electrode 19 via a first P-type semiconductor layer 17. If a positive potential is applied to the first main electrode 19, electrons trapped by the surface energy levels of the second nitride semiconductor layer are not only eliminated by holes in the first P-type semiconductor layer 17, but also by holes in the first two-dimensional hole gas layer within the third nitride semiconductor layer 15. Therefore, the nitride-based semiconductor device of this embodiment can further suppress the occurrence of current collapse.

[0038] The following describes this embodiment in more detail.

[0039] First, the nitride-based semiconductor device disclosed herein may include a substrate 10. The substrate 10 is not particularly limited and may be made of silicon, silicon carbide, sapphire, GaN, or the like.

[0040] Next, a buffer layer 11 can be provided on the substrate 10. There are no particular limitations; it can be made of AlN or Al.x Ga 1-x N and Al y Ga 1-Y A multi-layered buffer formed by repeated N layers, or an Al composition with gradients. x Ga 1-x N-structure.

[0041] Next, a first nitride semiconductor layer 12 is disposed on the buffer layer 11. Although not particularly limited, the first nitride semiconductor layer 12 can be configured as a channel layer made of undoped GaN.

[0042] Next, a second nitride semiconductor layer 13, made of a nitride semiconductor material with a band gap energy greater than that of the first nitride semiconductor layer 12, is disposed on the first nitride semiconductor layer 12. Although not particularly limited, the second nitride semiconductor layer 13 can be made of AlGaN as a barrier layer. Furthermore, when a heterojunction is formed with the first nitride semiconductor layer 12, either spontaneous polarization or piezoelectric polarization or both will occur, and a two-dimensional electron gas layer (2DEG layer) 14 will be generated in the upper part of the first nitride semiconductor layer 12 near the heterojunction interface.

[0043] Next, a third nitride semiconductor layer 15, made of a nitride semiconductor material with a bandgap energy smaller than that of the second nitride semiconductor layer 13, is formed on the second nitride semiconductor layer 13. While not particularly limited, the third nitride semiconductor layer 15 can be an undoped GaN layer. Furthermore, when a heterojunction is formed with the second nitride semiconductor layer 13, either spontaneous polarization or piezoelectric polarization occurs, and a first two-dimensional hole gas layer (2DHG layer) 16 is generated in the lower part of the third nitride semiconductor layer 15 near the heterojunction interface. The thickness of the third nitride semiconductor layer 15 is set to, for example, several tens to 100 nm.

[0044] Next, a first P-type semiconductor layer 17 is disposed on the third nitride semiconductor layer 15 on which the first two-dimensional hole gas layer 16 is generated. Although not particularly limited, the first P-type semiconductor layer 17 can be a metal oxide semiconductor such as NiO that functions as a P-type semiconductor, in addition to P-type GaN, P-type AlGaN, P-type InGaN, etc.

[0045] Furthermore, a hole injection electrode 18, serving as an auxiliary electrode, is provided on the first P-type semiconductor layer 17. The hole injection electrode 18 and the drain electrode 19, serving as the first main electrode, are electrically connected via wiring 20. The hole injection electrode 18 can be, for example, Ni / Au. Since a higher potential (positive potential) than that of the source electrode (second main electrode) 23 is applied to the drain electrode (first main electrode) 19, a first two-dimensional hole gas layer (2DHG layer) 16 is generated in the third nitride semiconductor layer 15, whether the nitride semiconductor device is turned on or off.

[0046] Because the hole concentration in the first two-dimensional hole gas layer 16 is high, and becomes high again near the heterojunction between the second nitride semiconductor layer 13 and the third nitride semiconductor layer 15, the holes in the first two-dimensional hole gas layer 16 are more easily canceled out by electrons trapped by the surface of the second nitride semiconductor layer 13. As a result, the occurrence of current collapse can be further suppressed compared to conventional examples.

[0047] In addition, the drain electrode 19 and the source electrode 23 are electrically connected to the two-dimensional electron gas layer 14, respectively.

[0048] A second P-type semiconductor layer 22 is disposed on the second nitride semiconductor layer 13 between the drain electrode 19 and the source electrode 23, and a gate electrode (control electrode) 21 is disposed on the second P-type semiconductor layer 22. Figure 1 In this process, the second P-type semiconductor layer 22 is formed on the second nitride semiconductor layer 13. However, a hole can also be formed by thinning at least a portion of the thickness of the second nitride semiconductor layer 13 directly below the second P-type semiconductor layer 22, and the second P-type semiconductor layer 22 and the gate electrode 21 are disposed on the hole.

[0049] In addition, although Figure 1 The diagram shows the drain electrode 19 in direct contact with the third nitride semiconductor layer 15 or the first P-type semiconductor layer 17, but it is not limited to this. As long as they are connected to each other through the hole injection electrode (auxiliary electrode) 18, the drain electrode 19 and at least one of the third nitride semiconductor layer 15 or the first P-type semiconductor layer 17 can also be isolated.

[0050] In addition, the second P-type semiconductor layer 22 under the gate electrode 21 is isolated from the third nitride semiconductor layer 15 or the first P-type semiconductor layer 17 under the hole injection electrode 18.

[0051] <Second Implementation Method>

[0052] Figure 2 This is a cross-sectional view showing a second embodiment of the nitride-based semiconductor device of this disclosure.

[0053] Although there are no specific restrictions, but such as Figure 2 As shown, it includes a fourth nitride semiconductor layer 24, which is electrically connected to the gate electrode 21. It is disposed separately from the third nitride semiconductor layer 15 on the second nitride semiconductor layer 13 between the gate electrode 21 and the drain electrode 19. It is made of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer 13, and has a second two-dimensional hole gas layer 25 generated near the interface with the second nitride semiconductor layer 13.

[0054] Thus, in addition to the first two-dimensional hole gas layer 16, a second two-dimensional hole gas layer 25 is also present in the fourth nitride semiconductor layer 24 near the interface with the second nitride semiconductor layer 13. Electrons trapped by the surface energy levels of the second nitride semiconductor layer 13 directly below and near the fourth nitride semiconductor layer 24 are not only eliminated by holes in the first two-dimensional hole gas layer 16, but also by holes in the second two-dimensional hole gas layer 25 within the fourth nitride semiconductor layer 24. As a result, the decrease in the concentration of the two-dimensional electron gas layer 14 caused by electrons trapped by the surface energy levels of the second nitride semiconductor layer 13 directly below and near the fourth nitride semiconductor layer 24 can be further suppressed, thereby further suppressing the occurrence of current collapse.

[0055] The following describes this embodiment in more detail.

[0056] This embodiment is an example in which a fourth nitride semiconductor layer 24 for generating a second two-dimensional hole gas layer 25 is also disposed below the second P-type semiconductor layer 22 (e.g., P-GaN, but not limited thereto) below the gate electrode 21. The fourth nitride semiconductor layer 24 below the gate electrode 21 is isolated from the third nitride semiconductor layer 15 below the hole injection electrode 18.

[0057] When a zero potential or a positive potential is applied to the gate electrode 21, no depletion layer is generated directly below the gate electrode 21, and the two-dimensional electron gas layer 14 between the drain electrode 19 and the source electrode 23 is continuous, thus the nitride semiconductor device becomes conductive. At this time, a second two-dimensional hole gas layer 25 is present in the fourth nitride semiconductor layer 24 near the interface with the second nitride semiconductor layer 13. Electrons trapped by the surface energy levels of the second nitride semiconductor layer 13 directly below and near the fourth nitride semiconductor layer 24 are not only canceled by holes in the first two-dimensional hole gas layer 16, but also by holes in the second two-dimensional hole gas layer 25 within the fourth nitride semiconductor layer 24. As a result, the decrease in the concentration of the two-dimensional electron gas layer caused by electrons trapped by the surface energy levels of the second nitride semiconductor layer directly below and near the third and fourth nitride semiconductor layers can be suppressed, thereby further suppressing the occurrence of current collapse.

[0058] If an off signal (negative potential) is applied to the gate electrode 21 of the nitride-based semiconductor device to turn it off, a depletion layer is generated in the two-dimensional electron gas layer 14 directly below the gate electrode 21 (or the two-dimensional electron gas layer 14 is disconnected). Here, the hole concentration of the second two-dimensional hole gas layer 25 of the fourth nitride semiconductor layer 24 is reduced. As a result, leakage current is reduced.

[0059] In addition, Figure 2 An example is shown in which a second P-type semiconductor layer 22 is disposed below the gate electrode 21. However, the second P-type semiconductor layer 22 only needs to be electrically connected to the gate electrode 21. For example, the gate electrode 21 can also be formed on the second nitride semiconductor layer 13 between the fourth nitride semiconductor layer 24 and the source electrode 23.

[0060] <Third Implementation Method>

[0061] Figure 3 , Figure 4 These are cross-sectional and top views illustrating a third embodiment of the nitride-based semiconductor device of this disclosure. Figure 4 For ease of understanding of the configuration, only the electrodes 18, 19, 21, 23, the third nitride semiconductor layer 15, the first P-type semiconductor layer 17, the second P-type semiconductor layer 22, and the fourth nitride semiconductor layer 24 are excerpted and recorded.

[0062] Although there are no specific restrictions, but such as Figure 3 , Figure 4 As shown, viewed from above, the hole injection electrode 18, the third nitride semiconductor layer 15, and the first P-type semiconductor layer 17 surround the drain electrode 19, and the fourth nitride semiconductor layer 24 extends toward the drain electrode 19 than the second P-type semiconductor layer 22.

[0063] If the third nitride semiconductor layer 15 and the fourth nitride semiconductor layer 24 are increased between the gate electrode 21 and the drain electrode 19 on the second nitride semiconductor layer 13, the area of ​​the first two-dimensional hole gas layer 16 and the second two-dimensional hole gas layer 25 will also increase, thereby reducing current collapse.

[0064] When the nitride-based semiconductor device is disconnected, the concentration of the first two-dimensional hole layer 16 within the third nitride semiconductor layer 15 does not decrease, but the concentration of the second two-dimensional hole layer 25 within the fourth nitride semiconductor layer 24 decreases. Since the third nitride semiconductor layer 15 is electrically connected to the drain electrode 19 via the first P-type semiconductor layer 17, the first two-dimensional hole layer 16 becomes at a relatively high potential. On the other hand, the concentration of the second two-dimensional hole layer 25 decreases, and the fourth nitride semiconductor layer 24 becomes nearly insulating. Therefore, by making the length (A) of the fourth nitride semiconductor layer 24 extending towards the drain electrode 19 longer than the length of the third nitride semiconductor layer 15 extending towards the gate electrode 21 than the length of the first P-type semiconductor layer 17, current collapse can be further reduced without excessively increasing the distance to ensure the withstand voltage between the gate electrode 21 and the drain electrode 19.

[0065] In addition, Figure 3 , Figure 4 In this configuration, the side surface of the third nitride semiconductor layer 15 on the gate electrode 21 side is aligned with and coplanar with the side surface of the first P-type semiconductor layer 17 on the gate electrode 21 side. Therefore, current collapse can be further reduced without excessively increasing the chip size.

[0066] The following describes this embodiment in more detail.

[0067] This embodiment describes an example where the fourth nitride semiconductor layer 24, located below the second P-type semiconductor layer 22 (not particularly limited, for example, it can be P-GaN) under the gate electrode (control electrode) 21, extends towards the drain electrode (first main electrode) 19 beyond the second P-type semiconductor layer 22. The portion extending towards the drain electrode 19 beyond the second P-type semiconductor layer 22 (in...) Figure 4 The fourth nitride semiconductor layer 24 at position 3 is sometimes referred to as a PSJ structure (Polarization Super Junction).

[0068] When the nitride-based semiconductor device is in the ON state, a first two-dimensional hole gas layer 16 is generated locally in the third nitride semiconductor layer 15. Furthermore, a second two-dimensional hole gas layer 25 is also generated locally in the fourth nitride semiconductor layer 24 of the PSJ structure. Since the effective acceptor concentration of the second two-dimensional hole gas layer 25 is higher than the effective acceptor concentration of the second P-type semiconductor layer 22, the decrease in the concentration of the two-dimensional electron gas layer 14 caused by electrons trapped below the third nitride semiconductor layer 15, below the second P-type semiconductor layer 22, and on the surface of the second nitride semiconductor layer 13 below the PSJ structure can be suppressed, thereby reducing current collapse.

[0069] On the other hand, if the nitride-based semiconductor device is disconnected, the number of holes in the second two-dimensional hole gas layer 25 of the fourth nitride semiconductor layer 24 decreases, becoming an insulating layer, which alleviates the local electric field concentration and makes the electric field on the surface of the second nitride semiconductor layer 13 below the PSJ structure more uniform. As a result, the local electric field peak near the gate electrode 24 is reduced, making it difficult for electrons to be captured by the surface of the second nitride semiconductor layer 13 near the gate electrode 24.

[0070] Furthermore, since the third nitride semiconductor layer 15 is electrically connected to the drain electrode 19 via the first P-type semiconductor layer 17, the first two-dimensional hole gas layer 16 has a relatively high potential. Therefore, by making the length (A) of the fourth nitride semiconductor layer 24 extending towards the drain electrode 19 longer than the length (B) of the third nitride semiconductor layer 15 extending towards the gate electrode 21, current collapse can be further reduced without excessively increasing the distance to ensure the withstand voltage between the gate electrode 21 and the drain electrode 19.

[0071] In addition, Figure 3 , Figure 4 In this design, the boundary between the side of the third nitride semiconductor layer 15 on the gate electrode 21 side and the side of the first P-type semiconductor layer 17 on the gate electrode 21 side is smooth, forming a single surface. That is, the length (B) of the third nitride semiconductor layer 15 extending towards the gate electrode 21 side is set to zero. Therefore, current collapse can be further reduced without excessively increasing the chip size.

[0072] Additionally, to prevent electrons discharged from the drain electrode 19 from being trapped by the surface of the second nitride semiconductor layer 13 facing the gate electrode 21, for example... Figure 4 As shown, the third nitride semiconductor layer 15 or the first P-type semiconductor layer 17 is preferably disposed in a manner that surrounds the drain electrode 19.

[0073] Furthermore, if a third nitride semiconductor layer 15 and a first P-type semiconductor layer 17 are provided, the electron concentration of the two-dimensional electron gas layer 14 directly below the third nitride semiconductor layer 15 and the first P-type semiconductor layer 17 will be reduced, resulting in a significant increase in the on-resistance of the nitride semiconductor device. Therefore, it is preferable that the areas of the third nitride semiconductor layer 15 and the first P-type semiconductor layer 17 be as small as possible.

[0074] Furthermore, if a fourth nitride semiconductor layer 24 and a second P-type semiconductor layer 22 are provided, the electron concentration in the two-dimensional electron gas layer 14 directly below the fourth nitride semiconductor layer 24 and the second P-type semiconductor layer 22 is reduced, resulting in a significant increase in the on-resistance of the nitride semiconductor device. While not particularly limited, the following configuration is preferred. Figure 4 In this way, relative to the extension direction (Y direction) of the gate electrode 21, portions having a PSJ structure (the portion of the fourth nitride semiconductor layer 24 extending towards the drain electrode 19) and portions without a PSJ structure are alternately provided. This allows for the suppression of the increase in the on-resistance of the nitride semiconductor device while further reducing current collapse. Furthermore, the hole injection electrode (auxiliary electrode) 18 connected to the drain electrode (first main electrode) 19, and the third nitride semiconductor layer 15 or the first P-type semiconductor layer 17 beneath it, can also be arranged to surround the drain electrode 19. However, this "surrounding" does not necessarily have to be completely ring-shaped; they can be arranged in multiple locations dispersed around the drain electrode 19.

[0075] <Fourth Implementation Method>

[0076] Figure 5 This is a cross-sectional view showing a fourth embodiment of the nitride-based semiconductor device of this disclosure.

[0077] Although there are no specific restrictions, but such as Figure 5 As shown, the third nitride semiconductor layer 15 extends by a length (B) towards the control electrode 21 side compared to the first P-type semiconductor layer 17. Therefore, the side surface of the third nitride semiconductor layer 15 on the control electrode 21 side is not aligned with the side surface of the first P-type semiconductor layer 17 on the control electrode 21 side, and they are not on the same surface.

[0078] If the third nitride semiconductor layer 15 is extended in this manner, the area of ​​the third nitride semiconductor layer 15 increases. At this time, the area of ​​the first two-dimensional hole gas layer (2DHG layer) 16 within the third nitride semiconductor layer 15 also increases. As a result, the occurrence of current collapse can be further suppressed.

[0079] like Figure 5As shown, the third nitride semiconductor layer 15 extends towards the control electrode 21 by a length (B) greater than the first P-type semiconductor layer 17, and the fourth nitride semiconductor layer 24 extends towards the first main electrode 19 by a length (A) greater than the second P-type semiconductor layer 22. Preferably, the length (A) of the fourth nitride semiconductor layer 24 extending towards the first main electrode 19 greater than the length (B) of the third nitride semiconductor layer 15 extending towards the control electrode 21 greater than the length (B) of the first P-type semiconductor layer 17.

[0080] As shown in the third embodiment of the nitride-based semiconductor device disclosed herein, even if the side surface of the third nitride semiconductor layer 15 on the control electrode 21 side is not aligned with the side surface of the first P-type semiconductor layer 17 on the control electrode 21 side, a first two-dimensional hole gas layer 16 is generated in the portion of the third nitride semiconductor layer 15 that extends towards the control electrode 21 side compared to the first P-type semiconductor layer 17. The third nitride semiconductor layer 15 can accommodate more holes than the first P-type semiconductor layer 17, thus further reducing electrons trapped by the surface energy levels of the second nitride semiconductor layer 13. As a result, the occurrence of current collapse can be further suppressed.

[0081] <Fifth Implementation Method>

[0082] Figure 6 This is a cross-sectional view showing a fifth embodiment of the nitride-based semiconductor device of this disclosure.

[0083] Although there are no specific restrictions, preferred options include... Figure 6 The device comprises fifth nitride semiconductor layers 26 and 27, which are disposed in the region between the fourth nitride semiconductor layer 24 or the second P-type semiconductor layer 22 and the third nitride semiconductor layer 15 on the second nitride semiconductor layer 13. These fifth nitride semiconductor layers 26 and 27 are made of a nitride semiconductor material with a bandgap energy lower than that of the second nitride semiconductor layer 13, and have third two-dimensional hole gas layers (2DHG layers) 28 and 29 generated near the interface with the second nitride semiconductor layer 13. In this embodiment, an example is shown where there are two fifth nitride semiconductor layers 26 and 27 and two third two-dimensional hole gas layers 28 and 29, but this is not a limitation. One or more layers may be provided.

[0084] If, in addition to the first two-dimensional cavitation layer 16, there are other third two-dimensional cavitation layers 28 and 29, it is possible to further suppress the occurrence of current collapse while relatively suppressing the increase in conduction resistance.

[0085] The following describes this embodiment in more detail.

[0086] This implementation method ( Figure 6An example is as follows: In the third implementation method ( Figure 3 Between the fourth nitride semiconductor layer 24 under the gate electrode (control electrode) 21 and the third nitride semiconductor layer 15 under the hole injection electrode (auxiliary electrode) 18, multiple (not limited to multiple, but also a single) mutually separated fifth nitride semiconductor layers 26 and 27 are further arranged in an island-like configuration. The island-like fifth nitride semiconductor layers 26 and 27 can be floating potentials that are neither connected to the gate electrode 21 nor to the drain electrode 19, or they can be connected to either the gate electrode 21 or the drain electrode 19. Figure 6 This example shows one (fifth nitride semiconductor layer 26) electrically connected to the gate electrode 21, and the other (fifth nitride semiconductor layer 27) electrically connected to the drain electrode 19. There are no particular limitations on the connection; a P-type semiconductor layer such as P-GaN can be provided on the fifth nitride semiconductor layers 26 and 27, and an electrode can be provided on it, connected to the gate electrode 21 or the drain electrode 19 via this electrode. Although the two-dimensional hole gas layer increases the on-resistance of the nitride semiconductor device, by providing mutually separated fifth nitride semiconductor layers 26 and 27, the increase in on-resistance can be suppressed. Furthermore, by providing fifth nitride semiconductor layers 26 and 27, the occurrence of current collapse can be further suppressed. In addition, when providing the fifth nitride semiconductor layers 26 and 27, it is preferable to... Figure 5 The fourth nitride semiconductor layer 24 and a portion of the third nitride semiconductor layer 15 are divided and respectively set. Figure 6 The fourth nitride semiconductor layer 24 and the fifth nitride semiconductor layer 26, the third nitride semiconductor layer 15 and the fifth nitride semiconductor layer 27.

[0087] Furthermore, this disclosure is not limited to the embodiments described above. The embodiments described above are illustrative, and any structure having a substantially the same structure as the technical concept described in the claims of this disclosure and achieving the same effect is included within the technical scope of this disclosure.

Claims

1. A nitride-based semiconductor device, characterized in that, The nitride-based semiconductor device includes: A first nitride semiconductor layer having a two-dimensional electron gas layer generated on top; The second nitride semiconductor layer on the first nitride semiconductor layer is composed of a nitride semiconductor material with a band gap energy greater than that of the first nitride semiconductor layer; The first main electrode on the high-potential side is electrically connected to the two-dimensional electron gas layer; The second main electrode on the low potential side is electrically connected to the two-dimensional electron gas layer; A control electrode is disposed on the second nitride semiconductor layer between the first main electrode and the second main electrode; A third nitride semiconductor layer, disposed on the second nitride semiconductor layer between the first main electrode and the control electrode, is made of a nitride semiconductor material with a bandgap energy smaller than that of the second nitride semiconductor layer, and has a first two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer; and The first P-type semiconductor layer on the third nitride semiconductor layer is electrically connected to the first main electrode.

2. The nitride-based semiconductor device according to claim 1, characterized in that, The nitride-based semiconductor device includes: A fourth nitride semiconductor layer, which is located between the control electrode and the third nitride semiconductor layer and is disposed separately from the third nitride semiconductor layer on the second nitride semiconductor layer, is made of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer, and has a second two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer. as well as The second P-type semiconductor layer is electrically connected to the control electrode on the fourth nitride semiconductor layer.

3. The nitride-based semiconductor device according to claim 2, characterized in that, The fourth nitride semiconductor layer extends toward the first main electrode side compared to the second P-type semiconductor layer.

4. The nitride-based semiconductor device according to claim 3, characterized in that, The third nitride semiconductor layer extends toward the control electrode side compared to the first P-type semiconductor layer. The fourth nitride semiconductor layer extends towards the first main electrode by a greater length than the third nitride semiconductor layer extends towards the control electrode.

5. The nitride-based semiconductor device according to any one of claims 2 to 4, characterized in that, The nitride-based semiconductor device includes a fifth nitride semiconductor layer, which is disposed separately from the second P-type semiconductor layer and the third nitride semiconductor layer in the region directly below the second P-type semiconductor layer on the second nitride semiconductor layer. The fifth nitride semiconductor layer is made of a nitride semiconductor material with a band gap energy smaller than that of the second nitride semiconductor layer, and has a third two-dimensional hole gas layer generated near the interface with the second nitride semiconductor layer.

6. The nitride-based semiconductor device according to any one of claims 1 to 3, characterized in that, The third nitride semiconductor layer extends toward the control electrode side compared to the first P-type semiconductor layer.

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