A method, system, device, and dielectric for controlling the threshold voltage of a semiconductor device.

Abstract

This invention provides a method, system, device, and dielectric for controlling the threshold voltage of a semiconductor device. The control method includes: fabricating a gate dielectric layer; measuring and obtaining a first thickness of the gate dielectric layer; forming a gate polysilicon layer on the gate dielectric layer; oxidizing the surface of the gate polysilicon layer to obtain an ion barrier layer; measuring and obtaining a second thickness of the polysilicon layer and a third thickness of the ion barrier layer; determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness, and performing ion implantation on the gate polysilicon layer so that the threshold voltage of the device after gate predoping remains within a preset target voltage range. This invention can dynamically adjust the threshold voltage after predoping without adding any device fabrication process steps, ensuring threshold voltage control accuracy and product stability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method, system, device and medium for controlling the threshold voltage of a semiconductor device. Background Technology

[0002] In the field of semiconductor devices, threshold voltage is a key electrical parameter that determines the on and off states of devices such as metal-oxide-semiconductor field-effect transistors (MOSFETs). Its value directly affects core performance indicators such as static power consumption, switching speed, and noise margin. Therefore, precise control of threshold voltage has always been one of the core issues in the development of semiconductor technology and the improvement of integration.

[0003] Traditional threshold voltage modulation methods primarily rely on ion implantation during device fabrication. By implanting specific types and dosages of impurities into the channel region, the doping concentration of the channel can be adjusted, thereby changing the device's threshold voltage. For example, implanting boron ions can increase the threshold voltage of an N-type transistor, while implanting phosphorus or arsenic ions can increase the threshold voltage of a P-type transistor.

[0004] Furthermore, as process nodes move into the nanoscale, issues such as fluctuations in device process parameters make it extremely difficult to precisely control the threshold voltage through ion implantation, resulting in severe challenges to chip yield and performance consistency. Summary of the Invention

[0005] This invention provides a method, system, device, and medium for controlling the threshold voltage of semiconductor devices, in order to solve the technical problem that the accuracy of threshold voltage control by ion implantation is insufficient and chip consistency is difficult to guarantee during the semiconductor device fabrication process.

[0006] This invention provides a method for controlling the threshold voltage of a semiconductor device. The method includes: fabricating a gate dielectric layer; measuring and obtaining a first thickness of the gate dielectric layer; forming a gate polysilicon layer on the basis of the gate dielectric layer; oxidizing the surface of the gate polysilicon layer to obtain an ion barrier layer; measuring and obtaining a second thickness of the gate polysilicon layer and a third thickness of the ion barrier layer; determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness, so as to perform ion implantation on the gate polysilicon layer, thereby maintaining the threshold voltage of the device within a preset target voltage range after gate predoping.

[0007] In one embodiment of the present invention, the step of determining the ion implantation amount of gate predoping based on the first thickness, the second thickness and the third thickness includes: using the first thickness, the second thickness and the third thickness as input to a preset prediction model to calculate the ion implantation amount based on the preset prediction model, wherein the preset prediction model is used to characterize the mapping relationship between the first thickness, the second thickness and the third thickness and the ion implantation amount.

[0008] In one embodiment of the present invention, the process of establishing the preset prediction model includes: obtaining a first analog quantity of the gate dielectric layer thickness to establish a mapping relationship between the gate dielectric layer thickness and the corresponding threshold voltage change; obtaining a second analog quantity of the gate thickness, a third analog quantity of the ion barrier layer thickness, and the corresponding ion implantation dose to determine the adjustable amount of the gate predoping threshold voltage; and, when the adjustable amount is equal to the threshold voltage change, solving the mapping relationship between the gate dielectric layer thickness, the gate thickness, the ion barrier layer thickness, and the ion implantation dose to obtain the preset prediction model.

[0009] In one embodiment of the present invention, the step of establishing a first mapping relationship between the gate oxide layer thickness and the corresponding threshold voltage change includes: comparing each of the first analog quantities with a preset gate dielectric layer thickness target value to obtain a corresponding first thickness offset; and determining the corresponding threshold voltage change based on the first thickness offset to obtain the first mapping relationship.

[0010] In one embodiment of the present invention, the step of obtaining a second analog quantity of the gate thickness, a third analog quantity of the ion barrier layer thickness, and the corresponding ion implantation dose to determine an adjustable amount of the gate predoping threshold voltage includes: determining the gate impurity concentration based on the second analog quantity, the third analog quantity, and the corresponding ion implantation dose; determining the gate work function change based on the gate impurity concentration, wherein the gate work function change is used to characterize the change in the gate work function before and after doping; and determining the adjustable amount based on the work function change, wherein the adjustable amount is positively correlated with the work function change.

[0011] In one embodiment of the present invention, the step of determining the gate impurity concentration based on the second analog quantity, the third analog quantity, and the corresponding ion implantation dose includes: comparing the third analog quantity with the ion implantation projection range and the standard deviation of the projection range to obtain a second thickness offset; determining the first doping concentration that can actually reach the inside of the gate based on the second thickness offset and the corresponding ion implantation dose; and determining the average impurity concentration of the gate as the gate impurity concentration based on the ratio of the first doping concentration to the second analog quantity.

[0012] In one embodiment of the present invention, after obtaining the preset prediction model, the method further includes: storing the preset prediction model in a designated location and associating it with the control terminal of the ion implantation machine, so that the control terminal performs ion implantation based on the ion implantation amount obtained from the model.

[0013] The present invention also provides a threshold voltage control system for a semiconductor device, the system comprising: a first thickness acquisition module for acquiring a first thickness of a gate dielectric layer; a second thickness acquisition module for acquiring a second thickness of a gate polysilicon layer and a third thickness of an ion barrier layer; and an ion implantation control module for determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness, so as to perform ion implantation on the gate polysilicon layer, thereby maintaining the threshold voltage of the device within a preset target voltage range after gate predoping is completed.

[0014] The present invention also provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor executes the computer program to implement the steps of the semiconductor device threshold voltage control method.

[0015] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the semiconductor device threshold voltage control method.

[0016] The beneficial effects of this invention are as follows: By correlating the thickness of the gate dielectric layer, the thickness of the ion barrier layer, and the thickness of the gate polysilicon layer with the ion implantation amount of the gate predoping, a predictive model is established and the ion implantation amount of the gate predoping is dynamically adjusted, achieving precise control of the threshold voltage. Compared with the prior art, this invention does not add any process steps, adjusting the electrical parameters of the device in a low-cost manner; by correlating the three thickness dimensions with the ion implantation amount, the ion implantation amount of the gate predoping is precisely controlled, reducing product threshold voltage fluctuations and improving device performance and stability; a model is proposed to predict threshold voltage changes through changes in online thickness parameters, enabling dynamic adjustment of the ion implantation amount when fluctuations occur in the thickness of the gate dielectric layer, the thickness of the gate polysilicon layer, and the thickness of the ion barrier layer, bringing the threshold voltage back to the preset target voltage range, thereby improving product yield. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0018] In the attached diagram:

[0019] Figure 1 This is a schematic flowchart of a semiconductor device threshold voltage control method provided in an embodiment of the present invention;

[0020] Figure 2 This is a schematic diagram of the module architecture of a semiconductor device threshold voltage control system provided in an embodiment of the present invention. Detailed Implementation

[0021] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0022] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. The drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0023] In the following description, numerous details are explored to provide a more thorough explanation of embodiments of the invention. However, it will be apparent to those skilled in the art that embodiments of the invention may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the invention.

[0024] The inventor discovered through research that:

[0025] With the continuous development of semiconductor technology, the size of semiconductor devices is constantly shrinking, and the requirements for controlling device performance are becoming increasingly stringent. In semiconductor devices, the threshold voltage (Vth) is a critical electrical parameter that directly affects the device's switching characteristics, power consumption, and overall performance. Precise control of the threshold voltage is essential for ensuring the stability and reliability of semiconductor devices.

[0026] The threshold voltage is primarily influenced by various process parameters, among which the equivalent oxide thickness (EOT) of the gate dielectric layer is a crucial factor. Fluctuations in the gate dielectric layer thickness result in corresponding changes in the gate oxide capacitance Cox, leading to a shift in the threshold voltage Vth. Furthermore, the thickness of the ion barrier layer above the gate during pre-doping also affects the ion distribution after ion implantation, thus impacting the threshold voltage. Conversely, the gate thickness also influences the impurity concentration during pre-doping, further affecting the threshold voltage.

[0027] Based on the above considerations, this invention proposes a method, system, device, and dielectric for controlling the threshold voltage of semiconductor devices. The technical solution of this invention will be described in detail below with reference to specific embodiments.

[0028] Please see Figure 1 , Figure 1 This is a schematic flowchart of a semiconductor device threshold voltage control method according to an embodiment of the present invention. The control method includes the following steps:

[0029] Step S100: Fabricate the gate dielectric layer and measure and obtain the first thickness of the gate dielectric layer.

[0030] In one embodiment, a gate dielectric layer is grown or deposited on a semiconductor substrate using processes such as thermal oxidation, chemical vapor deposition, or atomic layer deposition. The gate dielectric layer can be silicon dioxide, silicon nitride, silicon oxynitride, or other high-k dielectric materials. After fabrication, the thickness of the gate dielectric layer is accurately measured using a spectroscopic ellipsometry or other thickness measurement equipment to obtain a first thickness.

[0031] Step S110: A gate polysilicon layer is formed on the basis of the gate dielectric layer, and the surface of the gate polysilicon layer is oxidized to form an ion barrier layer. The second thickness of the gate polysilicon layer and the third thickness of the ion barrier layer are measured and obtained.

[0032] In one embodiment, a gate material, such as polysilicon, is deposited on the gate dielectric layer using low-pressure chemical vapor deposition (LPCVD). After deposition, the surface of the gate polysilicon layer is oxidized. In another embodiment, the semiconductor device is placed in an oxidation furnace, and the gate surface is oxidized under controlled temperature and oxygen concentration conditions to form an ion barrier layer. During oxidation, the temperature is controlled within the range of 800-950°C, the oxygen flow rate is 2-5 L / min, and the oxidation time is 10-30 minutes. After oxidation, the gate thickness and the thickness of the ion barrier layer are measured using a spectroscopic ellipsometry or other high-precision measuring equipment to obtain the second and third thicknesses.

[0033] Step S120: Based on the first thickness, second thickness, and third thickness, determine the ion implantation amount for gate predoping to perform ion implantation on the gate polysilicon layer, ensuring that the threshold voltage of the device remains within a preset target voltage range after gate predoping. This target voltage range can be set and adjusted according to actual production process requirements and is not limited here.

[0034] When determining the ion implantation amount for gate predoping, the first thickness, second thickness, and third thickness are used as inputs to a preset prediction model, and the ion implantation amount is calculated based on the preset prediction model. This preset prediction model is established through regression analysis using historical process data and electrical test results, characterizing the mapping relationship between the first thickness, second thickness, and third thickness and the ion implantation amount required to maintain the target threshold voltage.

[0035] The process of establishing a pre-defined prediction model includes the following steps:

[0036] First, establish a mapping relationship between the gate dielectric layer thickness and the corresponding threshold voltage change. Specifically, simulate the device characteristics under different gate dielectric layer thicknesses using TCAD tools, or fit data from multiple production batches in the product line's history to obtain multiple sets of gate dielectric layer thickness data (i.e., the first analog quantity) and the corresponding threshold voltage change.

[0037] Secondly, a second analog value for the gate thickness, a third analog value for the ion barrier layer thickness, and the corresponding ion implantation dose were obtained to determine the adjustable amount of the gate predoping threshold voltage. Through multiple simulations or experiments, the influence of different combinations of gate thickness, ion barrier layer thickness, and ion implantation dose on the threshold voltage was analyzed.

[0038] Finally, with the adjustable amount equal to the threshold voltage change, the mapping relationship between the gate dielectric layer thickness, gate thickness, ion barrier layer thickness, and ion implantation amount is solved to obtain the preset prediction model.

[0039] When establishing the mapping relationship between the gate dielectric layer thickness and the corresponding threshold voltage change, each first analog quantity is compared with the preset target value of the gate dielectric layer thickness to obtain the corresponding first thickness offset. Then, the corresponding threshold voltage change is determined based on the first thickness offset to obtain the first mapping relationship. The relationship between the gate dielectric layer thickness and the threshold voltage change is shown in Equation 1:

[0040] Formula 1

[0041] Where, Δ V t1 denoted as the threshold voltage variation; 'a' represents the device characteristics simulated using TCAD tools at different gate dielectric layer thicknesses, or a parameter obtained by fitting data from multiple production batches throughout the product line's history.T gox The thickness of the gate dielectric layer; T goxt This represents the target value for the gate dielectric layer thickness.

[0042] When determining the adjustable amount of the gate predoping threshold voltage, the gate impurity concentration is first determined based on the second and third analog quantities and the corresponding ion implantation dose. Then, the gate work function change is determined based on the gate impurity concentration; this change characterizes the change in the gate's work function before and after doping. Finally, the adjustable amount is determined based on the work function change, which is positively correlated with the work function change. The expression for the adjustable amount is shown in Equation 2:

[0043] Formula 2

[0044] Where, Δ V t2 Adjustable value; ΔФ Gate The change in the work function. q It represents the elementary charge.

[0045] The change in work function is positively correlated with the gate impurity concentration, as shown in Equation 3:

[0046] Formula 3

[0047] Among them, Ф doped The work function value after doping; Ф intrinsic The work function value of the intrinsic semiconductor before doping; k Boltzmann's constant; T Thermodynamic temperature; n i This refers to the intrinsic carrier concentration. N dope This represents the gate impurity concentration.

[0048] When determining the gate impurity concentration, the ion barrier layer thickness is used as a third analog value. Based on this third analog value and the corresponding ion implantation dose, the actual first doping concentration that can reach the gate interior is determined. For example, as the ion barrier layer thickness increases, the number of ions that can penetrate the layer and reach the gate interior decreases, leading to a decrease in the first doping concentration. Finally, the average impurity concentration of the gate is determined as the post-doped gate impurity concentration based on the ratio of the first doping concentration to the second analog value.

[0049] In one embodiment, the average gate impurity concentration is as shown in Equation 4:

[0050] Formula 4

[0051] in, D realTo determine the actual doping concentration that can reach inside the gate. η This represents the activation efficiency of the ions, which is generally a constant and ranges from 0.7 to 0.9. T poly This represents the actual thickness remaining after the gate polysilicon layer has been surface-oxidized to form an ion barrier layer.

[0052] The actual doping concentration that can reach inside the gate can be determined by the complementary error function ( The model is used for estimation, as shown in Equation 5:

[0053] Formula 5

[0054] in, Dose The ion implantation dose set for the ion implantation equipment; T s0 R represents the thickness of the ion blocking layer. p The projected range of a specific ion under specific injection energy conditions. The standard deviation corresponding to the projected range can be obtained through simulation using software such as SRIM or through theoretical calculations. For the standardized ion blocking layer thickness, erfc( T s The value can be obtained by looking up a table or by calculation.

[0055] In Δ V t1 =Δ V t2 In this case, the relationship between ion implantation amount, gate dielectric layer thickness, ion barrier layer thickness, and gate thickness can be obtained, as shown in Equation 6:

[0056] Formula 6

[0057] in, b and c These are parameters obtained through algebraic solution. The target value for the gate dielectric layer thickness in the aforementioned calculation formula. T goxt These are process parameters that can be preset according to actual process requirements.

[0058] After obtaining the preset prediction model, the model is stored in a designated location and associated with the control terminal of the ion implanter, enabling the control terminal to perform ion implantation based on the ion implantation amount obtained from the model. In this way, the ion implanter can automatically calculate the required ion implantation amount based on the real-time measured thickness of the gate dielectric layer, gate thickness, and ion barrier layer, and perform precise ion implantation operations.

[0059] In one embodiment, for a specific product, the measured gate dielectric layer thickness, polysilicon gate thickness, and ion barrier layer thickness of five different wafers are selected (as shown in the table below). The first, second, and third thicknesses are used as inputs to a prediction model. Based on the prediction model, the phosphorus ion implantation dose is calculated. After determining the ion implantation amount for gate pre-doping, the photolithography process can proceed. Photoresist is coated on the side of the ion barrier layer opposite to the polysilicon gate layer to block areas where ion implantation is not required, and then ion implantation is performed. After each subsequent wafer manufacturing step is completed, the threshold voltage of each wafer can be measured.

[0060]

[0061] The above method allows for precise control of the threshold voltage of semiconductor devices, maintaining it within a preset target voltage range and improving the consistency and stability of device performance. This method effectively addresses fluctuations in layer thickness during manufacturing by adjusting the ion implantation amount to compensate for these fluctuations on the threshold voltage.

[0062] This embodiment also provides a semiconductor device threshold voltage control system. The system achieves precise control of the semiconductor device threshold voltage by accurately acquiring the thickness of the gate dielectric layer, the thickness of the gate polysilicon layer, and the thickness of the ion barrier layer, and calculating an appropriate gate pre-doped ion implantation amount based on these thickness parameters.

[0063] Please see Figure 2 The threshold voltage control system for the semiconductor device includes a first thickness acquisition module 20, a second thickness acquisition module 21, and an ion implantation control module 22.

[0064] The first thickness acquisition module 20 is used to acquire the first thickness of the gate dielectric layer. This module is equipped with a high-precision thickness measurement device, which can perform non-contact measurement of the gate dielectric layer using an ellipsometer. During measurement, the ellipsometer emits polarized light that illuminates the surface of the gate dielectric layer, and then analyzes the change in the polarization state of the reflected light. A built-in algorithm is used to calculate the precise thickness of the gate dielectric layer. The module's measurement accuracy can reach 1 angstrom, meeting the stringent requirements for gate dielectric layer thickness control at advanced process nodes.

[0065] The second thickness acquisition module 21 is used to acquire the second thickness of the gate polysilicon layer and the third thickness of the ion barrier layer. This module uses a spectroscopic ellipsometry or a profilometer to analyze the surface morphology, thereby accurately measuring the gate thickness. During the measurement process, the system takes multiple sampling points at different locations on the wafer, and obtains the average value and distribution of the gate thickness through statistical analysis, ensuring the representativeness and reliability of the measurement data.

[0066] The ion implantation control module 22 determines the ion implantation amount for gate predoping based on the first, second, and third thicknesses to ensure that the threshold voltage of the device remains within a preset target voltage range after gate predoping. This module incorporates a mathematical model and database, enabling the establishment of mathematical relationships between the gate dielectric layer thickness, gate thickness, ion barrier layer thickness, and ion implantation amount. Upon receiving the three thickness parameters, the ion implantation control module 22 calculates the optimal ion implantation dose and energy using the model and transmits these parameters to the ion implanter for precise implantation.

[0067] In one embodiment, the ion implantation control module 22 further includes a feedback unit for the wafer electrical test threshold voltage results, which adjusts the ion implantation model based on the threshold voltage results of the final electrical characteristic detection. For example, by feeding back the threshold voltages of recent batches of test wafers to the ion implantation control module 22, the system automatically calculates and adjusts the coefficients to correct the calculation model of the ion implantation amount, thereby achieving closed-loop control.

[0068] In one embodiment, the system further includes a data processing module for statistical analysis of the first, second, and third thicknesses, and transmitting the analysis results to the ion implantation control module 22. The data processing module employs big data analytics to process thickness data at different locations on the wafer, generating a thickness distribution map and identifying anomalies and trend changes. In this way, the system can gain a more comprehensive understanding of the thickness distribution of each layer on the wafer, providing more reliable data support for accurate ion implantation dosage calculation. Of course, the functions of the data processing module and the ion implantation control module 22 can be integrated into the same processor, utilizing the processing power of a CPU, microcontroller, etc., to achieve the aforementioned data analysis and ion implantation dosage prediction operations.

[0069] The workflow of the threshold voltage control system for this semiconductor device is as follows: First, two thickness acquisition modules acquire thickness data of the gate dielectric layer, gate, and ion barrier layer, respectively. Then, these data are transmitted to the data processing module for statistical analysis. Next, the ion implantation control module 22 calculates the optimal ion implantation dose based on the processed thickness data and its built-in prediction model. Finally, the system controls the ion implantation device to perform gate pre-doping according to the calculated dose. After implantation is completed, the threshold voltage detection unit tests the sample device to verify whether the threshold voltage meets the preset target and adjusts the parameters as needed.

[0070] This system effectively solves the threshold voltage instability problem caused by thickness fluctuations in the gate dielectric layer, gate, and ion barrier layer in traditional processes by precisely controlling the ion implantation amount during gate predoping, thereby improving the performance consistency and yield of semiconductor devices. The system is highly automated, reducing human intervention and significantly improving production efficiency and product quality.

[0071] The present invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer device being used to implement a semiconductor device threshold voltage control method.

[0072] The memory in this computer device can be random access memory (RAM), read-only memory (ROM), flash memory, or other types of storage media, used to store computer programs and related data. The processor can be a central processing unit (CPU), graphics processing unit (GPU), digital signal processor (DSP), or application-specific integrated circuit (ASIC), etc., responsible for executing the instructions in the computer program.

[0073] When the processor executes the computer program stored in the memory, it implements the various steps of the aforementioned semiconductor device threshold voltage control method, including fabricating a gate dielectric layer, measuring and obtaining a first thickness of the gate dielectric layer; forming a gate polysilicon layer on the basis of the gate dielectric layer, and oxidizing the surface of the gate polysilicon layer to obtain an ion barrier layer, measuring and obtaining a second thickness of the gate polysilicon layer and a third thickness of the ion barrier layer; determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness, so as to perform ion implantation on the gate polysilicon layer, so that the threshold voltage of the device is maintained within a preset target voltage range after the gate predoping is completed.

[0074] This computer device can be connected to semiconductor manufacturing equipment such as ion implantation machines and measuring devices to receive measurement data of each layer thickness. By running computer programs to process this data, it calculates the required ion implantation amount and sends the calculation results to the control terminal of the ion implantation machine to achieve automated control.

[0075] The computer program in the computer device also includes a module for building and applying a pre-defined prediction model that characterizes the mapping relationship between the first, second, and third thicknesses and the ion implantation amount. When real-time measured thickness data of each layer is received, the computer program can quickly calculate the required ion implantation amount based on the model, ensuring that the threshold voltage of the device remains within the preset target voltage range after gate predoping.

[0076] In one embodiment, the computer device may further include a database module for storing historical process data and model parameters for data analysis and model optimization.

[0077] This computer device, through a semiconductor device threshold voltage control method implemented by executing a computer program, can precisely control the threshold voltage of semiconductor devices, improve the consistency and stability of device performance, and effectively cope with the fluctuations in the thickness of each layer during the manufacturing process.

[0078] The present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of a semiconductor device threshold voltage control method.

[0079] The computer-readable storage medium can be any medium capable of storing computer programs, such as read-only memory (ROM), random access memory (RAM), optical disc, hard disk, USB flash drive, or flash memory card. The computer program can be written in various programming languages, such as C, C++, Java, and Python.

[0080] When the computer program stored in the computer-readable storage medium is executed by the processor, the steps of the aforementioned semiconductor device threshold voltage control method are implemented, including fabricating a gate dielectric layer, measuring and obtaining a first thickness of the gate dielectric layer; forming a gate polysilicon layer on the basis of the gate dielectric layer, and oxidizing the surface of the gate polysilicon layer to obtain an ion barrier layer, measuring and obtaining a second thickness of the gate polysilicon layer and a third thickness of the ion barrier layer; determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness, so as to perform ion implantation on the gate polysilicon layer, so that the threshold voltage of the device is maintained within a preset target voltage range after the gate predoping is completed.

[0081] In one embodiment, when the computer program is executed by the processor, it takes the first thickness, the second thickness, and the third thickness as input to a preset prediction model and calculates the ion implantation amount based on the preset prediction model. The preset prediction model represents the mapping relationship between the three thicknesses and the ion implantation amount.

[0082] In one embodiment, when the computer program is executed by the processor, it obtains a first analog quantity of the gate dielectric layer thickness to establish a relevant mapping relationship through a preset prediction model establishment process, obtains a second analog quantity of the gate thickness, a third analog quantity of the ion barrier layer thickness and the corresponding ion implantation dose to determine the adjustable quantity, and solves the mapping relationship when the adjustable quantity is equal to the threshold voltage change.

[0083] In one embodiment, when the computer program is executed by the processor, it compares each first analog quantity with a preset target value for the gate dielectric layer thickness to obtain a first thickness offset, and determines the corresponding threshold voltage change based on the offset.

[0084] In one embodiment, when the computer program is executed by the processor, it determines the gate impurity concentration based on the second analog quantity, the third analog quantity, and the corresponding ion implantation dose, and then determines the gate work function change and the adjustable amount.

[0085] In one embodiment, when the computer program is executed by the processor, it compares the third analog quantity with the ion implantation projection range and the standard deviation of the projection range to obtain the second thickness offset. Based on the offset and the corresponding ion implantation dose, it determines the first doping concentration that can actually reach the inside of the gate, and determines the gate impurity concentration based on the ratio of the first doping concentration to the second analog quantity.

[0086] In one embodiment, when the computer program is executed by the processor, it also stores a preset prediction model in a designated location and associates it with the control terminal of the ion implantation machine, so that the control terminal can perform ion implantation based on the ion implantation amount obtained from the model.

[0087] The computer program stored on this computer-readable storage medium can be integrated into the control system of a semiconductor manufacturing equipment to achieve automated and precise control of the threshold voltage of semiconductor devices. The program can receive real-time data from measuring devices, such as the thickness data of the gate dielectric layer, gate electrode, and ion barrier layer, then calculate the optimal ion implantation amount using a built-in predictive model, and transmit this value to the ion implantation machine for execution.

[0088] In this way, the computer program on the computer-readable storage medium can effectively improve the accuracy and consistency of threshold voltage control of semiconductor devices, reduce human error, and improve production efficiency and product yield.

[0089] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for controlling the threshold voltage of a semiconductor device, characterized in that, The control method includes: Fabricate a gate dielectric layer and measure and obtain the first thickness of the gate dielectric layer; A gate polysilicon layer is formed on the basis of the gate dielectric layer, and the surface of the gate polysilicon layer is oxidized to obtain an ion barrier layer. The second thickness of the gate polysilicon layer and the third thickness of the ion barrier layer are measured and obtained. The step of determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness to perform ion implantation on the gate polysilicon layer, so that the threshold voltage of the device after gate predoping is completed remains within a preset target voltage range; the step of determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness includes: using the first thickness, the second thickness, and the third thickness as input to a preset prediction model to calculate the ion implantation amount based on the preset prediction model, wherein the preset prediction model is used to characterize the mapping relationship between the first thickness, the second thickness, the third thickness, and the ion implantation amount.

2. The semiconductor device threshold voltage control method according to claim 1, characterized in that, The process of establishing the preset prediction model includes: Obtain the first analog value of the gate dielectric layer thickness to establish a mapping relationship between the gate dielectric layer thickness and the corresponding threshold voltage change. A second analog value for the gate thickness, a third analog value for the ion barrier layer thickness, and the corresponding ion implantation dose are obtained to determine the adjustable amount of the gate predoping threshold voltage. When the adjustable amount is equal to the threshold voltage change, the mapping relationship between the gate dielectric layer thickness, gate thickness, ion barrier layer thickness and ion implantation amount is solved to obtain the preset prediction model.

3. The semiconductor device threshold voltage control method according to claim 2, characterized in that, The steps for establishing the first mapping relationship between the gate oxide thickness and the corresponding threshold voltage change include: Each of the first analog quantities is compared with a preset target value for the gate dielectric layer thickness to obtain the corresponding first thickness offset. The corresponding threshold voltage change is determined based on the first thickness offset to obtain the first mapping relationship.

4. The semiconductor device threshold voltage control method according to claim 2, characterized in that, The steps of obtaining a second analog value for the gate thickness, a third analog value for the ion barrier layer thickness, and the corresponding ion implantation dose to determine the adjustable amount of the gate predoping threshold voltage include: The gate impurity concentration is determined based on the second analog quantity, the third analog quantity, and the corresponding ion implantation dose; The gate work function change is determined based on the gate impurity concentration, wherein the gate work function change is used to characterize the change in the gate work function before and after doping. The adjustable amount is determined based on the change in the work function, wherein the adjustable amount is positively correlated with the change in the work function.

5. The semiconductor device threshold voltage control method according to claim 4, characterized in that, The step of determining the gate impurity concentration based on the second analog quantity, the third analog quantity, and the corresponding ion implantation dose includes: The third analog quantity is compared with the ion implantation projection range and the standard deviation of the projection range to obtain the second thickness offset. The first doping concentration that can actually reach the gate is determined based on the second thickness offset and the corresponding ion implantation dose. The average impurity concentration of the gate is determined based on the ratio of the first doping concentration to the second analog quantity, and is taken as the gate impurity concentration.

6. The semiconductor device threshold voltage control method according to claim 2, characterized in that, After obtaining the preset prediction model, the method further includes: storing the preset prediction model in a specified location and associating it with the control terminal of the ion implantation machine, so that the control terminal performs ion implantation based on the ion implantation amount obtained from the model.

7. A threshold voltage control system for a semiconductor device, characterized in that, The system includes: The first thickness acquisition module is used to obtain the first thickness of the gate dielectric layer; The second thickness acquisition module is used to acquire the second thickness of the gate polysilicon layer and the third thickness of the ion barrier layer; the gate polysilicon layer is formed on the basis of the gate dielectric layer, and the ion barrier layer is obtained by oxidizing the surface of the gate polysilicon. An ion implantation control module is used to determine the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness, so as to perform ion implantation on the gate polysilicon layer, thereby maintaining the threshold voltage of the device within a preset target voltage range after gate predoping is completed. The step of determining the ion implantation amount for gate predoping based on the first thickness, the second thickness, and the third thickness includes: using the first thickness, the second thickness, and the third thickness as input to a preset prediction model, and calculating the ion implantation amount based on the preset prediction model, wherein the preset prediction model is used to characterize the mapping relationship between the first thickness, the second thickness, the third thickness, and the ion implantation amount.

8. A computer device, comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, when the processor executes the computer program, it implements the steps of the semiconductor device threshold voltage control method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the semiconductor device threshold voltage control method according to any one of claims 1 to 6.

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