Photoelectric encoder phase correction method, device, equipment and medium

Abstract

The invention discloses a photoelectric encoder phase correction method, device and equipment and a medium, and relates to the technical field of encoders. According to the scheme, the encoder phase error is divided into a static error of an integral offset existing between code channels and a dynamic error of phase delay caused by sampling delay between the code channels; during phase correction, determining a static error compensation value and a dynamic error compensation value according to the vernier principle, the rotating speed and the sampling delay time of each code channel so as to compensate the phase difference value of each code channel to obtain a target phase difference value; and finally performing phase correction based on the target phase difference value. According to the scheme, offset of the code disc scribed line is compensated through static error compensation, and the requirement for code disc scribed line precision is lowered; phase delay is compensated through dynamic error compensation, asynchronous sampling of different code channel signals is allowed, and the accuracy of the photoelectric encoder is improved.

Description

Technical Field

[0001] This application relates to the field of encoder technology, and in particular to a method, apparatus, device and medium for phase correction of an optical encoder. Background Technology

[0002] In closed-loop control systems such as servo drives, frequency converters, and robots, photoelectric encoders serve as key position and speed feedback elements. Based on the code disk type, they can be categorized into binary code, Gray code, and vernier code. Among these, vernier code, with its high resolution, is widely used in high-precision applications and is further divided into dual-track and triple-track structures; the latter, due to its lower requirements for code disk machining precision, has become the mainstream choice.

[0003] Vernier photoelectric encoders are analog encoders that require decoding to obtain absolute position. This process mainly includes vernier decoding and sine / cosine signal subdivision. Traditional phase correction methods typically convert the sine / cosine signals of each code track into phases and calculate the phase difference based on the vernier principle, then deduce the compensation amount through binary alignment. However, due to the limited number of bits in the binary alignment, the compensation amount cannot be accurately calculated when the error exceeds the range that the alignment bits can represent. Secondly, traditional methods require extremely high sampling synchronization of multiple analog signals. If there is a sampling delay in each code track signal, it will significantly amplify the error and increase the difficulty of compensation. In practical applications, it is often necessary to simultaneously acquire four to six sine / cosine signals, making perfectly synchronous acquisition extremely difficult, further limiting the reliability and applicability of this method.

[0004] In view of the above, how to solve the problem that the current phase correction method of vernier photoelectric encoder cannot work reliably when the error is large or the signal sampling is asynchronous is an urgent problem to be solved by technicians in this field. Summary of the Invention

[0005] The purpose of this application is to provide a phase correction method, device, equipment, and medium for photoelectric encoders, in order to solve the problem that the current phase correction method for vernier photoelectric encoders cannot work reliably when the error is large or the signal sampling is asynchronous.

[0006] To address the aforementioned technical problems, this application provides a photoelectric encoder phase correction method, comprising:

[0007] Obtain the encoder's rotational speed, the phase of the sine and cosine signals for each code track, and the sampling delay time;

[0008] Based on the vernier principle and the phase of the sine and cosine signals of each code channel, the static error compensation value is determined; wherein, the static error compensation value is the compensation value for the overall offset between code channels;

[0009] Based on the rotational speed and the sampling delay time of each code channel, a dynamic error compensation value is determined; wherein, the dynamic error compensation value is a compensation value for the phase delay caused by the sampling delay between each code channel;

[0010] The phase difference of each code channel is compensated based on the static error compensation value and the dynamic error compensation value to obtain the compensated target phase difference value.

[0011] Phase correction is performed based on the target phase difference.

[0012] On the one hand, when the encoder is a dual-track photoelectric encoder, acquiring the sine and cosine signal phases of each track includes:

[0013] Obtain the phase of the first sine and cosine signals of the main code track and the phase of the second sine and cosine signals of the vernier code track;

[0014] The number of periods of the sine and cosine signals in the main code channel is 2. m The number of periods of the sine and cosine signals of the vernier track is 2. m -1, the encoder's resolution is 2. n Both m and n are positive integers;

[0015] Correspondingly, based on the vernier principle and the phase of the sine and cosine signals of each code track, the static error compensation value is determined, including:

[0016] Determine the first difference between the phase of the first sine / cosine signal and the phase of the second sine / cosine signal;

[0017] The static error compensation value is obtained by subtracting the high nm bits of the phase of the first sine and cosine signals from the low nm bits of the first difference.

[0018] On the other hand, based on the rotational speed and the sampling delay time of each code track, a dynamic error compensation value is determined, including:

[0019] The product of the sampling delay time and the rotational speed is determined to obtain the dynamic error compensation value.

[0020] On the other hand, the phase difference of each code channel is compensated based on the static error compensation value and the dynamic error compensation value to obtain the compensated target phase difference value, including:

[0021] The phase difference of each code channel is initially compensated based on the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value after initial compensation.

[0022] Based on the vernier principle and the candidate phase difference values, other error compensation values ​​are determined; these other error compensation values ​​are compensation values ​​for the fluctuations existing between code channels.

[0023] The target phase difference value is determined based on the other error compensation values ​​and the candidate phase difference values.

[0024] On the other hand, based on the static error compensation value and the dynamic error compensation value, initial compensation is performed on the phase difference value of each code channel to obtain the candidate phase difference value after initial compensation, including:

[0025] The static error compensation value and the dynamic error compensation value are summed with the second sine and cosine signal phase to generate a new second sine and cosine signal phase for the vernier track;

[0026] The difference between the phase of the first sine and cosine signals and the phase of the new second sine and cosine signals is determined to obtain the candidate phase difference.

[0027] Alternatively, the phase of the first sine and cosine signal can be subtracted from the static error compensation value and the dynamic error compensation value to generate a new phase of the first sine and cosine signal for the main code channel;

[0028] The difference between the phase of the new first sine / cosine signal and the phase of the second sine / cosine signal is determined to obtain the candidate phase difference.

[0029] Alternatively, the first difference can be subtracted from the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value.

[0030] On the other hand, based on the vernier principle and the candidate phase difference, other error compensation values ​​are determined, including:

[0031] The other error compensation values ​​are obtained by subtracting the high nm bits of the phase of the first sine and cosine signal from the low nm bits of the candidate phase difference.

[0032] On the other hand, when the encoder is a three-track photoelectric encoder, acquiring the sine and cosine signal phases and sampling delay times of each track includes:

[0033] Obtain the phase of the first sine and cosine signals of the main code channel, the phase of the second sine and cosine signals of the vernier code channel, and the phase of the third sine and cosine signals of the segment code channel;

[0034] Obtain the first sampling delay time corresponding to the segment code channel and the second sampling delay time corresponding to the vernier code channel;

[0035] The number of periods of the sine and cosine signals in the main code channel is 2. m The number of periods of the sine and cosine signals of the vernier track is 2. m -1, the number of periods of the sine and cosine signals of the segment code channel is 2. m-s The encoder has a resolution of 2.n m, n, and s are all positive integers;

[0036] Correspondingly, based on the vernier principle and the phase of the sine and cosine signals of each code track, the static error compensation value is determined, including:

[0037] Determine a second difference between the phase of the first sine / cosine signal and the phase of the third sine / cosine signal;

[0038] The high nms bits of the phase of the first sine and cosine signal are subtracted from the low nms bits of the second difference to obtain the first static error compensation value corresponding to the segment code channel.

[0039] The second difference is summed with the first static error compensation value to obtain the second difference after static compensation;

[0040] Determine the third difference between the phase of the first sine / cosine signal and the phase of the second sine / cosine signal;

[0041] The high n-2m+s bits of the second difference after static compensation are subtracted from the low n-2m+s bits of the third difference to obtain the second static error compensation value corresponding to the vernier code track.

[0042] To address the aforementioned technical problems, this application also provides a photoelectric encoder phase correction device, comprising:

[0043] The acquisition module is used to acquire the encoder's rotational speed, the phase of the sine and cosine signals of each code track, and the sampling delay time;

[0044] The first determining module is used to determine the static error compensation value based on the vernier principle and the phase of the sine and cosine signals of each code channel; wherein the static error compensation value is the compensation value for the overall offset between code channels;

[0045] The second determining module is used to determine a dynamic error compensation value based on the rotational speed and the sampling delay time of each code channel; wherein the dynamic error compensation value is a compensation value for the phase delay caused by the sampling delay between each code channel.

[0046] The compensation module is used to compensate the phase difference of each code channel based on the static error compensation value and the dynamic error compensation value to obtain the compensated target phase difference value.

[0047] A correction module is used to perform phase correction based on the target phase difference value.

[0048] To address the aforementioned technical problems, this application also provides a photoelectric encoder phase correction device, comprising:

[0049] Memory, used to store computer programs;

[0050] A processor is used to implement the steps of the photoelectric encoder phase correction method described above when executing the computer program.

[0051] To address the aforementioned technical problems, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the photoelectric encoder phase correction method described above.

[0052] The photoelectric encoder phase correction method provided in this application divides the encoder phase error into a static error, which is an overall bias between code tracks, and a dynamic error, which is a phase delay caused by sampling delay between code tracks. To perform phase correction, the static error compensation value is determined based on the vernier principle and the phase of the sine and cosine signals of each code track; the dynamic error compensation value is determined based on the rotational speed and the sampling delay time of each code track; the phase difference between each code track is compensated based on the static and dynamic error compensation values ​​to obtain the target phase difference value; finally, phase correction is performed based on the target phase difference value. In other words, this scheme compensates for the offset of the code disk markings through static error compensation, reducing the accuracy requirements of the code disk markings on the photoelectric encoder; simultaneously, through dynamic error compensation, it compensates for the phase delay caused by sampling delay, allowing asynchronous sampling of signals from different code tracks, reducing the number of analog-to-digital converters used, and improving the accuracy of the photoelectric encoder.

[0053] In addition, this application also provides a photoelectric encoder phase correction device, equipment and medium, with the same effect as above. Attached Figure Description

[0054] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0055] Figure 1 A flowchart illustrating a photoelectric encoder phase correction method provided in this application embodiment;

[0056] Figure 2 A schematic diagram of the code track of a dual-track photoelectric encoder provided in an embodiment of this application;

[0057] Figure 3 A schematic diagram of static error compensation for a dual-track photoelectric encoder provided in an embodiment of this application;

[0058] Figure 4 A schematic diagram of the code track of a three-track photoelectric encoder provided in an embodiment of this application;

[0059] Figure 5 A schematic diagram of static error compensation for a three-track photoelectric encoder provided in an embodiment of this application;

[0060] Figure 6 A schematic diagram of a photoelectric encoder phase correction device provided in an embodiment of this application;

[0061] Figure 7 This is a structural diagram of a photoelectric encoder phase correction device provided in an embodiment of this application. Detailed Implementation

[0062] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0063] The core of this application is to provide a phase correction method, device, equipment, and medium for photoelectric encoders, in order to solve the problem that the current phase correction method for vernier photoelectric encoders cannot work reliably when the error is large or the signal sampling is asynchronous.

[0064] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0065] In closed-loop control systems such as servo drives, frequency converters, and robots, photoelectric encoders are widely used to provide feedback on position, speed, and other information. Photoelectric encoders can be categorized based on their code disk type, including binary code, Gray code, and vernier code. Vernier code encoders offer higher resolution and are therefore commonly used in high-precision applications. Vernier code encoders can be further divided into dual-track and triple-track types; triple-track encoders typically require lower precision in code disk manufacturing compared to dual-track encoders, making them more widely used currently.

[0066] Vernier photoelectric encoders are analog encoders, therefore requiring decoding of the analog signal to obtain its absolute position. The decoding process mainly consists of two parts: vernier decoding and sine / cosine signal subdivision. Vernier decoding can be performed based on the vernier principle. However, due to actual signal errors, the vernier principle cannot directly decode the signal; therefore, some code tracks must be corrected during vernier decoding.

[0067] Current phase correction methods typically calculate the phase of each code channel by arctangenting the sine and cosine signals of each code channel, and then calculate the corresponding phase difference based on the vernier principle. When expressing the phase difference as a binary digital quantity, the vernier principle indicates that the lower bits of the coarse code should be aligned with the higher bits of the fine code, thus allowing the calculation of the corresponding compensation amount based on the aligned bits. However, the above method has the following problems: Firstly, due to the limited number of aligned bits in binary numbers, when the error exceeds the upper limit that the aligned bits can represent, the corresponding compensation amount cannot be directly calculated. Secondly, this method has high requirements for the consistency of the analog signal sampling time of different code channels. If there is a sampling delay in the analog signals of different code channels, it will amplify the error and increase the difficulty of compensation. In practical applications, four or even six sine and cosine signals are usually required to be acquired simultaneously, which is difficult to achieve in practice. Therefore, to solve the above problems, this application provides a phase correction method for photoelectric encoders.

[0068] Figure 1 This is a flowchart illustrating a photoelectric encoder phase correction method provided in an embodiment of this application. Figure 1 As shown, the method includes:

[0069] S10: Obtain the encoder's rotational speed, the phase of the sine and cosine signals for each code track, and the sampling delay time.

[0070] Specifically, to achieve encoder phase correction, it is first necessary to acquire the encoder's rotational speed, the sine and cosine signal phases of each track, and the sampling delay time. It should be noted that this embodiment does not limit the specific type of encoder; for example, it can be a dual-track photoelectric encoder or a three-track photoelectric encoder. The parameters acquired will differ depending on the encoder type. For example, when the encoder is a dual-track photoelectric encoder, acquiring the sine and cosine signal phases of each track requires acquiring the sine and cosine signal phases of the main track (M track) and the vernier track (N track); while when the encoder is a three-track photoelectric encoder, acquiring the sine and cosine signal phases of the main track, the vernier track, and the segment track (S track) requires acquiring the sine and cosine signal phases. The acquisition of other parameters also varies with the encoder type and will not be elaborated upon in this embodiment.

[0071] S11: Determine the static error compensation value based on the vernier principle and the phase of the sine and cosine signals of each code channel.

[0072] Among them, the static error compensation value is the compensation value for the overall offset between code channels.

[0073] Understandably, the vernier principle of a photoelectric encoder is similar to that of a vernier caliper, employing two sets of gratings with slightly different graduation spacing. When these gratings move relative to each other, they generate a periodic phase shift in the optical signal. By detecting the change in the phase difference between the two signals, high-resolution measurement of minute displacements can be achieved, thereby significantly improving the positioning accuracy of the system. However, due to the deviation of the code disk graduations, an overall offset exists between different code tracks. In this embodiment, this overall offset is treated as a static phase error, and a static error compensation value is determined based on the vernier principle and the phase of the sine and cosine signals of each code track. This static error compensation value is then used to compensate for the aforementioned static phase error.

[0074] It should be noted that the static phase error can be directly calculated from any position of the encoder when it is stationary. The characteristics of the static phase error are: it remains constant across the entire encoder speed range, and the direction of the phase deviation is independent of the encoder rotation direction. Therefore, compensation is always performed in the same direction. This embodiment does not limit the specific calculation process for the static error compensation value; it depends on the specific implementation.

[0075] S12: Determine the dynamic error compensation value based on the rotational speed and the sampling delay time of each code channel.

[0076] The dynamic error compensation value is the compensation value for the phase delay caused by the sampling delay between each code channel.

[0077] Dynamic phase error is the phase delay caused by the sampling delay between code tracks. Its characteristics are: dynamic phase error is proportional to the encoder rotational speed, and the delay direction is related to the rotational speed direction. Therefore, dynamic phase error needs to be calculated in real time based on the rotational speed. In this embodiment, to compensate for dynamic phase error, a dynamic error compensation value is determined based on the rotational speed and the sampling delay time of each code track, so that the dynamic phase error can be compensated using this compensation value. This embodiment does not impose restrictions on the calculation process of the dynamic error compensation value.

[0078] S13: Compensate the phase difference of each code channel based on the static error compensation value and the dynamic error compensation value to obtain the compensated target phase difference value.

[0079] S14: Perform phase correction based on the target phase difference.

[0080] After completing static and dynamic phase error compensation, the phase of each code track is compensated based on the static and dynamic error compensation values. Specifically, the phase difference between each code track is compensated to obtain the compensated target phase difference value. Finally, phase correction is performed on the encoder's code tracks based on the target phase difference value, thereby effectively improving measurement accuracy and resolution. This embodiment does not limit the calculation process of the target phase difference value; it depends on the specific implementation.

[0081] In this embodiment, the encoder phase error is divided into static error, which is the overall bias between code tracks, and dynamic error, which is the phase delay caused by the sampling delay between code tracks. To perform phase correction, the static error compensation value is determined based on the vernier principle and the phase of the sine and cosine signals of each code track. The dynamic error compensation value is determined based on the rotational speed and the sampling delay time of each code track. The phase difference between each code track is compensated based on the static and dynamic error compensation values ​​to obtain the target phase difference value. Finally, phase correction is performed based on the target phase difference value. In other words, this scheme compensates for the offset of the code disk markings through static error compensation, reducing the accuracy requirements of the code disk markings on the photoelectric encoder. Simultaneously, through dynamic error compensation, it compensates for the phase delay caused by the sampling delay, allowing asynchronous sampling of signals from different code tracks, reducing the number of analog-to-digital converters used, and improving the accuracy of the photoelectric encoder.

[0082] To enable those skilled in the art to better understand the technical principles of the photoelectric encoder phase correction method provided in this application, the phase correction process is described in detail below with reference to specific types of photoelectric encoders:

[0083] (a) Dual-track photoelectric encoder;

[0084] Based on the above embodiments, in some embodiments, when the encoder type is a dual-track photoelectric encoder, acquiring the sine and cosine signal phases of each track includes:

[0085] S101: Obtain the phase of the first sine and cosine signals of the main code channel and the phase of the second sine and cosine signals of the vernier code channel.

[0086] The number of periods for the sine and cosine signals in the main code channel is 2. m The number of periods for the sine and cosine signals of the vernier track is 2. m -1, the encoder resolution is 2 n Both m and n are positive integers.

[0087] Figure 2 This is a schematic diagram of the code track of a dual-track photoelectric encoder provided in an embodiment of this application. Figure 2 As shown, the two tracks of the dual-track photoelectric encoder are the main track (M track) and the vernier track (N track). The sine and cosine signals of the M track have 2... m For each period, the N-channel sine and cosine signals have 2... m -1 cycle, encoder resolution is 2 n Both m and n are positive integers, meaning the dual-track photoelectric encoder is an n-bit photoelectric encoder. The sine and cosine subdivision values ​​for each track are both 2. n-mThat is, nm bits. Therefore, when the encoder type is a dual-track photoelectric encoder, in order to obtain the sine and cosine signal phases of each track, specifically the first sine and cosine signal phase of the main track is obtained. Phase of the second sine and cosine signals of the vernier track .

[0088] Furthermore, according to the vernier principle, the phase difference between the sine and cosine signals of channel M and channel N is... The phase of the sine and cosine signals in the M-channel The signal frequency is 2 of the signal frequency m Multiples. Therefore, binary The high m bits are the result of the vernier calculation; this m bits are compared with the nm bits. By concatenating the N and M code channels, an n-bit position value can be obtained. However, due to various reasons, there is a phase error between the N and M code channels. Direct concatenation will cause abnormal position jumps at the concatenation point, so a compensated position value is required. Then, the position is calculated based on the position subdivision values ​​according to the vernier principle. The compensation process is explained below:

[0089] (1) Calculation of static error compensation value;

[0090] Based on the above embodiments, in some embodiments, the static error compensation value is determined according to the vernier principle and the phase of the sine and cosine signals of each code track, including:

[0091] S111: Determine the first difference between the phase of the first sine / cosine signal and the phase of the second sine / cosine signal.

[0092] S112: Subtract the high nm bits of the phase of the first sine and cosine signal from the low nm bits of the first difference to obtain the static error compensation value.

[0093] According to the vernier principle, low nm position and The high nm bits (i.e., alignment bits) should be completely consistent. Therefore, in order to determine the static error compensation value, this embodiment specifically determines the phase of the first sine and cosine signals. Phase with the second sine and cosine signals First difference Then, the phase of the first sine and cosine signals is... The high nm position and the first difference The static error compensation value is obtained by subtracting the lower nm bits, as shown in the following formula:

[0094] ;

[0095] in, This is the static error compensation value. Phase of the first sine and cosine signal The high nm position, The first difference The low nm position.

[0096] Figure 3 This is a schematic diagram of static error compensation for a dual-track photoelectric encoder provided in an embodiment of this application. Figure 3 As shown, the static error compensation value can be calculated at any position when the encoder is stationary, and during motion, only the value calculated when stationary needs to be used. However, the static error compensation value needs to be limited.

[0097] (2) Calculation of dynamic error compensation value;

[0098] Based on the above embodiments, in some embodiments, the dynamic error compensation value is determined according to the rotational speed and the sampling delay time of each code track, including:

[0099] S121: Determine the product of the sampling delay time and the rotational speed to obtain the dynamic error compensation value.

[0100] It is understandable that the dynamic error compensation value is proportional to the encoder speed. Therefore, given the sampling delay time, the dynamic error compensation value can be calculated using the following formula:

[0101] ;

[0102] in, This is the dynamic error compensation value. This is the sampling delay time. This refers to the rotational speed. It should be noted that the dynamic error compensation value needs to be recalculated each time compensation is performed.

[0103] (3) Calculation of the target phase difference;

[0104] It is worth noting that, in addition to the aforementioned static and dynamic phase errors, the encoder phase also exhibits other minor errors. Specifically, these minor errors include fluctuations between code tracks caused by uneven markings on the code disk, signal noise, and digital jitter occurring near the digital edges when subtracting the digitized phase values ​​calculated using the vernier. The characteristic of the digital calculation error is that its error value is independent of the digital quantization resolution and is always a unit value; therefore, its error value is very small and can be included in the compensation for other minor errors. In other words, other minor errors actually include signal noise, the uncompensated portion of the static phase error, and the digital calculation error. Therefore, after completing static and dynamic error compensation, compensation for other minor errors is also necessary. After compensating for these minor errors, the target phase difference value can be obtained.

[0105] Specifically, the phase difference of each code channel is compensated based on the static error compensation value and the dynamic error compensation value to obtain the compensated target phase difference value, including:

[0106] S122: Initial compensation is performed on the phase difference of each code channel based on the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value after initial compensation;

[0107] S123: Determine other error compensation values ​​based on the vernier principle and candidate phase difference values; other error compensation values ​​are compensation values ​​for fluctuations existing between code channels;

[0108] S124: Determine the target phase difference value based on other error compensation values ​​and candidate phase difference values.

[0109] It should be noted that, due to the small magnitude of other minor errors, the corresponding compensation values ​​cannot be directly calculated based on the existing phases of each code channel. Therefore, in this embodiment, it is necessary to first perform preliminary compensation on the phase of each code channel based on the static and dynamic error compensation values. Specifically, initial compensation is performed on the phase difference of each code channel to obtain candidate phase difference values ​​after initial compensation. Then, based on the vernier principle and the candidate phase difference values ​​after initial compensation, other error compensation values ​​are determined. The other error compensation values ​​are summed with the candidate phase difference values ​​to compensate for the aforementioned minor errors, ultimately obtaining the target phase difference value. The calculation process of the candidate phase difference value is explained below:

[0110] Based on the above embodiments, in some embodiments, the phase difference value of each code channel is initially compensated based on the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value after initial compensation, including:

[0111] S131: Add the static error compensation value and the dynamic error compensation value to the phase of the second sine and cosine signals to generate a new phase of the second sine and cosine signals for the vernier code track.

[0112] S132: Determine the difference between the phase of the first sine / cosine signal and the phase of the new second sine / cosine signal to obtain candidate phase difference values.

[0113] Before calculating other error compensation values, initial compensation must first be performed on the phase difference of each code channel based on the static and dynamic error compensation values. Specifically, the static error compensation value... and dynamic error compensation value Phase with the second sine and cosine signals Sum to generate a new second sine and cosine signal phase for the vernier track. The phase of the first sine and cosine signals was then determined. The difference in phase with the new second sine and cosine signals To obtain the candidate phase difference value after initial compensation. .

[0114] In practical implementation, the candidate phase difference value after initial compensation can also be calculated in the following ways:

[0115] S133: Subtract the phase of the first sine and cosine signal from the static error compensation value and the dynamic error compensation value to generate a new phase of the first sine and cosine signal for the main code channel.

[0116] S134: Determine the difference between the phase of the new first sine / cosine signal and the phase of the second sine / cosine signal to obtain candidate phase difference values.

[0117] Specifically, the phase of the first sine and cosine signals Compared with static error compensation value and dynamic error compensation value The difference is used to generate a new first sine and cosine signal phase for the main code channel. The phase of the new first sine and cosine signals is then determined. Phase with the second sine and cosine signals The difference is used to obtain the candidate phase difference after initial compensation. .

[0118] In addition, the candidate phase difference after initial compensation can be calculated in the following ways:

[0119] S135: Subtract the first difference from the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value.

[0120] Specifically, the first difference Compared with static error compensation value and dynamic error compensation value The difference is calculated to obtain the candidate phase difference value after initial compensation. .

[0121] (4) Calculation of other error compensation values;

[0122] Based on the above embodiments, in some embodiments, other error compensation values ​​are determined according to the vernier principle and candidate phase difference values, including:

[0123] S141: Subtract the high nm bits of the phase of the first sine and cosine signal from the low nm bits of the candidate phase difference to obtain other error compensation values.

[0124] To calculate other error compensation values, specifically the phase of the first sine and cosine signals... High nm position and the candidate phase difference after initial compensation The difference between the lower nm bits is used to obtain other error compensation values, and the specific formula is as follows:

[0125] ;

[0126] in, For other error compensation values, Phase of the first sine and cosine signal The high nm position, Candidate phase difference after initial compensation The low nm position.

[0127] (5) Phase compensation of dual-track photoelectric encoder;

[0128] Based on the above embodiments, in some embodiments, phase correction is performed based on the target phase difference value, including:

[0129] S151: Concatenate the high m bits of the target phase difference with the high nm bits of the main code channel to obtain an n-bit position value.

[0130] To achieve encoder phase correction and compensation, other error compensation values ​​are first summed with candidate phase difference values ​​to determine the target phase difference value. The specific formula is as follows:

[0131] ;

[0132] in, The target phase difference value, The candidate phase difference value after initial compensation. For other error compensation values.

[0133] Finally, the target phase difference value The high m bits are concatenated with the high nm bits of the main code channel to obtain the n-bit position value.

[0134] In summary, compensation for static phase error, dynamic phase error, and other minor errors of the dual-track photoelectric encoder has been achieved.

[0135] (ii) Three-track photoelectric encoder;

[0136] Based on the above embodiments, in some embodiments, when the encoder type is a three-track photoelectric encoder, acquiring the sine and cosine signal phases and sampling delay times of each track includes:

[0137] S161: Obtain the phase of the first sine and cosine signals of the main code channel, the phase of the second sine and cosine signals of the vernier code channel, and the phase of the third sine and cosine signals of the segment code channel.

[0138] S162: Obtain the first sampling delay time corresponding to the segment code channel and the second sampling delay time corresponding to the vernier code channel.

[0139] The number of periods for the sine and cosine signals in the main code channel is 2. m The number of periods for the sine and cosine signals of the vernier track is 2. m -1, the number of periods of the sine and cosine signals in the segment code channel is 2. m-s The encoder resolution is 2 n m, n and s are all positive integers.

[0140] Figure 4 This is a schematic diagram of the code tracks of a three-track photoelectric encoder provided in an embodiment of this application. Figure 4 As shown, the three code channels are the main code channel (M channel), the vernier code channel (N channel), and the segment code channel (S channel). The sine and cosine signals of the M channel have 2... m For each period, the N-channel sine and cosine signals have 2... m -1 cycle, the sine and cosine signals of the S-code channel have 2 m-s One cycle, encoder resolution is 2 n Where m, n, and s are all positive integers, meaning the three-channel photoelectric encoder is an n-bit photoelectric encoder. The sine and cosine subdivision values ​​for each channel are all 2. n-m That is, nm bits. Therefore, when the encoder type is a three-track photoelectric encoder, in order to obtain the sine and cosine signal phases and sampling delay times of each track, specifically the first sine and cosine signal phase of the main track is obtained. Phase of the second sine and cosine signals of the vernier track Phase of the third sine and cosine signals of the segment code channel And obtain the first sampling delay time corresponding to the segment code channel. The second sampling delay time corresponding to the vernier track .

[0141] Furthermore, according to the vernier principle, the phase difference between the sine and cosine signals of channel M and channel N is... The difference between the phase of the sine and cosine signals in channel M and channel S is _____. M-channel signal phase The frequency is The frequency is 2 m times, for Frequency 2 s times. Frequency is Frequency 2 m-s Multiples. Therefore, binary High ms bits and binary The high s-bit values ​​are concatenated to form an m-bit vernier solution. This m-bit value is then combined with the nm-bit value. By concatenating these layers, an n-bit position value can be obtained. However, due to various reasons, phase errors exist between the S, N, and M channels. Direct concatenation at these channels can lead to abnormal position jumps at the concatenation point, thus requiring a compensated position value. and Then, the position is calculated based on the vernier principle and position subdivision. The compensation process is explained below:

[0142] (1) Calculation of static error compensation value;

[0143] Based on the above embodiments, in some embodiments, the static error compensation value is determined according to the vernier principle and the phase of the sine and cosine signals of each code track, including:

[0144] S171: Determine the second difference between the phase of the first sine / cosine signal and the phase of the third sine / cosine signal.

[0145] S172: Subtract the high nms bits of the phase of the first sine and cosine signal from the low nms bits of the second difference to obtain the first static error compensation value corresponding to the segment code channel.

[0146] S173: Sum the second difference with the first static error compensation value to obtain the second difference after static compensation.

[0147] S174: Determine the third difference between the phase of the first sine / cosine signal and the phase of the second sine / cosine signal.

[0148] S175: Subtract the high n-2m+s bits of the second difference after static compensation from the low n-2m+s bits of the third difference to obtain the second static error compensation value corresponding to the vernier code track.

[0149] According to the vernier principle, low nms position and The high nms bits should be completely consistent, referred to as alignment bits 1. Therefore, in order to determine the static error compensation value corresponding to the S-channel signal phase, this embodiment specifically determines the phase of the first sine and cosine signals. Phase with the third sine and cosine signals The second difference Then, the phase of the first sine and cosine signals is... The high nms position and the second difference The lower NMS bits are subtracted to obtain the first static error compensation value corresponding to the segment code channel. The specific formula is as follows:

[0150] ;

[0151] in, This is the first static error compensation value corresponding to the segment code channel. Phase of the first sine and cosine signal high nms position, The second difference The low nms position.

[0152] At the same time, according to the vernier principle, The lower n-2m+s position and The high n-2m+s bits should be completely consistent, referred to as alignment bit 2. Therefore, in order to determine the static error compensation value corresponding to the phase of the N-channel signal, this embodiment specifically uses the second difference value. Compared with the first static error compensation value The values ​​are summed to obtain the second difference after static compensation, as shown in the following formula:

[0153] ;

[0154] in, This is the second difference after static compensation. The second difference , This is the first static error compensation value.

[0155] Subsequently, the phase of the first sine and cosine signals was determined. Phase with the second sine and cosine signals The third difference The high n-2m+s bits of the second difference after static compensation are then subtracted from the low n-2m+s bits of the third difference to obtain the second static error compensation value corresponding to the vernier code track. The specific formula is as follows:

[0156] ;

[0157] in, This is the second static error compensation value corresponding to the vernier track. This refers to the high n-2m+s bits of the second difference after static compensation. It is the lower n-2m+s bits of the third difference.

[0158] Figure 5 This is a schematic diagram of static error compensation for a three-track photoelectric encoder provided in an embodiment of this application. Figure 5 As shown, the static error compensation value can be calculated at any position when the encoder is stationary, and during motion, only the value calculated when stationary needs to be used. However, the static error compensation value needs to be limited.

[0159] (2) Calculation of dynamic error compensation value;

[0160] Based on the above embodiments, in some embodiments, determining the dynamic error compensation value according to the rotational speed and the sampling delay time of each code track includes:

[0161] S181: Determine the product of the first sampling delay time and the rotation speed to obtain the first dynamic error compensation value corresponding to the segment code channel.

[0162] S182: Determine the product of the second sampling delay time and the rotation speed to obtain the second dynamic error compensation value corresponding to the vernier track.

[0163] It is understandable that the dynamic error compensation value is proportional to the encoder speed. Therefore, when the sampling delay time is known, the dynamic error compensation value can be calculated using the following formula:

[0164] ;

[0165] in, This is the first dynamic error compensation value corresponding to the segment code channel. This is the first sampling delay time; This is the second dynamic error compensation value corresponding to the vernier track. This is the second sampling delay time. This refers to the rotational speed. It should be noted that the dynamic error compensation value needs to be recalculated each time compensation is performed.

[0166] (3) Calculation of the target phase difference;

[0167] Similar to the phase correction process of a dual-track photoelectric encoder, other minor errors also need to be considered when calculating the target phase difference. Since these minor errors are small, their compensation values ​​cannot be directly calculated based on the existing phase values ​​of each track. Therefore, it is necessary to first perform initial compensation on the phase difference of each track based on the static and dynamic error compensation values ​​to obtain candidate phase difference values. Then, based on the vernier principle and the initially compensated candidate phase difference values, other error compensation values ​​are determined. Finally, the other error compensation values ​​are summed with the candidate phase difference values ​​to compensate for the aforementioned minor errors, ultimately obtaining the target phase difference value. The calculation process for the candidate phase difference value is explained below:

[0168] Based on the above embodiments, in some embodiments, initial compensation is performed on the phase difference value of each code channel based on the static error compensation value and the dynamic error compensation value to obtain candidate phase difference values, including:

[0169] S191: The first static error compensation value and the first dynamic error compensation value are summed with the phase of the third sine and cosine signals to generate a new phase of the third sine and cosine signals corresponding to the segment code channel.

[0170] S192: Determine the difference between the phase of the first sine / cosine signal and the phase of the new third sine / cosine signal to obtain the first candidate phase difference after initial compensation.

[0171] S193: Add the second static error compensation value and the second dynamic error compensation value to the second sine and cosine signal phase to generate a new second sine and cosine signal phase corresponding to the vernier code track.

[0172] S194: Determine the difference between the phase of the first sine / cosine signal and the phase of the new second sine / cosine signal to obtain the second candidate phase difference after initial compensation.

[0173] Before calculating other error compensation values, initial compensation must first be performed on the phase difference of each code channel based on the static error compensation value and the dynamic error compensation value. Specifically, the first static error compensation value... and the first dynamic error compensation value Phase with the third sine and cosine signals Sum to generate a new third sine / cosine signal phase corresponding to the segment code channel. The phase of the first sine and cosine signals was then determined. Phase with the new third sine and cosine signal The difference is used to obtain the first candidate phase difference value after initial compensation. At the same time, the second static error compensation value will be... Second dynamic error compensation value Phase with the second sine and cosine signals The summation generates a new second sine and cosine signal phase corresponding to the vernier track. The phase of the first sine and cosine signals was then determined. Phase with the new second sine and cosine signals The difference is used to obtain the second candidate phase difference value after initial compensation. .

[0174] In practical implementation, the candidate phase difference value after initial compensation can also be calculated in the following ways:

[0175] S195: Subtract the second difference from the first static error compensation value and the first dynamic error compensation value to obtain the first candidate phase difference value after initial compensation.

[0176] S196: Subtract the third difference from the first static error compensation value, the first dynamic error compensation value, the second static error compensation value, and the second dynamic error compensation value to obtain the second candidate phase difference value after initial compensation.

[0177] Specifically, the second difference Compared with the first static error compensation value and the first dynamic error compensation value The difference is calculated to obtain the first candidate phase difference value after initial compensation. Simultaneously, the third difference is compared with the first static error compensation value. First dynamic error compensation value Second static error compensation value Second dynamic error compensation value The difference is calculated to obtain the second candidate phase difference value after initial compensation. .

[0178] (4) Calculation of other error compensation values;

[0179] Based on the above embodiments, in some embodiments, other error compensation values ​​are determined according to the vernier principle and candidate phase difference values, including:

[0180] S201: Subtract the high nms bits of the phase of the first sine and cosine signal from the low nms bits of the first candidate phase difference after initial compensation to obtain the first other error compensation value.

[0181] S202: Sum the first candidate phase difference value after initial compensation with the first other error compensation value to obtain the first target phase difference value after compensation.

[0182] S203: Subtract the high n-2m+s bits of the compensated first target phase difference value from the low n-2m+s bits of the initially compensated second candidate phase difference value to obtain the second other error compensation value.

[0183] In order to calculate other error compensation values, this embodiment specifically uses the phase of the first sine and cosine signals. The difference between the high nms bit and the first candidate phase after initial compensation The lower nms bits are subtracted to obtain the first other error compensation value, and the specific formula is as follows:

[0184] ;

[0185] in, This is the first other error compensation value. Phase of the first sine and cosine signal high nms position, The first candidate phase difference value after initial compensation The low nms position.

[0186] Subsequently, the first candidate phase difference value after initial compensation is summed with the first other error compensation value to obtain the first target phase difference value after compensation, as shown in the following formula:

[0187] ;

[0188] in, The compensated phase difference value of the first target. This represents the first candidate phase difference value after initial compensation. This is the first other error compensation value.

[0189] Finally, the high n-2m+s bits of the compensated first target phase difference value are subtracted from the low n-2m+s bits of the initially compensated second candidate phase difference value to obtain the second other error compensation value. The specific formula is as follows:

[0190] ;

[0191] in, This is the second other error compensation value. The higher n-2m+s bits of the compensated first target phase difference. The lower n-2m+s bits of the second candidate phase difference after initial compensation.

[0192] (5) Phase compensation of three-track photoelectric encoder;

[0193] Based on the above embodiments, in some embodiments, phase correction is performed based on the target phase difference value, including:

[0194] S211: Concatenate the high nm bits of the compensated first target phase difference value and the high s bits of the compensated second target phase difference value with the high ms bits of the main code channel to obtain an n-bit position value.

[0195] To achieve encoder phase correction and compensation, the second candidate phase difference value after initial compensation is first summed with the second other error compensation value to obtain the second target phase difference value after compensation. The specific formula is as follows:

[0196] ;

[0197] in, The compensated phase difference value of the second target. This is the second candidate phase difference value after initial compensation. This is the second error compensation value.

[0198] Finally, the compensated first target phase difference value The high nm position and the compensated second target phase difference value The high s bits are concatenated with the high ms bits of the main code track to obtain an n-bit position value.

[0199] In summary, compensation for static phase error, dynamic phase error, and other minor errors of the three-track photoelectric encoder has been achieved.

[0200] In the above embodiments, the photoelectric encoder phase correction method has been described in detail. This application also provides embodiments of the photoelectric encoder phase correction device.

[0201] Figure 6 This is a schematic diagram of a photoelectric encoder phase correction device provided in an embodiment of this application. Figure 6 As shown, the device includes:

[0202] The acquisition module 10 is used to acquire the encoder's rotational speed, the phase of the sine and cosine signals of each code track, and the sampling delay time.

[0203] The first determining module 11 is used to determine the static error compensation value based on the vernier principle and the phase of the sine and cosine signals of each code channel; wherein the static error compensation value is the compensation value for the overall bias between code channels.

[0204] The second determining module 12 is used to determine the dynamic error compensation value based on the rotational speed and the sampling delay time of each code channel; wherein the dynamic error compensation value is the compensation value for the phase delay caused by the sampling delay between each code channel.

[0205] The compensation module 13 is used to compensate the phase difference of each code channel based on the static error compensation value and the dynamic error compensation value, so as to obtain the compensated target phase difference value.

[0206] The correction module 14 is used to perform phase correction based on the target phase difference.

[0207] In some embodiments, the acquisition module 10 includes:

[0208] The first acquisition submodule is used to acquire the phase of the first sine and cosine signals of the main code channel and the phase of the second sine and cosine signals of the vernier code channel.

[0209] The number of periods for the sine and cosine signals in the main code channel is 2. m The number of periods for the sine and cosine signals of the vernier track is 2. m -1, the encoder resolution is 2 n Both m and n are positive integers;

[0210] Correspondingly, the first determining module 11 includes:

[0211] The first determining submodule is used to determine the first difference between the phase of the first sine and cosine signals and the phase of the second sine and cosine signals;

[0212] The second determining submodule is used to subtract the high nm bits of the phase of the first sine and cosine signal from the low nm bits of the first difference to obtain the static error compensation value.

[0213] In some embodiments, the second determining module 12 includes:

[0214] The third determining submodule is used to determine the product of the sampling delay time and the rotational speed to obtain the dynamic error compensation value.

[0215] In some embodiments, the compensation module 13 includes:

[0216] The initial compensation module is used to perform initial compensation on the phase difference of each code channel based on the static error compensation value and the dynamic error compensation value, so as to obtain the candidate phase difference value after initial compensation.

[0217] The other error compensation value determination module is used to determine other error compensation values ​​based on the vernier principle and candidate phase difference values; other error compensation values ​​are compensation values ​​for the fluctuations existing between code channels;

[0218] The target phase difference determination module is used to determine the target phase difference based on other error compensation values ​​and candidate phase difference values.

[0219] In some embodiments, the initial compensation module includes:

[0220] The fourth determining submodule is used to sum the static error compensation value and the dynamic error compensation value with the phase of the second sine and cosine signals to generate a new phase of the second sine and cosine signals for the vernier code track;

[0221] The fifth determining submodule is used to determine the difference between the phase of the first sine and cosine signals and the phase of the new second sine and cosine signals in order to obtain candidate phase difference values;

[0222] Or include:

[0223] The sixth determining submodule is used to subtract the phase of the first sine and cosine signal from the static error compensation value and the dynamic error compensation value to generate a new phase of the first sine and cosine signal for the main code channel.

[0224] The seventh determination submodule is used to determine the difference between the phase of the new first sine and cosine signals and the phase of the second sine and cosine signals in order to obtain candidate phase difference values.

[0225] Or include:

[0226] The eighth determination submodule is used to subtract the first difference from the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value.

[0227] In some embodiments, the third determining module 14 includes:

[0228] The ninth determination submodule is used to subtract the high nm bits of the phase of the first sine and cosine signal from the low nm bits of the candidate phase difference to obtain other error compensation values.

[0229] In some embodiments, the acquisition module 10 includes:

[0230] The second acquisition submodule is used to acquire the first sine and cosine signal phases of the main code channel, the second sine and cosine signal phases of the vernier code channel, and the third sine and cosine signal phases of the segment code channel.

[0231] The third acquisition submodule is used to acquire the first sampling delay time corresponding to the segment code track and the second sampling delay time corresponding to the vernier code track.

[0232] The number of periods for the sine and cosine signals in the main code channel is 2. m The number of periods for the sine and cosine signals of the vernier track is 2. m -1, the number of periods of the sine and cosine signals in the segment code channel is 2. m-s The encoder resolution is 2 n m, n, and s are all positive integers;

[0233] Correspondingly, the first determining module 11 includes:

[0234] The tenth determining submodule is used to determine the second difference between the phase of the first sine and cosine signals and the phase of the third sine and cosine signals;

[0235] The eleventh determination submodule is used to subtract the high nms bits of the phase of the first sine and cosine signal from the low nms bits of the second difference to obtain the first static error compensation value corresponding to the segment code channel.

[0236] The twelfth determining submodule is used to sum the second difference with the first static error compensation value to obtain the second difference after static compensation;

[0237] The thirteenth determination submodule is used to determine the third difference between the phase of the first sine and cosine signals and the phase of the second sine and cosine signals;

[0238] The fourteenth determination submodule is used to calculate the difference between the high n-2m+s bits of the second difference after static compensation and the low n-2m+s bits of the third difference to obtain the second static error compensation value corresponding to the vernier code track.

[0239] Since the embodiments of the apparatus and the embodiments of the method correspond to each other, please refer to the description of the embodiments of the method for the embodiments of the apparatus, which will not be repeated here.

[0240] Figure 7 This is a structural diagram of a photoelectric encoder phase correction device provided in an embodiment of this application. Figure 7 As shown, the photoelectric encoder phase correction device includes:

[0241] Memory 20 is used to store computer programs;

[0242] The processor 21 is used to execute a computer program to implement the steps of the photoelectric encoder phase correction method mentioned in the above embodiments.

[0243] The photoelectric encoder phase correction device provided in this embodiment can include, but is not limited to, smartphones, tablets, laptops, or desktop computers.

[0244] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0245] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 20 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 21, is capable of implementing the relevant steps of the photoelectric encoder phase correction method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, and the storage method may be temporary or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the photoelectric encoder phase correction method.

[0246] In some embodiments, the photoelectric encoder phase correction device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0247] Those skilled in the art will understand that Figure 7The structure shown does not constitute a limitation on the photoelectric encoder phase correction device and may include more or fewer components than shown.

[0248] Finally, this application also provides an embodiment corresponding to a computer-readable storage medium. The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps described in the above method embodiments.

[0249] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0250] The foregoing provides a detailed description of a photoelectric encoder phase correction method, apparatus, device, and medium. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

[0251] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method of phase correction for an optical encoder, the method comprising: The method comprises the following steps: acquiring the rotation speed of the encoder, the sine and cosine signal phases of each code channel, and the sampling delay time; determining a static error compensation value according to the cursor principle and the sine and cosine signal phases of each code channel; the static error compensation value is a compensation value for an overall bias existing between code channels; determining a dynamic error compensation value according to the rotation speed and the sampling delay time of each code channel; the dynamic error compensation value is a compensation value for the phase delay caused by the sampling delay between code channels; compensating the phase difference value of each code channel based on the static error compensation value and the dynamic error compensation value to obtain a target phase difference value after compensation; performing phase correction based on the target phase difference value.

2. The photoelectric encoder phase correction method of claim 1, wherein, When the type of the encoder is a double-code optical encoder, the acquiring of the sine and cosine signal phases of each code channel comprises the following steps: acquiring the first sine and cosine signal phases of a main code channel and the second sine and cosine signal phases of a cursor code channel; The period number of the cosine and sine signals of the main code track is 2 m The period number of the cosine and sine signals of the cursor code track is 2 m The resolution of the encoder is 2 n m and n are positive integers correspondingly, the determining of the static error compensation value according to the cursor principle and the sine and cosine signal phases of each code channel comprises the following steps: determining a first difference value between the first sine and cosine signal phases and the second sine and cosine signal phases; subtracting the high n-m bits of the first sine and cosine signal phases from the low n-m bits of the first difference value to obtain the static error compensation value.

3. The photoelectric encoder phase correction method of claim 2, wherein, The determining of the dynamic error compensation value according to the rotation speed and the sampling delay time of each code channel comprises the following steps: determining the product of the sampling delay time and the rotation speed to obtain the dynamic error compensation value.

4. The photoelectric encoder phase correction method of claim 2, wherein, The compensating of the phase difference value of each code channel based on the static error compensation value and the dynamic error compensation value to obtain a target phase difference value after compensation comprises the following steps: initially compensating the phase difference value of each code channel based on the static error compensation value and the dynamic error compensation value to obtain a candidate phase difference value after initial compensation; determining an other error compensation value according to the cursor principle and the candidate phase difference value; the other error compensation value is a compensation value for the fluctuation existing between code channels; determining the target phase difference value based on the other error compensation value and the candidate phase difference value.

5. The optical encoder phase correction method of claim 4, wherein, The initially compensating of the phase difference value of each code channel based on the static error compensation value and the dynamic error compensation value to obtain a candidate phase difference value after initial compensation comprises the following steps: adding the static error compensation value and the dynamic error compensation value to the second sine and cosine signal phases to generate new second sine and cosine signal phases of the cursor code channel; determining the difference value between the first sine and cosine signal phases and the new second sine and cosine signal phases to obtain the candidate phase difference value; or, subtracting the first sine and cosine signal phases from the static error compensation value and the dynamic error compensation value to generate new first sine and cosine signal phases of the main code channel; determining the difference value between the new first sine and cosine signal phases and the second sine and cosine signal phases to obtain the candidate phase difference value; or, subtracting the first difference value from the static error compensation value and the dynamic error compensation value to obtain the candidate phase difference value.

6. The optical encoder phase correction method of claim 4, wherein, The determining of the other error compensation value according to the cursor principle and the candidate phase difference value comprises the following steps: Subtracting high n-m bits of the first cosine signal phase from low n-m bits of the candidate phase difference value to obtain the other error compensation value.

7. The photoelectric encoder phase correction method of claim 1, wherein, When the type of the encoder is a three-channel optical encoder, obtaining the cosine signal phases of the channels and the sampling delay time comprises: obtaining a first cosine signal phase of a main channel, a second cosine signal phase of a vernier channel and a third cosine signal phase of a segment channel; obtaining a first sampling delay time corresponding to the segment channel and a second sampling delay time corresponding to the vernier channel; The period number of the positive and negative sine signals of the main code track is 2 m The period number of the positive and negative sine signals of the cursor code track is 2 m The period number of the positive and negative sine signals of the segment code track is 2 m-s The resolution of the encoder is 2 n m, n and s are positive integers correspondingly, determining a static error compensation value according to the vernier principle and the cosine signal phases of the channels comprises: determining a second difference value between the first cosine signal phase and the third cosine signal phase; subtracting high n-m-s bits of the first cosine signal phase from low n-m-s bits of the second difference value to obtain a first static error compensation value corresponding to the segment channel; adding the second difference value and the first static error compensation value to obtain a second difference value after static compensation; determining a third difference value between the first cosine signal phase and the second cosine signal phase; subtracting high n-2m+s bits of the second difference value after static compensation from low n-2m+s bits of the third difference value to obtain a second static error compensation value corresponding to the vernier channel.

8. An optical encoder phase correction apparatus, characterized by, comprises: an obtaining module, configured to obtain a rotation speed of an encoder, cosine signal phases of channels and sampling delay times of the channels; a first determining module, configured to determine a static error compensation value according to the vernier principle and the cosine signal phases of the channels; wherein the static error compensation value is a compensation value for an overall bias between the channels; a second determining module, configured to determine a dynamic error compensation value according to the rotation speed and the sampling delay times of the channels; wherein the dynamic error compensation value is a compensation value for phase delay caused by sampling delay between the channels; a compensation module, configured to compensate phase difference values of the channels based on the static error compensation value and the dynamic error compensation value to obtain target phase difference values after compensation; a correction module, configured to perform phase correction based on the target phase difference values.

9. An optical encoder phase correction apparatus, characterized by, comprises: a memory, configured to store a computer program; a processor, configured to implement steps of the optical encoder phase correction method in any one of claims 1 to 7 when the computer program is executed.

10. A computer-readable storage medium, characterized in that, The computer program is stored on the computer readable storage medium and is executed by the processor to implement steps of the optical encoder phase correction method in any one of claims 1 to 7. The computer program is stored on the computer readable storage medium and is executed by the processor to implement steps of the optical encoder phase correction method in any one of claims 1 to 7.

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