Server input / output system and application method thereof, electronic device

Abstract

The application discloses a server input and output system and an application method thereof and electronic equipment, relates to the technical field of computers, and provides a plurality of groups of general physical channels corresponding to different interface protocols in a high-speed signal area of a same standardized slot, a first controller is used for identifying the protocol type of an inserted module in real time, a signal transceiving channel is automatically switched to a target differential pair channel matched with the signal transceiving channel, the same physical slot can be compatible with external equipment of a plurality of different protocols, and the universality of the input and output interface and the expansion flexibility of the whole system are improved. Since the standardized slot adopts a unified standard design in a power area and a control signal area, consistent electrical and logical interfaces are provided for functional modules of different sources, the modules can be accurately identified and configured when being inserted, and the success rate and safety of hot plug operations are improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a server input / output system and its application method, and electronic equipment. Background Technology

[0002] With the continuous improvement of server performance, input / output (I / O) boards, as key components for interaction between servers and external devices, have seen their interface diversity, scalability, and reliability become crucial factors affecting overall system performance. In related technologies, server I / O boards generally employ fixed interface designs, resulting in limited interface functionality and scalability. Furthermore, traditional server I / O boards, when supporting hot-swapping of modules, often experience poor compatibility, power supply timing conflicts, and signal jitter due to electrical and logical differences between different manufacturers or protocols, affecting the safety of the insertion / removal process and system stability.

[0003] Therefore, how to achieve interchangeability and compatibility of different I / O modules and improve the versatility and flexibility of the system is an urgent problem to be solved. Summary of the Invention

[0004] This application provides a server input / output system and its application method, as well as electronic devices, to at least solve the problem of how to achieve interchangeability and compatibility of different I / O modules in related technologies, and improve the versatility and flexibility of the system.

[0005] This application provides a server input / output system, which includes: an input / output board, the input / output board including a first controller and at least one standardized slot, each standardized slot including a power supply area, a high-speed signal area and a control signal area;

[0006] The power supply area is equipped with uniform power supply pins, the control signal area is equipped with signal transmission lines, and the high-speed signal area is equipped with multiple sets of differential pairs in the form of general physical channels. Each set of differential pairs corresponds to a different interface protocol.

[0007] At least one standardized slot is connected to the processor via its own multiple sets of differential pairs for signal transmission and reception;

[0008] The first controller responds to the insertion of the target module into the standardized slot, identifies the protocol type of the target module, and dynamically switches the signal transmission and reception channel between the standardized slot and the processor to the target differential pair channel based on the protocol type, so as to adapt to the interface protocol corresponding to the protocol type. The target differential pair channel is the differential pair channel corresponding to the protocol type among multiple sets of differential pair channels.

[0009] This application provides an application method for a server input / output system, wherein the method is applied to the aforementioned server input / output system and includes:

[0010] In response to the insertion of a target module into a standardized slot, the protocol type of the target module is identified;

[0011] Based on the protocol type, the signal transceiver channel between the standardized slot and the processor is dynamically switched to the target differential pair channel to adapt to the interface protocol corresponding to the protocol type.

[0012] The standardized slot is connected to the processor through multiple sets of differential pairs for signal transmission and reception. The target differential pair is the differential pair corresponding to the protocol type among the multiple sets of differential pairs.

[0013] This application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the above-described server input / output system application methods.

[0014] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of the application method of any of the above-described server input / output systems.

[0015] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described server input / output system application methods.

[0016] The server input / output system and its application method, as well as the electronic equipment disclosed in this application, solve the problems of single interface function, limited expandability, and insufficient hot-swap compatibility and security by adopting a standardized slot design with unified power supply pins, control signal lines, and multiple sets of differential pair channels, and by leveraging the intelligent identification and dynamic switching function of the first controller. Specifically, by reserving multiple sets of universal physical channels corresponding to different interface protocols in the high-speed signal area of ​​the same standardized slot, and by having the first controller identify the protocol type of the inserted module in real time, automatically and dynamically switching the signal transmission and reception channels to the matching target differential pair channels, the same physical slot can be compatible with external devices of various protocols, greatly improving the universality of the input / output interface and the overall expansion flexibility of the system, and meeting the diverse interface requirements of the server in different application scenarios. Because the standardized slot adopts a unified design in the power supply area and control signal area, it provides consistent electrical and logical interfaces for functional modules from different sources, ensuring that the module can be accurately identified and configured when inserted, and improving the success rate and security of hot-swap operations. Therefore, it can solve problems such as limited interface functionality, limited scalability, and insufficient hot-swappable compatibility and security, and achieve the technical effect of realizing interchangeability and compatibility of different I / O modules, thereby improving the versatility and flexibility of the system. Attached Figure Description

[0017] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This application provides a schematic diagram of the structure of a server input / output system according to an embodiment of the present application.

[0019] Figure 2 A schematic diagram of a hot-swap management process provided for an embodiment of this application;

[0020] Figure 3 A block diagram of intelligent management and remote monitoring provided in an embodiment of this application;

[0021] Figure 4 This is a flowchart illustrating an application method for a server input / output system provided in an embodiment of this application. Detailed Implementation

[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0023] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0024] This application provides a server input / output system and its application method, as well as electronic devices. Specifically, it is a system based on a modular and reconfigurable server I / O board with intelligent diagnostic functions. This system aims to solve problems such as fixed interface protocols, low hardware resource utilization, and poor scalability in existing server input / output related structures. By combining standardized hardware design with intelligent control logic, it achieves flexible adaptation to functional modules of different protocol types, thereby improving the versatility and ease of operation and maintenance of the server input / output system.

[0025] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] Figure 1 This is a schematic diagram of a server input / output system provided in an embodiment of this application. The server input / output system will be described in detail below.

[0027] The server input / output system includes: an input / output board, which includes a first controller and at least one standardized slot, each standardized slot including a power supply area, a high-speed signal area and a control signal area;

[0028] The power supply area is equipped with uniform power supply pins, the control signal area is equipped with signal transmission lines, and the high-speed signal area is equipped with multiple sets of differential pairs in the form of general physical channels. Each set of differential pairs corresponds to a different interface protocol.

[0029] At least one standardized slot is connected to the processor via its own multiple sets of differential pairs for signal transmission and reception;

[0030] The first controller responds to the insertion of the target module into the standardized slot, identifies the protocol type of the target module, and dynamically switches the signal transmission and reception channel between the standardized slot and the processor to the target differential pair channel based on the protocol type, so as to adapt to the interface protocol corresponding to the protocol type. The target differential pair channel is the differential pair channel corresponding to the protocol type among multiple sets of differential pair channels.

[0031] In the embodiments of this application, the input / output board is a functional board in the server responsible for managing and expanding the connection of external devices. It acts as a bridge between the motherboard and various external modules, undertaking the critical tasks of signal transmission, protocol conversion, and power distribution. This input / output board integrates a crucial first controller and at least one standardized slot.

[0032] The first controller is the intelligent control core on the input / output board, typically implemented using a programmable logic device, such as a Complex Programmable Logic Device (CPLD) or a Field-Programmable Gate Array (FPGA). This first controller possesses the capabilities for logic operations, status monitoring, and configuration management. It can execute preset control algorithms according to system requirements, dynamically manage and coordinate the working states of various hardware units on the input / output board, and forms the basis for flexible interface protocol switching and intelligent diagnostic functions.

[0033] A standardized slot is a standardized design for physical and electrical interfaces, defining uniform mechanical dimensions, pin arrangements, and electrical specifications to accommodate and connect various pluggable functional modules. Each standardized slot is structurally divided into three functionally defined areas: a power area, a high-speed signal area, and a control signal area. This partitioned design ensures physical isolation and orderly management of power, high-speed data, and control signals, reducing mutual interference.

[0034] Specifically, the power supply area features standardized power pins. These pins adhere to predefined voltage and current specifications, providing a stable +12V main power supply, a +3.3V auxiliary power supply, and a ground loop to supply the necessary power to the functional modules inserted into the slots. This standardized pin definition ensures that compliant modules from different manufacturers and of different types receive the correct and consistent power supply during physical connection, preventing equipment damage or malfunction due to incompatible power interfaces.

[0035] The high-speed signal zone is the area that carries high-speed data streams. Within this zone, multiple differential pairs are reserved in the form of general-purpose physical channels. A general-purpose physical channel refers to a signal transmission path pre-laid on the physical layer (e.g., printed circuit board wiring) that is not fixedly bound to a single communication protocol at the hardware level, possessing the physical potential to support multiple high-speed interface protocols. Differential pairs consist of a pair of tightly coupled traces transmitting signals with opposite phases. This structure effectively suppresses common-mode noise, improving signal integrity and anti-interference capabilities during high-speed transmission. Each of the multiple differential pairs is designed and routed to correspond to and support different interface protocols. For example, one pair can be configured to support the Peripheral Component Interconnect Express (PCIe) protocol, another can be configured to support the Serial Advanced Technology Attachment (SATA) protocol, and yet another can be configured to support the Universal Serial Bus (USB) protocol, etc. These differential pairs physically coexist, but are logically selectively activated and connected by a first controller.

[0036] The control signal area is equipped with signal transmission lines. These lines are responsible for carrying various control, status, and management signals, in addition to high-speed data, such as module presence detection signals, reset signals, hot-plug event notification signals, and reference clock signals. These signal transmission lines ensure that the first controller can perceive the status changes of the slots and modules in real time and provide the necessary information pathways for achieving refined power management and protocol switching control.

[0037] In terms of system connectivity, at least one standardized slot connects to a processor (such as a Central Processing Unit (CPU) or System on a Chip (SoC)) on the server motherboard via multiple sets of differential pairs, thereby establishing a high-speed data signal transmission and reception path between the module and the system core. The processor sends instructions and data to the module through these channels and receives feedback and data from the module.

[0038] The workflow of the server input / output system in this application begins when the target module (i.e., the specific functional module to be inserted and used, such as...)... Figure 1 When the pluggable input / output module shown (e.g., a network interface card, storage expansion card, etc.) is inserted into a standardized slot, the first controller immediately responds to this insertion event, obtains module information through the control signal area, and then identifies the protocol type supported by the target module. The protocol type is the specification and standard followed by the module for data communication, such as whether it is PCIe 5.0 or SATA 3.0.

[0039] After successfully identifying the protocol type, the first controller performs a dynamic protocol switching operation based on this identification result. Specifically, the signal transmission and reception channel between the standardized slot and the processor is logically rerouted from the initial or standby state to the target differential pair channel. The target differential pair channel refers to a specific differential pair channel selected for this communication because its physical characteristics and wiring design best match the electrical requirements of the identified protocol type among multiple differential pair channels. Through this switching action, the system achieves adaptation to the interface protocol corresponding to the protocol type, enabling the processor to exchange data correctly and efficiently with the target module using the communication specifications expected by the target module.

[0040] Furthermore, regarding the hardware structure of the input / output board, it can also be designed in the following ways, but not limited to: the input / output board adopts a unified standardized slot as the core design.

[0041] Each slot consists of three parts:

[0042] Power Supply Area: Provides unified power supply pin definitions, such as +12V main power, +3.3V auxiliary power, and ground (GND). The power supply area is connected to the CPLD control circuit and supports soft start, current limiting, and over / under voltage protection to ensure stable power supply when the module is inserted.

[0043] High-speed signal area: Multiple differential pair channels are deployed and connected to the CPU / SoC or switching chip via backplane or printed circuit board (PCB) layer switching. All differential pairs are reserved in the form of general physical channels and dynamically configured by CPLD / FPGA as PCIe, SATA, USB or other high-speed protocols.

[0044] Control signal area: This area includes control signals such as plug-in / plug-out detection (PRSNT#), power-on enable (PERST#), hot-plug detection (HOTPLUG#), and clock synchronization (REFCLK). This area works in conjunction with the CPLD and the Baseboard Management Controller (BMC) to complete module status identification and management.

[0045] Furthermore, it should be noted that each module to be inserted into the standardized slot integrates an electrically erasable programmable read-only memory (EEPROM) or an identification chip (ID chip) interface to store the module's protocol type, power consumption parameters, and manufacturer information. After reading this information, the BMC or CPLD automatically configures the corresponding logic.

[0046] This application breaks through the limitations of traditional server I / O interface functionalities by combining a standardized slot design at the hardware level with a software-definable first controller. It can automatically identify the protocol requirements of inserted modules and dynamically configure hardware resources to adapt to the protocol, thereby achieving compatible support for multiple different types of modules on the same physical slot. This greatly improves the flexibility and versatility of server I / O configuration, simplifies operation and maintenance processes, and provides a solid hardware foundation for data center resource pooling and on-demand reconfiguration, significantly improving hardware resource utilization and the overall scalability and maintainability of the system.

[0047] In one possible implementation of this application embodiment, the first controller identifies the protocol type by reading the pre-installed storage chip in the target module;

[0048] The first controller invokes internal logic circuitry to map the electrical characteristics and communication protocol of the target differential pair channel to the electrical characteristics and communication protocol corresponding to the protocol type, thereby completing protocol adaptation.

[0049] In the embodiments of this application, the process of the first controller identifying the protocol type of the target module is accomplished by reading the pre-installed storage chip within the target module. The target module refers to a specific functional unit inserted into a standardized slot, such as a dedicated accelerator card or storage expansion card. The pre-installed storage chip is a non-volatile memory that is integrated and written with specific data during the manufacturing of the target module. Common types include electrically erasable programmable read-only memory (EEPROM) or dedicated identification chips. This storage chip pre-stores key parameters related to the module's function, among which the protocol type is crucial—that is, the data communication specifications supported and required by the module, such as explicitly identifying it as PCIe 4.0, SATA 3.0, or USB 3.2 Gen 2×2.

[0050] The first controller accesses the memory chip via a board-level management bus (e.g., Inter-Integrated Circuit (I2C), System Management Bus (SMBus), or Serial Peripheral Interface (SPI)) to read the definition information about the protocol type. This hardware-based identification method offers higher reliability and accuracy compared to software enumeration or manual configuration, ensuring that the system unambiguously understands the communication requirements of the inserted module, laying a solid foundation for subsequent accurate adaptation.

[0051] After successfully obtaining the protocol type information from the memory chip, the first controller immediately invokes its internal logic circuitry to perform protocol adaptation. This internal logic circuitry is a set of reconfigurable digital logic resources implemented within the first controller using a hardware description language. When the first controller is a complex programmable logic device (CPLD) or a field-programmable gate array (FPGA), this logic circuitry manifests as a series of dynamically configurable logic gates, registers, and wiring resources. The invocation process involves the first controller activating and running the corresponding firmware logic program based on the read protocol type. The core function of this program is to perform a mapping operation; specifically, it logically converts the electrical characteristics and communication protocol of the selected target differential pair channel into electrical characteristics and communication protocols that perfectly match the identified protocol type.

[0052] Electrical characteristics here refer to the specifications that signals must meet at the physical transmission level, such as signal voltage swing, common-mode voltage level, pre-emphasis and de-emphasis settings, equalizer parameters, and termination impedance values. Communication protocols, on the other hand, refer to the data frame format, link training sequence, flow control mechanisms, and transaction layer rules defined at the data link layer and higher layers.

[0053] The mapping process involves the first controller configuring the parameters of the physical layer intellectual property cores (IP cores) such as drivers, receivers, and serializers / deserializers (SerDes) for the target differential pair channel through its internal logic circuitry. Simultaneously, it loads the corresponding protocol processing logic, ensuring that the channel behavior completely simulates and conforms to the protocol standards required by the target module. For example, when the protocol type is identified as PCIe, the internal logic circuitry maps the channel to PCIe electrical specifications and transaction processing flow; if it is identified as SATA, it maps it to SATA physical layer characteristics and frame transmission structure.

[0054] This application achieves protocol adaptation through precise mapping operations. Protocol adaptation refers to the process of ensuring that the system's signal transmission and reception channels are fully compatible and synchronized with the target module's desired communication standard in terms of physical layer and link layer behavior. After adaptation, the target differential pair channel is no longer merely a general physical link, but logically becomes a high-speed communication channel dedicated to a specific protocol, thereby ensuring stable, efficient, and error-free data exchange between the processor and the target module. This mechanism enhances the system's flexibility and plug-and-play capability, enabling modules with different communication specifications to seamlessly switch and run on a unified hardware platform, significantly reducing compatibility issues and configuration complexity caused by protocol incompatibility.

[0055] In one possible implementation of this application embodiment, the first controller starts a retimer set in the high-speed signal area in response to a protocol type of high-frequency high-speed interface protocol;

[0056] The first controller dynamically adjusts the signal equalization and clock recovery parameters of the retimer based on the protocol type and the link information of the target differential pair channel to assist in signal transmission and reception between the standardized slot and the processor.

[0057] In the embodiments of this application, the first controller possesses state awareness and policy execution capabilities. It can monitor and respond to changes in protocol type attributes in real time. Protocol type refers to the data communication specifications and standards supported by the target module, such as PCIe 5.0 or 6.0, SATA 3.0 or USB 3.2, etc. When the first controller identifies that the current protocol type belongs to a high-frequency, high-speed interface protocol, it triggers a specific control flow. High-frequency, high-speed interface protocols refer to communication standards with extremely high operating frequencies and extremely high data transmission rates, typically reaching several gigabits per second or even higher, such as PCIe 5.0 and above or USB 4.0, etc. These protocols are extremely sensitive to signal timing, jitter, and attenuation during transmission, imposing extremely stringent requirements on signal integrity.

[0058] In response to the recognition of such high-frequency, high-speed interface protocols, a crucial operation performed by the first controller is to activate the retimer located in the high-speed signal area. The high-speed signal area is a physical region on the input / output board specifically designed for routing and transmitting high-speed differential signals, and its wiring typically employs strict impedance control and shielding measures. The retimer is a high-performance signal conditioning chip, usually integrated within the high-speed signal path, located at a critical node between the standardized slot and the processor. The core function of the retimer is to regenerate high-speed serial signals. It is not a simple signal amplifier, but rather, through its internal sophisticated clock data recovery circuitry and re-drive logic, it reshapes the waveform of the received distorted signal, eliminates jitter, and calibrates timings, thereby outputting a clean, timing-accurate new signal. The first controller activates the retimer, which is in low-power standby mode, via control signals (such as an enable pin or configuration register), officially engaging it in the high-speed link operation and preparing it for subsequent signal quality optimization.

[0059] After the retimer starts, the first controller does not use a fixed configuration. Instead, it dynamically adjusts the signal equalization and clock recovery parameters of the retimer according to the specific requirements of the protocol type and in conjunction with the link information of the target differential pair channel. Link information refers to state data characterizing the physical transmission characteristics of the target differential pair channel. This can include, but is not limited to, channel insertion loss values, return loss levels, inter-symbol interference levels, and the physical length of the link, measured or estimated through the forward or sideband channel. This link information reflects the actual damage experienced by the signal during transmission from the processor to the module (or vice versa).

[0060] Based on this information, the first controller performs fine-tuned parameter configuration on the retimer. Signal equalization is a technique used to compensate for signal distortion caused by attenuation of high-frequency components in the transmission medium. Its parameters typically include equalizer gain, peak frequency, and filtering characteristics. Adjusting these parameters can effectively open the signal eye diagram closed due to channel loss. Clock recovery parameters are crucial for how the retimer accurately extracts the clock signal from the input data stream. Key parameters include the bandwidth, damping factor, and phase detection sensitivity of the phase-locked loop (PLL). Optimized clock recovery can effectively suppress jitter and ensure the accuracy of sampling timing. The first controller writes the optimized parameter values ​​obtained through calculation or table lookup into the corresponding configuration register of the retimer via a serial management bus (e.g., I2C, SPI, etc.), realizing dynamic loading of parameters.

[0061] This application facilitates efficient and reliable signal transmission and reception between standardized slots and processors through this dynamic adjustment process. A standardized slot is the physical interface that houses the target module. A processor is the processing unit in a server system that performs core computing tasks. Signal transmission and reception refers to the bidirectional data transfer process between the processor and the target module inserted into the standardized slot. By precisely matching the signal processing characteristics of the retimer with the characteristics of the currently active protocol types and the actual physical link, the system can proactively combat signal integrity degradation, significantly reducing the bit error rate. This ensures stable high-speed data communication even in long-distance, high-loss board-level wiring or backplane connection environments, improving system compatibility and enabling reliable support for various cutting-edge high-frequency, high-speed modules.

[0062] In one possible implementation of this application embodiment, the system further includes: a management controller, which is connected to the first controller;

[0063] The first controller transmits the target module's protocol type, the target differential pair channel's link information, and the target module's status data read from the storage chip to the management controller in real time.

[0064] The management controller visualizes the received protocol types, link information, and status data through the management interface.

[0065] In the embodiments of this application, the management controller is a dedicated microcontroller unit independent of the main processor in the server input / output system, typically implemented as a BMC. It is responsible for monitoring the health status of the entire server hardware platform, recording fault logs, managing power, and providing remote control functions. This management controller establishes a stable and reliable communication connection with the first controller via a board-level management bus, such as I2C, System Management Bus (SMBus), or Intelligent Platform Management Bus (IPMB), ensuring low-latency, highly reliable data exchange and command transmission between the two.

[0066] During system operation, the first controller, as an intelligent unit on the input / output board, plays a crucial role in data acquisition and preprocessing. It continuously or event-triggeredly transmits a series of key parameters to the management controller in real time. These parameters primarily include the target module's protocol type, i.e., the specific data communication specifications declared and supported by the module, such as explicitly identifying it as PCIe 4.0 or SATA 3.0. Secondly, the transmitted data also includes link information for the target differential pair channel. Link information refers to a set of status indicators describing the channel's physical transmission characteristics and real-time performance. This can encompass signal integrity parameters obtained through on-chip measurement circuits or software diagnostic mechanisms, such as insertion loss estimation, return loss level, total jitter, random jitter components, and bit error rate trends based on forward error correction statistics. This information comprehensively reflects the quality status of the high-speed signal along the transmission path. In addition, the first controller also uploads the target module's status data read from the pre-installed storage chip within the target module. Status data is a series of identification and operating parameters stored in the module's internal non-volatile memory. Its content typically includes the module's manufacturer identification code, part number, hardware version, serial number, maximum supported power threshold, allowable operating temperature range, and current power consumption value, internal core temperature reading, fan speed (if the module has its own heat dissipation device) and various alarm or error status flags that are monitored or updated in real time during operation.

[0067] After receiving the rich dataset reported by the first controller, the management controller initiates the visualization processing function of its management control unit. The management control unit is the collective term for the software and firmware logic within the management controller responsible for data parsing, policy execution, and human-machine interaction. Visualization processing refers to the process by which this unit uses graphics rendering and data presentation technologies to transform the received raw, abstract machine data (including protocol type, link information, and status data) into an intuitive, easily understandable graphical representation for human administrators. This process is primarily output through its integrated management interface. The management interface is the software interface through which the management controller provides access and operation. Common forms include web-based graphical user interfaces based on the Hypertext Transfer Protocol, command-line interfaces accessed via serial port or network, or application programming interfaces (APIs) conforming to open standards (such as Redfish). On the management interface, administrators can view detailed information displayed in the form of structured tables, dynamically updated trend graphs, color-coded status indicators (e.g., green for good links, red for link alarms), or hierarchical topology views. For example, a view of a slot may clearly indicate the type of protocol it is currently running (e.g., PCIe 4.0), while displaying the historical changes in signal jitter in the channel link information as a graph, and listing the real-time power consumption and temperature readings in the module status data in a panel format.

[0068] This application combines the refined, low-level hardware parameters collected by the first controller with the powerful data aggregation and graphical capabilities of the management controller to achieve comprehensive and transparent monitoring of input / output modules and their links. Without the need for dedicated physical tools or access to the server room, the identity of each module in its slot, the protocols used, the signal quality of the high-speed link, and the module's own health status can be clearly seen through the local or remote access management interface. This simplifies operational complexity, accelerates fault diagnosis and localization, and enables proactive maintenance, thereby significantly improving the management efficiency of large-scale server clusters and the overall system availability.

[0069] Furthermore, the protocol adaptation process for the target module in this application can also be implemented in, but is not limited to, the following ways: After the module is inserted into the slot, the CPLD / FPGA executes the following process:

[0070] Module identification: Read the information in the module ID chip to identify the module protocol (e.g., PCIe 5.0, SATA 3.0, USB 3.2).

[0071] Logic Configuration: The programmable logic circuitry inside the CPLD automatically switches the high-speed channel logic based on the identification results. For example, it can map a general differential pair to a PCIe transmit / receive channel pair (PCIe TX / RX Lane), or reconfigure it as a SATA channel.

[0072] Signal integrity optimization: If the module has a high-frequency and high-speed interface, the CPLD can work in conjunction with the onboard retimer (such as Retimer / Redriver) to ensure link quality and avoid bit errors caused by differences in channel length.

[0073] BMC Synchronization: The CPLD reports the identification results to the BMC, and the BMC displays the currently enabled protocols and statuses of the slot in the system management interface, supporting remote monitoring.

[0074] This mechanism allows the same slot to adapt to various module types flexibly without a fixed protocol, greatly improving the reconfigurability of the I / O board.

[0075] In one possible implementation of this application embodiment, the signal transmission line deployed in the control signal area is at least used to transmit insertion / removal detection signals and power-on enable signals;

[0076] The first controller responds to the insertion / removal detection signal to instruct the target module to be inserted into the standardized slot, reads the power consumption information of the target module from the memory chip, and sends the module insertion notification and power consumption information to the management controller.

[0077] The management controller determines whether the total power consumption of the module exceeds the preset power consumption threshold based on power consumption information and other power consumption information. The other power consumption information refers to the power consumption information of the currently inserted modules other than the target module.

[0078] When the total power consumption of the module exceeds a preset power consumption threshold, the management controller instructs the first controller to delay powering on the target module or refuse to power on the target module.

[0079] In response to the total power consumption of the module not exceeding the preset power consumption threshold, the management controller instructs the first controller to power on the target module through a preset power-on sequence.

[0080] In the embodiments of this application, the control signal area is a functional area within the standardized slot specifically designed for laying out and managing various control signals. Its integrated signal transmission lines are a set of carefully designed electrical traces, physically isolated from the high-speed signal area and power supply area to minimize crosstalk between signals. These signal transmission lines are used to transmit at least two key control signals: insertion / removal detection signals and power-on enable signals. The insertion / removal detection signal is a status signal used to monitor in real time whether a module has been inserted or removed from the standardized slot. It is typically implemented by a dedicated detection pin (e.g., PRSNT#). When a module is inserted, the electrical level of this pin changes specifically, thus announcing the module's presence to the system. The power-on enable signal is a control signal issued by the control system to instruct the power management circuitry to apply or remove operating voltage to the module. For example, the PERST# signal ensures stable power-on and power-off of the module through precise control of the power-on timing.

[0081] When the first controller continuously monitors the control signal area, it responds to a specific level change in the insertion / removal detection signal, which clearly indicates that a target module has been inserted into a standardized slot. Once this event is detected, the first controller immediately accesses the pre-installed memory chip within the target module via the board-level management bus. The memory chip is a non-volatile memory integrated on the module, from which the first controller reads the target module's power consumption information. This power consumption information is a set of key electrical parameters pre-stored in the memory chip, defining the typical power consumption values ​​of the module under various operating states, such as maximum continuous power consumption, peak surge power consumption, and standby power consumption. This data provides a core basis for evaluating the system's power supply capability. After successfully reading the power consumption information, the first controller synchronously sends a module insertion notification and the read power consumption information to the management controller. The module insertion notification is a software or hardware-level event message used to inform the management controller that a new module has been physically inserted, triggering subsequent power management procedures.

[0082] Upon receiving the module insertion notification and power consumption information from the first controller, the management controller activates its intelligent power management algorithm. This algorithm first uses the power consumption information, and then combines it with other power consumption information to make a comprehensive judgment to determine whether the current total power consumption of the modules exceeds a preset power consumption threshold set by the system. Other power consumption information refers to the power consumption data set corresponding to all other modules currently inserted and running in the system, excluding the target module. This data is obtained in real-time by the management controller from its internal status database. The total module power consumption is the sum of the estimated power consumption of the target module and the current actual power consumption of all other modules. It represents the total load that the system power subsystem needs to bear if the target module is powered on. The preset power consumption threshold is a predefined threshold value based on factors such as the rated output capacity of the server power supply unit (PSU), thermal design power (TDP), and safety margin. It sets the maximum total power limit that the system allows modules to consume.

[0083] Based on the above judgment, the management controller will execute the corresponding control strategy. Specifically, in response to the calculated total power consumption of the module exceeding the preset power consumption threshold, the management controller will immediately issue a clear instruction to the first controller, instructing it to delay powering on the target module or refuse to power on the target module. Delaying power-on means postponing the power-on operation of the target module to a later time, for example, waiting for the system load to decrease or for other high-power modules to be removed before attempting it; refusing power-on means directly prohibiting power supply to the target module and marking it as unavailable due to insufficient power. At the same time, corresponding alarm information is usually generated in the management interface to prompt the administrator to intervene. This prevents serious problems such as power overload protection, voltage drop, or even unexpected system restarts that may be caused by instantaneous power demand exceeding the system's supply capacity.

[0084] Conversely, if the calculated total power consumption of the module does not exceed a preset power consumption threshold, the management controller will issue an authorization command to the first controller, instructing it to safely power on the target module according to a preset power-on sequence. The preset power-on sequence is a carefully designed set of strict timing specifications regarding the rise time of power pin voltages, power stabilization time, and signal release order. For example, it ensures that the core voltage is established before the auxiliary voltage, or that the reset signal is released after a specific delay. Upon receiving this command, the first controller will precisely control the power management circuitry to gradually apply power according to this sequence, ensuring that the target module can start smoothly and without impact, avoiding damage to the module itself or the system backplane caused by current surges at the moment of power-on.

[0085] This application establishes real-time coordination of power consumption information between the first controller and the management controller, enabling accurate assessment of the impact of a module's addition on the overall power load before it is actually powered on, and making safe and reasonable power-on decisions accordingly. This enhances the power supply security and reliability of the server system during dynamic expansion, avoids system-level risks caused by power budget overruns, and allows for optimal allocation and utilization of power resources among multiple modules, providing crucial power assurance for high-density, multi-module server application scenarios.

[0086] In one possible implementation of this application embodiment, the management controller, in response to the module unplug request, issues an unplug preparation command to the first controller;

[0087] The first controller, based on the unplug preparation command, blocks the data flow in the high-speed signal area in a preset sequence and cuts off the power output in the power supply area;

[0088] The first controller responds to the power-on enable signal to indicate that the target module has been powered off, controls the indicator lights on the input / output board to flash according to a preset mode and / or controls the display unit on the input / output board to display prompt information.

[0089] In the embodiments of this application, the management controller has the function of receiving and parsing external instructions. When the system receives a module removal request, the management controller will immediately respond and initiate the corresponding processing flow. A module removal request refers to a software command or event signal initiated by an authorized user through a local or remote management interface (e.g., a web-based graphical user interface or command-line terminal) with the intention of removing a specific functional module from its standardized slot. The generation of this request usually stems from operation and maintenance management needs, such as module upgrades, replacements, or system reconfigurations. Its core purpose is to notify the system in a controlled manner to initiate preparations before module removal, thereby transforming hot-swapping operations from purely physical behaviors into a safe process managed by software.

[0090] Upon detecting a valid module removal request, the management controller issues an explicit removal preparation command to the first controller it is connected to. This command is a specific-formatted digital instruction message transmitted via the board-level management bus. It typically includes the logical identifier of the target module (e.g., slot number) and the opcode required for safe removal. This command signal marks the system's transition from normal operation to the module removal preparation phase. The management controller then delegates subsequent hardware operations to the first controller, reverting to a monitoring state.

[0091] Upon receiving a disconnect preparation command from the management controller, the first controller immediately initiates a pre-defined hardware operation sequence designed to ensure security, based on the command's instructions. First, it blocks data traffic in the high-speed signal area according to a strictly defined pre-defined order. This pre-defined order is a series of optimized operational steps defined by firmware logic, designed to prioritize data integrity. For example, the steps might include: first, notifying the upstream processor to stop initiating new data transmission requests to the target module; then, waiting for all initiated and ongoing packet transmissions or transactions to complete their current cycle; and finally, physically disabling data transmission and reception by configuring a high-speed serializer / deserializer or related logic gates. The high-speed signal area is a physical area on the input / output board with multiple differential pair channels. These channels are responsible for carrying high-speed data traffic between the processor and the target module—a continuously flowing stream of digital information, which may include instructions, responses, or batch data. By blocking this data traffic in an orderly, pre-defined order, it effectively avoids packet loss, transaction interruption, or protocol layer errors that could result from sudden disconnection, ensuring the reliable termination of data exchange.

[0092] After successfully blocking the data flow, the first controller immediately performs a critical power management operation, namely cutting off the power output of the power supply area. The power pins in the power supply area are connected to the system power supply through power management circuitry, continuously providing power to the inserted module, i.e., maintaining the voltage and current required for normal module operation. The cutting-off operation is typically achieved by the first controller through a power control signal (e.g., an enable pin), controlling the onboard power switching devices (e.g., load switches) to switch from an on state to an off state, thereby completely disconnecting the power supply loop to the target module. This eliminates the risks of arcing, instantaneous high current backflow, or unstable signal line potential that may occur when a module is physically removed while energized, providing a fundamental guarantee for hardware safety.

[0093] After power disconnection is complete, the first controller continuously monitors the status of the power-on enable signal for confirmation. The power-on enable signal is a critical signal line in the control signal area specifically used to control the application of power to the module. When the first controller determines that the target module has been de-energized by monitoring the electrical level of this signal (e.g., confirming it is an invalid low level) and combining feedback from the power management circuitry, it finally confirms that the module has been completely disconnected from the power supply network, its internal circuitry no longer consumes current, and it is in a safe, electrically inert state. The target module being de-energized is a definitive state determination, meaning that the voltage values ​​of all power pins to ground have stabilized within a safe range (typically close to zero volts), and there are no potential residual charges or leakage currents.

[0094] Once it is confirmed that the module has been safely powered off, the first controller immediately activates the user indication subsystem. This is manifested by controlling the indicator lights on the input / output board to flash according to a preset pattern, and / or controlling the display unit on the input / output board to display a clear message indicating that the module can be removed. The indicator lights are visual warning devices deployed on the surface of the input / output board, typically near the corresponding standardized slots, such as monochrome or multicolor light-emitting diodes (LEDs). Their preset flashing pattern is a light signal pattern with specific meaning defined by firmware, such as a slow flashing of amber light at a frequency of once per second, or a complex pattern of alternating flashing green and amber. This patterned design aims to convey the semantic meaning of safe operation to maintenance personnel through optical encoding. The display unit is a more integrated output device, such as a small e-ink screen or LCD display, capable of displaying text or symbolic messages indicating that the module can be removed, such as directly displaying a text prompt indicating safe removal or a generic removal symbol icon. These visual indication mechanisms together form a reinforced and redundant human-machine interface, providing on-site maintenance personnel with an unquestionable physical permission signal to operate, ensuring that modules are only physically removed after all safety preparations have been completed within the system, thereby completely eliminating hardware damage, data loss, or system instability that may be caused by incorrect operation timing or misjudgment of status.

[0095] This application achieves seamless integration from software requests to hardware actions through close coordination between the management controller and the first controller in command issuance and execution, ensuring the orderly shutdown of data links and reliable power isolation. Most importantly, by introducing clear, multi-mode local status indicators, the intuitiveness and security of operation are greatly improved, reducing the technical threshold and psychological pressure on maintenance personnel.

[0096] Furthermore, regarding hot-swap management in this application, embodiments of this application also provide a schematic flowchart of hot-swap management, such as... Figure 2 As shown, it includes:

[0097] During module insertion and removal, a CPLD plus BMC collaborative management mechanism is adopted to ensure safety and reliability.

[0098] Insertion detection: When the slot detects a change in the PRSNT# signal, the CPLD immediately determines whether the module is in place and sends an event notification to the BMC.

[0099] Power Management: Based on the power consumption information provided by the module's EEPROM, the BMC instructs the CPLD to turn on the power according to the set timing to avoid instantaneous high current surges; if power consumption exceeds the limit, it automatically delays power-on or refuses to power on.

[0100] Link initialization: After the power supply stabilizes, the CPLD configures the interface logic and initializes the high-speed link to ensure smooth access during system operation.

[0101] Operation monitoring: During module operation, indicators such as current, voltage, temperature, and link bit error rate are transmitted to the BMC in real time. If an anomaly occurs, the BMC will issue an alarm and implement protective measures.

[0102] Safe removal: When the user is ready to remove the module, the BMC first issues a removal preparation command. The CPLD sequentially shuts down the high-speed link and power supply. The module is only allowed to be removed after confirming that no current is flowing, in order to avoid arcing or signal failure.

[0103] In one possible implementation of this application embodiment, the input / output board further includes: at least one sensor, the at least one sensor being respectively disposed at the interface position and / or device position of the input / output board, and the at least one sensor being respectively connected to the first controller;

[0104] At least one sensor collects real-time operating data from the input / output board and transmits the real-time operating data to the first controller;

[0105] The first controller preprocesses the real-time operating data to obtain processed operating data, and then transmits the processed operating data to the management controller.

[0106] The first controller responds to the processed operating data indicating that there is an operating abnormality in the input / output board, and instructs the display unit and / or indicator lights to provide an abnormality warning.

[0107] The management controller performs data analysis on the processed operational data to obtain operational analysis data, and then visualizes the operational analysis data through the management interface;

[0108] The management controller uploads the processed operating data to the remote management platform via a remote management protocol, and can receive control commands from the remote management platform to perform at least one of the following operations on the target module: reset, isolation, or power limiting.

[0109] In the embodiments of this application, the input / output board hardware configuration, in addition to the aforementioned core components, integrates at least one sensor. These sensors are miniaturized detection devices capable of sensing and measuring physical quantities or electrical parameters, and they are strategically positioned at the interface locations and / or device locations on the input / output board. The interface location specifically refers to the standardized slot and its surrounding area, which is a critical node for module connection and signal exchange; while the device location refers to the mounting area of ​​key functional chips and high-power components on the input / output board, such as the first controller itself, the retimer, or the vicinity of the power management integrated circuit. All sensors establish a stable electrical connection with the first controller via a board-level bus, ensuring unobstructed data flow.

[0110] During system operation, at least one sensor continuously or periodically collects real-time operating data from the input / output boards. This real-time operating data is a multi-dimensional set of status information, the specific content of which depends on the type and deployment location of the sensors. It typically includes, but is not limited to: slot contact temperature collected by a temperature sensor deployed at the interface; module power supply circuit current value collected by a current sensor; power pin voltage ripple collected by a voltage sampling circuit; and bit error rate or signal eye diagram characteristic parameters overview collected by a link quality monitoring unit that may be deployed to assess high-speed signal quality. These sensors transmit the raw real-time operating data to the first controller via a connection bus, providing a rich source of underlying information for subsequent data processing.

[0111] After receiving raw real-time operational data from various sensors, the first controller immediately preprocesses it. Preprocessing is a series of localized calculations and filtering operations performed by the first controller's internal firmware. Its purpose is to reduce the data processing burden on the upstream management controller and extract higher-quality information. Preprocessing operations typically include outlier filtering of the raw sampled values ​​to remove invalid data points caused by transient interference, performing moving average calculations to smooth data fluctuations and reflect trends, and comparing the processed data with preset safety thresholds in real time. Through these steps, the first controller obtains processed operational data, which is more regular, stable, and contains clear status information (e.g., whether limits are exceeded) compared to the raw data. Subsequently, the first controller transmits this processed operational data to the management controller via the management bus, completing the initial data aggregation from the edge to the center.

[0112] The first controller possesses preliminary local decision-making capabilities. It responds to situations where, during preprocessing, the processed operational data clearly indicates an operational anomaly on the input / output board, such as a port temperature consistently exceeding a safety threshold or a power supply current abnormally increasing. Once an anomaly is detected, the first controller immediately instructs the display unit and / or indicator lights to provide an anomaly warning. The display unit is a text or graphic display device, such as an e-ink screen, that may be integrated on the input / output board; the indicator lights are onboard LEDs. Anomaly warnings are manifested as specific visual signals, such as an indicator light changing from a stable green to a rapid red flashing, or the display unit scrolling through specific error codes and alarm information (e.g., slot A1 overheating). This localized, real-time alarm mechanism provides on-site maintenance personnel with the most direct and rapid way to perceive the status of the system, facilitating quick fault location.

[0113] At the system management layer, the management controller undertakes more complex data analysis tasks. It performs data analysis on the processed operational data continuously received from the first controller. This data analysis involves advanced diagnostic and predictive algorithms running on the management controller. The process includes trend analysis of historical operational data, correlation analysis between different sensor parameters, and anomaly pattern recognition based on machine learning. Through this processing, the management controller obtains deeper operational analysis data, such as predicting the potential remaining lifespan of a specific interface module, diagnosing the root causes of link quality degradation, or comprehensively assessing the health score of the entire input / output board. This operational analysis data is then visualized through the management interface, presented to administrators in richer and more insightful formats (such as health dashboards, trend prediction curves, and correlated alarm topology diagrams), greatly enhancing the depth and foresight of management.

[0114] To further enable centralized operation and maintenance and remote intervention, the management controller also uploads the processed operational data received to the remote management platform via a remote management protocol. The remote management protocol is a standard out-of-band management protocol, such as the Intelligent Platform Management Interface (IPMI) or the Redfish protocol based on a RESTful architecture. The remote management platform is centralized management software located in the data center network. Administrators can use this platform to monitor the input / output status of all servers across physical distances. Furthermore, the management controller can receive control commands from the remote management platform and perform at least one of the following operations on the target module based on the commands: reset, isolation, or power limiting. A reset operation restores the target module to its initial state via a logical signal; an isolation operation logically shields the faulty module from the system resource pool through software configuration to prevent it from affecting the overall system; power limiting dynamically adjusts the module's power limit to ensure system stability during periods of power shortage. This allows maintenance personnel to perform precise intervention on faulty modules and dynamically adjust system resources without being physically present on-site.

[0115] This application achieves refined and real-time monitoring through distributed sensing and edge preprocessing; it endows the system with predictive maintenance capabilities through in-depth analysis by the central analyzer; and it breaks through the geographical limitations of operation and maintenance through the integration of remote protocols, realizing unmanned operation and automated maintenance, significantly improving the operational efficiency, reliability and economic benefits of large-scale server infrastructure.

[0116] Furthermore, regarding the intelligent data management in this application, embodiments of this application also provide an intelligent management and remote monitoring block diagram, such as... Figure 3 As shown, based on Figure 3The data intelligent management framework shown in this application can also be implemented in, but is not limited to, the following ways:

[0117] Step S1: Data Acquisition

[0118] Current sensors, voltage sampling circuits, temperature sensors, and high-speed link quality monitoring units are installed at key component and interface locations on the I / O board. Each sensor is connected to the CPLD / FPGA via I2C, Power Management Bus (PMBus), or SPI to collect real-time interface operating status data.

[0119] Step S2: Data Preprocessing

[0120] The CPLD / FPGA preprocesses the acquired data, including outlier filtering, mean calculation, and comparison with preset thresholds. When a parameter exceeds the threshold, an alarm flag is immediately generated.

[0121] Step S3: BMC Communication and Upload

[0122] The CPLD / FPGA transmits the processed data to the BMC via the I2C / SMBus / IPMB bus. The BMC periodically stores historical data and runs a health assessment algorithm to analyze the operating trends of the I / O board interfaces.

[0123] Step S4: Local Status Display

[0124] LED indicators or e-ink displays are installed on the edge of the I / O board. The LED indicators use different colors and flashing patterns to display the interface operating status, while the e-ink displays show the interface number, monitoring data, and alarm information to facilitate on-site troubleshooting by maintenance personnel.

[0125] Step S5: Remote Monitoring and Control

[0126] The BMC uploads monitoring data and alarm information to the remote management platform via IPMI or Redfish protocol. Administrators can view the I / O board's operating status and historical curves on the remote interface, and can issue commands such as interface reset, isolation, or power limiting. The BMC then receives the commands and executes the corresponding control operations.

[0127] In one possible implementation of this application embodiment, the input / output board further includes: a display unit and / or indicator lights;

[0128] The display unit is connected to the first controller and is used to display the module's in-situ status, working status, or fault information in the standardized slot in real time.

[0129] The indicator light is connected to the first controller and is used to display the module's in-situ status, working status, or fault information in the standardized slot in real time by displaying at least one of the following methods: light color and flashing mode.

[0130] In embodiments of this application, the physical structure of the input / output board also includes a display unit and / or indicator lights. These components are localized output devices directly mounted on the input / output board, serving as windows to the outside world to present the system status and constituting the most direct visual interaction interface between maintenance personnel and the hardware.

[0131] A display unit is an electronic display device capable of presenting text, numbers, or simple graphic information. Its specific form can be a small-sized LCD screen or an e-ink screen. The display unit is electrically connected to a first controller via a dedicated display interface (such as SPI, I2C, or a parallel interface) and receives commands and control from the first controller. The first controller dynamically sends the data content to be displayed to the display unit based on the current operating status of the system. The main function of the display unit is to display key status information related to the standardized slot in real time. The standardized slot is the physical interface used to connect various functional modules. The displayed information includes, but is not limited to: module presence status, clearly indicating whether a slot is currently idle, a module is correctly inserted, or the module is not fully in place; operating status, such as displaying the protocol type currently running on the slot (e.g., PCIe 4.0), link up status, or data transfer rate; and fault information, where the system can directly display specific error codes or concise text alarms when an anomaly is detected, such as overheating, power supply abnormality, or link degradation. Information presented in text or symbol form has the advantages of large information capacity and precise, unambiguous expression, making it easy for maintenance personnel to quickly grasp detailed information.

[0132] Complementing the display unit are indicator lights. An indicator light is a semiconductor device that indicates status by emitting light, typically implemented using a light-emitting diode (LED). It is also electrically connected to the first controller, and its on / off state, color, and flashing pattern are entirely controlled by the output signal of the first controller. The core function of the indicator light is to display the status of the standardized slot in real time through extremely simple and conspicuous light signals. Its indication method combines at least one of the following: display light color. For example, color differentiation is used: a stable green light usually indicates that the module is in place and working normally; an amber light may indicate that the module is in standby or configuration; while a red light strongly indicates a fault. Simultaneously, different information is conveyed through flashing patterns: constant light, slow flashing, fast flashing, or specific flashing sequences (such as Morse code) can represent different states such as normal operation, initialization, emergency alarm, or safe removal. This method of encoding and combining color and flashing patterns allows maintenance personnel to instantly determine the basic status of the slot visually, even at a distance or in poor lighting conditions.

[0133] Module presence status refers to the physical presence of the module in the slot and the reliability of the connection. Operating status reflects the current operational status of the inserted module, indicating whether it is in active data transmission, low-power sleep mode, or initialization. Fault information summarizes abnormal situations detected by the system's self-diagnosis, indicating issues requiring attention or intervention.

[0134] This application constructs a redundant, complementary, and efficient local status indication system through the collaborative operation of a display unit and indicator lights. The display unit provides rich and detailed text information, suitable for in-depth troubleshooting and status confirmation; while the indicator lights provide an intuitive and rapid status overview, suitable for quick inspection and alarm capture. This ensures that maintenance personnel of different skill levels can obtain the information they need, significantly reducing the technical threshold and time cost of maintenance work, effectively avoiding misoperation, and playing a crucial role in ensuring the stable operation and efficient maintenance of large-scale server clusters, especially in high-density deployment environments.

[0135] Furthermore, it should be noted that the workflow of the server input / output system in this application may include, but is not limited to, the following methods:

[0136] 1. Module insertion into slot - CPLD recognition - BMC synchronization - Power-on for safety;

[0137] 2. CPLD configuration logic - complete protocol adaptation - high-speed link operates normally;

[0138] 3. Real-time monitoring during operation - local / remote alarms;

[0139] 4. Module removal - BMC prepares - CPLD power off safely - Removal permitted.

[0140] Figure 4 This document provides a flowchart illustrating an application method for a server input / output system, as provided in an embodiment of this application. A detailed description is then provided in conjunction with the execution flow of the application method for the server input / output system.

[0141] like Figure 4 As shown, the application method of this server input / output system includes:

[0142] Step 401: In response to the target module being inserted into the standardized slot, identify the protocol type of the target module.

[0143] In the embodiments of this application, the target module is a specific functional unit of the system to be connected, such as a high-speed network card or a storage controller. A standardized slot is an interface on an input / output board designed with unified physical and electrical specifications, capable of accommodating and connecting such modules. When the module is inserted and mechanically locked in place, a detection mechanism within the slot (such as a specific detection pin) generates an electrical signal change. The system, particularly through its first controller, continuously monitors these signals and immediately initiates this process upon detecting an event indicating that the module has been correctly inserted. Subsequently, the system performs an identification operation to determine the protocol type supported by the target module. The protocol type is the industry standard and specification that the module must follow for data communication; for example, it may be defined as PCIe 5.0, SATA 3.0, or USB 4.0. The identification process can be implemented in various ways, such as by reading the identification information recorded in the pre-installed storage chip on the module, or by probing its compatibility through a preliminary electrical handshake and protocol interaction. Accurate identification of the protocol type is the foundation and prerequisite for all subsequent dynamic configuration.

[0144] Step 402: Dynamically switch the signal transmission and reception channel between the standardized slot and the processor to the target differential pair channel based on the protocol type to adapt to the interface protocol corresponding to the protocol type; wherein, the standardized slot is connected to the processor through multiple sets of differential pair channels for signal transmission and reception, and the target differential pair channel is the differential pair channel that corresponds to the protocol type among the multiple sets of differential pair channels.

[0145] In the embodiments of this application, dynamic switching refers to the process of changing the logical connection relationship and electrical characteristics of hardware signal paths through software or programmable logic control during system operation. Specifically, in this method, the object of operation is the signal transceiver channel between the standardized slot and the server processor. The signal transceiver channel is the general term for the physical path and logical pipe that carries data for bidirectional transmission between the slot and the processor core. The goal of dynamic switching is to reroute and configure this signal transceiver channel from a potentially default or idle state to a target differential pair channel. The target differential pair channel is not a single, fixed line, but specifically refers to the set of channels among multiple differential pair channels whose physical design (such as wiring length, impedance matching) and electrical performance are best suited to support the identified protocol type. Multiple differential pair channels are a set of multiple selectable high-speed signal paths pre-deployed in the form of general physical channels during the input / output board hardware design. They are all connected to the processor, establishing physical connectivity for signal transmission and reception. This means that the processor has the physical capability to communicate with the insertion module through any of these channels.

[0146] Ultimately, the purpose of dynamic switching is to adapt to the interface protocol corresponding to the protocol type. The interface protocol not only defines the format and exchange rules of data packets, but also includes the specific requirements of physical layer signals. After adaptation, the target differential pair channel is logically configured as a communication link that is fully compatible with the interface protocol, enabling the processor and target module to perform error-free and efficient data exchange using a mutually agreed-upon language and specifications.

[0147] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0148] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above-described application method embodiments of a server input / output system.

[0149] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described application method embodiments of a server input / output system when run.

[0150] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0151] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described application method embodiments of a server input / output system.

[0152] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described application method embodiments of a server input / output system.

[0153] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0154] The foregoing has provided a detailed description of a server input / output system and its application method, as well as an electronic device, provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A server input / output system, characterized in that, include: An input / output board, the input / output board including a first controller and at least one standardized slot, each standardized slot including a power supply area, a high-speed signal area and a control signal area; The power supply area is equipped with uniform power supply pins, the control signal area is equipped with signal transmission lines, and the high-speed signal area reserves multiple sets of differential pairs in the form of general physical channels. Each set of differential pairs corresponds to a different interface protocol. The at least one standardized slot is connected to the processor via its respective set of differential pairs for signal transmission and reception; In response to the insertion of the target module into the standardized slot, the first controller identifies the protocol type of the target module and dynamically switches the signal transceiver channel between the standardized slot and the processor to the target differential pair channel based on the protocol type, so as to adapt to the interface protocol corresponding to the protocol type. The target differential pair channel is the differential pair channel corresponding to the protocol type among the multiple sets of differential pair channels.

2. The server input / output system according to claim 1, characterized in that, The first controller identifies the protocol type by reading the pre-installed storage chip within the target module; The first controller invokes internal logic circuitry to map the electrical characteristics and communication protocol of the target differential pair channel to the electrical characteristics and communication protocol corresponding to the protocol type, thereby completing protocol adaptation.

3. The server input / output system according to claim 1, characterized in that, The first controller, in response to the protocol type being a high-frequency, high-speed interface protocol, starts a retimer set in the high-speed signal area; The first controller dynamically adjusts the signal equalization and clock recovery parameters of the retimer based on the protocol type and the link information of the target differential pair channel, in order to assist the standardized slot and the processor in signal transmission and reception.

4. The server input / output system according to claim 2, characterized in that, The system further includes: a management controller, which is connected to the first controller; The first controller transmits the protocol type of the target module, the link information of the target differential pair channel, and the status data of the target module read from the storage chip to the management controller in real time. The management controller visualizes the received protocol type, link information, and status data through a management interface.

5. The server input / output system according to claim 4, characterized in that, The signal transmission lines deployed in the control signal area are used to transmit at least insertion / removal detection signals and power-on enable signals. In response to the insertion / removal detection signal, the first controller instructs the target module to be inserted into the standardized slot, reads the power consumption information of the target module from the memory chip, and sends a module insertion notification and the power consumption information to the management controller. The management controller determines whether the total power consumption of the module exceeds a preset power consumption threshold based on the power consumption information and other power consumption information, wherein the other power consumption information refers to the power consumption information of the currently inserted modules other than the target module; In response to the total power consumption of the module exceeding the preset power consumption threshold, the management controller instructs the first controller to delay powering on the target module or refuse to power on the target module. In response to the total power consumption of the module not exceeding the preset power consumption threshold, the management controller instructs the first controller to power on the target module through a preset power-on sequence.

6. The server input / output system according to claim 5, characterized in that, In response to the module's unplug request, the management controller sends an unplug preparation command to the first controller; The first controller, based on the unplug preparation command, blocks the data flow of the high-speed signal zone in a preset sequence and cuts off the power output of the power supply zone; In response to the power-on enable signal indicating that the target module has been powered off, the first controller controls the indicator lights on the input / output board to flash according to a preset mode and / or controls the display unit on the input / output board to display prompt information.

7. The server input / output system according to claim 6, characterized in that, The input / output board further includes: at least one sensor, wherein the at least one sensor is respectively disposed at the interface position and / or device position of the input / output board, and the at least one sensor is respectively connected to the first controller; The at least one sensor collects real-time operating data of the input / output board and transmits the real-time operating data to the first controller; The first controller preprocesses the real-time operating data to obtain processed operating data, and transmits the processed operating data to the management controller. The first controller, in response to the processed operating data indicating that the input / output board has an operational abnormality, instructs the display unit and / or the indicator light to provide an abnormality warning. The management controller performs data analysis on the processed operating data to obtain operating analysis data, and visualizes the operating analysis data through the management interface; The management controller uploads the processed operating data to the remote management platform via a remote management protocol, and can receive control commands from the remote management platform to perform at least one of the following operations on the target module: reset, isolation, or power limiting.

8. The server input / output system according to claim 6, characterized in that, The input / output board further includes: the display unit and / or the indicator lights; The display unit is connected to the first controller and is used to display the module's in-situ status, working status, or fault information in the standardized slot in real time. The indicator light is connected to the first controller and is used to display the module's in-situ status, working status, or fault information in the standardized slot in real time by displaying at least one of the following methods: light color and flashing mode.

9. An application method for a server input / output system, characterized in that, The method is applied to a server input / output system as described in any one of claims 1-8, comprising: In response to the insertion of a target module into a standardized slot, the protocol type of the target module is identified; Based on the protocol type, the signal transceiver channel between the standardized slot and the processor is dynamically switched to the target differential pair channel to adapt to the interface protocol corresponding to the protocol type. The standardized slot is connected to the processor via multiple sets of differential pairs for signal transmission and reception, and the target differential pair is the differential pair corresponding to the protocol type among the multiple sets of differential pairs.

10. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the application method of the server input / output system as described in claim 9 when executing the computer program.

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