Forming method of image sensor and image sensor
By forming an isolation structure around the pixel area and logic area of the image sensor, the dark current problem caused by deep trench etching is solved, ensuring imaging quality and enabling chip miniaturization.
Patent Information
- Application Number
- CN202411149152.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-20
- Publication Date
- 2026-03-06
AI Technical Summary
In existing image sensors, silicon damage caused by deep trench etching generates dark currents that affect image quality, while chip miniaturization is also limited.
An isolation structure, including trench isolation structure and ion-doped region, is formed around the pixel area and logic area to isolate the light, heat and electron diffusion generated by the logic area device, and to prevent the generation of dark current through PN junction barrier.
Effective isolation of logic area interference prevents dark current from affecting image quality, while reducing the spacing between pixel area and trench isolation structure to achieve miniaturization of image sensor.
Smart Images
Figure CN121619979A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to a method for forming an image sensor and an image sensor. Background Technology
[0002] Image sensors typically include pixel areas with photodiodes and logic areas for processing electrical signals; the logic areas are equipped with various peripheral devices such as row drivers, column drivers, and analog-to-digital converters.
[0003] Because light, heat, and electrons generated during the operation of peripheral devices can interfere with the pixel area and affect image quality, deep trench structures are typically used around the pixel area to block light, insulate against heat, and relieve stress. However, etching these deep trenches can cause silicon damage, leading to dark currents, which also affect the performance of the pixel area.
[0004] To prevent silicon damage caused by deep trenches from adversely affecting the performance of the pixel area, the pixel area and the deep trenches can be separated by a distance. However, this inevitably leads to an increase in chip area, which is inconsistent with the miniaturization trend of image sensors. Therefore, it is necessary to adjust the structure of the image sensor. Summary of the Invention
[0005] The purpose of this invention is to provide a method for forming an image sensor and an image sensor that can isolate the light, heat and / or electron diffusion generated by the devices in the logic area, and prevent dark current from being generated in the deep trench to avoid increasing the chip area.
[0006] To achieve the above objectives, the present invention is implemented through the following technical solution:
[0007] A method for forming an image sensor, comprising:
[0008] A substrate is provided; the substrate includes pixel areas and logic areas;
[0009] An isolation structure is formed around the pixel area and / or around different modules of the logic area to isolate light, heat and / or electron diffusion generated by the devices in the logic area;
[0010] The isolation structure includes a trench isolation structure and an ion-doped region disposed along at least one side of the trench isolation structure.
[0011] Optionally, the step of forming an isolation structure around the pixel area and / or around different modules of the logic area includes:
[0012] The trench isolation structure is formed on the front side of the substrate;
[0013] The ion-doped region is formed on the front side of the substrate by ion implantation.
[0014] Optionally, the step of forming an isolation structure around the pixel area and / or around different modules of the logic area includes:
[0015] The ion-doped region is formed on the front side of the substrate by ion implantation;
[0016] The trench isolation structure is formed on the front side of the substrate.
[0017] Optionally, the step of forming an isolation structure around the pixel area and / or around different modules of the logic area includes:
[0018] The ion-doped region is formed on the front side of the substrate by ion implantation;
[0019] The trench isolation structure is formed on the back side of the substrate.
[0020] Optionally, the ion implantation is combined with other ion implantation processes.
[0021] Optionally, the ion-doped region is formed on the side of the trench isolation structure away from the pixel area, the ion-doped region is formed on the side of the trench isolation structure close to the pixel area, or the ion-doped region is formed on both sides of the trench isolation structure.
[0022] Optionally, the isolation structure disposed along the same side of the pixel area has at least two rows arranged in an alternating pattern.
[0023] Optionally, the isolation structure is in the shape of a discontinuous rectangle, circle, or square; the isolation structure is discretely distributed around the periphery of the pixel area.
[0024] On the other hand, the present invention also provides an image sensor, comprising:
[0025] Substrate; the substrate includes pixel areas and logic areas;
[0026] An isolation structure is formed around the pixel area and / or around different modules of the logic area to isolate light, heat and / or electron diffusion generated by the devices in the logic area.
[0027] The isolation structure includes a trench isolation structure and an ion-doped region disposed along at least one side of the trench isolation structure.
[0028] This invention has at least one of the following advantages:
[0029] This invention provides a method for forming an image sensor and the image sensor itself. An isolation structure, including a trench isolation structure and an ion-doped region, is formed around the pixel area and / or different modules of the logic area. The trench isolation structure physically isolates the light, heat, and / or electron diffusion generated by the devices in the logic area, thereby preventing interference from these devices on the pixel area and ensuring the imaging quality of the pixel area. The ion-doped region forms a PN junction barrier with the pixel area and / or the logic area to enclose crystal defects on the sidewalls of the trench isolation structure, preventing dark current from being generated in the trench isolation structure. This prevents dark current from affecting the performance of the pixel area and further ensures the imaging quality of the pixel area.
[0030] In this invention, ion-doped regions are used to prevent dark current from being generated in the trench isolation structure. Compared with the prior art, this invention can effectively reduce the distance between the pixel area and the trench isolation structure, thereby reducing the chip area and thus facilitating the miniaturization of image sensors. Attached Figure Description
[0031] Figure 1 This is a flowchart of a method for fabricating an image sensor provided by the present invention;
[0032] Figure 2 This is a top view of an image sensor provided in an embodiment of the present invention;
[0033] Figure 3 yes Figure 2 Cross-sectional view along the AA direction;
[0034] Figure 4 This is a top view of an image sensor provided in another embodiment of the present invention;
[0035] Figure 5 This is a top view of an image sensor provided in another embodiment of the present invention. Detailed Implementation
[0036] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the image sensor and its fabrication method proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the accompanying drawings are in a very simplified form and use non-precise proportions, intended only to facilitate and clearly illustrate the embodiments of this invention. Please refer to the accompanying drawings to make the objectives, features, and advantages of this invention more apparent and understandable. It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation conditions of this invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to the size, without affecting the effects and objectives achieved by this invention, should still fall within the scope of the technical content disclosed in this invention.
[0037] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0038] Example 1
[0039] Combined with appendix Figures 1-5 As shown, this embodiment provides a method for forming an image sensor, including:
[0040] Step S1, Provide substrate 100 (e.g. Figure 2 (As shown); the substrate 100 includes a pixel area 110 and a logic area 120;
[0041] Step S2: An isolation structure 200 is formed around the pixel area 110 and / or around different modules of the logic area 120 to isolate light, heat and / or electron diffusion generated by the devices in the logic area 120; and the isolation structure 200 includes a trench isolation structure 210 and an ion-doped region 220 disposed along at least one side of the trench isolation structure 210.
[0042] Specifically, the logic area 120 is typically provided with multiple modules (not shown in the figure), such as digital circuit modules and analog circuit modules; each module includes different devices, such as row drivers, column drivers and transistors; and each device generates light, heat and / or electron diffusion during operation, which can easily interfere with the pixel area 110 and affect the imaging quality of the pixel area 110.
[0043] In this embodiment, an isolation structure 200 is formed between different modules of the pixel region 110 and the logic region 120. The trench isolation structure 210 within the isolation structure 200 can physically isolate the light, heat, and / or electron diffusion generated by the devices in the logic region 120, thereby preventing interference from these sources on the pixel region 110 and ensuring the imaging quality of the pixel region 110. The ion-doped region 220 within the isolation structure 200 can form a PN junction barrier with the pixel region 110 and / or the logic region 120 to enclose crystal defects on the sidewalls of the trench isolation structure 210, thereby preventing the trench isolation structure 210 from generating dark current. This prevents dark current from affecting the performance of the pixel region 110 and further ensures the imaging quality of the pixel region 110.
[0044] As can be seen from the above, in this embodiment, the isolation structure 200 formed around the pixel region 110 and / or around different modules of the logic region 120 can effectively isolate the light, heat, and / or electron diffusion generated by the devices in the logic region 120, and also prevent the trench isolation structure 210 from generating dark current that could affect the performance of the pixel region 110. Furthermore, by utilizing the ion-doped region 220 to prevent the trench isolation structure 210 from generating dark current, this embodiment can effectively reduce the distance between the pixel region 110 and the trench isolation structure 210 compared to the prior art, thereby reducing the chip area and facilitating the miniaturization of the image sensor.
[0045] Specifically, the step of forming an isolation structure 200 around the pixel area 110 and / or around different modules of the logic area 120, i.e., step S2, includes: step S21, on the front surface 1001 of the substrate 100 (e.g., Figure 3 (as shown) Form the trench isolation structure 210; Step S22: Form the ion-doped region 220 on the front side 1001 of the substrate 100 by ion implantation.
[0046] In this embodiment, in step S21, the front side 1001 of the substrate 100 may be etched to form the trench isolation structure 210 on the front side 1001 of the substrate 100. In some embodiments, after forming the trench isolation structure 210 by etching, silicon dioxide (SiO2) may be filled into the trench isolation structure 210 to enhance the isolation effect of the trench isolation structure 210 on the light, heat and / or electron diffusion generated by the logic region 120 device, but the present invention is not limited thereto.
[0047] In this embodiment, in step S22, ion implantation can be performed on at least one side of the trench isolation structure 210 on the front side 1001 of the substrate 100 to form the ion-doped region 220 on at least one side of the trench isolation structure 210, thereby forming the isolation structure 200 including the trench isolation structure 210 and the ion-doped region 220.
[0048] Furthermore, the ion implantation can be combined with other ion implantation processes. That is, during the fabrication of the image sensor, by modifying the photomask, the ion implantation in step S22 can be combined with other ion implantation processes in the image sensor fabrication process without adding additional processes. This ensures the fabrication efficiency of the image sensor while forming the ion-doped region 220, but the present invention is not limited thereto.
[0049] Furthermore, in this embodiment, after the isolation structure 200 is formed by step S2, a metal interconnect and dielectric layer 300, a silicon dioxide layer 400, and a carrier wafer 500 can be sequentially formed on the front side 1001 of the substrate 100 to facilitate subsequent processes, but the present invention is not limited thereto.
[0050] Specifically, such as Figure 2 and Figure 3 As shown, in one embodiment, the ion-doped regions 220 can be formed on both sides of the trench isolation structure 210; in this case, the ion-doped regions 220 on both sides form the PN junction barrier with the logic region 120 and the pixel region 110, respectively. Figure 4 As shown, in another embodiment, the ion-doped region 220 can be formed on the side of the trench isolation structure 210 away from the pixel region 110; in this case, the ion-doped region 220 and the logic region 120 form the PN junction barrier. Figure 5As shown, in another embodiment, the ion-doped region 220 may be formed on the side of the trench isolation structure 210 near the pixel region 110; in this case, the ion-doped region 220 and the pixel region 110 form the PN junction barrier.
[0051] More specifically, the doping type of the ion-doped region 220 is opposite to that of the substrate 100, so that the ion-doped region 220 can form the PN junction barrier with the logic region 120 and / or the pixel region 110. For example, when the substrate 100 is doped with P-type, the ion-doped region 220 is doped with N-type; when the substrate 100 is doped with N-type, the ion-doped region 220 is doped with P-type.
[0052] Please refer to Figure 2 In one embodiment, the isolation structure 200 is a continuous rectangle, so that the isolation structure 200 is continuously distributed around the periphery of the pixel area 110, thereby comprehensively isolating light, heat and / or electron diffusion around the pixel area 110 and ensuring the imaging quality of the pixel area 110. In other embodiments, the isolation structure 200 may also be a continuous circle or square, etc., but the present invention is not limited thereto, as long as the isolation structure 200 is continuously distributed around the periphery of the pixel area 110.
[0053] Please refer to Figure 4 In another embodiment, the isolation structure 200 is a discontinuous rectangle and is discretely distributed around the periphery of the pixel area 110. In this case, the isolation structure 200 can be formed between different modules of the pixel area 110 and the logic area 120 according to the location of each module of the logic area 120, thereby isolating the light, heat and / or electron diffusion generated by the device in the logic area 120, thus ensuring the imaging quality of the pixel area 110, and also reducing the manufacturing cost of the isolation structure 200. In other embodiments, the shape of the isolation structure 200 can also be a discontinuous circle or square, etc., but the present invention is not limited thereto, as long as the isolation structure 200 is discretely distributed between different modules of the pixel area 110 and the logic area 120.
[0054] Please refer to Figure 5In another embodiment, the isolation structure 200 disposed along the same side of the pixel area 110 has at least two rows arranged in an alternating manner. In this case, the shape of the isolation structure 200 can be a discontinuous rectangle, circle or square, etc., and the alternating isolation structure 200 can not only completely isolate the light, heat and / or electron diffusion around the pixel area 110, but also reduce the stress of the isolation structure 200, thereby ensuring the reliability of the isolation structure 200. However, the present invention is not limited thereto.
[0055] Example 2
[0056] The difference between this embodiment and Embodiment 1 is that step S2 includes: step S21', ion implantation on the front side 1001 of the substrate 100 (e.g., ... Figure 3 (as shown) Forming the ion-doped region 220; Step S22': Forming the trench isolation structure 210 on the front side 1001 of the substrate 100.
[0057] In this embodiment, in step S21', ion implantation can be performed on the front side 1001 of the substrate 100 to form the ion-doped region 220 on the front side 1001 of the substrate 100. Furthermore, the ion implantation can be combined with other ion implantation processes; that is, in the fabrication process of the image sensor, by modifying the photomask, the ion implantation in step S21' can be combined with other ion implantation processes in the image sensor fabrication process without adding additional processes. This ensures the fabrication efficiency of the image sensor while forming the ion-doped region 220, but the present invention is not limited thereto.
[0058] In this embodiment, in step S22', one side of the ion-doped region 220 can be etched on the front side 1001 of the substrate 100 or the interior of the ion-doped region 220 can be etched to form the trench isolation structure 210, and the ion-doped region 220 can be located on at least one side of the trench isolation structure 210, thereby forming the isolation structure 200 including the trench isolation structure 210 and the ion-doped region 220.
[0059] In some embodiments, after the trench isolation structure 210 is formed by etching, silicon dioxide (SiO2) can be filled into the trench isolation structure 210 to enhance the isolation effect of the trench isolation structure 210 on the light, heat and / or electron diffusion generated by the logic region 120 device, but the present invention is not limited thereto.
[0060] Furthermore, in this embodiment, after the isolation structure 200 is formed by step S2, a metal interconnect and dielectric layer 300, a silicon dioxide layer 400, and a carrier wafer 500 can be sequentially formed on the front side of the substrate 100 to facilitate subsequent processes, but the present invention is not limited thereto.
[0061] Example 3
[0062] The difference between this embodiment and Embodiment 1 is that step S2 includes: step S21”, ion implantation is performed on the front side 1001 of the substrate 100 (e.g., Figure 3 (as shown) to form the ion-doped region 220; step S22”, on the back side 1002 of the substrate 100 (as shown) Figure 3 As shown, the trench isolation structure 210 is formed.
[0063] In this embodiment, in step S21", ion implantation can be performed on the front side 1001 of the substrate 100 to form the ion-doped region 220 on the front side 1001 of the substrate 100. Furthermore, the ion implantation can be combined with other ion implantation processes; that is, in the fabrication process of the image sensor, by modifying the photomask, the ion implantation in step S21" can be combined with other ion implantation processes in the image sensor fabrication process without adding additional processes. This ensures the fabrication efficiency of the image sensor while forming the ion-doped region 220, but the present invention is not limited thereto.
[0064] In this embodiment, after the ion-doped region 220 is formed by step S21", a metal interconnect and dielectric layer 300, a silicon dioxide layer 400 and a carrier wafer 500 can be sequentially formed on the front side 1001 of the substrate 100 to facilitate the execution of step S22", but the present invention is not limited thereto.
[0065] Further, in step S22', the substrate on which the ion-doped region 220, the metal interconnect and dielectric layer 300, the silicon dioxide layer 400 and the carrier wafer 500 are formed can be flipped to etch one side of the ion-doped region 220 or the interior of the ion-doped region 220 on the back side 1002 of the substrate 100, thereby forming the trench isolation structure 210, and placing the ion-doped region 220 on at least one side of the trench isolation structure 210, thereby forming the isolation structure 200 including the trench isolation structure 210 and the ion-doped region 220.
[0066] In some embodiments, after the trench isolation structure 210 is formed by etching, silicon dioxide (SiO2) can be filled into the trench isolation structure 210 to enhance the isolation effect of the trench isolation structure 210 on the light, heat and / or electron diffusion generated by the logic region 120 device, but the present invention is not limited thereto.
[0067] On the other hand, combined with the appendix Figures 2-5 As shown, the present invention also provides an image sensor, fabricated using the image sensor formation method described in the above embodiments. The image sensor includes a substrate 100 and an isolation structure 200; the substrate 100 includes a pixel region 110 and a logic region 120; the isolation structure 200 is formed around the pixel region 110 and / or around different modules of the logic region 120, for isolating light, heat, and / or electron diffusion generated by the devices in the logic region 120. Further, the isolation structure 200 includes a trench isolation structure 210 and an ion-doped region 220 disposed along at least one side of the trench isolation structure 210.
[0068] In summary, this embodiment provides a method for forming an image sensor and an image sensor in general. An isolation structure, including a trench isolation structure and an ion-doped region, is formed around the pixel area and / or around different modules of the logic area. The trench isolation structure can physically isolate the light, heat, and / or electron diffusion generated by the devices in the logic area, thereby preventing interference from these devices on the pixel area and ensuring the imaging quality of the pixel area. The ion-doped region can form a PN junction barrier with the pixel area and / or logic area to encapsulate crystal defects on the sidewalls of the trench isolation structure, thereby preventing the generation of dark current in the trench isolation structure and thus preventing dark current from affecting the performance of the pixel area, further ensuring the imaging quality of the pixel area. Furthermore, by using ion-doped regions to prevent dark current generation in the trench isolation structure, this embodiment can effectively reduce the distance between the pixel area and the trench isolation structure compared to existing technologies, thereby reducing the chip area and facilitating the miniaturization of the image sensor.
[0069] Although the present invention has been described in detail through the preferred embodiments above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.
Claims
1. A method of forming an image sensor, characterized by, Comprising: providing a substrate; the substrate comprises a pixel region and a logic region; forming an isolation structure at the periphery of the pixel region and / or the periphery of different modules of the logic region for isolating light, heat and / or electron diffusion generated by devices of the logic region; the isolation structure comprises a trench isolation structure and an ion-doped region disposed along at least one side of the trench isolation structure.
2. The method of claim 1, wherein, The step of forming an isolation structure at the periphery of the pixel region and / or the periphery of different modules of the logic region comprises: forming the trench isolation structure on the front side of the substrate; forming the ion-doped region on the front side of the substrate by ion implantation.
3. The method of claim 1, wherein, The step of forming an isolation structure at the periphery of the pixel region and / or the periphery of different modules of the logic region comprises: forming the ion-doped region on the front side of the substrate by ion implantation; forming the trench isolation structure on the front side of the substrate.
4. The method of claim 1, wherein, The step of forming an isolation structure at the periphery of the pixel region and / or the periphery of different modules of the logic region comprises: forming the ion-doped region on the front side of the substrate by ion implantation; forming the trench isolation structure on the back side of the substrate.
5. The method of any one of claims 2 to 4, wherein, The ion implantation is combined with other ion implantation processes.
6. The method of claim 1, wherein, The ion-doped region is formed on a side of the trench isolation structure away from the pixel region, on a side of the trench isolation structure close to the pixel region, or on both sides of the trench isolation structure.
7. The method of claim 1, wherein, The isolation structures disposed along the same side of the pixel region are staggered and arranged in at least two rows.
8. The method of claim 1, wherein, The shape of the isolation structure is discontinuous rectangular, circular or square; the isolation structure is discretely distributed at the periphery of the pixel region.
9. An image sensor, characterized by Comprising: a substrate; the substrate comprises a pixel region and a logic region; an isolation structure formed at the periphery of the pixel region and / or the periphery of different modules of the logic region for isolating light, heat and / or electron diffusion generated by devices of the logic region; the isolation structure comprises a trench isolation structure and an ion-doped region disposed along at least one side of the trench isolation structure.