Processor, chip and data processing method

By using a period calculator to reduce data with multiple coefficients, the power consumption and area problems of existing processors when calculating irrational number functions are solved, and efficient and accurate data processing is achieved on a simple multiply-accumulate module.

CN121635966APending Publication Date: 2026-03-10HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202411198851.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-28
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

Existing processors rely on a fused multiply-accumulate FMA module and a branch processing module when calculating periodic functions with irrational cycles, resulting in high power consumption, large chip area, and inapplicability to ordinary multiply-accumulate modules.

Method used

The period calculator reduces the data by using multiple coefficients, avoiding hardware dependence on the FMA module and branch processing module. It uses a simple multiply-accumulate module for calculation, reducing chip area and power consumption.

Benefits of technology

It enables accurate calculation of periodic functions with irrational periods without the need for FMA and branch processing modules, reducing chip area and computational overhead, and improving the processor's versatility and energy efficiency.

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Abstract

The invention discloses a processor, a chip and a data processing method and device. The processor comprises a data acquisition unit, a period calculator, a symbol calculator, a function calculator and a data processing unit. The data acquisition unit can acquire first data from to-be-processed data; the period calculator can determine multiple pieces of coefficient data according to the first data and the period of the first function, and obtain reduction data of the first data according to the first data, the multiple pieces of coefficient data and multiple pieces of period data; the symbol calculator may obtain a first symbol; the function calculator can obtain a first function value according to the reduction data and the first symbol; the data processing unit can process the to-be-processed data according to the first function value. According to the scheme provided by the embodiment of the invention, the dependence on the FMA module and the branch processing module can be avoided, and the chip area is reduced; a large amount of operation overhead and power consumption caused by an FMA module can be avoided; the universality of the technical scheme can be improved.
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Description

Technical Field

[0001] This application relates to the field of processors, and more specifically, to a processor, a chip, and a method for data processing. Background Technology

[0002] With the emergence and development of computer technology, processing received data using a processor to obtain the result is a common data processing method. Currently, commonly used processors typically rely on fused multiply-accumulate (FMA) modules and branch processing modules for periodic functions with irrational calculation cycles. This results in high computational overhead and is not applicable to ordinary multiply-accumulate modules, leading to high processor power consumption and a large chip area. Summary of the Invention

[0003] This application provides a processor, a chip, and a data processing method, which helps to reduce the power consumption of the processor and the chip area.

[0004] In a first aspect, a processor is provided, comprising: a data acquisition unit, a period calculator, a symbol calculator, a function calculator, and a data processing unit; the data acquisition unit is used to acquire first data from data to be processed; the period calculator is used to determine multiple coefficient data based on the first data and the period of a first function, and to determine reduced data of the first data based on the first data, the multiple coefficient data, and the multiple period data; the symbol calculator is used to determine a first symbol; the function calculator is used to determine a first function value based on the reduced data and the first symbol; the data processing unit is used to process the data to be processed based on the first function value; wherein the data to be processed includes at least one of the following: image data, signal data, speech data, or location-coded data; the first data is data processed using a first function, the first function being a periodic function with an irrational period; the multiple period data are multiple segmented data of the period of the first function, the first symbol is used to determine the sign of the first function value, and the first function value is used to represent the function value of the first function with the first data as the independent variable.

[0005] Based on the solution provided in this application embodiment, the simplified data of the first data is obtained by using multiple coefficient data through a period calculator. On the one hand, it is possible to calculate periodic functions with irrational periods without integrating the multiply-accumulate FMA module and the branch processing module, thus avoiding hardware dependence on the FMA module and the branch processing module. Compared with processors that have an FMA module, a branch processing module, a period calculator, a function calculator, and a symbol calculator, the chip area of ​​the processor that does not have an FMA module and the branch processing module is smaller, which helps to reduce the chip area. On the other hand, the processor provided in this application embodiment, compared with processors that rely on the FMA module, can avoid the large amount of computational overhead and power consumption caused by the FMA module. Furthermore, the period calculator provided in this application embodiment can process data through simple multiplication and addition, so that the data processing method can also obtain relatively accurate data processing results on processors that support simple multiplication and addition modules. Compared with FMA, simple multiplication and addition can reduce computational complexity and is applicable to a wider range of devices, which can reduce the power consumption and overhead required for computation and improve the versatility of the technical solution.

[0006] In some possible implementations, multiple coefficient data include k1 and k2, and these multiple coefficient data can satisfy the following condition: k = k1 + k2, k1 = 2. K ×round(k×2 -K ), k = round(x × invπ) or k = round(x × invπ + 0.5), where round means rounding, invπ means keeping the precision of 1 / π the same as the precision of x, x represents the first data, and k is a positive integer.

[0007] Based on the solution provided in the embodiments of this application, the number of multiple coefficient data is determined to be 2 by using a period calculator. On the one hand, it can obtain more accurate data processing results while occupying less computational overhead. On the other hand, due to the precision limitation of floating-point numbers, more coefficient data is unlikely to bring more accurate calculation results. This can avoid the increase in the amount of calculation or the increase in the complexity of the calculation process caused by more coefficient data, thereby avoiding the redundancy of computational overhead.

[0008] In some possible implementations, the first function is a trigonometric function, and the multiple periodic data include π0 and π. m Multiple periodic data satisfy the following condition: π0 = 2 2-L ×round(π×2 L-2 ), m is an integer greater than 1, L is a positive integer, and Σ represents summation.

[0009] For example, different values ​​of L can be used to determine the different values ​​and number of periodic data.

[0010] In some possible implementations, the periodic calculator includes 2N multiply-accumulate units, which are used to determine x1, x0, or x i Any one of the following; through x1, x and x i The reduced data for x can be determined, and the reduced data x0 satisfies the following conditions: x1 = x - k1π0, x0 = x 2N-1 -k2π N-1 Furthermore, x is even when i is not equal to 0. i =x i-1 -k2π i / 2-1 Or, when i is odd and i≠1, x i =x i-1 -k1π (i-1) / 2 , where i∈[0,2N-1], N=m+1.

[0011] Based on the solution provided in the embodiments of this application, the fixed and simple calculation order executed by the periodic calculator can, on the one hand, reduce the computational overhead and algorithm complexity compared to high-precision and computationally expensive summation methods such as the Kehan ​​summation method; on the other hand, it can improve the versatility of the technical solution for calculating trigonometric functions with high computational accuracy and low computational overhead.

[0012] In some possible implementations, the periodic calculator includes 2N multiply-accumulate units, which are used to determine x1, x'0, or x i The periodic calculator also includes two addition units, which are used to determine either x'4 or x0; the first function is a cosine function, the precision of the first data x in floating-point numbers meets the first precision requirement, and the reduced data x0 satisfies the following conditions: x1 = x - k1π0, x2 = x1 - k2π0, x3 = x2 - k1π1, x4 = x3 - k2π1, x'4 = x4 + (π / 2) h , x5=x'4-k1π2, x6=x5-k2π2, x7=x6-k1π3, x'0=x7-k2π3, x0=x'0+(π / 2) l Where, (π / 2) h This represents the approximate value of π / 2 with the first level of precision. (π / 2) l This represents π / 2 and (π / 2) at the first precision. h The error value.

[0013] Based on the solution provided in the embodiments of this application, by using a period calculator to perform additional offsets during the reduction process of the first data, the conversion of sine and cosine function values ​​can be realized, simplifying the calculation method of trigonometric functions, achieving a large overlap between the calculation processes of sine and cosine functions, and reusing the same processing unit when using sine and cosine functions for data processing, thereby improving the utilization rate of processing units in the processor and reducing chip area.

[0014] In some possible implementations, L or K satisfies at least one of the following: K+L≤E, where E represents the maximum number of decimal places of the floating-point number of the period of the first function; and / or K≤L.

[0015] For example, depending on the values ​​of L and K, data processing results with different accuracies can be obtained, and data with different floating-point precision can also be processed.

[0016] Based on the solution provided in the embodiments of this application, by restricting the values ​​of K and L, it is possible to process the data to be processed without format processing such as precision enhancement, thereby reducing computational overhead.

[0017] In some possible implementations, the processor may also include at least one of the following: a first register for storing multiple cycles of data; and a second register for storing approximation coefficients, which are determined based on the approximation algorithm and the periodic approximation first function of the first function.

[0018] For example, periodic data or approximation coefficients can be pre-stored in registers, and period calculators or function calculators can obtain periodic data or approximation coefficients by accessing the registers.

[0019] In some possible implementations, the first function is a trigonometric function, and the approximation coefficient S is the first data whose floating-point precision satisfies FP32. n , n∈[0,4] satisfy the following conditions: S4=2.604926501e-6, S3=-0.0001980894471, S2=0.008333049340, S1=-0.1666665792, S0=1.

[0020] In some possible implementations, the function calculator is specifically used to: determine the first function value based on the reduced data, the first sign, and the approximation coefficients.

[0021] In some possible implementations, the data acquisition unit includes a first output port for outputting first data; the period calculator includes a first input port and a second output port, the first input port for inputting the first data, the first output port being connected to the first input port, and the second output port for outputting reduced data of the first data; the symbol calculator includes a third output port for outputting a first symbol; the function calculator includes a second input port, a third input port, and a fourth output port, the second input port for inputting reduced data of the first data, the second input port being connected to the second output port, the third input port for inputting the first symbol, the third input port being connected to the third output port, and the fourth output port for outputting a first function value; the data processing unit includes a fourth input port for inputting the first function value, and the fourth input unit being connected to the fourth output port.

[0022] In a second aspect, a data processing method is provided, applied to a processor as described in the first aspect or any possible implementation thereof. The method includes: obtaining first data from data to be processed; determining multiple coefficient data based on the first data and the period of a first function; determining reduced data of the first data based on the first data, the multiple coefficient data, and the multiple periodic data; determining a first sign; determining a first function value based on the first sign and the reduced data; and processing the data to be processed based on the first function value. The data to be processed may include at least one of the following: image data, signal data, speech data, or location-coded data; the first data is data processed using a first function, and the first function is a periodic function with an irrational period; the multiple periodic data are multiple segments of the period of the first function; the first sign is used to determine the sign of the first function value; and the first function value is used to represent the function value of the first function with the first data as the independent variable.

[0023] Based on the solution provided in this application, by utilizing multiple coefficient data to obtain the reduced data of the first data, on the one hand, periodic functions with irrational periods can be calculated without integrating the multiply-accumulate FMA module and the branch processing module, thus avoiding dependence on the FMA module and the branch processing module. Compared with processors with FMA modules and branch processing modules, the chip area of ​​the processor to which this method is applied can be reduced. On the other hand, the processor to which the method provided in this application is applicable can avoid the large amount of computational overhead and power consumption caused by the FMA module compared with processors that rely on the FMA module. Furthermore, the method provided in this application can process data through simple multiply-accumulate, so that the data processing method can also obtain relatively accurate data processing results on processors that support simple multiply-accumulate modules. Compared with FMA, simple multiply-accumulate can simplify the calculation algorithm, reduce the computational complexity, and is applicable to a wider range of devices. It can reduce the power consumption and overhead required for computation, improve the versatility of the technical solution, and improve the calculation accuracy of periodic functions with irrational periods compared with existing methods for processing data through simple multiply-accumulate.

[0024] In some possible implementations, multiple coefficient data include k1 and k2, and the multiple coefficient data satisfy the following condition: k = k1 + k2, k1 = 2 K ×round(k×2 -K ), k = round(x × invπ) or k = round(x × invπ + 0.5), where round means rounding, invπ means keeping the precision of 1 / π the same as the precision of x, x represents the first data, and k is a positive integer.

[0025] In some possible implementations, the first function is a trigonometric function, and the multiple periodic data include π0 and π. m Multiple periodic data satisfy the following condition: π0 = 2 2-L ×round(π×2 L-2 ), m is an integer greater than 1, L is a positive integer, and Σ represents summation.

[0026] In some possible implementations, through x1, x, and x i The reduced data can be determined, and the reduced data x0 satisfies the following conditions: x1=x-k1π0, x0=x 2N-1 -k2π N-1 Furthermore, x is even when i is not equal to 0. i =x i-1 -k2π i / 2-1 Or, when i is odd and i≠1, x i =x i-1 -k1π (i-1) / 2, where i∈[0,2N-1], N=m+1.

[0027] In some possible implementations, the first function is a cosine function, the precision of the first data x in floating-point numbers satisfies the first precision requirement, and the reduced data x0 satisfies the following conditions: x1 = x - k1π0, x2 = x1 - k2π0, x3 = x2 - k1π1, x4 = x3 - k2π1, x'4 = x4 + (π / 2). h , x5=x'4-k1π2, x6=x5-k2π2, x7=x6-k1π3, x'0=x7-k2π3, x0=x'0+(π / 2) l Where, (π / 2) h This represents the approximate value of π / 2 with the first level of precision. (π / 2) l This represents π / 2 and (π / 2) at the first precision. h The error value.

[0028] Based on the solution provided in the embodiments of this application, by additional offsetting the first data, the conversion of sine and cosine function values ​​can be realized, simplifying the calculation method of trigonometric functions, realizing a large overlap of the calculation processes of sine and cosine functions, thereby reducing the number of instructions required to process the data to be processed and improving the utilization rate of instructions.

[0029] In some possible implementations, L or K satisfies at least one of the following: K+L≤E, where E represents the maximum number of decimal places of the floating-point number of the period of the first function; and / or K≤L.

[0030] Based on the solution provided in this application, by restricting the values ​​of K and L, on the one hand, it is possible to process the data to be processed without formatting such as precision increase, thus reducing computational overhead; on the other hand, by restricting K+L≤E, the accuracy of multiplication operations can be guaranteed, thereby improving data processing performance; on the other hand, by restricting K≤L, the accuracy of addition operations can be guaranteed, thereby improving data processing performance; furthermore, since the accuracy of multiplication and addition operations can be guaranteed, the determined reduced data can be the most accurate rounding result of x-kπ under this precision floating-point number.

[0031] In some possible implementations, the first function value is determined based on the first symbol and reduced data, including: determining the first function value based on the first symbol, reduced data, and approximation coefficients, wherein the approximation coefficients are determined based on the approximation algorithm and the periodic approximation of the first function.

[0032] In some possible implementations, the first function is a trigonometric function, and the approximation coefficient S is the first data whose floating-point precision satisfies FP32. n, n∈[0,4] satisfy the following conditions: S4=2.604926501e-6, S3=-0.0001980894471, S2=0.008333049340, S1=-0.1666665792, S0=1.

[0033] Thirdly, a computing device is provided, comprising: a processor for executing computer instructions stored in a memory, such that the device performs the method of the second aspect or any possible implementation thereof.

[0034] In some possible implementations, the processor can be a general-purpose processor, which can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc.; when implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. This memory can be integrated into the processor or located outside the processor and exist independently.

[0035] In some possible implementations, the device also includes a memory.

[0036] In some possible implementations, the device also includes a communication interface coupled to the processor, which is used for inputting and / or outputting information.

[0037] In some possible implementations, the device is a chip.

[0038] Fourthly, a computer program product is provided, which, when executed by a processor, implements the method in the second aspect or any possible implementation thereof.

[0039] Fifthly, a chip is provided that acquires and executes instructions to implement the method of the second aspect or any possible implementation thereof; or, the chip includes a processor as described in the first aspect or any possible implementation thereof.

[0040] In a sixth aspect, a computer-readable storage medium is provided, wherein a computer program or instructions are stored therein, which, when executed by a processor, implement the method of the second aspect or any possible implementation thereof.

[0041] As examples, these computer-readable storage devices include, but are not limited to, one or more of the following: read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), flash memory, electrically EPROM (EEPROM), and hard drive.

[0042] In some possible implementations, the aforementioned storage medium may specifically be a non-volatile storage medium. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of a graphics processor and a neural network processor applicable to embodiments of this application.

[0044] Figure 2 This is a schematic diagram of a possible processor architecture provided in an embodiment of this application.

[0045] Figure 3 This is a schematic diagram of a possible data processing method provided in an embodiment of this application.

[0046] Figure 4 This is a schematic diagram of the structure of a processing unit provided in an embodiment of this application.

[0047] Figure 5 This is a schematic diagram of the structure of a function calculator provided in an embodiment of this application.

[0048] Figure 6 This is a schematic diagram of a computing device 600 provided in an embodiment of this application.

[0049] Figure 7 This is a schematic diagram of a chip system 700 provided in an embodiment of this application. Detailed Implementation

[0050] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0051] Before introducing the scheme of this application, the following points should be noted.

[0052] (1) The terminology used in the following embodiments is for the purpose of describing specific embodiments only and is not intended to be a limitation of this application. As used in the specification and appended claims of this application, "a plurality of" or "multiple" means two or more; the singular expressions "a," "an," "the," "the," "the," "the," and "this" are intended to also include expressions such as "one or more," unless the context clearly indicates otherwise. It should also be understood that in the following embodiments of this application, "at least one," "at least one," and "one or more" refer to one, two, or more. "And / or" describes the relationship between related objects, indicating that three relationships may exist, for example, A and / or B, which can mean: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. In the textual description of this application, the character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can represent: a, or b, or c, or a and b, or a and c, or b and c, or a, b, and c. Here, a, b, and c can be a single term or multiple terms.

[0053] (2) The ordinal numbers “first”, “second”, “#A”, “#B”, “#1”, “#2” mentioned in the embodiments of this application are used to distinguish multiple objects, and are not used to limit the size, content, order, timing, priority or importance of multiple objects.

[0054] (3) In this application, the terms “comprising” and “having” and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product or device.

[0055] (4) References such as “in some possible implementations” described in this specification mean that one or more embodiments of this application include a particular feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases such as “in some possible implementations” appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean “one or more, but not all, embodiments”, unless otherwise specifically emphasized.

[0056] (5) In the various embodiments of this application, unless otherwise specified or logically conflicting, the terms and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0057] (6) In this application, the words “exemplary,” “for example,” etc., are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as an “example” in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the word “example” is intended to present the concept in a concrete manner. In the embodiments of this application, “of,” “corresponding, relevant,” and “corresponding” may sometimes be used interchangeably, and it should be noted that their intended meanings are consistent unless their distinction is emphasized.

[0058] To better describe the solutions of the embodiments of this application, the terms that may be involved in the embodiments of this application will be explained below.

[0059] (1) round function

[0060] The ROUND function is a commonly used rounding function. Unlike rounding up or down, in practical applications, the ROUND function can round to the nearest even number or to the nearest even number. For example, ROUND(1.0) = 1, ROUND(1.3) = 1, ROUND(1.6) = 2, ROUND(-1.0) = -1, ROUND(-1.3) = -1, ROUND(-1.6) = -2.

[0061] (2) Periodic Reduction

[0062] A common method for calculating trigonometric functions is to perform periodic reduction and approximation on the input independent variable. Periodic reduction is a calculation method based on the period of the function to reduce the independent variable. When calculating the function value of a trigonometric function with a real number as the independent variable, periodic reduction can be performed on the real number as the independent variable so that for any real number, the periodically reduced value falls within a relatively small interval. For example, when calculating the sine function sinx with a period of 2π, for different independent variables A or B, periodic reduction can be performed on A or B, and the result of the reduction is denoted as A0 or B0.

[0063] In one possible implementation, A0 = A - π × round(A × invπ), B0 = B - π × round(B × invπ), A0 ∈ [-π / 2, π / 2], B0 ∈ [-π / 2, π / 2], and invπ represents preserving the precision of 1 / π to be the same as the precision of A or B. Approximating A0 or B0 yields the function value of the trigonometric function with A or B as the independent variable. Since the interval [-π / 2, π / 2] is fixed, the approximation coefficients required for an algorithm to approximate real numbers within this interval are also fixed. That is, the approximation coefficients required for an algorithm to approximate A0 or B0 within the interval [-π / 2, π / 2] are the same. Therefore, periodic reduction simplifies the approximation calculation and improves computational performance.

[0064] (3) Floating-point numbers

[0065] Floating-point numbers are the opposite of fixed-point numbers. In computers, fixed-point numbers have a fixed convention regarding the position of the decimal point; that is, the position of the decimal point is conventionally defined. For example, fixed-point integers stipulate that the decimal point is at the end of the numerical value, while fixed-point decimals stipulate that the most significant digit is after the decimal point. Due to the limitations of computer word length, when the data to be represented has a very large numerical range, it cannot be represented using fixed-point numbers, but can be represented using floating-point numbers.

[0066] However, floating-point numbers cannot precisely represent all real numbers; they can only be represented using different precisions that are closer to the actual number. In FP32 single precision, a number is represented using 4 bytes (32 bits): 1 bit for the sign, 8 bits for the exponent, 23 bits for the decimal, and 7 significant bits. In FP64 double precision, a number is represented using 8 bytes (64 bits): 1 bit for the sign, 11 bits for the exponent, 52 bits for the decimal, and 16 significant bits. In FP16 half precision, a number is represented using 2 bytes (16 bits): 1 bit for the sign, 5 bits for the exponent, 10 bits for the decimal, and 3 significant bits.

[0067] (4) Central processing unit (CPU)

[0068] The CPU is one of the main components of an electronic computer, and its core part. Its main functions are to interpret computer instructions and process data in computer software. The CPU is the core component responsible for reading, decoding, and executing instructions. The Central Processing Unit mainly consists of two parts: the control unit and the arithmetic logic unit (ALU), which also includes high-speed cache memory and the data and control buses that connect them.

[0069] (5) Graphics Processing Unit (GPU)

[0070] A GPU, also known as a graphics processing unit, is a microprocessor specifically designed for performing image and graphics-related computations on personal computers, workstations, game consoles, and some mobile devices (such as tablets and smartphones).

[0071] (6) Neural network processing unit (NPU)

[0072] An NPU (Neural Processing Unit) is a processor specifically designed for neural network computations. It is primarily used to accelerate artificial intelligence and machine learning tasks, including image recognition, speech recognition, and natural language processing. NPUs typically feature high parallelism, low latency, and high energy efficiency, making them particularly suitable for real-time AI computation tasks in devices such as edge computing, autonomous driving, robotics, and smartphones.

[0073] Figure 1 This is a schematic diagram of a GPU and NPU applicable to embodiments of this application. For example... Figure 1 As shown in (a), a GPU includes dynamic random access memory (DRAM), L2 cache, shared memory (SEME), register file (RF), and tensor cores, among which the SEME can include multiple compute unified device architecture cores (CUDA cores). Figure 1 As shown in (b), the NPU includes general memory, L1 cache, left matrix level 0 buffer (L0 A), right matrix level 0 buffer (L0 B), cube computation unit, vector computation unit, and output matrix level 0 buffer (L0 C). Simple multiplication and addition operations can be performed in both the GPU's CUDA cores and the NPU's vector computation unit.

[0074] Trigonometric functions play a crucial role in Fast Fourier Transform, computational graphics, large-model positional coding, and rotational positional coding. The computing chips mentioned above, such as CPUs, GPUs, and NPUs, can all be used for trigonometric function calculations (e.g., sine x or cosine x). For example, when data to be processed is input into a processor such as a GPU or NPU, the processor can obtain first data x based on the image data, signal data, speech data, or positional coding data, and process x according to the actual needs of the data to be processed, obtaining the processed data. If trigonometric function calculations are performed on x, simple multiplication and addition operations can be performed through the CUDA cores of the GPU or the vector computing unit of the NPU to obtain the function value with x as the independent variable of the trigonometric function.

[0075] For example, when calculating trigonometric functions, a real number x is input, and the output is either y = sinx or y = cosx. The input real number x is usually a floating-point number. Typically, the precision of the output y is required to be the same as the precision of the input x (e.g., if x is FP32, y is also required to be FP32), and to meet the precision required for that format.

[0076] The calculation process for trigonometric functions can be divided into two parts: reduction and approximation. The reduction part plays a crucial role in the accuracy of trigonometric function calculations. This is based on the periodicity of trigonometric functions.

[0077] sin(x+2π)=sinx, sin(x+π)=-sinx……cosx=sin(x+π / 2), we can reduce an input x that belongs to a large range to a fixed interval [-π / 2, π / 2], that is, calculate k=round(x / π), x0=x-kπ.

[0078] Since the precision of floating-point numbers is limited to a certain number of bits, and π is an irrational number that cannot be represented by a finite number of bits in floating-point numbers, directly calculating x-kπ in floating-point numbers will inevitably lead to errors, and these errors will have a very large impact.

[0079] To give a simple example, for any real number β, we define (β) FP32 Let x be the FP32 number closest to β. We take x = (5π). FP32 Using a recognized and accurate library function, we can calculate sinx≈2.7814e-7; however, if we follow the formula x0=x-5×(π)... FP32 Calculations show that sinx≈(-1) 5 sinx0≈9.5367e-7, with a relative error of 242%. For larger x (and correspondingly larger k), the impact of rounding error will be greater, and the cost of precise calculation will also increase.

[0080] Due to the precision limitations of floating-point numbers, function values ​​obtained through simple multiplication and addition are insufficient to meet the precision requirements of practical applications. Excessive errors can severely impact the processor's accuracy in data processing and consequently, processing performance. Furthermore, since the order of addition and subtraction in floating-point numbers significantly affects calculation precision, one possible method to ensure accuracy is to employ high-precision summation methods such as the Kehan ​​summation method. However, this approach greatly increases computational overhead.

[0081] Most industry solutions employ complex instruction sets and branching processes. For example, CUDA's built-in trigonometric functions use 12 branches and leverage bitwise operations such as shifting and NAND operations, combined with multiply-accumulate operators, to achieve accurate periodic reduction over a wide range. Alternatively, they require extensive periodic reduction code (for example, in one open-source math library, periodic reduction code accounts for over 70% of the overall calculation) and employ precision scaling (FP32 to FP64), bitwise operations, and multiple branches to achieve accurate periodic reduction over a wide range.

[0082] (7) Fused multiply-add (FMA)

[0083] Fusion multiplication-addition is a concept relative to simple multiplication-addition (also known as non-fusion multiplication-addition). In non-fusion multiplication-addition, when processing floating-point numbers, the product b × c is first performed, the result is rounded to C bits, the rounded result is added to the value in register 'a', and the result is rounded to C bits again. Fusion multiplication-addition, on the other hand, first performs the operation a + b × c, and then rounds the result to C bits. Because fusion multiplication-addition reduces the number of rounding operations, it improves the accuracy of the calculation result, as well as the efficiency and speed of computation, making it possible for the processor to obtain function values ​​that meet the accuracy requirements of actual tasks.

[0084] For example, based on CUDA's built-in trigonometric functions, the calculation process first performs a branching judgment based on the range of the input x:

[0085] When |x| < 105615.00, the FMA instruction is used, combined with piecewise division of π to ensure calculation accuracy. -π / 2 ≈ π0 + π1 + π2, π0 = -1.57079625, π1 = -7.54978942e-8, π2 = -5.39030295e-15, x1 = k × π0 + x, x2 = k × π1 + x1, x3 = k × π2 + x2. x3 is the reduced value in the interval [-π / 2, π / 2], x3 = (x - kπ). FP32 .

[0086] When |x|>105615.00, bitwise operations such as shifting, NAND, and splitting are used, and up to 12 branches are discussed to ensure the accuracy of (x-kπ). FP32 The calculation.

[0087] However, fused multiply-accumulate requires fused multiply-accumulate hardware instruction support, and branch classification requires branch module support. Fusion multiply-accumulate cannot be implemented through simple multiply-accumulate hardware.

[0088] (8) Single instruction multiple data (SIMD) and single instruction multiple thread (SIMT)

[0089] In the SIMD-based architecture, the same instruction acts on multiple data points. In the SIMT-based architecture, multiple threads execute the same instruction in parallel, each with its own independent program counter and register state. SIMT supports thread-level control flow, allowing each thread to choose a different code path based on its execution status, whereas all execution units in SIMD must strictly synchronize and execute the same instruction flow.

[0090] Existing methods for calculating trigonometric functions rely on FMA hardware instructions and require multiple branches, bitwise operations such as shifting, NAND, and splitting. For different floating-point precisions, precision upsampling may also be necessary to ensure the accuracy of the calculation results. Due to the specialized nature of FMA hardware and the architectural requirements of multiple branches, existing calculation methods are unsuitable for hardware platforms that do not support FMA or for SIMD-based architectures.

[0091] In view of this, embodiments of this application provide a processor, a chip, and a data processing method, which helps to reduce the power consumption of the processor and the chip area.

[0092] Figure 2 A schematic diagram of the architecture of a possible processor 200 provided in an embodiment of this application is shown.

[0093] like Figure 2 of (a), Figure 2(a) illustrates a possible architecture of a processor 200 applicable to embodiments of this application. The processor 200 may include a data acquisition unit, a period calculator, a symbol calculator, a function calculator, and a data processing unit; the data acquisition unit is used to acquire first data from data to be processed; the period calculator is used to determine multiple coefficient data based on the first data and the period of a first function, and to determine reduced data of the first data based on the first data, the multiple coefficient data, and the multiple period data; the symbol calculator is used to determine a first symbol; the function calculator is used to determine a first function value based on the reduced data and the first symbol; the data processing unit is used to process the data to be processed based on the first function value; wherein the data to be processed includes at least one of the following: image data, signal data, language data, or location-coded data; the first data is data processed using a first function, the first function being a periodic function with an irrational period; the multiple period data are multiple segmented data of the period of the first function, the first symbol is used to determine the sign of the first function value, and the first function value is used to represent the function value of the first function with the first data as its independent variable.

[0094] For example, the processor can perform data processing such as fast Fourier transform, graphics computation, large model position encoding, or rotational position encoding based on the first data and the first function.

[0095] For example, the data acquisition unit and the data processing unit can be deployed in one unit. For instance, the data acquisition unit and the data processing unit can be deployed in unit #A, where unit #A can preprocess the data to be processed to obtain first data; the first data is processed by a period calculator, a symbol calculator, and a function calculator to obtain a first function value; unit #A can then process the data to be processed based on the first function value.

[0096] For example, multiple periodic data can be pre-determined based on the period of the first function. When the first function used to process the first data is a periodic function, reducing the first data according to the period of the first function can improve the processing speed and reduce the computational overhead. The value of the first function can be determined based on the reduced data and the first function, and the value of the first function can represent the function value of the first function with x as the independent variable.

[0097] For example, multiple periodic data can be segmented data of the period of the first function. For instance, if the period of the first function is a multiple of π, π can be divided into multiple segments, and the results of the division can be used as multiple periodic data. In floating-point numbers, the sum of multiple periodic data can be equal to one or more times the period of the first function, or the period of the first function can be equal to one or more times the sum of multiple periodic data.

[0098] For example, reducing the first data yields reduced data, which can lie within a fixed interval. Within this fixed interval, an approximation algorithm is used to approximate the first function, determining the values ​​of the approximation coefficients. Based on the reduced data and the approximation coefficients, an approximate value of the first function with x as its independent variable can be determined. When the reduced data is located within a fixed interval, and the range of the first function includes both positive and negative values, determining the approximate value of the function with x as its independent variable requires determining the sign of the first function value. For example, the sign of the first function value can be determined by its first sign.

[0099] However, due to the precision limitations of floating-point numbers, when the period of the first function is an irrational number, since irrational numbers cannot be accurately represented in floating-point format, reducing the first data based on the period of the first function will produce errors, affecting the accuracy of data processing.

[0100] The period calculator can determine multiple coefficients used to process the first data based on the period of the first function and the first data. On the one hand, this can reduce reduction errors and improve the accuracy of data processing; on the other hand, it can reduce processor power consumption and chip area.

[0101] Based on the solution provided in this application embodiment, the simplified data of the first data is obtained by using multiple coefficient data through a period calculator. On the one hand, it is possible to calculate periodic functions with irrational periods without integrating the multiply-accumulate FMA module and the branch processing module, thus avoiding hardware dependence on the FMA module and the branch processing module. Compared with processors that have an FMA module, a branch processing module, a period calculator, a function calculator, and a symbol calculator, the chip area of ​​the processor that does not have an FMA module and the branch processing module is smaller, which helps to reduce the chip area. On the other hand, the processor provided in this application embodiment, compared with processors that rely on the FMA module, can avoid the large amount of computational overhead and power consumption caused by the FMA module. Furthermore, the period calculator provided in this application embodiment can process data through simple multiplication and addition, so that the data processing method can also obtain relatively accurate data processing results on processors that support simple multiplication and addition modules. Compared with FMA, simple multiplication and addition can reduce computational complexity and is applicable to a wider range of devices, which can reduce the power consumption and overhead required for computation and improve the versatility of the technical solution.

[0102] In some possible implementations, multiple coefficient data satisfy the following condition: k = k1 + k2, k1 = 2 K ×round(k×2 -K), k = round(x × invπ) or k = round(x × invπ + 0.5), where round means rounding, invπ means keeping the precision of 1 / π the same as the precision of x, x represents the first data, and k is a positive integer.

[0103] Specifically, for ease of calculation, the period calculator can determine multiple coefficient data and reduce the first data x based on the multiple coefficient data. The precision of the sum of the multiple coefficient data used for reduction needs to be the same as the precision of the first data x.

[0104] For example, a period calculator can determine a first coefficient data k based on the first data and the period of a first function, and determine multiple coefficient data based on the first coefficient data, wherein the multiple coefficient data include k1 and k2. When the first function is a trigonometric function, the first sign can be represented as (-1). k .

[0105] For example, the result of reducing the first data x can be expressed as x0 = (x - kπ). FP FP represents the floating-point precision of x. After determining the reduction k of the first data based on the period of the first data and the first function, k can be divided into multiple coefficient data k1 and k2. In FP32 or FP64, segmenting k yields the sum of k1 and k2, which equals the floating-point value of x in FP32 or FP64.

[0106] For example, when the first function is a sine function, k can satisfy k = round(x × invπ).

[0107] For example, when the first function is a cosine function, k can satisfy k = round(x × invπ + 0.5).

[0108] Based on the conversion relationship between sine and cosine functions: cosx = sin(x + π / 2), the calculated sine function value with the first data x as the independent variable can be used to represent the cosine function value with the first data x as the independent variable.

[0109] Understandably, without considering the precision limitations of floating-point numbers, the more segments the periodic calculator divides k into, the higher the accuracy of the approximate value of the trigonometric function of the independent variable x. Considering the precision limitations of floating-point numbers, within a certain range, the more segments k is divided into, the higher the accuracy of the approximate value of the trigonometric function of the independent variable x.

[0110] Based on the solution provided in the embodiments of this application, the number of multiple coefficient data is determined to be 2 by using a period calculator. On the one hand, it can obtain more accurate data processing results while occupying less computational overhead. On the other hand, due to the precision limitation of floating-point numbers, more coefficient data is unlikely to bring more accurate calculation results. This can avoid the increase in the amount of calculation or the increase in the complexity of the calculation process caused by more coefficient data, thereby avoiding the redundancy of computational overhead.

[0111] In some possible implementations, the first function is a trigonometric function, and the multiple periodic data include π0 and π. m Multiple periodic data satisfy the following condition: π0 = 2 2-L ×round(π×2 L-2 ), m is an integer greater than 1, L is a positive integer, and Σ represents summation.

[0112] Specifically, the segmented data obtained by dividing π into segments is π0...π. m The sum corresponds to the floating-point value of π at its precision. For example, the precision of the first data x satisfies FP32, π0...π m The sum equals the value of π in FP32.

[0113] For example, when the first function is sinx or cosx, the period of the first function is 2π. Based on 2π, multiple periodic data π0...π can be determined. m (For example, π≈π0+...+π) m Multiple periodic data can be pre-stored in the first register. Based on k1, k2, and π0...π m x can be reduced to a fixed interval [-π / 2, π / 2]. By further processing the reduced x (e.g., approximating it using approximation coefficients), we can obtain approximate values ​​of trigonometric functions with x as the independent variable. These approximate values ​​can represent the function values ​​of trigonometric functions with x as the independent variable.

[0114] Understandably, a similar method can be used with k1 and k2 to reduce x to the interval [-π / 2, π / 2]. For example, the value of x can be multiplied by 2, and 2π can be divided into segments, resulting in segmented data π0...π. m The sum corresponds to the floating-point value of 2π at its precision, and the determined k1 and k2 can satisfy: k = k1 + k2, k1 = 2 K ×round(k×2 -K), where k = round[2x × 0.5(invπ)] or k = round[2x × 0.5(invπ) + 0.5]. The simplified data obtained by reducing the first data x can be expressed as 2x0 = (2x - k × 2π). FP Alternatively, π / 2 can be divided into segments, resulting in segmented data π0...π. m The sum corresponds to the floating-point value of π / 2 at its precision. Meanwhile, the determined k1 and k2 satisfy: k = k1 + k2, k1 = 2. K ×round(k×2 -K ), where k = round[x / 2 × 2(invπ)] or k = round[x / 2 × 2(invπ) + 0.5]. The simplified data obtained by reducing the first data x can be expressed as x0 / 2 = (x / 2 - k × π / 2). FP This application does not impose any limitations on the embodiments thereof.

[0115] Understandably, x can also be reduced to other intervals using methods similar to those described above. For example, 2π can be divided into segments, resulting in segmented data π0...π. m The sum corresponds to the floating-point value of 2π at its precision, according to k1, k2, k = round(x × inv2π) and π0...π m x can be reduced to a fixed interval [-π, π]. This application does not impose such limitations on the embodiments.

[0116] It is understandable that, without considering the precision limitations of floating-point numbers, the larger the value of m, the higher the accuracy of the approximate value of the trigonometric function of x as the independent variable; considering the precision limitations of floating-point numbers, within a certain range, the larger the value of m, the higher the accuracy of the approximate value of the trigonometric function of x as the independent variable.

[0117] In some possible implementations, the periodic calculator includes 2N multiply-accumulate units, which are used to determine x1, x0, or x i Any one of the following terms; the reduced data x0 satisfies the following conditions: x1=x-k1π0,x0=x 2N-1 -k2π N-1 Furthermore, x is even when i is not equal to 0. i =x i-1 -k2π i / 2-1 Or, when i is odd and i≠1, x i =x i-1 -k1π (i-1) / 2 , where i∈[0,2N-1], N=m+1.

[0118] Specifically, the reduced data is based on x, k1, k2, and π0...π m It is obtained by performing multiple multiplication and addition operations, and the order of these multiplication and addition operations is fixed.

[0119] For example, π can be divided into segments a and k into coefficient data b. The product of segment a and the coefficient data b of π can be calculated respectively. Then, the product can be subtracted from x in a certain order to obtain the simplified data obtained by reducing the first data x.

[0120] Understandably, subtraction can be seen as a special case of addition.

[0121] Based on the solution provided in the embodiments of this application, the fixed and simple calculation order executed by the periodic calculator can, on the one hand, reduce the computational overhead and algorithm complexity compared to high-precision and computationally expensive summation methods such as the Kehan ​​summation method; on the other hand, it can improve the versatility of the technical solution for calculating trigonometric functions with high computational accuracy and low computational overhead.

[0122] In some possible implementations, the periodic calculator includes 2N multiply-accumulate units, which are used to determine x1, x'0, or x i The periodic calculator also includes two addition units, which are used to determine either x'4 or x0; the first function is a cosine function, the precision of the first data x in floating-point numbers meets the first precision requirement, and the reduced data x0 satisfies the following conditions: x1 = x - k1π0, x2 = x1 - k2π0, x3 = x2 - k1π1, x4 = x3 - k2π1, x'4 = x4 + (π / 2) h , x5=x'4-k1π2, x6=x5-k2π2, x7=x6-k1π3, x'0=x7-k2π3, x0=x'0+(π / 2) l Where, (π / 2) h This represents the approximate value of π / 2 with the first level of precision. (π / 2) l This represents π / 2 and (π / 2) at the first precision. h The error value.

[0123] Specifically, when the first function is a cosine function, based on the conversion relationship between sine and cosine functions cosx=sin(x+π / 2), the first data needs to be reduced by an offset of π / 2 or π / 2+2απ, where α is an integer.

[0124] Based on the solution provided in the embodiments of this application, by using the period calculator to make an additional offset to the first data, the conversion of sine and cosine function values ​​can be realized, simplifying the calculation method of trigonometric functions, realizing a large overlap between the calculation processes of sine and cosine functions, and reusing the same processing unit when using sine function for data processing and when using cosine function for data processing, thereby improving the utilization rate of processing units in the processor and reducing chip area.

[0125] In some possible implementations, L or K satisfies at least one of the following: K+L≤E, where E represents the maximum number of decimal places of the floating-point number of the period of the first function; and / or K≤L.

[0126] Specifically, by adjusting the undetermined positive integers K and L, approximate calculation results of trigonometric function values ​​with different precisions and ranges of x as the independent variable can be obtained. Furthermore, given the values ​​of K and L, for input ranges in [-2...],... 2K π,2 2K The reduced data for x within π, determined by the fixed calculation order described above, is the most accurate rounding result for floating-point numbers of that precision.

[0127] For example, when the floating-point number of x satisfies FP32, K+L≤23; when the floating-point number of x satisfies FP64, K+L≤52.

[0128] For example, when FP32 is satisfied, the period calculator can take K=11 and L=11 when performing calculations; when FP64 is satisfied, K=26 and L=26 can be taken.

[0129] Based on the solution provided in the embodiments of this application, by restricting the values ​​of K and L, it is possible to process the data to be processed without format processing such as precision enhancement, thereby reducing computational overhead.

[0130] In some possible implementations, the processor may also include at least one of the following: a first register for storing multiple cycles of data; and a second register for storing approximation coefficients, which are determined based on the approximation algorithm and the periodic approximation first function of the first function.

[0131] Periodic data or approximation coefficients can be pre-stored through the first or second register. During calculations, the periodic calculator or function calculator can retrieve the required periodic data or approximation coefficients through either the first or second register.

[0132] In some possible implementations, the first function is a trigonometric function, and the approximation coefficient S is the first data whose floating-point precision satisfies FP32. n, n∈[0,4] satisfy the following conditions: S4=2.604926501e-6, S3=-0.0001980894471, S2=0.008333049340, S1=-0.1666665792, S0=1.

[0133] Specifically, when the floating-point value of the first data x satisfies FP32, based on the Remez algorithm, five approximation coefficients can be determined in the interval [-π / 2, π / 2]. These five approximation coefficients and the reduced data can be used to determine an approximate value of the function with x as the independent variable. When the floating-point value of the first data x satisfies FP64, the number of terms in the approximation coefficients can be greater than five.

[0134] For example, the function calculator is based on x0 obtained from reduction and the sign (-1) determined according to k. k The polynomial S composed of the approximation coefficients n We can obtain an approximate value for the trigonometric function with x as the independent variable, which can be expressed as (-1). k sinx0.

[0135] It is understandable that different approximation coefficients can be determined by approximating the first function over an interval using different algorithms or with different computational precisions. This application does not limit the approximation algorithm or the corresponding approximation coefficients.

[0136] In some possible implementations, the function calculator is specifically used to: determine the first function value based on the reduced data, the first sign, and the approximation coefficients.

[0137] In some possible implementations, the data acquisition unit includes a first output port for outputting first data; the period calculator includes a first input port and a second output port, the first input port for inputting the first data, the first output port being connected to the first input port, and the second output port for outputting reduced data of the first data; the symbol calculator includes a third output port for outputting a first symbol; the function calculator includes a second input port, a third input port, and a fourth output port, the second input port for inputting reduced data of the first data, the second input port being connected to the second output port, the third input port for inputting the first symbol, the third input port being connected to the third output port, and the fourth output port for outputting a first function value; the data processing unit includes a fourth input port for inputting the first function value, and the fourth input unit being connected to the fourth output port.

[0138] For example, Figure 2In the processor 200 shown in (a), the data acquisition unit may include an input port #A and an output port #B. Input port #A can be used to input data to be processed, and output port #B can be used to output first data. Output port #B can be connected to the input port #C of a period calculator, which can be used to input the first data. The period calculator may also include an output port #D and an output port #L. Output port #D can be used to output the reduced data of the first data, and output port #L can be used to output k, which represents the reduction of the first data. Output port #D can be connected to the input port #E of a function calculator, which can be used to input the reduced data of the first data. Output port #L can be connected to... The symbol calculator has an input port #M connected, which can be used to input k for reducing the first data; the function calculator may also include an input port #P, which can be used to input the first symbol; the symbol calculator may also include an output port #O, which can be used to output the first symbol, and the input port #P may be connected to the output port #O; the function calculator may also include an output port #F, which can be used to output the first function value; the output port #F may be connected to the input port #G of the data processing unit, which can be used to input the first function value; the data processing unit may also include an output port #Q, which can be used to output the processed data.

[0139] When the period calculator / function calculator obtains multiple periodic data / approximation coefficients through the first register / second register, the period calculator may also include an input port #H, which can be used to input multiple periodic data. The input port #H can be connected to the output port #I of the first register, and the output port #I can be used to output multiple periodic data. The function calculator may also include an input port #J, which can be used to input approximation coefficients. The input port #J can be connected to the output port #K of the second register, and the output port #K can be used to output approximation coefficients.

[0140] It is understandable that output port #B is one possible implementation of the first output port; input port #C is one possible implementation of the first input port; output port #D is one possible implementation of the second output port; output port #O is one possible implementation of the third output port; input port #E is one possible implementation of the second input port; input port #P is one possible implementation of the third input port; output port #F is one possible implementation of the fourth output port; and input port #G is one possible implementation of the fourth input port.

[0141] The following is combined with Figure 2 (b) describes in detail one possible processor architecture applicable to embodiments of this application.

[0142] like Figure 2 (b) Figure 2 (b) illustrates a possible processor architecture applicable to embodiments of this application. In this processor, for input first data x, first coefficient data k can be determined based on x and a first function processing x. Multiple coefficient data k1 and k2 can be determined based on k. Based on k1, k2, and multiple periodic data obtained from a periodic data register (e.g., the periodic data register may be a possible implementation of a first register), x can be periodically reduced to obtain reduced data x0. Based on x0, a first symbol (-1) is determined. k The approximation coefficients stored in the coefficient register (for example, the coefficient register could be a possible implementation of a second register) allow for approximation based on these coefficients, yielding an approximate value (-1) for the trigonometric function when x is the independent variable. k sinx0.

[0143] For example, the data acquisition unit can determine x and then input x into the period calculator. The period calculator can be used to determine k1 and k2 based on x and the function that processes x, and to perform period reduction on x. The function calculator can be used to approximate x based on the approximation coefficient.

[0144] For example, when the first function is a sine function, the periodic data register can store π0, π1, π2, and π3; when the first function is a cosine function, the periodic data register can store π0, π1, π2, π3, and (π / 2). h and (π / 2) l .

[0145] Figure 3 A schematic diagram of a possible data processing method 300 provided in an embodiment of this application is shown. Figure 3 As shown, method 300 may include the following steps:

[0146] S310, obtain the first data from the data to be processed.

[0147] S320, determine multiple coefficient data based on the first data and the period of the first function.

[0148] S330, determine the simplified data of the first data based on the first data, multiple coefficient data and multiple periodic data.

[0149] S340, determine the first symbol.

[0150] S350, determine the first function value based on the first symbol and the reduced data.

[0151] S360 processes the data to be processed based on the first function value.

[0152] The data to be processed may include at least one of the following: image data, signal data, speech data, or location-coded data; the first data is data processed using a first function, which is a periodic function with an irrational period; the multiple periodic data are multiple segments of the period of the first function; the first sign is used to determine the sign of the first function value; and the first function value is used to represent the function value of the first function when the first data is the independent variable.

[0153] Based on the solution provided in this application, by utilizing multiple coefficient data to obtain the reduced data of the first data, on the one hand, periodic functions with irrational periods can be calculated without integrating the multiply-accumulate FMA module and the branch processing module, thus avoiding dependence on the FMA module and the branch processing module. Compared with processors with FMA modules and branch processing modules, the chip area of ​​the processor to which this method is applied can be reduced. On the other hand, the processor to which the method provided in this application is applicable can avoid the large amount of computational overhead and power consumption caused by the FMA module compared with processors that rely on the FMA module. Furthermore, the method provided in this application can process data through simple multiply-accumulate, so that the data processing method can also obtain relatively accurate data processing results on processors that support simple multiply-accumulate modules. Compared with FMA, simple multiply-accumulate can simplify the calculation algorithm, reduce the computational complexity, and is applicable to a wider range of devices. It can reduce the power consumption and overhead required for computation, improve the versatility of the technical solution, and improve the calculation accuracy of periodic functions with irrational periods compared with existing methods for processing data through simple multiply-accumulate.

[0154] In some possible implementations, multiple coefficient data include k1 and k2, and the multiple coefficient data satisfy the following condition: k = k1 + k2, k1 = 2 K ×round(k×2 -K ), k = round(x × invπ) or k = round(x × invπ + 0.5), where round means rounding, invπ means keeping the precision of 1 / π the same as the precision of x, x represents the first data, and k is a positive integer.

[0155] For example, based on the first data and the period of the first function, the first data can be rounded to obtain the reduced data of the first data. Rounding the first data yields the first coefficient data k, and the period calculator can segment the first coefficient data k to obtain multiple coefficient data.

[0156] In some possible implementations, the first function is a trigonometric function, and the multiple periodic data include π0 and π. mMultiple periodic data satisfy the following condition: π0 = 2 2-L ×round(π×2 L-2 ), m is an integer greater than 1, L is a positive integer, and Σ represents summation.

[0157] In some possible implementations, the reduced data x0 satisfies the following conditions: x1 = x - k1π0, x0 = x 2N-1 -k2π N-1 Furthermore, x is even when i is not equal to 0. i =x i-1 -k2π i / 2-1 Or, when i is odd and i≠1, x i =x i-1 -k1π (i-1) / 2 , where i∈[0,2N-1], N=m+1.

[0158] In some possible implementations, the first function is a cosine function, the precision of the first data x in floating-point numbers satisfies the first precision requirement, and the reduced data x0 satisfies the following conditions: x1 = x - k1π0, x2 = x1 - k2π0, x3 = x2 - k1π1, x4 = x3 - k2π1, x'4 = x4 + (π / 2). h , x5=x'4-k1π2, x6=x5-k2π2, x7=x6-k1π3, x'0=x7-k2π3, x0=x'0+(π / 2) l Where, (π / 2) h This represents the approximate value of π / 2 with the first level of precision. (π / 2) l This represents π / 2 and (π / 2) at the first precision. h The error value.

[0159] Based on the solution provided in the embodiments of this application, by additional offsetting the first data, the conversion of sine and cosine function values ​​can be realized, simplifying the calculation method of trigonometric functions, realizing a large overlap of the calculation processes of sine and cosine functions, thereby reducing the number of instructions required to process the data to be processed and improving the utilization rate of instructions.

[0160] In some possible implementations, L or K satisfies at least one of the following: K+L≤E, where E represents the maximum number of decimal places of the floating-point number of the period of the first function; and / or K≤L.

[0161] Based on the solution provided in this application, by restricting the values ​​of K and L, on the one hand, it is possible to process the data to be processed without formatting such as precision increase, thus reducing computational overhead; on the other hand, by restricting K+L≤E, the accuracy of multiplication operations can be guaranteed, thereby improving data processing performance; on the other hand, by restricting K≤L, the accuracy of addition operations can be guaranteed, thereby improving data processing performance; furthermore, since the accuracy of multiplication and addition operations can be guaranteed, the determined reduced data can be the most accurate rounding result of x-kπ under this precision floating-point number.

[0162] In some possible implementations, step S350 specifically includes:

[0163] The value of the first function is determined based on the first symbol, reduced data, and approximation coefficients. The approximation coefficients are determined based on the approximation algorithm and the periodicity of the first function.

[0164] In some possible implementations, the first function is a trigonometric function, and the approximation coefficient S is the first data whose floating-point precision satisfies FP32. n , n∈[0,4] satisfy the following conditions: S4=2.604926501e-6, S3=-0.0001980894471, S2=0.008333049340, S1=-0.1666665792, S0=1.

[0165] It is understood that, unless otherwise specified, the sequence number of each step in the data processing method provided in this application does not constitute a limitation on the order of execution.

[0166] The following describes in detail one possible implementation of the data processing method 300 provided in the embodiments of this application, taking the floating-point number of pi π or the first data x satisfying FP32 as an example.

[0167] For a given positive integer L, dividing π into segments yields π0 = 2. 2-L ×round(π×2 L-2 ), π1=2 2-2L ×round[(π-π0)×2 2L-2 ],π2=2 2-3L ×round[(π-π0-π1)×2 3L-2 ],π3=2 2-4L ×round[(π-π0-π1-π2)×2 4L-2 The obtained segmented data π0, π1, π2, and π3 can be stored in their respective memories (e.g., the first register). The process of segmenting π can satisfy the following conditions:

[0168] π0=2 2-L ×round(π×2 L-2 ),

[0169]

[0170]

[0171]

[0172]

[0173]

[0174]

[0175] Understandably, π can be further divided into segments to obtain π⁴, π⁵, etc., based on the required precision for the calculation. π⁴, π⁵, etc., can also satisfy the requirements. (For example, π4 corresponds to m=4, and π5 corresponds to m=5).

[0176] Given FP32, we can choose K = 11 and L = 11. The determined π0, π1, π2, and π3 then satisfy: π0 = 3.1416016, π1 = -8.907169e-6, π2 = -1.7412276e-9, and π3 = 1.2446744e-13; the determined k1 and k2 then satisfy: k = k1 + k2, k1 = 2. 11 ×round(k×2 -11 ).

[0177] After determining π0, π1, π2, π3, k1, and k2, the sine function can be calculated in the period calculator in the following order:

[0178] x1 = x - k1π0,

[0179] x2 = x1 - k2π0,

[0180] x3 = x2 - k1π1,

[0181] x4 = x3 - k2π1,

[0182] x5 = x4 - k1π2,

[0183] x6 = x5 - k2π2,

[0184] x7 = x6 - k1π3,

[0185] x0 = x7 - k2π3.

[0186] For the cosine function, you can calculate it in the period calculator in the following order:

[0187] x1 = x - k1π0,

[0188] x2 = x1 - k2π0,

[0189] x3 = x2 - k1π1,

[0190] x4 = x3 - k2π1,

[0191] x'4 = x4 + (π / 2) h ,

[0192] x5 = x'4 - k1π2,

[0193] x6 = x5 - k2π2,

[0194] x7 = x6 - k1π3,

[0195] x'0 = x7 - k2π3,

[0196] x0 = x'0 + (π / 2) l .

[0197] In some possible implementations, (π / 2) h =1.570796, (π / 2) l = -0.000000326794896619.

[0198] Understandably, the calculation can be either a combined multiplication and addition operation or a simple multiplication and addition operation (i.e., performing multiplication or addition separately).

[0199] When the calculation is a simple multiplication-addition, it can achieve accurate periodic reduction in the range x∈[-13176794, 13176194]. The calculation error of the sine / cosine function is reduced from 1e-3 to 1e-7, the calculation performance of the sine function is improved by 12%, and the calculation accuracy of the sine / cosine function is improved by 1000 times, which can effectively support the correctness of the encoding of tens of millions of token positions. At the same time, it can avoid data format processing (e.g., FP32 to FP64) and guarantee performance and calculation accuracy.

[0200] x0 obtained from reduction, and the sign (-1) determined by k. k The polynomial S composed of the approximation coefficients n The approximate values ​​of trigonometric functions with x as the independent variable can be obtained by performing calculations in the function calculator in the following order:

[0201] t = x0 × x0,

[0202] r0 = t × S0,

[0203] r0' = r0 + S1,

[0204] r1 = r0' × t,

[0205] r1' = r1 + S2,

[0206] r2 = r1' × t,

[0207] r2' = r2 + S3,

[0208] r3 = r2' × t,

[0209] r3' = r3 + S4

[0210] r = r3' × x0 × (-1) k .

[0211] r is the approximate value of the trigonometric function when x is the independent variable (-1). k sinx0.

[0212] It is understandable that when the floating-point value of pi (π) satisfies FP64 or FP16, the data processing method provided in this application embodiment is similar to that when the floating-point value of pi satisfies FP32. When the floating-point value of pi or the first data x satisfies FP64, K = 26 and L = 26 can be taken.

[0213] The above text combines Figure 3 The method 300 provided in the embodiments of this application has been described in detail below, in conjunction with... Figures 4 to 7 This application describes possible apparatuses provided in its embodiments. The apparatuses provided in this application can be used to implement any of the possible methods described in the above method embodiments.

[0214] like Figure 4 As shown, Figure 4 A schematic diagram of the structure of a processing unit applicable to an embodiment of this application is shown.

[0215] In one possible implementation, the processing unit for periodic reduction of x may include 2N multiply-accumulate units. For example, as Figure 4As shown in (a), the processing unit for periodic reduction of x includes eight multiply-add calculation units, denoted as multiply-add calculation unit #1, multiply-add calculation unit #2, multiply-add calculation unit #3, multiply-add calculation unit #4, multiply-add calculation unit #5, multiply-add calculation unit #6, multiply-add calculation unit #7, and multiply-add calculation unit #8. Inputting the first data x, k1, and π0 into multiply-add calculation unit #1, a simple multiply-add operation yields x1 = x - k1π0; inputting x1, k2, and π0 into multiply-add calculation unit #2, a simple multiply-add operation yields x2 = x1 - k2π0; inputting x2, k1, and π1 into multiply-add calculation unit #3, a simple multiply-add operation yields x3 = x2 - k1π1; inputting x3, k2, and π1 into multiply-add calculation unit #4, a simple multiply-add operation yields x4 = x3 - k2π1. Input x4, k1, and π2 into multiply-add unit #5. Through simple multiply-add operation, we can obtain x5 = x4 - k1π2. Input x5, k2, and π2 into multiply-add unit #6. Through simple multiply-add operation, we can obtain x6 = x5 - k2π2. Input x6, k1, and π3 into multiply-add unit #7. Through simple multiply-add operation, we can obtain x7 = x6 - k1π3. Input x7, k2, and π3 into multiply-add unit #8. Through simple multiply-add operation, we can obtain x0 = x7 - k2π3.

[0216] In another possible implementation, the processing unit for periodic reduction of x may include 2N multiply-accumulate units and 2 adder units, where the adder units can be used to determine either x'4 or x0. For example, as Figure 4 As shown in (b), the processing unit for periodic reduction of x includes 8 multiplication-addition calculation units and 2 addition calculation units, which are respectively denoted as multiplication-addition calculation unit #1, multiplication-addition calculation unit #2, multiplication-addition calculation unit #3, multiplication-addition calculation unit #4, multiplication-addition calculation unit #5, multiplication-addition calculation unit #6, multiplication-addition calculation unit #7, multiplication-addition calculation unit #8, addition calculation unit #A and addition calculation unit #B. Inputting the first data x, k1, and π0 into multiply-address calculation unit #1, we can obtain x1 = x - k1π0 through simple multiply-address operation; inputting x1, k2, and π0 into multiply-address calculation unit #2, we can obtain x2 = x1 - k2π0 through simple multiply-address operation; inputting x2, k1, and π1 into multiply-address calculation unit #3, we can obtain x3 = x2 - k1π1 through simple multiply-address operation; inputting x3, k2, and π1 into multiply-address calculation unit #4, we can obtain x4 = x3 - k2π1 through simple multiply-address operation; then inputting x4 and (π / 2) into multiply-address calculation unit #4, we can obtain x4 = x3 - k2π1 through simple multiply-address operation; h Input addition calculation unit #A, and through addition operations, we can obtain x'4 = x4 + (π / 2). hInput x4', k1, and π2 into multiply-address unit #5. Through simple multiply-address operations, we can obtain x5 = x4' - k1π2; Input x5, k2, and π2 into multiply-address unit #6. Through simple multiply-address operations, we can obtain x6 = x5 - k2π2; Input x6, k1, and π3 into multiply-address unit #7. Through simple multiply-address operations, we can obtain x7 = x6 - k1π3; Input x7, k2, and π3 into multiply-address unit #8. Through simple multiply-address operations, we can obtain x'0 = x7 - k2π3; Input x0' and (π / 2) l Input the addition calculation unit #B, and through addition operations, you can obtain x0 = x'0 + (π / 2). l .

[0217] like Figure 5 As shown, Figure 5 A schematic diagram of a function calculator is shown. It is used to approximate the value of a trigonometric function (-1) by using coefficients to obtain the approximate value of the function. k The sinx0 function calculator can include: one multiplication unit #1, four multiplication-addition units (multiplication-addition unit #2, multiplication-addition unit #3, multiplication-addition unit #4, multiplication-addition unit #5) and one multiplication unit #6.

[0218] Input x0, obtained by periodic reduction of x, into multiplication unit #1. Through multiplication or squaring, t = x0 × x0 can be obtained. Input t, S0, and S1 into multiplication-addition unit #2. Through multiplication-addition, r0' = t × S0 + S1 can be obtained. Input t, r0', and S2 into multiplication-addition unit #3. Through multiplication-addition, r1' = t × r0' + S2 can be obtained. Input t, r1', and S3 into multiplication-addition unit #4. Through multiplication-addition, r2' = t × r1' + S3 can be obtained. Input t, r2', and S4 into multiplication-addition unit #5. Through multiplication-addition, r3' = t × r2' + S4 can be obtained. Then input x0, r3', and (-1) k Inputting multiplication unit #6, we can obtain r = r3' × x0 × (-1) through multiplication. k .

[0219] This application embodiment can provide a digital circuit for data processing, which may include logic gates for performing the method as described in the aforementioned method 300; or, the processor 200 described above may be implemented by logic gates.

[0220] It is understood that any of the possible data processing methods in the above method embodiments can be implemented by designing dedicated digital circuits and through algorithm hardening.

[0221] Figure 6This is a schematic diagram of a computing device 600 provided in an embodiment of this application. Figure 6 As shown, the device 600 can be a computing device with computing capabilities, or a component (e.g., a unit, module, chip, or chip system) configured within a computing device. The device 600 includes a transceiver unit 610 and a processing unit 620. The transceiver unit 610 can be used to implement corresponding transceiver functions (e.g., receiving data to be processed; or sending the result of processing the data to be processed, such as sending processed data). The transceiver unit 610 can also be referred to as a communication interface or communication unit. The processing unit 620 can be used to process the data.

[0222] Optionally, the device 600 may further include a storage unit for storing instructions and / or data, and the processing unit 620 may read the instructions and / or data from the storage unit to enable the device to implement the aforementioned method embodiments.

[0223] For example, the computing device 600 can be a computing device with computing functions, or a computing device applied to or used in conjunction with a computing device and capable of implementing methods executed by the computing device, such as a chip, chip system, or circuit. See also... Figure 7 The chip system shown is described in detail.

[0224] As a design, the device 600 is used to perform the above. Figure 3 The method embodiments execute steps or processes described above. The transceiver unit 610 is used to perform transceiver-related operations (e.g., acquiring data to be processed) in the above method embodiments, and the processing unit 620 is used to execute the above... Figure 3 The method embodiments handle related operations (e.g., acquiring first data, determining multiple coefficient data, determining reduced data, determining a first function value, or processing the data to be processed based on the first function value).

[0225] It should be understood that the specific process of each unit performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0226] It should also be understood that the device 600 here is embodied in the form of a functional unit. The term "unit" here may refer to application-specific integrated circuits (ASICs), electronic circuits, processors (e.g., shared processors, proprietary processors, or group processors) and memories for executing one or more software or firmware programs, combined logic circuits, and / or other suitable components that support the described functions.

[0227] The apparatus 600 of each of the above-described schemes has the function of implementing the corresponding steps in the method 300 described above. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions; for example, the transceiver unit can be replaced by a transceiver (e.g., the transmitting unit in the transceiver unit can be replaced by a transmitter, and the receiving unit in the transceiver unit can be replaced by a receiver), and other units, such as processing units / computing units, can be replaced by processors, each executing the transceiver operations and related processing operations in the respective method embodiments.

[0228] In addition, the transceiver unit 610 described above can also be a transceiver circuit (for example, it may include a receiving circuit and a transmitting circuit), and the processing unit can be a processing circuit.

[0229] It should be pointed out that, Figure 6 The device mentioned can be the computing device in the foregoing embodiments, or it can be a chip or a chip system, such as a system on a chip (SoC). The transceiver unit can be an input / output circuit or a communication interface; the processing unit is a processor, microprocessor, or integrated circuit integrated on the chip. No limitations are imposed here.

[0230] It should be understood that the processor mentioned in the embodiments of this application can be used to process signals or data received and / or transmitted by the communication interface.

[0231] For example, the processor mentioned in the embodiments of this application can be a computing device, or a computing apparatus applied to or used in conjunction with a computing device and capable of implementing a data processing method executed by the computing device, such as a chip, chip system, or circuit. See also... Figure 7 The chip system shown is described in detail.

[0232] It should be understood that the processor mentioned in the embodiments of this application can be one of the following devices or a portion of the circuitry used for processing functions: a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), ASICs, field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art.

[0233] A communication interface uses transceiver devices, such as, but not limited to, transceivers, to enable communication between the processor and other devices or communication networks. For example, data to be processed can be obtained through a communication interface.

[0234] In the embodiments of this application, the above Figure 3 The method described can be executed by a computing device, or by a chip, chip system, or circuitry of the computing device, which can be installed in the computing device. Below, in conjunction with... Figure 7 The chip system in the computing device will be explained.

[0235] Figure 7 This is a schematic diagram of a chip system 700 provided in an embodiment of this application. The chip system 700 (or may also be called a processing system) includes logic circuitry 710 and an input / output interface 720.

[0236] The logic circuit 710 can be a processing circuit in the chip system 700. The logic circuit 710 can be coupled to a memory unit, calling instructions from the memory unit, enabling the chip system 700 to implement the methods and functions of the embodiments of this application. The input / output interface 720 can be an input / output circuit in the chip system 700, outputting processed information or inputting data or signaling information to be processed into the chip system 700 for processing.

[0237] For example, if the computing device is equipped with the chip system 700, the logic circuit 710 is coupled to the input / output interface 720, which can input information to the logic circuit 710 for processing.

[0238] As one approach, the chip system 700 is used to implement the operations performed by the computing device in the various method embodiments described above.

[0239] This application provides a computer-readable storage medium storing computer instructions for implementing the methods executed by a processor in the above-described method embodiments.

[0240] For example, when the computer program is executed by the computer, it enables the computer to implement the methods executed by the processor in the various embodiments of the above methods.

[0241] This application provides a computer program product comprising instructions that, when executed by a computer, implement the methods executed by the processor in the above-described method embodiments.

[0242] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.

[0243] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0244] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0245] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0246] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0247] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0248] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0249] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A processor, comprising: The processor comprises: a data acquisition unit configured to acquire first data from to-be-processed data, the to-be-processed data comprising at least one of image data, signal data, language data, or position coding data, the first data being data processed using a first function, the first function being a periodic function with an irrational number as a period; a period calculator configured to determine a plurality of coefficient data according to the first data and a period of the first function, and determine reduction data of the first data according to the first data, the plurality of coefficient data, and a plurality of period data, the plurality of period data being a plurality of segmented data of the period of the first function; a sign calculator configured to determine a first sign, the first sign being used to determine a positive or negative of a first function value; a function calculator configured to determine the first function value according to the first sign and the reduction data, the first function value being used to represent a function value of the first function with the first data as an independent variable; a data processing unit configured to process the to-be-processed data according to the first function value.

2. The processor of claim 1, wherein, The plurality of coefficient data comprises k1 and k2, and the plurality of coefficient data satisfies the following condition: k = k1 + k2, k1 = 2 K xround(k x 2 -K ), k = round(x x invp) or k = round(x x invp + 0.5), where round denotes rounding, invp denotes precision of 1 / p reserved to the same precision as x, x denotes the first data, and K is a positive integer.

3. The processor of claim 1 or 2, wherein, The first function is a trigonometric function, the plurality of periodic data includes π0 and π m The plurality of periodic data satisfies the following conditions: m is an integer greater than 1, L is a positive integer, and ∑ denotes summation.

4. The processor of claim 3, wherein the reduction data satisfies the following condition: x1= x - k1π0, x0= x 2N-1 - k2π N-1 , and when i is even and i≠0, x i = x i-1 - k2π i / 2-1 , or when i is odd and i≠1, x i = x i-1 - k1π (i-1) / 2 , wherein x0 represents the reduced data, i∈[0,2N-1], N=m+1. The cycle calculator comprises 2N multiply-add computation units for determining any one of the x1, the x0 or the x i ​ 5. The processor of claim 3, wherein the first function is a cosine function, the first data satisfies a first precision in a floating-point number, and the reduction data satisfies the following condition: x1 = x - k1π0, x2 = x1 - k2π0, x3 = x2 - k1π1, x4 = x3 - k2π1, x'4 = x4 + (π / 2) h x5 = x'4 - k1π2, x6 = x5 - k2π2, x7 = x6 - k1π3, x'0 = x7 - k2π3, x0 = x'0 + (π / 2) l where x represents the first data, x0 represents the reduced data, (π / 2) h represents an approximation of π / 2 at the first precision, (π / 2) l represents an approximation of π / 2 and (π / 2) h at the first precision; and k1 and k2 are integers. The period calculator comprises 2N multiply-add calculation units for determining any one of the x1, the x'0 or the x i ​ The period calculator further comprises two addition calculation units, and the addition calculation units are used to determine any one of the x'4 or the x0.

6. The processor of any one of claims 2-5, wherein, L or K satisfies at least one of the following conditions: K+L≤E, E representing a maximum value of a decimal place of a floating-point number of the period of the first function; and / or K≤L.

7. The processor of any one of claims 1-6, wherein, The processor further comprises at least one of the following: a first register configured to store the plurality of period data; a second register configured to store an approximation coefficient, the approximation coefficient being determined based on an approximation algorithm and the period of the first function.

8. The processor of claim 7, wherein, The first function is a trigonometric function, the precision of the first data under a floating-point number satisfies FP32, and the approximation coefficient S n , n ∈ [0, 4] satisfies the following conditions: S4=2.604926501e-6, S3=-0.0001980894471, S2=0.008333049340, S1=-0.1666665792, S0=1.

9. The processor of claim 7 or 8, wherein, The function calculator is specifically configured to: determine the first function value according to the reduction data, the first sign, and the approximation coefficient.

10. The processor of any one of claims 1 to 9, wherein the data acquisition unit comprises a first output port configured to output the first data; the period calculator comprises a first input port configured to input the first data, and a second output port configured to output the reduction data of the first data, the first output port being connected to the first input port. The symbol calculator comprises a third output port for outputting the first symbol; The function calculator comprises a second input port for inputting the reduced data of the first data, a third input port for inputting the first symbol, and a fourth output port for outputting the first function value, the second input port being connected with the second output port, the third input port being connected with the third output port, and the fourth output port being connected with the fourth input port; The data processing unit comprises a fourth input port for inputting the first function value, the fourth input port being connected with the fourth output port.

11. A chip, characterized by The chip comprises the processor according to any one of claims 1 to 10.

12. A method of data processing, applied on a processor as claimed in any one of claims 1 to 10, characterized in that, The method comprises: obtaining first data from to-be-processed data, the to-be-processed data comprising at least one of image data, signal data, language data, or position coding data, the first data being data processed by a first function, the first function being a periodic function with an irrational number as a period; determining a plurality of coefficient data according to the first data and the period of the first function; determining reduced data of the first data according to the first data, the plurality of coefficient data, and a plurality of period data, the plurality of period data being a plurality of segmented data of the period of the first function; determining a first symbol, the first symbol being used to determine the positive or negative of a first function value; determining the first function value according to the first symbol and the reduced data, the first function value being used to represent the function value of the first function with the first data as an independent variable; processing the to-be-processed data according to the first function value.

13. The method of claim 12, wherein, The plurality of coefficient data comprises k1 and k2, and the plurality of coefficient data satisfies the following condition: k = ki + k2, ki = 2 K xround(k x 2 -K ), k = round(x x invp) or k = round(x x invp + 0.5), where round denotes rounding, invp denotes precision of 1 / p reserved to the same precision as x, x denotes the first data, and K is a positive integer.

14. The method according to claim 12 or 13, characterized in that, The first function is a trigonometric function, the plurality of periodic data includes π0 and π m The plurality of periodic data satisfies the following conditions: π0= 2 2-L x round(π x 2 L-2 ), m is an integer greater than 1, L is a positive integer, and ∑ denotes summation.

15. The method of claim 14, wherein, The reduced data satisfies the following condition: x1= x - k1π0, x0= x 2N-1 - k2π N-1 , and when i is even and i≠0, x i = x i-1 - k2π i / 2-1 , or when i is odd and i≠1, x i = x i-1 - k1π (i-1) / 2 , wherein x0 represents the reduced data, i∈[0,2N-1], N=m+1.

16. The method of claim 14, wherein, The first function is a cosine function, the first data satisfies a first precision in a floating-point number, and the reduced data satisfies the following condition: x1 = x - k1π0, x2 = x1 - k2π0, x3 = x2 - k1π1, x4 = x3 - k2π1, x'4 = x4 + (π / 2) h x5 = x'4 - k1π2, x6 = x5 - k2π2, x7 = x6 - k1π3, x'0 = x7 - k2π3, x0 = x'0 + (π / 2) l where x represents the first data, x0 represents the reduced data, (π / 2) h represents an approximation of π / 2 at the first precision, (π / 2) l represents an approximation of π / 2 and (π / 2) h at the first precision.

17. The method according to any one of claims 13 to 16, characterized in that, L or K satisfies at least one of the following conditions: K+L≤E, E representing the maximum value of the number of decimal places of the floating-point number of the period of the first function; and / or K≤L.

18. The method according to any one of claims 12 to 17, characterized in that, The determining of the first function value according to the first symbol and the reduced data comprises: determining the first function value according to the first symbol, the reduced data, and an approximation coefficient, the approximation coefficient being determined based on an approximation algorithm and the period of the first function.

19. The method of claim 18, wherein, The first function is a trigonometric function, the precision of the first data under a floating-point number satisfies FP32, and the approximation coefficient S n , n ∈ [0, 4] satisfies the following conditions: S4=2.604926501e-6, S3=-0.0001980894471, S2=0.008333049340, S1=-0.1666665792, S0=1.

20. A computer program product, characterised in that, When the computer program in the computer program product is executed by the processor, the method according to any one of claims 12 to 19 is implemented.

21. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions, and when the computer program or instructions are executed by the processor, the method according to any one of claims 12 to 19 is implemented.