Circuit arrangement for controlling inverter of high-voltage network and method for operating circuit arrangement

Abstract

The invention relates to a circuit arrangement and a method for controlling an inverter in a high-voltage network, the inverter being connected to an electric machine and to a high-voltage battery, the circuit arrangement comprising at least one microcontroller, at least one monitoring circuit for the microcontroller, and a hardware circuit, the at least one monitoring circuit being designed to control the inverter in the high-voltage network. In the event of an error of the microcontroller, the microcontroller is deactivated and a switching signal is generated for a hardware circuit, which first forcibly runs and subsequently generates a switching signal from running to an active short-circuit, the microcontroller is designed to determine an optimal running time as a function of parameters of the motor and / or of the high-voltage network, and the optimal running time is determined as a function of the parameters of the motor and / or of the high-voltage network. The hardware circuit is designed in such a way that the optimal idle time is continuously adjusted by the hardware circuit in accordance with a specification of the microcontroller by changing a parameter, and the monitoring circuit is designed in such a way that the hardware circuit is separated from the microcontroller in the event of an error of the microcontroller, a switching signal is generated as a function of the last adjusted idle time.

Description

Technical Field

[0001] The present invention relates to a circuit device for controlling an inverter in a high-voltage network and a method for operating the circuit device. Background Technology

[0002] For motors, if a fault occurs in the motor or a device including the motor, it may be necessary to be able to immediately shut down the running motor. For example, if a load reduction occurs or if a device including the motor (e.g., a motor vehicle including the motor as a traction motor) detects an error condition (e.g., due to component failure, software error, or similar error), such an error may exist. For such a shutdown process, in addition to other electrical components, it is necessary to transition the motor to a safe state. To this end, various measures can be taken, particularly reducing the motor's supply voltage, preventing torque jumps in the motor, and / or preventing sudden braking torque and / or preventing the inflow of electrical energy into the traction network.

[0003] To achieve a safe operating condition, it is possible to switch the motor between active short-circuiting and idling. Which of these devices is suitable depends on the type of motor, such as whether it is an asynchronous or synchronous motor. Various methods for switching a motor to idling or active short-circuiting are known from the prior art.

[0004] DE 10 201 4 209 887 A1 describes a method for switching an inverter for an electric drive in a motor vehicle. The inverter can be used to set an idle operating mode, a short-circuit operating mode, and a clock operating mode to operate the motor. Switching between operating modes is performed based on a determined voltage value and / or a determined current value of the current operating mode, and an adjustment process is performed based on the determined voltage value and / or the determined current value to adjust the current and / or the voltage in the motor occurring in the target operating mode.

[0005] During the transition from idling mode to short-circuit mode, the inverter's current regulator initially operates at a zero current setpoint for a short period, during which the voltage and / or current values ​​for the current operating mode are determined. During this time, the voltage across the motor can be gradually reduced to zero, and the inverter's timing is terminated by switching the inverter to short-circuit mode. This allows for compensation of voltage or current differences between the current and target operating modes and can reduce or prevent transient overcurrents or overvoltages.

[0006] DE 10 201 3 226 560 A1 discloses a method for improving the transition of a motor from idling to active short circuit. The transition from idling to active short circuit is delayed until the voltage at the motor connection reaches a predetermined value. In this way, switching can be achieved based on the rotor position determined by a specific voltage.

[0007] A method for operating a circuit device comprising a circuit and a motor is known from DE 10 202 1 129 144 A1, wherein the motor is switched to idle via the circuit when at least one trigger criterion is met, then idles for a period of time depending on at least one measurement describing the change in stator current in the motor, and then is switched to active short circuit via the circuit.

[0008] This adaptive setting of idling time based on parameters is typically performed by the inverter's microcontroller. However, since the motor itself must switch to a safe state even if the microcontroller malfunctions, it is also known to perform the switching via pure hardware circuitry in this case. The time before switching is determined for the worst-case scenario, so the idling time is very short, allowing the current in an active short circuit to remain very large. On the other hand, this ensures that the motor can still transition to a safe operating state despite errors in the microcontroller and various possible measuring devices. Summary of the Invention

[0009] The technical problem to be solved by the present invention is to improve the method of switching the motor to a safe state in the event of a microcontroller error and to provide a corresponding method.

[0010] The solution to this technical problem originates from a circuit arrangement for controlling an inverter in a high-voltage network, having the features of claim 1, and a method having the features of claim 9. Further advantageous embodiments of the invention arise from the dependent claims.

[0011] A circuit device for controlling an inverter in a high-voltage network, the inverter being connected to a motor and a high-voltage battery, the circuit device having at least one microcontroller, at least one monitoring circuit for the microcontroller, and hardware circuitry.

[0012] At least one monitoring circuit is designed to disable the microcontroller and generate a switching signal (Schaltsignal) for the hardware circuitry when a microcontroller error occurs. This circuitry generates a switching signal (Umschaltsignal) from idling to active short circuit. The microcontroller is designed to determine the optimal idling time based on parameters of the motor and / or high-voltage network. The hardware circuitry is designed to continuously set the optimal idling time by changing parameters according to the microcontroller's specifications. The monitoring circuitry is designed to decouple the hardware circuitry from the microcontroller when a microcontroller error occurs and generate a switching signal based on the last adjusted idling time. This typically extends the idling time, thereby reducing the current in the active short circuit through the power semiconductors and thus reducing their load. Accordingly, the chip area of ​​the power semiconductors can be reduced if necessary.

[0013] In one embodiment, the parameters of the motor are speed and magnetization, and the parameters of the high-voltage network are the DC voltage at the inverter or intermediate circuit capacitor. The microcontroller preferably considers all three parameters to determine the optimal idling time. For example, the corresponding optimal idling time can be determined through preliminary testing. The correlation can then be stored as a three-dimensional characteristic curve, a lookup table, or an analytical function. It can be specified that the microcontroller uses only these three parameters to determine the optimal idling time. However, it can also be specified that other parameters are considered.

[0014] In another embodiment, the hardware circuitry includes a comparator / timer stage where a delay, a threshold switch, and a turn-off operational amplifier or tri-state gate can be set by the initial charging of a time-determined capacitor. At least one monitoring circuit is connected to the input of the comparator / timer stage and the turn-off input of the operational amplifier or the tri-state input of the tri-state gate. The turn-off operational amplifier or tri-state gate is connected to the microcontroller at its input and to the capacitor at its output. This allows the monitoring circuitry to very quickly switch the operational amplifier or tri-state gate to a high resistance in the event of an error, thereby decoupling the hardware circuitry from the microcontroller. The idle time can then be adjusted by adjusting the bias voltage across the capacitor. The tri-state gate offers advantages such as simple structure and cost-effectiveness compared to operational amplifiers.

[0015] In an alternative embodiment, the hardware circuitry includes a comparator whose positive input is connected to a monitoring circuit via an RC filter signal technique, and a capacitor connected to ground at its negative input. Furthermore, the hardware circuitry includes a switchable operational amplifier or a tri-state gate, with at least one monitoring circuit connected to the shutdown input of the operational amplifier or the tri-state input of the tri-state gate. The switchable operational amplifier or tri-state gate is connected to the microcontroller at its input and to the capacitor at its output. This means the hardware circuitry can be implemented with fewer components. Additionally, the comparator can be designed with hysteresis functionality.

[0016] In an alternative embodiment, the hardware circuitry includes a sample-and-hold circuit and an adjustable delay element. Monitoring circuitry is connected to the input of the delay element and the hold input of the sample-and-hold circuit. The input of the sample-and-hold circuit is connected to a microcontroller, and the output of the sample-and-hold circuit is connected to the control input of the delay element. This also represents an implementation requiring only a few components.

[0017] In another embodiment, the circuitry has a return channel, which is designed to allow the microcontroller and / or another controller to read the adjusted idle time via the return channel. For example, this can be used to compensate for component tolerances in capacitors or other components.

[0018] In another embodiment, the circuitry is designed to generate an error signal if there is a discrepancy between the microcontroller's preset idle time and the hardware circuitry's adjusted idle time. This monitors the functionality of the hardware circuitry. The error signal can be displayed on a display unit and / or trigger an emergency operation, such as adjusting the operating parameters of the high-voltage network.

[0019] In another embodiment, a turn-off operational amplifier is arranged in the return channel, with its input connected to a capacitor and its turn-off input connected to monitoring circuitry. Alternatively, the operational amplifier may be designed simply to be short-circuit resistant and high-resistance.

[0020] In an alternative embodiment, a high-resistance resistor or analog switch is arranged in the return path, preferably a high-resistance resistor, because the return path is less critical and only needs to ensure that it has no effect on the voltage across the capacitor.

[0021] A method for operating a circuit device for controlling an inverter in a high-voltage network, the inverter being connected to a motor and a high-voltage battery, the circuit device having at least one microcontroller, at least one monitoring circuit for the microcontroller, and hardware circuitry, the method comprising the steps of: the monitoring circuitry deactivating the microcontroller and generating a switching signal for the hardware when an error occurs; the inverter switching to idling, the hardware circuitry generating a switching signal from idling to active short circuit after a predetermined time; the microcontroller determining an optimal idling time based on parameters of the motor and / or the high-voltage network, the optimal idling time being continuously adjusted by the hardware circuitry according to a preset value of the microcontroller by changing parameters; and, in the event of an error in the microcontroller, the hardware circuitry disengaging from the microcontroller and generating a switching signal based on the last adjusted idling time. The microcontroller may also be disengaged using high-impedance decoupling.

[0022] For further procedural embodiments of the present invention, please refer to the foregoing statements. Attached Figure Description

[0023] The invention will now be explained in more detail using preferred exemplary embodiments. The accompanying drawings illustrate:

[0024] Figure 1 This is a schematic block diagram of a high-voltage network.

[0025] Figure 2 A schematic diagram of the hardware circuitry in the first embodiment is shown.

[0026] Figure 3 This is a schematic diagram of the hardware circuit in the second embodiment, and

[0027] Figure 4 This is a schematic diagram of a circuit device with monitoring circuitry for hardware circuitry. Figure 5 Alternative embodiments are shown. Figure 6 Another alternative embodiment is shown. Detailed Implementation

[0028] Figure 1 A block diagram of a high-voltage network 1, such as a traction network for an electric vehicle, is shown in a very simplified manner. The high-voltage network 1 includes a high-voltage battery 2, an inverter 3, and a motor 4. An intermediate circuit capacitor 5 and a voltage measuring device 6 are provided on the DC voltage side of the inverter 3. Furthermore, the high-voltage network 1 has a circuit arrangement 7, which includes at least one microcontroller 8, a monitoring circuit 9 for the microcontroller 8, and hardware circuitry 10. The motor 2 is designed, for example, as a permanent magnet synchronous motor or a separately excited synchronous motor. The inverter 3 is designed, for example, as a B6 bridge or a 3-level inverter, wherein the semiconductor switches of the inverter 3 are preferably designed as SiC transistors. To increase current carrying capacity, multiple transistors can also be connected in parallel, i.e., each high-side switch and each low-side switch consists of multiple transistors connected in parallel. During normal operation, the microcontroller 8 generates control signals for the inverter 3, which are then converted into control signals for the power semiconductors of the inverter 3 via a gate driver (not shown). The microcontroller 8 receives control commands from a higher-level control device (e.g., a drive control device) regarding the operating point at which the motor 4 should operate. Microcontroller 8 receives data from voltage measuring device 6 and motor 4, specifically speed n and magnetization c. There may be situations where motor 4 must switch to a safe state. For this purpose, inverter 3 first switches to idling (i.e., all semiconductor switches of inverter 3 are blocked), in which case current from motor 4 can then flow through the idling diode of inverter 3 under certain operating conditions. If the speed is low, resulting in a small electromotive force, no current flows, especially during motor operation in the idling circuit. When current flows, electrical power decreases through the idling diode, and intermediate circuit capacitor 5 is also charged. After a certain period, inverter 3 or motor 4 is switched to active short circuit; for this purpose, all high-side switches or all low-side switches of inverter 3 are turned on. If microcontroller 8 is functioning correctly, it can switch inverter 3 to idling and subsequently to active short circuit.

[0029] In the event of an error in microcontroller 8, it is essential to ensure that motor 4 transitions to a safe state. Therefore, microcontroller 8 is monitored by at least one monitoring circuit 9 and deactivated in the event of an error. Deactivation includes shutting down. Hardware circuit 10, then controlled by monitoring circuit 9, takes over the transition from idle to active short circuit. To utilize the optimal idle time even in this case, microcontroller 8 continuously calculates the optimal idle time for hardware circuit 10 based on parameters n and magnetization c, as well as the voltage at intermediate circuit capacitor 5. This is set by configuring parameters in the hardware circuit. If an error occurs in microcontroller 8, it is deactivated. Monitoring circuit 9 controls hardware circuit 10 and decouples it from microcontroller 8, ensuring that microcontroller 8 has no influence on hardware circuit 10. Monitoring circuit 9 can then send a signal to inverter 3 indicating its switch to idle, in which case hardware circuit 10 then generates a switching signal to active short circuit.

[0030] Figure 2 A first embodiment of hardware circuit 10 is shown. Hardware circuit 10 has a comparator / timer stage 11, which consists of an operational amplifier OP1 and a voltage divider composed of resistor R1 and capacitor C. Hardware circuit 10 also has a threshold switch 12, which has an operational amplifier OP2 and a voltage divider composed of two resistors R2 and R3. Finally, hardware circuit 10 also has two switchable operational amplifiers OP3 and OP4. One operational amplifier OP3 is connected to the microcontroller 8 at its input and to the capacitor C of the comparator / timer stage 11 via resistor R4 at its output. The second switchable operational amplifier OP4 is connected to the capacitor C of the comparator / timer stage 11 at its input and to the microcontroller 8 and / or another controller at its output, which will be explained in more detail later. Microcontroller 8 calculates the optimal idling time based on the parameter speed n, the magnetization c of motor 4, and the voltage at intermediate circuit capacitor 5, and converts it into a voltage at capacitor C. This voltage is provided as an analog quantity by microprocessor 8 to operational amplifier 3, which adjusts the voltage across capacitor C. This process occurs continuously during operation. The voltage at capacitor C is read out through another switchable operational amplifier OP4. The second switchable operational amplifier 4 forms return path 13. The inputs of the comparator / timer stage 11 and the shutdown inputs 14 of the two operational amplifiers OP3 and OP4 are connected to the monitoring circuit 9 (see...). Figure 1 ).

[0031] If the monitoring circuit 9 subsequently detects an error in the microcontroller 8, rendering its data unreliable, the monitoring circuit 9 disables the microcontroller 8 and applies a voltage signal S to the input of the integrator stage. The voltage signal S simultaneously shuts down the two operational amplifiers OP3 and OP4, decoupling the hardware circuit 10 from the microcontroller 8. Based on the last set voltage from capacitor C (i.e., before operational amplifiers OP3 and OP4 are turned off), the integrator stage 11 then generates a sufficiently large signal after a set time to switch the threshold switch 12. This signal, generated at the output of the threshold switch 12, then switches the inverter 3 to active short-circuit.

[0032] Figure 3 An alternative embodiment of the hardware circuit 10 is shown. (Compared to...) Figure 2 The only difference in the embodiment is that the two switchable operational amplifiers OP3 and OP4 have been replaced by a tri-state gate 15 and a resistor R5, where R5 >> R1 and R4. (This is in contrast to the embodiment based on...) Figure 2 Compared to the previous implementation, this represents a simple and cost-effective alternative. Another advantage is that the microcontroller 8 can generate a PWM signal to regulate the voltage at capacitor C, rather than an analog voltage, which makes implementation easier. The tri-state input TSE and Figure 2 Similar to the shutdown input terminal 14, it is connected to the monitoring circuit 9.

[0033] Figure 4 The circuit device 7 is schematically shown, which also includes a monitoring circuit 16 for the hardware circuit 10. The monitoring circuit 16 can also be integrated into the monitoring circuit 9 or the microcontroller 8. The operation is as follows: The set voltage at capacitor C of the integrator stage 11 (see...) Figure 2 , 3 The information is read through return channel 13. Microcontroller 8 can use this information to readjust control signals, for example, to compensate for component tolerances. Microcontroller 8 transmits a control signal, i.e., an analog value (see [link to monitoring circuitry]), to monitoring circuitry 16 to adjust the voltage at capacitor C. Figure 2 ) or PWM signal (see Figure 3 The transmission path from microcontroller 8 to hardware circuit 10 is known. Monitoring circuit 16 can determine whether the data received on return channel 13 matches the expected data based on control signals from microcontroller 8. If the deviation is greater than a threshold, this indicates a defect in hardware circuit 10, requiring, for example, emergency operation to be initiated or at least an error message to be generated.

[0034] Figure 5 An alternative embodiment is shown. In the previous example, the capacitor C associated with the delay time is pre-charged by the microcontroller 8, allowing the delay time to be adjusted via the initial charging of capacitor C. Figure 5 In the process, signal S is controlled by capacitor and resistor R. TThe classic RC filter is composed of a delay. Here, the adjustable time delay is due to the fact that the microcontroller 8 can set the threshold of the comparator K based on the voltage at capacitor C from the operating point. If the voltage at capacitor C is low, then when the signal S changes, capacitor C... T The voltage at point C reaches the comparator's threshold defined by the voltage at point C very early, resulting in a short delay time. If the voltage across capacitor C is large, the delay time will be correspondingly longer.

[0035] This embodiment is essentially a sample-and-hold arrangement, in which the voltage at capacitor C is analogously stored as the threshold of the delay circuit.

[0036] Figure 6 Another alternative embodiment is shown, wherein the hardware circuit 10 has a sample-and-hold circuit 17 and an adjustable delay element 18, and a monitoring circuit 9 (see [link]). Figure 1 The sample-and-hold circuit 17 is connected to the hold input HE and the input of the delay element 18. The input of the sample-and-hold circuit 17 is connected to the microcontroller 8 (see [link]). Figure 1 The output of the sample-and-hold circuit 17 is connected to the control input of the delay element 18.

[0037] Reference Symbol List

[0038] 1. High-voltage network

[0039] 2. High-voltage battery

[0040] 3 Inverter

[0041] 4 motors

[0042] 5. Intermediate circuit capacitors

[0043] 6. Voltage device

[0044] 7. Circuit device

[0045] 8 Microcontrollers

[0046] 9. Monitoring circuit

[0047] 10 Hardware Circuits

[0048] 11 Comparator / Timer Level

[0049] 12 Threshold Switch

[0050] 13 Return Channel

[0051] 14. Turn off the input terminal

[0052] 15. Tri-state gates

[0053] 16. Monitoring circuit

[0054] 17 Sample and Hold Circuit

[0055] 18 Delay Components

[0056] Resistors R1-R5

[0057] C capacitor

[0058] K comparator

[0059] OP1-OP4 operational amplifiers

[0060] TSE Tri-State Input

[0061] S voltage signal

[0062] R T resistance

[0063] C T capacitance

Claims

1. Circuit arrangement (7) for controlling an inverter (3) in a high-voltage network (1), wherein The inverter (3) is connected to an electric machine (4) and to a high-voltage battery (2), wherein the circuit arrangement (7) has at least one microcontroller (8), at least one monitoring circuit (9) for the microcontroller (8) and a hardware circuit (10), wherein the at least one monitoring circuit (9) is configured to deactivate the microcontroller in the event of an error of the microcontroller (8) and to generate a switching signal for the hardware circuit (10), wherein the hardware circuit (10) initially forces an idle running and subsequently generates a switching signal from idle running to active short circuit, characterized in that the microcontroller (8) is configured to determine an optimum idle running time from parameters of the electric machine (4) and / or of the high-voltage network (1), wherein the hardware circuit (10) is configured such that the optimum idle running time is continuously adjusted by the hardware circuit (10) by changing parameters according to a preset of the microcontroller (8), wherein the monitoring circuit (9) is configured to separate the hardware circuit (10) from the microcontroller (8) in the event of an error of the microcontroller (8), wherein a switching signal is generated from the last adjusted idle running time.

2. The circuit arrangement of claim 1, characterized in that The parameters of the electric machine (4) are the rotational speed (n) and the magnetization (c), and the parameters of the high-voltage network are the DC voltage on the inverter (3).

3. The circuit arrangement of claim 1 or 2, characterized in that The hardware circuit (10) has a comparator / timer stage (11), a threshold switch (12) and a switchable operational amplifier (OP3) or a tri-state gate (15), wherein the comparator / timer stage (11) has at least one capacitor (C), wherein the at least one monitoring circuit (9) is connected to the input of the integrator stage (11) and to the switch-off input (14) of the operational amplifier or to the tri-state input (TSE) of the tri-state gate (15), wherein the switchable operational amplifier (OP3) or the tri-state gate (15) is connected at the input to the microcontroller (8) and at the output to the capacitor (C).

4. The circuit arrangement according to claim 1 or 2, characterized in that The hardware circuit (10) has a comparator (K), the positive input of which is connected to the monitoring circuit (9) in signal technology by means of an RC filter and a capacitor (C) is connected to ground at the negative input of the comparator (K), wherein the hardware circuit (10) further has a switchable operational amplifier (OP3) or a tri-state gate (15), wherein the at least one monitoring circuit (9) is connected to the switch-off input of the operational amplifier or to the tri-state input (TSE) of the tri-state gate (15), wherein the switchable operational amplifier (OP3) or the tri-state gate (15) is connected at the input to the microcontroller (8) and at the output to the capacitor (C).

5. The circuit arrangement according to claim 1 or 2, characterized in that The hardware circuit (10) has a sample-and-hold circuit (17) and an adjustable delay element (18), wherein the monitoring circuit (9) is connected to an input of the delay element (18) and to a hold input (HE) of the sample-and-hold circuit (17), wherein an input of the sample-and-hold circuit (17) is connected to the microcontroller (8) and an output of the sample-and-hold circuit (17) is connected to a control input of the delay element (18).

6. The circuit arrangement of any of the preceding claims, characterized by The circuit arrangement (7) has a return channel (13), which is designed such that the microcontroller (8) and / or another controller can read out the adjusted idle time of the hardware circuit (10) via the return channel (13).

7. The circuit arrangement of claim 6, characterized by The circuit arrangement (7) is designed to generate an error signal in the event of a deviation between a predefined idle time by the microcontroller (8) and an adjusted idle time by the hardware circuit (10).

8. The circuit arrangement of claim 6 or 7, characterized in that An interruptable operational amplifier (OP4), a high-ohmic resistor (R5), an analog switch or a short-circuit-proof high-ohmic operational amplifier are arranged in the return channel (13).

9. A method for operating a circuit arrangement (7) for controlling an inverter (3) in a high-voltage network (1), wherein The inverter (3) is connected to an electric machine (4) and to a high-voltage battery (2), wherein the circuit arrangement (7) has at least one microcontroller (8), at least one monitoring circuit (9) for the microcontroller (8) and a hardware circuit (10), wherein the at least one monitoring circuit (9) deactivates the microcontroller in the event of an error of the microcontroller (8) and generates a switching signal for the hardware circuit (10), wherein the inverter (3) is switched into idle, wherein the hardware circuit (10) generates a switching signal from idle to active short-circuit after a predefined time, characterized in that The microcontroller (8) determines an optimum idle time depending on parameters of the electric machine (4) and / or of the high-voltage network (1), wherein the optimum idle time is continuously adjusted by the hardware circuit (10) by changing parameters according to a preset of the microcontroller (8), wherein the hardware circuit (10) is separated from the microcontroller (8) in the event of an error of the microcontroller (8), wherein a switching signal is generated depending on the last adjusted idle time.

10. The method of claim 9, wherein, The hardware circuit (10) has a comparator / timer stage (11), a threshold switch (12) and a switchable operational amplifier (OP3) or a tri-state gate (15), wherein the comparator / timer stage (11) has at least one capacitor (C), wherein the at least one monitoring circuit (9) is connected to an input of the comparator / timer stage (11) and to a switch-off input (14) of the operational amplifier (OP3) or to a tri-state input (TSE) of the tri-state gate (15), wherein the switchable operational amplifier (OP3) or the tri-state gate (15) is connected at an input to the microcontroller (8) and at an output to the capacitor (C), wherein the optimum idle time is adjusted by adjusting the voltage on the capacitor (C).

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