Control circuit and brake lamp circuit
By designing control circuits and brake light circuits, the brake lights are kept on when the ECU malfunctions, thus solving the safety hazards caused by ECU controller system abnormalities and achieving safety warnings and improved reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-10
- Publication Date
- 2026-03-10
AI Technical Summary
When the ECU controller system malfunctions, the brake lights cannot remain illuminated, posing a safety hazard. Existing technologies are unable to effectively solve this problem.
A control circuit and brake light circuit are designed, including a PMIC signal input terminal, a LIMPHOME clear signal input terminal, a semiconductor control transistor and an AND gate logic circuit, to ensure that the brake light remains lit when the MCU crashes or the PMIC fails. The reliable driving of the brake light is achieved through the logic state transition of the PMIC and MCU control circuits.
When the ECU malfunctions, the brake lights remain illuminated to provide a safety warning, avoid potential safety risks, improve vehicle reliability and safety, reduce false triggering, and meet stringent safety standards.
Smart Images
Figure CN121645646A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of vehicle circuit, in particular to a control circuit and a brake light circuit. BACKGROUND
[0002] In today's automotive industry, with the increasing requirements for vehicle functional safety, it has become a key design to ensure that the ECU controller system can take effective safety measures when any abnormality or failure occurs. In particular, in such a case, the brake light, as one of the most important safety indicators of the vehicle, its importance to keep on is self-evident. When the ECU controller system encounters any form of abnormality, whether due to software defects, hardware failures, external interference or other unforeseen reasons, the continuous lighting of the brake light becomes a necessary safety guarantee.
[0003] This design requirement ensures that in an emergency, such as when the ECU controller loses control of some key functions of the vehicle, the rear driver can discover the abnormal state of the front vehicle in time through the lit tail light, so as to take appropriate deceleration or avoidance measures to avoid rear-end accidents. Therefore, the lighting state of the brake light when the ECU system is abnormal is not only an immediate warning to the driver, but also a kind of responsible care for other road users.
[0004] In addition, when the ECU controller system fails, the lighting of the brake light also provides intuitive feedback to the vehicle driver, informing them of possible technical problems with the vehicle, prompting them to safely park and seek help. This failure indication function is an indispensable part of the modern automotive safety system, which helps to reduce traffic accidents caused by electronic system failures and protect the lives and property of passengers and other road users.
[0005] In summary, with the increasing requirements for functional safety, it has become a crucial function for the ECU controller system to keep the brake light on when it encounters abnormality or failure. Therefore, a new brake light circuit is urgently needed.
[0006] ECU (Electronic Control Unit): Electronic Control Unit
[0007] LIMPHOME (Limp Home Mode Control): Emergency Mode Control
[0008] HSD (High Side Driver): High Side Driver
[0009] PMIC (Power Management Integrated Circuit): Power Management Integrated Circuit
[0010] MCU (Micro Controller Unit): micro controller unit SUMMARY
[0011] The purpose of the embodiments of the present application is to provide a control circuit and a brake light circuit, when the MCU is deadlocked due to software errors, hardware failures or other reasons, or when the PMIC encounters power-related problems such as undervoltage, overtemperature, short circuit, etc., the present application can ensure that the brake light remains on, thereby continuously providing a safety warning and avoiding potential safety risks, to at least solve some of the technical problems in the background art.
[0012] To achieve the above-mentioned purpose, the first aspect of the present application provides a control circuit, which comprises: a PMIC signal input end and a LIMPHOME clear signal input end; the PMIC signal input end is directly connected to the control electrode of a first semiconductor control tube after a first diode; the connection point between the output end of the first diode and the control electrode of the first semiconductor control tube is a first connection point; the LIMPHOME clear signal input end is connected to the control electrode of a second semiconductor control tube, and the second semiconductor control tube sets the first connection point to low when the control electrode is high; the PMIC signal input end is directly connected to the control electrode of a third semiconductor control tube after a second diode; the first semiconductor control tube determines a first level state opposite to its control electrode based on its control electrode, and one end of the first semiconductor control tube outputting the first level state is connected to the control electrode of the third semiconductor control tube after a third diode; the third semiconductor control tube determines a second level state opposite to its control electrode based on its control electrode, and one end of the third semiconductor control tube outputting the second level state is connected to the first input end of an AND gate; the first connection point is also connected to the second input end of the AND gate; and the output end of the AND gate is the output end of the control circuit.
[0013] Optionally, the first semiconductor control tube is an NPN / PNP bipolar transistor with built-in resistance.
[0014] In the second aspect of the present application, a brake light circuit is also provided, which comprises: the aforementioned control circuit; a PMIC circuit for outputting a corresponding level to the PMIC signal input end of the control circuit according to the monitored target state; an MCU control circuit, wherein the LIMPHOME circuit control end of the MCU control circuit outputs a corresponding level to the LIMPHOME clear signal input end of the control circuit; and a high-side drive circuit configured to determine whether to open a high-side drive output based on the level state of the output of the control circuit and the output of the high-side drive control end of the MCU control circuit after or operation, wherein the high-side drive output is used to drive the state of the brake light.
[0015] Optionally, determining whether to enable the high-side drive output based on the level state of the output of the control circuit and the output of the high-side drive control terminal of the MCU control circuit after an OR operation includes: the output of the control circuit is connected to the enable terminal of the high-side drive circuit via a positive connection to a fourth diode; the output of the high-side drive control terminal of the MCU control circuit is connected to the enable terminal of the high-side drive circuit via a positive connection to a fifth diode.
[0016] Optionally, the operating modes of the PMIC circuit and the MCU control circuit include: transition from normal state to fault state, transition from fault state to normal state, and transition from normal state to sleep state; each operating mode corresponds to the high-low level transition of the PMIC signal input terminal and / or LIMPHOME clear signal input terminal of the control circuit.
[0017] Optionally, the high-side drive circuit controls the maximum current output to the brake lamp to not exceed the rated current threshold of the brake lamp by using a sampling resistor set between its IS pin and ground terminal and the sampled load current value of the output of the MCU control circuit.
[0018] Optionally, the input voltage of the IS pin of the high-side drive circuit is calculated by dividing the load current value by the sampling ratio and then multiplying it by the sampling resistor.
[0019] Optionally, the circuit further includes a diagnostic circuit; the diagnostic circuit includes three resistors connected in series, one end of which is connected to a diagnostic voltage and the other end is grounded; the diagnostic control terminal of the MCU control circuit is connected to the control electrode of a fourth semiconductor control transistor, and the fourth semiconductor control transistor outputs a diagnostic voltage that is inversely related to its control electrode; of the two internal connection points formed by the three resistors connected in series, the connection point closer to the diagnostic voltage is connected to the output terminal of the high-side drive circuit, and the connection point closer to the ground terminal is connected to the diagnostic result acquisition terminal of the MCU control circuit.
[0020] Optionally, the fourth semiconductor control transistor is an NPN / PNP dual transistor with a built-in resistor.
[0021] In a third aspect of this application, a vehicle is also provided, the vehicle including the aforementioned control circuit, or including the aforementioned brake light circuit.
[0022] The above technical solution has at least the following beneficial effects:
[0023] (1) The control circuit has the advantages of simple circuit structure and high reliability.
[0024] (2) The brake light circuit has high reliability. When the MCU crashes or other abnormal situations occur due to software errors, hardware failures or other reasons, or when the PMIC encounters power-related problems such as undervoltage, overtemperature, or short circuit, this invention can ensure that the brake light remains on, thereby continuously providing safety warnings and avoiding potential safety risks.
[0025] Other features and advantages of the embodiments of this application will be described in detail in the following detailed description section. Attached Figure Description
[0026] The accompanying drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the following detailed description to explain the embodiments of this application, but do not constitute a limitation on the embodiments of this application. In the drawings:
[0027] Figure 1 A schematic diagram of the control circuit according to an embodiment of this application is shown.
[0028] Figure 2 A schematic diagram illustrating an embodiment of the control circuit according to an embodiment of this application is shown.
[0029] Figure 3 A simulation result diagram of the control circuit according to an embodiment of this application is shown schematically;
[0030] Figure 4 A schematic diagram of an embodiment of a brake lamp circuit according to an embodiment of this application is shown. Detailed Implementation
[0031] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for illustration and explanation of the embodiments of this application and are not intended to limit the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0032] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.
[0033] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.
[0034] In some embodiments of this application, a control circuit is provided, comprising: a PMIC signal input terminal and a LIMPHOME clear signal input terminal; the PMIC signal input terminal is positively connected to a first diode and then to the control electrode of a first semiconductor control transistor; the connection point between the output terminal of the first diode and the control electrode of the first semiconductor control transistor is a first connection point; the LIMPHOME clear signal input terminal is connected to the control electrode of a second semiconductor control transistor, and the second semiconductor control transistor sets the first connection point to a low level when its control electrode is high; the PMIC signal input terminal is positively connected to a second diode and then to the control electrode of a third semiconductor control transistor; the first semiconductor control transistor determines a first level state inversely to its control electrode based on its control electrode, and one end of the first semiconductor control transistor outputting the first level state is connected to the control electrode of the third semiconductor control transistor via a positive connection to the third diode; the third semiconductor control transistor determines a second level state inversely to its control electrode based on its control electrode, and one end of the third semiconductor control transistor outputting the second level state is connected to the first input terminal of an AND gate; the first connection point is also connected to the second input terminal of the AND gate; the output terminal of the AND gate is the output terminal of the control circuit.
[0035] This control circuit is used to implement the vehicle's Limphome mode. It is controlled based on the PMIC signal and the LIMPHOME clear signal, and has the advantages of simple circuit structure and high reliability.
[0036] Figure 1 A schematic diagram illustrating an embodiment of the control circuit according to this application is shown. The following is in conjunction with... Figure 1 The implementation method of the control circuit is described.
[0037] The input terminals of the PMIC_SS1 and LIMPHOME_CLEAR signals in the diagram are the aforementioned PMIC signal input terminals and LIMPHOME clear signal input terminals. In simulated test scenarios, these two input terminals can be connected to signal generators to simulate the PMIC_SS1 signal output by the PMIC and the LIMPHOME_CLEAR signal output by the MCU, respectively. In some practical scenarios, these two input terminals are connected to the corresponding terminals of the PMIC circuit and the MCU control circuit, respectively.
[0038] The PMIC signal input terminal is connected to the control electrode of the first semiconductor control transistor Q1 after the first diode D1. Diode D1 can be a BAS321-Q, used to prevent the high-level signal of the subsequent circuit from affecting the state of the preceding PMIC_SS1. The first semiconductor control transistor Q1 is an NPN / PNP dual transistor with built-in resistors; a PUMD3-Q1 model can be used. It can achieve high-side small-signal switching control, and the dual transistor design and built-in resistors simplify circuit design and reduce the use of external components.
[0039] For ease of description later, the connection point between the output terminal of the first diode D1 and the control electrode of the first semiconductor control transistor Q1 is designated as the first connection point. The LIMPHOME clear signal input terminal is connected to the control electrode of the second semiconductor control transistor Q2. When the control electrode of the second semiconductor control transistor Q2 is high, it sets the first connection point low. The second semiconductor control transistor Q2 can be an NMOS transistor, specifically a 2N7002BK, used for switch control. When the LIMPHOME clear signal input terminal is high, Q2 conducts, connecting the first connection point to ground.
[0040] The PMIC signal input terminal is connected to the control electrode of the third semiconductor control transistor Q3 after being positively connected to the second diode D2. The first semiconductor control transistor Q1 determines a level state that is opposite to its control electrode based on its control electrode; for distinction, this is referred to as the first level state. The output terminal of this first level state, i.e., the connection point between Q1 and resistor R4 in the diagram, is connected to the control electrode of the third semiconductor control transistor Q3 after being positively connected to the third diode D3. Diodes D2 and D3 can be BAS321-Q, and the combination of D2 and D3 is used for OR logic control. The third semiconductor control transistor Q3 can be an NMOS transistor, specifically a 2N7002BK, used for switch control. The third semiconductor control transistor Q3 determines a second level state that is opposite to its control electrode based on its control electrode; i.e., the connection point between Q3 and resistor R8 in the diagram is connected to the first input terminal of AND gate U1. The AND gate U1 can be an SN74LVC1G08-Q1, implementing AND logic control. When the control electrode of the third semiconductor control transistor Q3 is high, Q3 conducts, and a low level is input to the first input terminal of AND gate U1. When the control level of the third semiconductor control transistor Q3 is low, Q3 is turned off, and a high level is input to the first input terminal of the AND gate U1.
[0041] The first connection point is also connected to the second input terminal of the AND gate U1; the output terminal of the AND gate is the output terminal of the control circuit, i.e., LIMPHOME_EN in the figure.
[0042] Other non-essential or optional circuit components in the diagram include: R1 and R2, series resistors (1kΩ can be used), for current limiting; R3, pull-down resistor (10kΩ can be used), for stabilizing and maintaining the circuit's default logic low level; R4, pull-up resistor (10kΩ can be used); R6, pull-down resistor (100kΩ can be used); R5, series resistor (1kΩ can be used), for current limiting between 5V and GND when the PNP transistor inside Q1 and Q2 are conducting, preventing damage to Q1 and Q2; R7, pull-down resistor (100kΩ can be used); C1, capacitor (1nF can be used), for filtering; R8, pull-up resistor (100kΩ can be used); and R9, pull-down resistor (100kΩ can be used). Figure 2 A schematic diagram illustrating an embodiment of the control circuit according to this application is shown. Figure 2 As shown, it illustrates the parameters of some electronic components, such as the component model, resistance value, and error range.
[0043] In some embodiments of this application, the first semiconductor control transistor is an NPN / PNP dual transistor with an internal resistor. The advantages of selecting an NPN / PNP dual transistor as the first semiconductor control transistor are: it enables high-side small-signal switching control; and the dual transistor configuration with an internal resistor simplifies circuit design and reduces the use of external components.
[0044] The control circuit described above is simple and reliable, enabling reliable output and maintenance of the required voltage level when the system detects faults or abnormalities such as over-voltage, under-voltage, over-temperature, or short circuits in critical components. When the MCU crashes due to software errors, hardware failures, or other reasons, or when the PMIC encounters power-related problems such as under-voltage, over-temperature, or short circuits, this invention ensures the brake light remains on, continuously providing safety warnings and avoiding potential safety risks.
[0045] Figure 3 A simulation result diagram of the control circuit according to an embodiment of this application is shown schematically. For example... Figure 3 As shown, V(PMIC_SS1): represents the timing change of the voltage state of the PMIC output safety status signal PMIC_SS1. V(LIMPHOME_CLEAR): represents the timing change of the logic voltage of the LIMPHOME_CLEAR signal output by the MCU. V(LIMPHOME_EN): represents the timing change of the voltage of the LIMPHOME_EN signal output by the control circuit. Therefore, it can be seen that this control circuit achieves the expected control logic and has the advantage of high reliability.
[0046] Based on the aforementioned control circuit, this application also provides a brake light circuit, which includes: the aforementioned control circuit; a PMIC circuit, used to output a corresponding level to the PMIC signal input terminal of the control circuit according to the monitored target state; the target state here can be a system fault or abnormal condition detected by the PMIC, such as overvoltage, undervoltage, or overheating; an MCU control circuit, wherein the LIMPHOME circuit control terminal of the MCU control circuit outputs a corresponding level to the LIMPHOME clear signal input terminal of the control circuit; and a high-side drive circuit, configured to determine whether to enable the high-side drive output based on the level state obtained by ORing the output of the control circuit and the output of the high-side drive control terminal of the MCU control circuit, wherein the high-side drive output is used to drive the brake light. This embodiment provides the application of a control circuit with Limphome function in vehicle brake lights, which provides a way to generate the input pins of the control circuit through the PMIC circuit and the MCU control circuit, and adds the drive for the brake light.
[0047] Figure 4A schematic diagram illustrating an embodiment of a brake lamp circuit according to this application is shown. Figure 4 As shown, the circuit comprises five parts: a control circuit, an HSD high-side drive circuit, a diagnostic circuit, a PMIC circuit, and an MCU control circuit. First, the control circuit enables the HSD high-side drive circuit to keep the brake lights on when the system detects faults or abnormalities such as overvoltage, undervoltage, overtemperature, or short circuits in critical components. Simultaneously, it resets the LIMPHOME signal during system restart and MCU power-on diagnostics, and when entering standby sleep mode, ensuring the brake lights remain off to prevent accidental flashing. Second, the HSD high-side drive circuit and the diagnostic circuit enable normal brake light operation and provide diagnostic functions such as overcurrent and open / short circuit detection. It is important to note that the diagnostic circuit is only an optional component of this implementation and is provided only when diagnostic functions are required. The PMIC chip in the PMIC circuit has functional safety features and can output a safety status signal SS1. When the PMIC detects a system fault or abnormality (such as overvoltage, undervoltage, or overtemperature), SS1 outputs a low level. The MCU chip in the MCU control circuit is used for signal control and ADC acquisition in the LIMPHOME circuit, HSD high-side drive circuit, and diagnostic circuit. The high-side drive chip U3 in the HSD high-side drive circuit can be a BTS7040-1EPA, which can be used for brake lamp loads with a drive current of up to 4.5A.
[0048] In some embodiments of this application, determining whether to enable the high-side drive output based on the level state of the OR operation between the output of the control circuit and the output of the high-side drive control terminal of the MCU control circuit includes: connecting the output of the control circuit to the enable terminal of the high-side drive circuit via a positive connection to a fourth diode; and connecting the output of the high-side drive control terminal of the MCU control circuit to the enable terminal of the high-side drive circuit via a positive connection to a fifth diode. This embodiment provides a logic implementation method based on a hardware structure. Combined with... Figure 4 The output terminal LIMPHOME_EN of the control circuit is connected to the enable terminal EN of the high-side drive circuit via a positive connection to the fourth diode D11. The output terminal DO_HSD_EN of the high-side drive control of the MCU control circuit is connected to the enable terminal EN of the high-side drive circuit via a positive connection to the fifth diode D12. D11 and D12 are both diodes, and the model can be BAS321-Q. D11 and D12 are combined for OR logic control. In this structure, if either LIMPHOME_EN or DO_HSD_EN outputs a high level, the HSD high-side drive output is enabled. This embodiment provides the hardware foundation for the logic control of the high-side drive circuit by the PMIC circuit and the MCU control circuit.
[0049] In some embodiments of this application, the operating modes of the PMIC circuit and the MCU control circuit include: transition from normal state to fault state, transition from fault state to normal state, and transition from normal state to sleep state; each operating mode corresponds to the high-low level transition of the PMIC signal input terminal and the LIMPHOME clear signal input terminal of the control circuit. Their correspondence is shown in the table below.
[0050] Operating mode PMIC SS1 LIMP HOME CLEAR LIMP HOME EN Normal state -> Fault state 1->0 0 1 Fault state -> Normal state 0->1 1->0 0 Normal state -> Standby state 1->0 1->0 0
[0051] The following analysis of the working process of the brake lamp circuit under different operating modes is intended to help those skilled in the art understand the various implementation methods in this application.
[0052] In the Normal state -> Fault state operating mode, the brake lights remain on. In Normal state, PMIC_SS1 outputs a high level, and LIMPHOME_CLEAR outputs a low level. After passing through D2, the gate of Q3 of PMIC_SS1 is high, Q3 is turned on, and U1:A is low. After passing through D1, the base of Q1:NPN is high, Q1:NPN is turned on, the base of Q1:PNP is low, Q1:PNP is turned on, and when CLEAR is low, Q2 is not turned on, and U1:B is high. Therefore, U1:A = 0, U1:B = 1, and after passing through an AND gate, LIMPHOME_EN outputs a low level. After entering the fault state, PMIC_SS1 outputs a low level, and LIMPHOME_CLEAR remains low. After passing through D2, the gate of Q3 of SS1 is low, Q3 is not turned on, and U1:A is high. When SS1 is low, D1 is off, and the base of Q1 (NPN) is pulled up to 5V through R5 and Q1 (PNP). Simultaneously, when CLEAR is low, Q2 is not conducting, and U1 (B) remains at its original high level. Therefore, U1 (A) = 1 and U1 (B) = 1, resulting in a high output for LIMPHOME_EN after AND gate. At this time, regardless of whether the MCU-controlled DO_HSD_EN level of the HSD high-side driver is high, the HSD high-side driver is always on, keeping the brake lights on.
[0053] In the fault state -> Normal state operating mode, first clear the LIMPHOME signal to ensure that the brake lights remain off during the system restart and MCU power-on diagnostics, avoiding flashing caused by accidental triggering. After restoring the Normal state, the system restarts and the MCU performs power-on diagnostics. During this period, the PMIC_SS1 signal will be repeatedly pulled high 3-5 times (the exact number depends on the PMIC model). LIMPHOME_CLEAR needs to be kept high first. With CLEAR high, the gate of Q2 is high after passing through R2, Q2 is turned on, Q1 (NPN base) is low, Q1 (NPN) is not turned on, Q2 (PNP base) is high, Q2 (PNP) is not turned on, and U1:B is pulled down to ground through R5 and Q2, making U1:B low. Therefore, U1:B = 0. Regardless of whether U1:A = 0 or U1:A = 1, i.e., whether SS1 is high or low, LIMPHOME_EN after the AND gate will always output low, preventing the HSD high-side drive from accidentally triggering the brake lights.
[0054] In the Normal -> Standby (sleep) mode, the LIMPHOME signal should first be cleared to ensure the brake lights remain off and prevent accidental activation in sleep mode. When entering Standby mode, PMIC_SS1 changes from low to high. During this period, LIMPHOME_CLEAR must remain high. With CLEAR high, the gate of Q2 becomes high after passing through R2, turning Q2 on. The base of Q1 (NPN) is low, so Q1 (NPN) is not on. The base of Q2 (PNP) is high, so Q2 (PNP) is not on. U1:B is pulled down to ground through R5 and Q2, making U1:B low. Therefore, U1:B = 0. Regardless of whether U1:A = 0 or U1:A = 1 (i.e., whether SS1 is high or low), LIMPHOME_EN always outputs a low level after passing through the AND gate. This prevents the HSD high-side drive from accidentally triggering the brake lights.
[0055] Therefore, this invention innovatively enables the brake lights to remain illuminated automatically when the ECU controller system malfunctions, effectively preventing accidental triggering during system restarts or sleep mode. It also specifically considers the special circumstances during system restarts or entering Standby sleep mode. During this process, this embodiment effectively prevents the brake lights from being mistakenly activated due to misoperation or other unexpected reasons. This function not only reduces unnecessary energy consumption but also avoids potential driver confusion and misunderstandings for vehicles behind.
[0056] In some embodiments of this application, the high-side drive circuit controls the maximum current output to the brake lamp to not exceed the rated current threshold of the brake lamp by using a sampling resistor set between its IS pin and ground and a sampled value of the load current output of the MCU control circuit. This embodiment provides an overcurrent protection function based on the high-side drive circuit, which can effectively prevent excessive input current of the high-side drive circuit and reduce or avoid damage to the brake lamp.
[0057] Furthermore, the input voltage of the IS pin of the high-side drive circuit is calculated by dividing the load current value by the sampling ratio and then multiplying it by the sampling resistor. For example, the input voltage is obtained through the R... sense The resistance value can be configured with an overcurrent protection threshold, and the MCU's ADC port acquires V... IS Voltage can be monitored in real time to determine the output load current. The specific calculation method is as follows:
[0058] V IS =R sense *I IS =R sense *(I L / K ILIS )
[0059] Among them, V IS R is the voltage value at the IS pin of the HSD. sense Configure a resistor for the overcurrent threshold, i.e., a sampling resistor, I. IS For the output current of the IS pin, I L For the output load current, K ILIS =1800, sampling ratio.
[0060] In some embodiments of this application, the circuit further includes a diagnostic circuit; the diagnostic circuit includes three resistors connected in series, one end of which is connected to a diagnostic voltage and the other end is grounded. The diagnostic control terminal of the MCU control circuit is connected to the control electrode of a fourth semiconductor control transistor, and the fourth semiconductor control transistor outputs a diagnostic voltage that is inversely phase to its control electrode. Of the two internal connection points formed by the three resistors connected in series, the connection point closer to the diagnostic voltage is connected to the output terminal of the high-side drive circuit, and the connection point closer to the ground terminal is connected to the diagnostic result acquisition terminal of the MCU control circuit. Please refer to... Figure 4The fourth semiconductor control transistor, Q10, is an NPN / PNP dual transistor with built-in resistors. The model PUMD3-Q1 can be selected. It can achieve high-side small-signal switching control. Furthermore, the dual transistor design and built-in resistors simplify circuit design and reduce the use of external components. R10, R11, and R12 are three resistors connected in series. R10 is a pull-up resistor, with a value of 10kΩ, used for load open-circuit diagnosis. R11 and R12 are pull-down voltage divider resistors, with a value of 100kΩ, used for load short-supply diagnosis.
[0061] The load open / short circuit fault diagnosis process of this diagnostic circuit is as follows: In the Normal OFF state, open circuit diagnosis: DO_DIAG_EN is high; DI_STATUS outputs a high level when the load is open, and a low level when normal. In the Normal OFF state, short power supply diagnosis: DO_DIAG_EN is low; DI_STATUS outputs a high level when the load is short-circuited, and a low level when normal.
[0062] In the diagnostic circuit, the fourth semiconductor control transistor Q10 is an NPN / PNP dual transistor with built-in resistors. The PUMD3-Q1 model can be selected, which offers the advantages of enabling high-side small-signal switching control, while the dual transistor design and built-in resistors simplify circuit design and reduce the use of external components.
[0063] In the above embodiments, the inclusion of a diagnostic circuit provides comprehensive diagnostic capabilities, enabling real-time monitoring of the brake light circuit, including common faults such as overcurrent, open circuit, and short circuit. This function allows the system to respond promptly when a fault occurs and provides maintenance personnel with accurate fault information, facilitating rapid problem location and repair. This design significantly improves the reliability and maintenance efficiency of the vehicle's electronic systems, providing a solid guarantee for driving safety.
[0064] In some embodiments of this application, a vehicle is also provided, which includes the aforementioned control circuit or the aforementioned brake light circuit. Vehicles equipped with the above circuits significantly improve driving safety, enhance system reliability, facilitate maintenance, meet stringent safety standards, and provide a user-friendly experience.
[0065] When the circuit described in this application is applied to a vehicle, it ensures that the brake lights remain illuminated when the ECU controller system malfunctions, thereby enhancing driving safety, improving system reliability, preventing false triggering, optimizing user experience, simplifying maintenance procedures, meeting stringent safety regulations, extending system lifespan, and improving energy efficiency, thus achieving significant technical benefits in multiple aspects.
[0066] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware implementation, a completely software implementation, or an implementation combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0067] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0068] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0069] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0070] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.
[0071] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.
[0072] Computer-readable media include both permanent and non-permanent, removable and non-removable media, which can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.
[0073] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0074] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application.
Claims
1. A control circuit, characterized by The circuit comprises: a PMIC signal input end and a LIMPHOME clear signal input end; the PMIC signal input end is directly connected to the control electrode of a first semiconductor control tube after a first diode, and a connection point between the output end of the first diode and the control electrode of the first semiconductor control tube is a first connection point; the LIMPHOME clear signal input end is connected to the control electrode of a second semiconductor control tube, and the second semiconductor control tube sets the first connection point to low when the control electrode of the second semiconductor control tube is high; the PMIC signal input end is directly connected to the control electrode of a third semiconductor control tube after a second diode; the first semiconductor control tube determines a first level state opposite to the control electrode of the first semiconductor control tube based on the control electrode of the first semiconductor control tube, and one end of the first semiconductor control tube outputting the first level state is connected to the control electrode of the third semiconductor control tube after a third diode; the third semiconductor control tube determines a second level state opposite to the control electrode of the third semiconductor control tube based on the control electrode of the third semiconductor control tube, and one end of the third semiconductor control tube outputting the second level state is connected to the first input end of an AND gate; the first connection point is also connected to the second input end of the AND gate; the output end of the AND gate is the output end of the control circuit.
2. The circuit of claim 1, wherein, The first semiconductor control tube is an NPN / PNP dual transistor with a built-in resistor.
3. A brake light circuit characterized by, The circuit comprises: the control circuit of claim 1 or 2; a PMIC circuit configured to output a corresponding level to the PMIC signal input end of the control circuit according to a monitored target state; an MCU control circuit, wherein a LIMPHOME circuit control end of the MCU control circuit outputs a corresponding level to the LIMPHOME clear signal input end of the control circuit; a high-side drive circuit configured to determine whether to open a high-side drive output based on a level state of an OR operation result of the output of the control circuit and the output of a high-side drive control end of the MCU control circuit, wherein the high-side drive output is used to drive the state of a brake lamp.
4. The stop lamp circuit of claim 3, wherein, Determining whether to open the high-side drive output based on the level state of the OR operation result of the output of the control circuit and the output of the high-side drive control end of the MCU control circuit comprises: the output of the control circuit is connected to the enable end of the high-side drive circuit after a fourth diode; the output of the high-side drive control end of the MCU control circuit is connected to the enable end of the high-side drive circuit after a fifth diode.
5. The stop lamp circuit of claim 3, wherein, The working modes of the PMIC circuit and the MCU control circuit include: conversion from a normal state to a fault state, conversion from the fault state to the normal state, and conversion from the normal state to a sleep state; each working mode corresponds to the high-low level conversion of the PMIC signal input end and / or the LIMPHOME clear signal input end of the control circuit.
6. The stop lamp circuit of claim 3, wherein, The high-side drive circuit controls the maximum current output to the brake lamp by the high-side drive circuit to not exceed the rated current threshold of the brake lamp through a sampling resistor arranged between the IS pin and the ground end of the high-side drive circuit and the load current value sampling value of the output of the MCU control circuit.
7. The stop lamp circuit of claim 6, wherein, The input voltage of the IS pin of the high-side drive circuit is calculated according to the load current value divided by the sampling ratio and multiplied by the sampling resistance.
8. The stop lamp circuit of claim 3, wherein, The circuit further comprises a diagnostic circuit; The diagnostic circuit comprises three resistors connected in series, one end of the three resistors connected to a diagnostic voltage and the other end grounded; The diagnostic control end of the MCU control circuit is connected to the control electrode of the fourth semiconductor control tube, and the fourth semiconductor control tube outputs a diagnostic voltage opposite to the control electrode based on the control electrode; Among two internal connection points formed by the three resistors connected in series, the connection point close to the diagnostic voltage is connected to the output end of the high-side drive circuit, and the connection point close to the ground is connected to the diagnostic result acquisition end of the MCU control circuit.
9. The stop lamp circuit of claim 8, wherein, The fourth semiconductor control tube is an NPN / PNP dual transistor with a built-in resistor.
10. A vehicle characterized by comprising: The vehicle comprises the control circuit of claim 1 or 2, or the brake light circuit of any one of claims 3 to 9.