Structure-improvement-based low-dynamic-resistance low-threshold-voltage depletion type GaN device

Abstract

The invention discloses a low dynamic resistance and small threshold voltage depletion type GaN device based on structure improvement, and particularly relates to the technical field of power electronic devices, the device comprises a substrate, and a GaN buffer layer, a GaN channel layer, an AlGaN barrier layer and a p-GaN layer which are sequentially arranged on the substrate from bottom to top, the thickness of the p-GaN layer arranged on the AlGaN barrier layer is 1-40nm, and the thickness of the p-GaN layer is 1-40nm. The thickness of the p-GaN layer, the thickness of the AlGaN layer and the Al component have a mapping relation with the threshold voltage and the dynamic on-resistance of the device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronics, in particular to a low dynamic resistance small threshold voltage depletion mode GaN device based on structure improvement. BACKGROUND

[0002] The invention patent with publication number CN115472686A discloses a low dynamic resistance enhancement mode GaN device, which changes the structure of the p-GaN layer to suppress current collapse and improve the dynamic stability of the device. However, this device is an enhancement mode device, and in some lithium battery protection and bidirectional protection circuits, depletion mode GaN devices with threshold voltage -5V≤Vth≤0 are required, and this device cannot be applied.

[0003] The prior art (Chu, R., Corrion, et al. 1200-V Normally Off GaN-on-Si Field-Effect Transistors With Low Dynamic on-Resistance. IEEE Electron Device Letters, 2011, 32(5): 632-634. DOI: 10.1109 / LED.2011.2118190.) uses a multi-layer field plate to suppress current collapse and improve the breakdown voltage of the device, but the manufacturing process of the multi-layer field plate device is complex and requires multiple metal depositions.

[0004] In 2014, the 75th Applied Physics Society Autumn Academic Lecture, lecture number 19p-PB2-14, research topic: 600 V Switching Characteristics of GaN Polarization Super Junction (PSJ) Transistor on Sapphire, proposes a polarization super junction field effect transistor with a long p-GaN gate, which is a depletion mode device used to improve the breakdown voltage of the device. However, the threshold voltage of this device is less than -5V, and a large negative voltage is required to turn off the device, which cannot be applied to specific small threshold voltage (-5V≤Vth≤0) circuit applications. SUMMARY

[0005] To this end, the present application provides a low dynamic resistance small threshold voltage depletion mode GaN device based on structure improvement to solve the problems raised in the background art.

[0006] In order to achieve the above object, the present application provides the following technical scheme: a low-dynamic-resistance small-threshold-voltage depletion-mode GaN device based on structure improvement, which comprises a substrate and a GaN buffer layer, a GaN channel layer, an AlGaN barrier layer and a p-GaN layer arranged in sequence from bottom to top on the substrate, the thickness of the p-GaN layer arranged on the AlGaN barrier layer is 1-40 nm, and there is a mapping relationship between the thickness of the p-GaN layer, the thickness of the AlGaN layer and the Al component and the threshold voltage and dynamic on-resistance of the device.

[0007] Preferably, the p-GaN layer is directly connected with a gate electrode, and the gate electrode is located between the source electrode and the drain electrode together with the p-GaN layer.

[0008] Preferably, the thickness of the p-GaN layer is 20 nm, the thickness of the AlGaN layer is 25 nm, and the Al component is 25%.

[0009] Preferably, the GaN buffer layer is used to buffer the lattice mismatch stress between the GaN channel layer and the substrate layer, and is an unintentionally doped n-type semiconductor.

[0010] Preferably, the substrate material is any one of sapphire, silicon, silicon carbide and gallium nitride substrate.

[0011] Preferably, the gate electrode, the source electrode and the drain electrode of the device are all metal electrode structures for conducting electricity.

[0012] 1. The present application realizes a small threshold voltage (-5V≤Vth≤0) and a low on-resistance depletion-mode GaN device by adjusting the thickness of the thin-layer p-GaN layer and the thickness of the AlGaN barrier layer, and is applied to specific circuit applications.

[0013] 2. The present application realizes a low dynamic on-resistance by introducing the thin-layer p-GaN layer, and the manufacturing process is simple and does not need a complex multi-layer field plate process. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 A preparation process flow chart of the GaN device provided by the present application is provided.

[0015] Figure 2 A final form structure diagram of the GaN device provided by the present application is provided.

[0016] In the figure: 1, p-GaN layer; 2, AlGaN barrier layer; 3, GaN channel layer; 4, GaN transition layer; 5, substrate; 6, passivation layer; 7, source electrode; 8, gate electrode; 9, drain electrode. DETAILED DESCRIPTION

[0017] The following embodiments of the present application are illustrated by way of specific examples, and other advantages and effects of the present application will be readily appreciated by those skilled in the art upon reading the following description and examples. It is obvious that the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts fall within the scope of the present application.

[0018] The present application provides a low dynamic resistance small threshold voltage depletion mode GaN device based on structure improvement, which comprises a substrate and a GaN buffer layer, a GaN channel layer, an AlGaN barrier layer and a p-GaN layer arranged in sequence from bottom to top on the substrate, and the thickness of the p-GaN layer arranged on the AlGaN barrier layer is 1-40 nm.

[0019] In an exemplary embodiment, the p-GaN layer is directly connected with a gate electrode for controlling the turn-on and turn-off of the depletion mode device, and the gate electrode is located between the source electrode and the drain electrode and the p-GaN layer.

[0020] In an exemplary embodiment, the thickness of the p-GaN layer is 20 nm.

[0021] In an exemplary embodiment, the thickness, doping concentration and length of the p-GaN layer can be designed to change the threshold voltage and on-resistance of the device.

[0022] In an exemplary embodiment, the GaN buffer layer is used to release the lattice mismatch stress between the GaN channel layer and the substrate, and is an unintentionally doped n-type semiconductor.

[0023] In an exemplary embodiment, the substrate material is any one of sapphire, silicon, silicon carbide, gallium nitride substrate.

[0024] In an exemplary embodiment, a passivation layer is covered on the surface of the device for protecting the surface of the AlGaN barrier layer in the non-p-GaN thin layer area, reducing the interface trap charge, and effectively suppressing the current collapse.

[0025] In an exemplary embodiment, the gate electrode, the source electrode and the drain electrode of the device are all metal electrode structures for conducting electricity.

[0026] The present embodiment provides a preparation process flow chart of the above-mentioned GaN device (as shown in Figure 1 ), which shows the key steps from wafer cleaning to completion of the core structure of the device, and the specific steps are as follows:

[0027] Step 1: Wafer cleaning: The wafer structure is cleaned from top to bottom, including the p-GaN layer, AlGaN barrier layer, GaN channel layer, GaN buffer layer, and substrate. This process removes impurities and oxides from the wafer surface, providing a clean foundation for subsequent processes.

[0028] Step 2: Self-stopping etching of the p-GaN layer: Only a portion of the p-GaN layer remains, while the rest is etched away. Through the self-stopping etching process, the etching selectivity difference between the p-GaN layer and the underlying AlGaN barrier layer is utilized to precisely define the area of the p-GaN layer, laying the foundation for the structure of the gate-regulated two-dimensional electron gas (2DEG).

[0029] Step 3: Deposition of passivation layer: Aluminum oxide (Al2O3) is deposited on the surface as a passivation layer, passivating surface defects, reducing leakage current, and improving the electrical stability and reliability of the device.

[0030] Step 4: Preparation of source and drain ohmic metal: Ohmic metal electrodes are prepared at both ends of the pGaN layer for the source (S) and drain (D). The source and drain are the input / output terminals for electrons, and the ohmic metal must achieve low-resistance contact with the AlGaN / GaN heterojunction to ensure efficient current transmission.

[0031] Step 5: Preparation of gate metal: The final device structure is formed, including the passivation layer, gate (G), and underlying AlGaN barrier layer, GaN channel layer, GaN buffer layer, and substrate. By applying a voltage to control the conduction state of the two-dimensional electron gas in the GaN channel layer, the device achieves switching or amplification functions; the layers work together to ensure high-frequency and high-voltage performance, with the device operating in the following states:

[0032] By applying a voltage between the gate (G) and the source (S), the conduction and turn-off of the device can be controlled. When the gate-source voltage difference Vgs is 0V, the two-dimensional electron gas in the underlying GaN channel layer is not completely depleted, and the device remains in the on-state, exhibiting a depletion-mode device.

[0033] Specifically, when the gate-source voltage difference Vgs is less than the threshold voltage Vth (the threshold voltage is usually in the range of -5V ≤ Vth ≤ 0), the device is in the off-state. When the gate-source voltage difference Vgs is greater than the threshold voltage Vth, the device is in the on-state.

[0034] This series of processes focuses on regulating the two-dimensional electron gas and constructing a low-resistance contact, high-stability structure: etching the p-GaN layer for electrical regulation, depositing a passivation layer to optimize surface properties, preparing source / drain and gate metal to complete electrode functions, and finally obtaining a GaN device with high-frequency and high-efficiency characteristics, as shown in Figure 2 , which can be applied in the fields of 5G radio frequency and new energy vehicle power supply.

[0035]

[0036] The above table shows the relationship between p-GaN thickness, Al component, AlGaN thickness and threshold voltage. Each variable needs to be analyzed separately, and then the interaction is sorted out to find the rule:

[0037] 1. The influence of p-GaN thickness

[0038] When the p-GaN thickness increases, the "negative degree" of threshold voltage significantly weakens (even from negative to positive).

[0039] For example: Al component 18%, AlGaN thickness 16 nm, p-GaN thickness 20 nm corresponds to threshold voltage -0.7V (negative), p-GaN thickness 30 nm corresponds to -0.46V (negative weakening).

[0040] Conclusion: The larger the p-GaN thickness, the more "positive" the threshold voltage, and the more obvious the trend of the device turning into an enhancement type (requiring a positive gate voltage to turn on).

[0041] 2. The influence of Al component

[0042] When the Al component increases, the "negative degree" of threshold voltage significantly enhances (more negative). pGaN thickness 20 nm, AlGaN thickness 16 nm, Al component 18% corresponds to -0.7V, 20% corresponds to -1V, 21% corresponds to -1.15V (negative continuously enhanced). The higher the Al component, the more "negative" the threshold voltage, and the more obvious the trend of the device turning into a depletion type (zero gate voltage conduction).

[0043] 3. The influence of AlGaN thickness

[0044] When the AlGaN thickness increases, the "negative degree" of threshold voltage significantly enhances (more negative). pGaN thickness 20 nm, Al component 20%, AlGaN thickness 15 nm corresponds to -0.82V, 16 nm corresponds to -1V, 18 nm corresponds to -1.35V (negative continuously enhanced). The larger the AlGaN thickness, the more "negative" the threshold voltage, and the more obvious the trend of the device turning into a depletion type (zero gate voltage conduction).

[0045] 4. Comprehensive interaction rule

[0046] The "offset effect" of pGaN thickness on the latter two: when the pGaN thickness increases, the enhancement effect of Al composition and AlGaN thickness on the "negative threshold voltage" will be weakened. When the Al composition is 20% and the AlGaN thickness is 22 nm: the pGaN thickness of 20 nm corresponds to a threshold voltage of -2.05 V (extremely negative, depletion type); when the pGaN thickness is 30 nm, there is no such combination, but according to the trend under the same pGaN thickness, the negative degree will be significantly weakened; when the pGaN thickness is 40 nm, the Al composition of 20% and the AlGaN thickness of 22 nm correspond to 0.45 V (positive, enhancement type). The "synergistic effect" of Al composition and AlGaN thickness: when both of them increase, the negative degree of threshold voltage will be superimposed and enhanced, making the device more biased to the depletion type.

[0047] In short, the larger the pGaN thickness, the more positive the threshold voltage (enhancement type); the larger the Al composition and AlGaN thickness, the more negative the threshold voltage (depletion type). And the pGaN thickness can offset the "negative enhancement" effect of the latter two, realizing flexible regulation of the device from depletion type to enhancement type.

[0048] Although the present application has been described in detail with general description and specific embodiments above, some modifications or improvements can be made on the basis of the present application, which is obvious to those skilled in the art. Therefore, these modifications or improvements made on the basis of not deviating from the spirit of the present application, all belong to the scope of the present application.

Claims

1. A low dynamic resistance, small threshold voltage, depletion mode GaN device based on structural modifications, the device comprising a substrate and, in order from bottom to top of the substrate, a GaN buffer layer, a GaN channel layer, an AlGaN barrier layer, and a p-GaN layer, characterized in that: The p-GaN layer arranged on the AlGaN barrier layer has a thickness of 1nm-40nm, and the p-GaN layer thickness, the AlGaN layer thickness and the Al component have a mapping relationship with the threshold voltage and the dynamic on-resistance of the device.

2. The low dynamic resistance, low threshold voltage, depletion mode GaN device based on structural modifications of claim 1, wherein: The p-GaN layer is directly connected with the gate electrode, and the gate electrode and the p-GaN layer are located between the source electrode and the drain electrode.

3. The low dynamic resistance, low threshold voltage, depletion mode GaN device based on structural modifications of claim 1, wherein: The p-GaN layer has a thickness of 20nm, the AlGaN layer has a thickness of 25nm, and the Al component is 25%.

4. The low dynamic resistance, low threshold voltage, depletion mode GaN device based on structural modifications of claim 1, wherein: The substrate material adopts any one of sapphire, silicon, silicon carbide, gallium nitride substrate.

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