A fault diagnosis and protection method, device and medium of a driving circuit

Abstract

This application discloses a fault diagnosis and protection method, device, and medium for a drive circuit. The method includes: inputting sine and cosine signals to a pre-set envelope extraction module to determine the envelope line; converting the envelope line, which is an AC signal, into a digital signal; converting the digital signal into an analog voltage value; determining a pre-set threshold; comparing the analog voltage value with the threshold; if the analog voltage value is greater than the threshold, determining that the current speed is high and outputting a low-level speed logic signal; if the analog voltage value is less than or equal to the threshold, determining that the current speed is low and outputting a high-level speed logic signal; performing circuit detection through a pre-set fault detection module to determine a fault signal; and inputting the fault signal and the speed logic signal together to a pre-set logic control module to determine the corresponding protection action.

Description

Technical Field

[0001] This application relates to the field of circuit protection technology, and in particular to a method, device and medium for fault diagnosis and protection of a drive circuit. Background Technology

[0002] The market share of new energy vehicles is increasing year by year; however, high-voltage safety issues are frequently occurring. Especially during high-speed motor operation, high-voltage faults are difficult to handle and protect against in a timely manner, easily leading to controller burnout. This has become a significant research topic in the field of functional safety of motor drive systems. During high-speed vehicle operation, when a fault occurs, the motor generates back electromotive force (EMF) at high speeds. If the back EMF exceeds a certain limit, directly shutting down all IGBTs can easily damage them. Therefore, in certain fault situations, it is not possible to directly shut down all IGBTs; a method is needed to first determine the speed. Currently, the common practice is to use a dedicated decoding chip or microcontroller to decode and analyze the speed. The microcontroller then acquires the analyzed speed signal and further uses software logic units to comprehensively process faults under different speed conditions and other faults.

[0003] However, this method of fault diagnosis and handling based on software logic units usually waits until the next closed-loop control cycle before executing fault protection actions, which leads to a lag in fault handling and poses certain safety hazards. Summary of the Invention

[0004] To address the aforementioned problems, this application proposes a fault diagnosis and protection method for a drive circuit, comprising: inputting sine and cosine signals to a pre-set envelope extraction module to determine an envelope line; converting the envelope line, which is an AC signal, into a digital signal; converting the digital signal into an analog voltage value; determining a pre-set threshold; comparing the analog voltage value with the threshold; if the analog voltage value is greater than the threshold, determining that the current speed is high and outputting a low-level speed logic signal; if the analog voltage value is less than or equal to the threshold, determining that the current speed is low and outputting a high-level speed logic signal; performing circuit detection through a pre-set fault detection module to determine a fault signal; and inputting the fault signal and the speed logic signal together to a pre-set logic control module to determine the corresponding protection action.

[0005] In one example, the method further includes: determining a pre-set speed judgment module, the speed judgment module including an input resistor R7, a feedback resistor R8, a voltage divider resistor R9, a voltage divider resistor R10, an operational amplifier U2, a pull-up resistor R11, an input current limiting resistor R12, an NPN transistor T1, a pull-up resistor R13, a filter capacitor C3, a rectifier diode D2, a filter capacitor C4, and a load capacitor R14; the voltage divider resistors R9 and R10 determine a voltage divider circuit, and the center value of the envelope is extracted through the voltage divider circuit; the operational amplifier U2 is used to convert the envelope, which is an AC signal, into a digital signal; a current signal with speed information is generated by the switching action of the NPN transistor T1, and the current signal is processed by the rectifier diode D2 and the filter capacitor C4 to output an analog voltage value.

[0006] In one example, the method further includes: the speed determination module further includes an input resistor R15, a feedback resistor R16, a voltage divider circuit R17, a voltage divider circuit R18, a pull-up resistor R19, and an operational amplifier U3; the voltage divider resistors R17 and R18 determine the voltage divider circuit, and the voltage divider circuit determines a threshold; the operational amplifier U3 is used to compare the analog voltage value according to the threshold.

[0007] In one example, the method further includes: the envelope extraction module includes a detector diode D1, a charging capacitor C1, an output resistor R1, an output capacitor C2, a load resistor R2, an amplification resistor R3, an amplification resistor R4, an amplification resistor R5, an amplification resistor R6, and an operational amplifier U1.

[0008] In one example, the method further includes: the detector diode D1 is used for rectification; when the input sine and cosine signals are positive and greater than the output value, the detector diode D1 is turned on to charge the charging capacitor C1; the charging capacitor C1 discharges when the detector diode D1 is turned off, outputting a voltage value; the voltage value changes with the envelope to obtain a modulation signal, so as to determine the envelope waveform based on the modulation signal; the output capacitor C2 and the load resistor R2 constitute a filter circuit, which is used to filter out the DC component of the envelope; the operational amplifier U1 is used to convert the differential signal of the envelope into a single-ended signal, and the amplification factor is determined according to the amplification resistors R3, R4, R5, and R6, so as to output the basic envelope waveform according to the amplification factor.

[0009] In one example, the method further includes: the fault detection module includes a power fault detection module and other fault detection modules, and the circuit is detected by the power fault detection module and the other fault detection modules; when a power fault is detected, the power fault detection module outputs a low-level power fault signal; when other faults are detected, the other fault detection modules output low-level other fault signals.

[0010] In one example, the method further includes: processing any one of the power failure signal and the other failure signals through a pre-set AND gate U4, outputting a failure signal, and inputting the failure signal to a pre-set driver chip enable pin EN to turn off the driver chip.

[0011] In one example, the method further includes: analyzing the fault signal and the speed logic signal through the logic control module; when a fault occurs at high speed, outputting a high level to the digital isolator to trigger the lower three-bridge active short-circuit protection; when a fault occurs at low speed, outputting a low level to the driver chip enable pin EN to perform full shutdown protection; and when there is no fault, normal driving is not affected.

[0012] On the other hand, this application also proposes a fault diagnosis and protection device for a drive circuit, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the fault diagnosis and protection device for the drive circuit to perform: the method described in any of the examples above.

[0013] On the other hand, this application also proposes a non-volatile computer storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to be the method described in any of the examples above.

[0014] This application extracts the center value of the envelope using a voltage divider circuit, converts it into a digital signal using an operational amplifier, and then processes it through transistors to output an analog voltage value. This value is compared with a threshold to accurately determine the high and low speed states. A detector diode and charging capacitor constitute the envelope extraction module, which accurately acquires the modulation signal and outputs the basic envelope waveform, providing a reliable basis for subsequent processing. A power supply fault detection module and other fault detection modules detect different faults. The occurrence of any fault triggers the driver chip to shut down via an AND gate, ensuring circuit safety. The logic control module analyzes the fault signal and the speed logic signal. A high-speed fault triggers the three-bridge active short-circuit protection, a low-speed fault executes full transistor shutdown protection, and the drive is not affected during non-fault periods, achieving intelligent and flexible protection. Attached Figure Description

[0015] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0016] Figure 1 This is a flowchart illustrating a fault diagnosis and protection method for a drive circuit according to an embodiment of this application.

[0017] Figure 2 This is a schematic diagram of a driving circuit module in an embodiment of this application;

[0018] Figure 3 This is a detailed schematic diagram of a driving circuit according to an embodiment of this application;

[0019] Figure 4 This is a schematic diagram of the envelope extraction module circuit in an embodiment of this application;

[0020] Figure 5 This is a schematic diagram of the speed determination module circuit in an embodiment of this application;

[0021] Figure 6 This is a schematic diagram of the fault module circuit in an embodiment of this application;

[0022] Figure 7 This is a schematic diagram of a fault diagnosis and protection device for a drive circuit according to an embodiment of this application. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.

[0025] like Figure 1 As shown, in order to solve the above problems, this application provides a fault diagnosis and protection method for a drive circuit, which is applied in a drive circuit, such as... Figure 2 As shown, the circuit consists of sine and cosine signals, an envelope extraction module, a speed judgment module, a power supply fault module, other fault modules, a logic control module, a driver chip, a digital isolator, and a driver module. Figure 3As shown, the sine wave signal is initially rectified and filtered by D1 and C2, then processed by U1, and the output is connected to a comparator / amplifier circuit composed of U2, R7-R9, etc. The output of U2 is electrically isolated through transistor T1, and the secondary of the optocoupler is connected to U5. U3 is a comparator, U6 is a NOT gate logic device, and U7 is an AND gate logic device. The power management chip PMIC outputs a fault signal level. U4 is an AND gate logic device, which ANDs with other fault signals, and the result is output to U5, which is a NOT gate logic device. The output of U8 is connected to the driver module U10, which controls three relays to achieve high and low level control. In the auxiliary circuit, the VCC power supply provides bias to modules such as U2 and U5 through R10-R13, capacitors such as C3 and C4 are used for filtering and decoupling, and R14-R17 form a feedback or voltage divider network. The whole circuit forms a complete control system with signal conditioning, electrical isolation, relay driving and power management.

[0026] The methods include:

[0027] S101. Input the sine and cosine signals to a pre-set envelope extraction module to determine the envelope line through the envelope extraction module, convert the envelope line as an AC signal into a digital signal, and convert the digital signal into an analog voltage value, determine a pre-set threshold, and compare the analog voltage value with the threshold.

[0028] In one embodiment, such as Figure 4 As shown, the envelope extraction module includes a detector diode D1, a charging capacitor C1, an output resistor R1, an output capacitor C2, a load resistor R2, an amplification resistor R3, an amplification resistor R4, an amplification resistor R5, an amplification resistor R6, and an operational amplifier U1.

[0029] In one embodiment, in the envelope extraction module, the detector diode D1 performs the rectification task. When the input sine and cosine signals are positive and their amplitude is greater than the output value, D1 conducts, charging the charging capacitor C1 and causing its voltage to rise; when the carrier wave in the envelope decreases, D1 is turned off, C1 stops charging and begins to discharge, and its voltage drops. Thus, the output voltage of C1 changes with the envelope, forming a modulation signal, and thereby obtaining the basic envelope waveform.

[0030] Next, a filter circuit consisting of output capacitor C2 and load resistor R2 filters out the DC component in the envelope, making the signal cleaner. Then, the signal is input to operational amplifier U1. U1 converts the differential signal of the envelope into a single-ended signal Vsc. During this process, by appropriately setting the values ​​of amplification resistors R3, R4, R5, and R6 (typically R3 = R5 = R4 = R6), the amplification factor is set to 1. Based on this amplification factor, a stable and accurate basic envelope waveform is output, providing a reliable signal for subsequent circuit processing and analysis.

[0031] In one embodiment, such as Figure 5 As shown, the speed judgment module includes an input resistor R7, a feedback resistor R8, a voltage divider resistor R9, a voltage divider resistor R10, an operational amplifier U2, a pull-up resistor R11, an input current limiting resistor R12, an NPN transistor T1, a pull-up resistor R13, a filter capacitor C3, a rectifier diode D2, a filter capacitor C4, and a load capacitor R14.

[0032] In one embodiment, in the speed determination module, a voltage divider circuit is first formed by R9 and R10. The threshold is set by appropriately configuring their resistance values. Typically, the resistance ratio of R9 to R10 is set to the center value after extracting the envelope, which is approximately 1 / 3. Meanwhile, R7 serves as the input resistor, R8 as the feedback resistor, and R11 as the pull-up resistor. Together with the operational amplifier U2, they form a single-threshold comparator, whose function is to accurately convert the AC signal of the envelope into a digital signal.

[0033] Subsequently, the converted digital signal enters the next processing stage. R12 acts as an input current-limiting resistor to protect the signal from current limiting; NPN transistor T1 switches continuously under signal drive, converting the digital signal into a current signal waveform carrying electrical speed information; R13 acts as a pull-up resistor to provide a stable level; C3 acts as a filter capacitor to filter out noise in the signal; rectifier diode D2 rectifies the current signal; C4 acts as a filter capacitor for further filtering, and the filter capacitor C4 needs to be at least a μF level capacitor, ultimately converting the electrical speed signal into an analog voltage value V_Speed.

[0034] In one embodiment, R17 and R18 further form a voltage divider circuit to set the speed threshold. The resistance ratio of R17 / R18 needs to be designed according to the voltage value corresponding to the high-speed electrical frequency of the matched motor. R15 serves as the input resistor, R16 as the feedback resistor, and R19 as the pull-up resistor. Together with the operational amplifier U3, they form a single-threshold comparator for high-speed threshold judgment.

[0035] S102. If the analog voltage value is greater than the threshold, it is determined that the current speed is high and a low-level speed logic signal is output.

[0036] S103. If the analog voltage value is less than or equal to the threshold, it is determined that the current speed is low and a high-level speed logic signal is output.

[0037] In one embodiment, when the analog voltage value exceeds a set threshold, it is determined to be a high-speed state, and the output V_Logic is low; when the analog voltage value does not exceed the threshold, it is determined to be a low-speed state, and the output V_Logic is high, thereby achieving accurate judgment and status output of motor speed.

[0038] S104. Circuit detection is performed through a pre-set fault detection module to determine the fault signal. The fault signal and the speed logic signal are input together to a pre-set logic control module to determine the corresponding protection action.

[0039] In one embodiment, such as Figure 6 As shown, the fault detection module includes a power fault detection module and other fault detection modules, which detect the circuit. When a power fault is detected, the power fault detection module outputs a low-level power fault signal; when other faults are detected, the other fault detection modules output low-level other fault signals.

[0040] When a circuit fault occurs, if it is a power supply fault, the power management integrated circuit (PMIC) will output a low-level signal; other types of faults will also output a low-level signal. These low-level signals from both types of faults are simultaneously input to AND gate U4 in the logic control module. Whenever any fault occurs in the circuit, AND gate U4 will output a low-level fault signal V_Fault. This signal is then input to the enable pin EN of the driver chip, which pulls down the driver chip's level, disabling it and ultimately shutting it down, ensuring circuit safety.

[0041] The logic control module consists of NAND gates, with V_Fault and V_Logic as inputs. Its truth table is shown in Table 1 below.

[0042] Table 1 Truth Table

[0043]

[0044] In this context, V_Logic is L for high speed and H for low speed. V_Fault is L for fault and H for non-fault. The output is H high and L low.

[0045] At high speeds and in the event of a fault, a high-level output is sent to the digital isolator, which directly pulls up the drive signal of the lower three bridges, causing the switching transistors of the lower three bridges to close, thus completing the active short-circuit protection of the lower three bridges.

[0046] At high speeds, when no fault occurs, the output is low to the digital isolator, which does not affect normal drive.

[0047] At low speeds, when no fault occurs, the output is low to the digital isolator, which does not affect normal drive.

[0048] At low speeds, when a fault occurs, a low level is sent to the EN pin of the driver chip to complete the full shutdown protection output low level to the digital isolator, without affecting the full shutdown protection function.

[0049] like Figure 7 As shown in the illustration, this application also provides a fault diagnosis and protection device for a drive circuit, including:

[0050] At least one processor; and,

[0051] A memory that is communicatively connected to at least one processor; wherein,

[0052] The memory stores instructions that can be executed by at least one processor to enable a fault diagnosis and protection device for a drive circuit to perform the method as described in any of the embodiments above.

[0053] This application also provides a non-volatile computer storage medium storing computer-executable instructions, which are configured as described in any of the above embodiments.

[0054] In the 1990s, improvements to a technology could be clearly distinguished as either hardware improvements (e.g., improvements to the circuit structure of diodes, transistors, switches, etc.) or software improvements (improvements to the methodology). However, with technological advancements, many methodological improvements today can be considered direct improvements to the hardware circuit structure. Designers almost always obtain the corresponding hardware circuit structure by programming the improved methodology into the hardware circuit. Therefore, it cannot be said that a methodological improvement cannot be implemented using hardware physical modules. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logic function is determined by the user programming the device. Designers can program and "integrate" a digital system onto a PLD themselves, without needing chip manufacturers to design and manufacture dedicated integrated circuit chips. Furthermore, nowadays, instead of manually manufacturing integrated circuit chips, this programming is mostly implemented using "logic compiler" software. Similar to the software compiler used in program development, the original code before compilation must also be written in a specific programming language, called a Hardware Description Language (HDL). There are many HDLs, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, and RHDL (Ruby Hardware Description Language). Currently, the most commonly used are VHDL (Very-High-Speed ​​Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also understand that by simply performing some logic programming on the method flow using one of these hardware description languages ​​and programming it into an integrated circuit, the hardware circuit implementing the logical method flow can be easily obtained.

[0055] The controller can be implemented in any suitable manner. For example, it can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicon Labs C8051F320. A memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also recognize that, in addition to implementing the controller in purely computer-readable program code form, the same functionality can be achieved by logically programming the method steps to make the controller take the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the means included therein for implementing various functions can also be considered as structures within the hardware component. Alternatively, the means for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0056] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0057] For ease of description, the above devices are described in terms of function, divided into various units. Of course, in implementing this specification, the functions of each unit can be implemented in one or more software and / or hardware.

[0058] The various embodiments in this application are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the device and medium embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the description of the method embodiments.

[0059] The devices and media provided in this application are one-to-one with the methods. Therefore, the devices and media also have similar beneficial technical effects as their corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the devices and media will not be repeated here.

[0060] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0061] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0062] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0063] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0064] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0065] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0066] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0067] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0068] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A method for fault diagnosis and protection of a motor drive circuit, characterized in that, include: The sine and cosine signals of the motor are input to a pre-set envelope extraction module to determine the envelope line. The envelope line is then converted to a digital signal, and the digital signal is converted to an analog voltage value. A pre-set threshold is determined, and the analog voltage value is compared with the threshold. If the simulated voltage value is greater than the threshold, it is determined that the current speed is high and a low-level speed logic signal is output. If the simulated voltage value is less than or equal to the threshold, it is determined that the current speed is low and a high-level speed logic signal is output. Circuit detection is performed by a pre-set fault detection module to identify fault signals. The fault signals and the speed logic signals are then input together to a pre-set logic control module to determine the corresponding protection action. A pre-set speed judgment module is determined, which includes an input resistor R7, a feedback resistor R8, a voltage divider resistor R9, a voltage divider resistor R10, an operational amplifier U2, a pull-up resistor R11, an input current limiting resistor R12, an NPN transistor T1, a pull-up resistor R13, a filter capacitor C3, a rectifier diode D2, a filter capacitor C4, and a load capacitor R14. The voltage divider resistors R9 and R10 define the voltage divider circuit, and the center value of the envelope is extracted through the voltage divider circuit. The operational amplifier U2 is used to convert the envelope of an AC signal into a digital signal; The switching action of the NPN transistor T1 generates a current signal with rotational speed information. The current signal is processed by the rectifier diode D2 and the filter capacitor C4 to output an analog voltage value. The speed determination module also includes an input resistor R15, a feedback resistor R16, a voltage divider circuit R17, a voltage divider circuit R18, a pull-up resistor R19, and an operational amplifier U3. The voltage divider resistors R17 and R18 define the voltage divider circuit, and the threshold value is determined by the voltage divider circuit. The operational amplifier U3 is used to compare the analog voltage value according to the threshold. The fault detection module includes a power fault detection module and other fault detection modules, and the circuit is detected by the power fault detection module and the other fault detection modules. When a power failure is detected, the power failure detection module outputs a low-level power failure signal; When other faults are detected, the other fault detection module outputs a low-level other fault signal; The power failure signal and any one of the other failure signals are processed by a pre-set AND gate U4 to output a failure signal. The failure signal is then input to a pre-set driver chip enable pin EN to turn off the driver chip. The fault signal and the speed logic signal are analyzed by the logic control module. When a fault occurs at high speed, a high level is output to the digital isolator to trigger the active short-circuit protection of the lower three bridges; When a fault occurs at low speed, a low level is output to the enable pin EN of the driver chip to perform full shutdown protection. When not in a fault state, it does not affect normal operation.

2. The method according to claim 1, characterized in that, The method further includes: The envelope extraction module includes a detector diode D1, a charging capacitor C1, an output resistor R1, an output capacitor C2, a load resistor R2, an amplification resistor R3, an amplification resistor R4, an amplification resistor R5, an amplification resistor R6, and an operational amplifier U1.

3. The method according to claim 2, characterized in that, The method further includes: The detector diode D1 is used for rectification. When the input sine and cosine signals are positive and greater than the output value, the detector diode D1 is turned on to charge the charging capacitor C1. The charging capacitor C1 discharges when the detector diode D1 is turned off, and outputs a voltage value. The voltage value changes with the envelope to obtain a modulation signal, so as to determine the envelope waveform based on the modulation signal. The output capacitor C2 and the load resistor R2 constitute a filter circuit, which is used to filter out the DC component of the envelope. The operational amplifier U1 is used to convert the differential signal of the envelope into a single-ended signal, and determines the amplification factor according to the amplification resistors R3, R4, R5, and R6, so as to output the basic envelope waveform according to the amplification factor.

4. A fault diagnosis and protection device for a motor drive circuit, characterized in that, include: At least one processor; as well as, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, which, when executed by the at least one processor, enable the fault diagnosis and protection device for a motor drive circuit to perform the method as described in any one of claims 1-3.

5. A non-volatile computer storage medium storing computer-executable instructions, characterized in that, The computer-executable instructions are configured to be the method as described in any one of claims 1-3.

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