A radar echo real-time simulation method based on FPGA and digital array

Abstract

The application provides a radar echo real-time simulation method based on FPGA and digital array, relates to the technical field of radar system simulation and test, and comprises the following steps: receiving a radar transmitting signal and performing digitization and down-conversion processing to obtain a baseband I / Q signal; in the FPGA, performing multi-scattering point range image generation processing on the baseband I / Q signal to form multiple echo components corresponding to different scattering points of a target; performing micro-motion characteristic modulation processing on the multiple echo components; through a multi-stage phase modulation unit, sequentially performing main Doppler modulation and micro-Doppler modulation on each echo component to generate an echo signal with main motion and micro-motion characteristics; superimposing and synthesizing the echo signal after micro-motion characteristic modulation and a simulated environmental effect signal to obtain a synthesized signal; performing up-conversion and digital-to-analog conversion on the synthesized signal and outputting the synthesized signal to a radar under test through a digital array feed system.

Description

Technical Field

[0001] This invention belongs to the field of radar system simulation and testing technology, specifically relating to a real-time radar echo simulation method based on FPGA and digital array. Background Technology

[0002] As phased array radar technology develops towards full digitalization and high integration, higher requirements are placed on radar system performance testing and verification. Radar echo simulators, as key equipment in research and testing, directly affect the effectiveness of testing due to the realism of the simulated targets. Traditional radar echo simulators mostly adopt an architecture of host computer computation + general signal processing board playback, which typically simplifies the target to an ideal point target for processing. This approach has a significant drawback:

[0003] The simulation of target characteristics is too simplistic and cannot realistically reflect the internal structure and micro-motion features of complex extended targets. Specifically, traditional methods struggle to efficiently and realistically superimpose micro-motion features such as rotor rotation and engine vibration while simulating the motion of the target body, and they also cannot construct extended target range profiles with multiple scattering centers. This results in insufficient information dimensions in the time, frequency, and spatial domains of the simulated echo signals, making it impossible to effectively test and verify radar systems for advanced functions such as target identification, classification, and micro-motion feature extraction. This has become a technical bottleneck restricting the improvement of the testing capabilities of advanced radar systems. Summary of the Invention

[0004] In view of the above-mentioned defects or deficiencies in the prior art, a real-time radar echo simulation method based on FPGA and digital array is provided, including the following steps:

[0005] The radar transmit signal is received and digitized and down-converted to obtain the baseband I / Q signal;

[0006] Within the FPGA, the baseband I / Q signal is processed to generate a multi-scattering point range image, forming multiple echo components corresponding to different scattering points of the target;

[0007] The multiple echo components are subjected to micro-motion characteristic modulation processing: through a multi-level phase modulation unit, each echo component is sequentially subjected to main Doppler modulation and micro Doppler modulation to generate an echo signal that has both main motion and micro-motion characteristics.

[0008] The echo signal modulated by the micro-motion feature is superimposed and synthesized with the simulated environmental effect signal to obtain the synthesized signal;

[0009] The synthesized signal is up-converted and digital-to-analog converted, and then output to the radar under test through a digital array feed system.

[0010] According to the technical solution provided in this application, the multi-level phase modulation unit is a cascaded coordinate rotating digital computer (CORDIC) module;

[0011] The subject Doppler modulation is executed by the first stage of the cascaded CORDIC module, which performs rotation calculations based on the phase increment corresponding to the target subject's motion velocity to simulate the subject Doppler frequency shift.

[0012] The micro-Doppler modulation is executed by the second stage of the cascaded CORDIC module, which performs nonlinear rotation calculations based on the modulation phase increment generated by the preset micro-motion model parameters to superimpose micro-Doppler features onto the echo component.

[0013] According to the technical solution provided in this application, the multi-scattering point range image generation processing of the baseband I / Q signal includes the following steps:

[0014] Build multiple parallel processing pipelines within the FPGA;

[0015] For each pipeline, a multi-tap delay line is constructed using memory to generate multiple signal copies with different time delays. Each signal copy represents a scattering point of the target and is assigned an independent radar cross section (RCS) weight.

[0016] According to the technical solution provided in this application, the simulated environmental effect signal is generated by an environmental multipath convolution module, which performs the following operations:

[0017] Based on the ray tracing approximation model, the time delay and attenuation coefficient of the reflected path relative to the direct path are calculated;

[0018] By utilizing the pulsating array convolution structure within the FPGA, the time delay and attenuation coefficients are applied to clutter data generated based on a clutter statistical model to generate an environmental effect signal that includes multipath effects and clutter.

[0019] According to the technical solution provided in this application, the modulation phase increment is generated by a direct digital frequency synthesis (DDS) core or lookup table logic based on the micro-motion model parameters, which include rotor speed or fuselage vibration frequency.

[0020] According to the technical solution provided in this application, the step of outputting to the radar under test through a digital array feeding system includes the following steps:

[0021] Based on the target space angle information, determine one or more physical units corresponding to the digital array power supply system;

[0022] Calculate the output amplitude ratio of one or more of the physical units;

[0023] The synthesized signal is distributed to the corresponding physical units according to the output amplitude ratio, and then transmitted after digital-to-analog conversion.

[0024] According to the technical solution provided in this application, the processing performed within the FPGA is executed in a distributed and parallel manner by multiple FPGA nodes, with each FPGA node processing multiple analog channels.

[0025] According to the technical solution provided in this application, the target spatial angle information is generated in real time based on the target's dynamic spatial position model;

[0026] The dynamic spatial position model is updated by the control layer in each processing cycle according to preset target trajectory parameters. The target trajectory parameters include the real-time three-dimensional spatial coordinates of the target. The FPGA or the control layer calculates the target spatial angle information in real time based on the real-time three-dimensional spatial coordinates and the known geometric position of the digital array power supply system.

[0027] The digital array power supply system adjusts the phase and amplitude relationship of the output signals of each physical unit according to the target spatial angle information, so that the signals emitted by all physical units are coherently superimposed in the air to form an equivalent plane wavefront, the normal direction of which points to the dynamic spatial position.

[0028] According to the technical solution provided in this application, when simulating multiple targets simultaneously, the method further includes dynamic resource scheduling, which includes the following steps:

[0029] The simulation priority is determined based on the attributes of each objective;

[0030] Based on the simulation priority, dynamically configure the hardware resources within the FPGA or multiple FPGA nodes for performing the multi-scattering point range image generation process and the micro-motion feature modulation process;

[0031] For high-priority targets, more scattering points and a higher-precision modulation model are configured; for low-priority targets, the hardware resources they occupy are reduced.

[0032] According to the technical solution provided in this application, the micro-motion characteristic modulation processing of multiple echo components includes the following steps:

[0033] For each echo component, configuration information is determined based on its corresponding target component identifier, which is used to distinguish whether the target component simulated by the echo component is a stationary component or a moving component.

[0034] Based on the configuration information, the cascaded CORDIC module is controlled to perform differentiated modulation operations on each echo component;

[0035] Specifically, for the echo component identified as a simulated moving part, the second stage of the cascaded CORDIC module is activated, and micro-Doppler modulation is performed based on the micro-motion model parameters corresponding to the moving part;

[0036] For echo components identified as simulating stationary components, the second stage of the cascaded CORDIC module is disabled or bypassed.

[0037] Compared with the prior art, the beneficial effects of this application are as follows:

[0038] I. Achieved high-fidelity simulation of complex extended targets: By using multi-scattering point range image generation processing in the FPGA, it is possible to flexibly construct target models with multiple scattering centers and generate one-dimensional high-resolution range images containing target geometric structure information, thus solving the problem of oversimplification in traditional point target simulation.

[0039] Second, it significantly improves the simulation capability of target dynamic characteristics: Through multi-level phase modulation units (especially cascaded CORDIC modules), it is possible to efficiently and in real time superimpose nonlinear phase modulation on the basis of simulating the main motion of the target (main Doppler), accurately simulating various micro-motion characteristics (micro Doppler) of the target, such as the periodic flicker of the rotor and the vibration of the fuselage, so that the simulated target exhibits realistic sideband effects in the radar frequency domain, greatly enhancing the physical authenticity and testing value of the echo signal.

[0040] Third, real-time synthesis of multi-dimensional radar echo features was achieved: multiple steps, including target geometry simulation, fine-tuning modulation, environmental effect superposition, and digital array spatial synthesis, were integrated into a high-efficiency FPGA parallel processing flow. It can complete the entire processing chain from signal reception to spatial beamforming output within a single pulse repetition cycle, generating multi-dimensional radar echo signals in real time that simultaneously possess fine range profiles, complex micro-Doppler spectra, environmental clutter backgrounds, and high-precision spatial directivity. This provides a reliable hardware-in-the-loop solution for closed-loop performance testing of digital array radars. Attached Figure Description

[0041] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0042] Figure 1 A flowchart illustrating the steps of the real-time radar echo simulation method based on FPGA and digital array provided in this application. Detailed Implementation

[0043] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0044] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0045] As mentioned in the background section, this application proposes a real-time radar echo simulation method based on FPGA and digital array, such as... Figure 1 As shown, it includes the following steps:

[0046] S1. Receive radar transmitted signals and perform digitization and down-conversion processing to obtain baseband I / Q signals;

[0047] S2. Within the FPGA, the baseband I / Q signal is processed to generate a multi-scattering point range image, forming multiple echo components corresponding to different scattering points of the target;

[0048] S3. Perform micro-motion feature modulation processing on multiple echo components: Through a multi-level phase modulation unit, perform main Doppler modulation and micro Doppler modulation on each echo component in sequence to generate an echo signal that has both main motion and micro-motion features.

[0049] S4. The echo signal modulated by the micro-motion feature is superimposed and synthesized with the simulated environmental effect signal to obtain the synthesized signal;

[0050] S5. The synthesized signal is up-converted and digital-to-analog converted, and then output to the radar under test through a digital array power supply system.

[0051] Specifically, firstly, the radar transmitted signal is received and digitized and down-converted. In this embodiment, the digitization array feed system is equipped with a high-speed analog-to-digital converter array. When the transmitted signal (usually an RF pulse) from the radar under test enters the system, it is synchronously acquired by each receiving channel in the array. The analog-to-digital converter converts the continuous analog signal into a high-precision digital sampling sequence. Subsequently, the digital down-conversion module processes the sampling sequence. This module typically consists of a digital mixer and a low-pass filter. The digital mixer performs a complex multiplication of the sampling sequence with a locally generated digital local oscillator signal with a frequency equal to the radar carrier frequency, shifting the signal spectrum to baseband. The low-pass filter filters out high-frequency components and out-of-band noise generated by the mixing, ultimately outputting a clean baseband signal. This signal is typically represented by in-phase and quadrature components, i.e., I-channel and Q-channel signals, collectively referred to as the baseband I / Q signal. This signal completely preserves the amplitude and phase information of the original signal, and the data rate is significantly reduced, facilitating subsequent processing.

[0052] Secondly, multi-scattering point range profile generation processing is performed on the baseband I / Q signals within the FPGA. This step aims to expand the echo of an ideal point target into a multi-component signal reflecting the geometry of the real target. The FPGA logic first copies and distributes the input baseband I / Q signal stream to multiple parallel processing pipelines based on a pre-defined target model. Within each pipeline, the core is to construct a multi-tap delay line using the FPGA's internal high-speed block random access memory. Specifically, the input digital signal is written to a depth-configurable circular buffer. By synchronously reading data from different addresses (i.e., different taps) of this buffer, multiple copies of the original signal after different delay times can be obtained. Each delay time corresponds to the propagation delay introduced by the additional distance difference between a scattering point on the target and a target reference point (such as the centroid). For example, for an aircraft, there are slight differences in the line-of-sight distances of key scattering points such as the nose, wings, engines, and tail relative to the radar; these differences are simulated by different delay amounts. Each delayed signal copy represents the echo component of a scattering point. Meanwhile, the system assigns an independent complex weight to each scattering point component, which simulates the radar cross-section size and inherent reflection phase of the scattering point, thereby distinguishing the echo intensity of different scattering points.

[0053] Next, the multiple echo components are subjected to micro-motion characteristic modulation processing. This is achieved through a multi-stage phase modulation unit. This unit operates on each echo component sequentially. The first stage of modulation is called main Doppler modulation, which calculates a linear phase change rate based on the overall velocity of the target (e.g., flight speed) and continuously accumulates this phase increment onto the phase of the echo component, thereby generating an overall Doppler frequency shift in the frequency domain. The second stage of modulation is called micro-Doppler modulation, which superimposes nonlinear phase modulation caused by micro-motions of the target components (e.g., rotor rotation, engine vibration) on top of the main motion. This modulation generates a time-varying, nonlinear phase increment sequence based on model parameters describing the micro-motion characteristics (e.g., rotational speed, amplitude) and also acts on the phase of the echo component. After these two stages of modulation, the output echo signal not only has the main spectral line corresponding to the main motion in the spectrum, but also sideband spectral lines generated by the micro-motion modulation on both sides, i.e., the well-known micro-Doppler characteristic, giving the simulated target vivid dynamic characteristics.

[0054] Then, the echo signals, after being modulated by micro-motion, are superimposed and synthesized with the simulated environmental effect signal. The environmental effect signal mainly simulates multipath echoes from ground or sea surface reflections and natural background clutter. This signal is generated in real time in another parallel module. Finally, the synthesis module adds the echo components from all scattering points of the target (which already contain micro-motion characteristics) to the environmental effect signal using complex vector addition, forming a comprehensive digital baseband signal that includes both target and background information.

[0055] Finally, the synthesized signal undergoes up-conversion and digital-to-analog conversion, and is output through the digital array feed system. The digital up-conversion module is the reverse process of down-conversion; it shifts the baseband I / Q signal back to the RF frequency through digital mixing and then improves the data rate through interpolation filtering, preparing it for data conversion. The data converter restores the digital signal sequence to an analog signal. Crucially, this analog signal is not simply output from a single port. Based on the simulated azimuth and elevation angles of the target in space, the digital array feed system calculates which adjacent radiating elements on the physical antenna array correspond to these angles. Following beamforming principles, it calculates a specific amplitude and phase weight (i.e., complex weight) for each selected element. The synthesized signal is multiplied by these weights and then distributed to the corresponding data converter and RF front-end channel, ultimately being radiated simultaneously through multiple antenna elements. These signals, radiated in space with specific phase relationships, interfere and superimpose in the air, forming an equivalent plane wavefront from the simulated target direction, which is then received by the radar under test.

[0056] The technical advantage of this implementation lies in achieving high-fidelity, multi-dimensional real-time echo simulation of targets with complex geometries and rich micro-motion characteristics. The technical principle involves decomposing the target into multiple scattering points and processing them independently. Range-direction structures are simulated using delay lines. The Doppler effect caused by the main body's motion and component micro-motions is separated and superimposed through two-stage phase modulation. Finally, the beamforming capability of the digital array is used to precisely project the signal to a specified spatial direction. The entire process is completed in a parallel pipeline on an FPGA, solving the problems of high latency in traditional software simulation and poor flexibility in hardware simulation. This provides a highly realistic hardware-in-the-loop verification environment for testing advanced radar target recognition and tracking algorithms.

[0057] In a preferred embodiment, the multi-level phase modulation unit is a cascaded coordinate rotating digital computer (CORDIC) module;

[0058] The subject Doppler modulation is executed by the first stage of the cascaded CORDIC module, which performs rotation calculations based on the phase increment corresponding to the target subject's motion velocity to simulate the subject Doppler frequency shift.

[0059] The micro-Doppler modulation is executed by the second stage of the cascaded CORDIC module, which performs nonlinear rotation calculations based on the modulation phase increment generated by the preset micro-motion model parameters, so as to superimpose micro-Doppler features on the echo component.

[0060] Specifically, the coordinate rotation digital computer is a hardware-friendly algorithm that performs calculations such as trigonometric functions, multiplication, and square roots by iteratively rotating vectors. In this application, it is configured in rotation mode for precise phase rotation of complex signals (I / Q signals), i.e., to achieve complex exponential multiplication. Cascading CORDIC modules means connecting two independent CORDIC computing units in series.

[0061] The first-stage CORDIC module is dedicated to performing main Doppler modulation. During implementation, a control logic calculates a constant phase rotation increment in real time based on the target's main motion velocity vector and its radial relationship with the radar. This increment is fed into the first-stage CORDIC module at each signal processing clock cycle. The CORDIC module receives the I / Q value of the current echo component as the input vector, uses the aforementioned phase increment as the rotation angle target, and performs several iterative rotations with a predetermined number of bits, outputting a new I / Q value after rotation. Mathematically, this process is equivalent to multiplying the original signal by a complex exponential term, the angular frequency of which is proportional to the main Doppler frequency shift, thus simulating the overall velocity of the target.

[0062] The second-stage CORDIC module, cascaded after the first stage, is specifically designed for micro-Doppler modulation. Its key implementation lies in the fact that the input rotation angle increment is no longer constant, but a time-varying modulation quantity driven by a micro-motion model. An independent micro-motion parameter generation unit (such as a direct digital frequency synthesizer core or lookup table logic) calculates a nonlinear phase modulation sequence in real time based on model parameters (such as rotor rotational angular velocity, number of blades, vibration frequency and amplitude) sent from the host computer. This sequence serves as the rotation angle input for the second-stage CORDIC. Therefore, the signal, already carrying the main Doppler information signal, undergoes a further phase rotation that varies significantly over time within the second-stage CORDIC. This nonlinear phase modulation manifests in the spectrum as the generation of sidebands around the main Doppler spectral line, i.e., micro-Doppler spectral lines, perfectly simulating the periodic amplitude and phase modulation effect of the rotating component on the radar echo.

[0063] This implementation uses cascaded CORDIC modules as multi-stage phase modulation units, achieving high-precision composite Doppler modulation with extremely high computational efficiency and hardware resource utilization. The technical principle lies in utilizing the CORDIC algorithm's ability to achieve phase rotation without multipliers, significantly saving valuable DSP slice resources in the FPGA. The cascaded structure decouples and sequentially executes the two physical processes of main motion (linear phase accumulation) and component micro-motion (nonlinear phase modulation), resulting in a clear structure and flexible control. The first stage handles the constant velocity component, while the second stage handles the time-varying micro-motion component. This division of labor allows the modification and configuration of the micro-motion model to be independent of the main motion, enhancing the system's flexibility and scalability, and providing an efficient hardware implementation foundation for simulating various complex moving targets.

[0064] In a preferred embodiment, the multi-scattering point range profile generation process for the baseband I / Q signal includes the following steps:

[0065] Build multiple parallel processing pipelines within the FPGA;

[0066] For each pipeline, a multi-tap delay line is constructed using memory to generate multiple signal copies with different time delays. Each signal copy represents a scattering point of the target and is assigned an independent radar cross section (RCS) weight.

[0067] Specifically, its implementation begins with building multiple parallel processing pipelines within the FPGA. This architecture is designed to simultaneously process signals from different beam directions or different targets, or to provide redundant processing channels for the same target signal to improve reliability. During logic design, a corresponding number of structurally identical processing pipeline modules are instantiated based on the maximum number of channels the system needs to simulate. These pipelines operate independently, driven by a unified clock and control signals, achieving true spatial parallel computing.

[0068] The core operation of each pipeline is to construct a multi-tap delay line using memory. The memory used here specifically refers to the Block Random Access Memory (BRAM) within the FPGA. The depth of this memory determines the maximum range that can be simulated, and its width matches the bit width of the I / Q data. During pipeline initialization, a unique read address offset is configured for each scattering point to be simulated. As the baseband I / Q signal stream continuously writes to the circular buffer formed by this BRAM, multiple parallel read ports simultaneously read data from the buffer according to their respective preset address offsets. Because the read address has a fixed lag relative to the write address, the signal output by each read port is a copy of the input signal after a different time delay. For example, the port with the smallest address offset outputs the signal with the smallest delay, representing the scattering point closest to the radar; the port with the largest address offset outputs the signal with the largest delay, representing the scattering point farthest from the radar. By precisely configuring these address offsets, the relative distances between each scattering point on the target can be accurately set.

[0069] Each read-out signal copy represents an independent scattering point of the target. To simulate the differences in reflection intensity between different scattering points, the system then multiplies each copy by an independent complex weight, called the radar cross-section weight. This weight is a complex number whose magnitude represents the radar cross-section intensity of the scattering point, and whose phase angle represents the inherent reflection phase characteristics of the scattering point. These weight values ​​are typically pre-calculated by the host computer based on the target's 3D model and sent to the FPGA, where they are stored in registers or a small memory for real-time retrieval. After weighting, the originally single echo signal becomes a set of multiple signal components with different time delays and intensities, thus generating a one-dimensional high-resolution range profile of the target.

[0070] The technical advantage of this implementation method is that it efficiently and flexibly generates a one-dimensional range image that reflects the fine geometric structure of the target, overcoming the limitations of traditional point target simulation.

[0071] In a preferred embodiment, the simulated environmental effect signal is generated by an environmental multipath convolution module, which performs the following operations:

[0072] Based on the ray tracing approximation model, the time delay and attenuation coefficient of the reflected path relative to the direct path are calculated;

[0073] By utilizing the pulsating array convolution structure within the FPGA, the time delay and attenuation coefficients are applied to clutter data generated based on a clutter statistical model to generate an environmental effect signal that includes multipath effects and clutter.

[0074] Specifically, this is implemented through a proprietary environmental multipath convolution module. This module first performs calculations based on a ray tracing approximation model. In low-altitude or complex terrain scenarios, radar waves not only reach the target and return via a direct path but also form reflection paths via reflective surfaces such as the ground and sea surface. Accurate ray tracing computations are extremely complex. This embodiment employs a simplified model, such as the classic dual-path model (direct path and primary reflection path). Based on the currently simulated target height, distance, and electromagnetic parameters of the reflective surface (such as dielectric constant), the module calculates in real-time the additional propagation distance of the reflection path relative to the direct path using geometric optics principles, thus converting it into additional time delay. Simultaneously, based on Fresnel reflection coefficient and propagation loss models, it calculates the amplitude attenuation coefficient and phase reversal characteristics of the signal along the reflection path. These calculations are implemented within the FPGA using lookup tables or simplified formulas to ensure real-time performance.

[0075] Subsequently, the clutter data is processed using a pulsating array convolutional structure within the FPGA. The clutter data is not pre-recorded but generated in real-time based on clutter statistical models (such as K-distribution or Weibull distribution). A random number generator produces an amplitude sequence conforming to specific distribution characteristics, while another generator produces a uniformly distributed phase sequence. These two are combined to form a complex wave sampling sequence, which is pre-stored in external memory or a large internal memory, forming a dynamic clutter map. A pulsating array is a highly efficient computing structure composed of multiple processing units arranged in a regular pattern, with data flowing pulsatingly between the units like blood. In this module, the array is composed of multiple DSP slices. During computation, the time delay obtained in the previous step is quantized into discrete tap positions, and data from the corresponding position and its neighborhood is read from the clutter map. Simultaneously, the attenuation coefficient is used as the coefficient of the convolution kernel. The pulsating array efficiently performs convolution operations, convolving the clutter data with a kernel function composed of attenuation coefficients. Its physical meaning is to simulate the correlation of clutter in the range direction and the filtering effect of the reflection path on the clutter signal. The final output is the environmental clutter signal modulated by the multipath effect.

[0076] Finally, the environmental clutter signal is superimposed with the possible, calculated deterministic multipath reflection signal (such as a time-delayed and attenuated copy of the direct signal) to form a complete environmental effect signal.

[0077] The technical advantage of this implementation is that it can simulate realistic environmental multipath effects and statistically accurate clutter backgrounds in real time within limited FPGA resources.

[0078] In a preferred embodiment, the modulation phase increment is generated by a direct digital frequency synthesis (DDS) core or lookup table logic based on the micro-motion model parameters, which include rotor speed or fuselage vibration frequency.

[0079] Specifically, the core of its implementation lies in providing high-precision, high-real-time nonlinear phase modulation words for the second-level CORDIC. First, the host computer (control layer) sets and distributes specific micro-motion model parameters according to the simulation requirements. These parameters are crucial for describing the physical nature of the micro-motions of the target component. Typical parameters include rotor speed, measured in revolutions per minute or radians per second, used to describe the rotational angular velocity of the helicopter's main rotor or tail rotor; and fuselage vibration frequency, measured in Hertz, used to describe the periodic mechanical vibration frequency generated by a jet engine or airframe structure. In addition, parameters may also include amplitude, initial phase, modulation index (such as parameters used to simulate the number of rotor blades), collectively forming a complete micro-motion mathematical model.

[0080] The first implementation of generating time-varying modulation phase increments based on these parameters is using a Direct Digital Frequency Synthesis (DDS) core. DDS is a technique for digitally generating high-precision, frequency- and phase-programmable analog waveforms. In FPGAs, it is typically provided as an IP core. In its implementation, it internally includes a phase accumulator and a phase-to-amplitude conversion table (usually a sine lookup table). In this application, the micro-motion model parameters are converted into a DDS control word. For example, the rotor speed is converted into a frequency control word corresponding to the output sine wave. At each system clock cycle, the phase accumulator increments according to this frequency control word, and its output is used as an address to look up the sine lookup table, outputting the sine and cosine sample values ​​for the corresponding phase. However, what is needed here is not the sine wave sample itself, but the instantaneous phase value it represents. Therefore, the output of the phase accumulator (i.e., the current phase value) can be provided directly or after scaling as a "modulation phase increment" to the second-stage CORDIC module. By updating the DDS frequency control word in real time, the rate of micro-motion modulation can be dynamically changed; by changing the initial value of the phase accumulator, the starting phase of micro-motion modulation can be adjusted. This approach is suitable for scenarios that require generating continuous, smoothly changing periodic phase modulations, such as simulating a rotor rotating at a constant speed.

[0081] The second implementation method uses lookup table logic. When the micro-motion model is very complex and cannot be described by a simple sinusoidal or fixed-frequency model (such as non-uniform rotation, random vibration, or specific mechanical motion laws), a pre-calculated lookup table method can be used. Specifically, in the logic of the host computer or FPGA, the ideal phase modulation amount corresponding to each moment within a complete cycle or a typical time period is calculated in advance based on the micro-motion model. These discrete phase values ​​are stored sequentially in the FPGA's internal memory (such as BRAM or distributed RAM), forming a phase-time relationship table. During real-time simulation, an address generator (usually a counter whose counting rate determines the time scaling ratio of the micro-motion process) reads the data from this table sequentially or according to a specific rule. The read data is the "modulation phase increment" at the current moment, which is directly sent to the second-level CORDIC. This method is highly flexible and can simulate any phase change process that can be described by a numerical sequence. It is particularly suitable for reproducing the micro-motion characteristics of a specific target obtained from experimental measurements, or simulating micro-motions with complex nonlinear and non-stationary characteristics.

[0082] The technical advantage of this embodiment is that it provides two efficient, flexible and accurate micro-motion modulation drive signal generation schemes, ensuring the realism and real-time performance of micro-Doppler feature simulation.

[0083] In a preferred embodiment, the step of outputting to the radar under test via a digital array feeding system includes the following steps:

[0084] Based on the target space angle information, determine one or more physical units corresponding to the digital array power supply system;

[0085] Calculate the output amplitude ratio of one or more of the physical units;

[0086] The synthesized signal is distributed to the corresponding physical units according to the output amplitude ratio, and then transmitted after digital-to-analog conversion.

[0087] Specifically, its implementation begins by determining one or more physical units in the digital array feed system based on the target spatial angle information. The digital array feed system consists of a series of regularly arranged (e.g., linear or planar array) independent radiating units, each with its own independent digital transceiver channel. The target spatial angle information is typically expressed as azimuth and elevation angles. During implementation, the system internally stores the precise geometric parameters of the array, including the position of each unit in the array coordinate system. Through coordinate transformation and steering vector calculations in beamforming theory, it can be determined which units in the array are within the effective aperture illuminating that direction at a given target angle. For simulating a point source target, its energy is typically not emitted from just one unit, but from multiple adjacent units in a specific proportion to simulate the continuous propagation of the wavefront in space. Therefore, the output of this step is the index numbers of a selected set (usually two or more) of adjacent physical units.

[0088] Next, the output amplitude ratio of one or more of the physical units is calculated. This is the core of achieving high-precision spatial angle simulation, aiming to solve the problem of phase center jumps in traditional simulators. After determining the unit index, a complex weight (including amplitude and phase) needs to be calculated for each selected unit. This implementation focuses on the calculation of amplitude weights. A typical algorithm is the amplitude centroid method or interpolation method. Assume that the theoretically accurate angle of the target falls between the beam directions pointed to by the two physical units. Let the deviation between the theoretical angle and the angle pointed to by the beam of the left unit be Δθ. Then the amplitude ratio of the two units can be determined by linear interpolation or some window function based on Δθ. For example, if Δθ is 0 (perfectly aligned with the left unit), then the weight of the left unit is 1 and the weight of the right unit is 0; if Δθ is half the beam spacing between the two units, then the weights of the units on both sides can each be 0.5. The amplitude ratio calculated in this way is continuously changing, so even if the target angle slowly sweeps between the physical units, the equivalent phase center of its synthesized signal can move smoothly, avoiding the jumps caused by discrete beam switching.

[0089] Finally, the synthesized signal is distributed to the corresponding physical units according to the output amplitude ratio, and then transmitted after digital-to-analog conversion. In an FPGA or dedicated digital beamforming chip, an independent data stream is generated for each selected physical unit. Specifically, the final synthesized signal (digital baseband I / Q stream) obtained in the previous steps is copied multiple times, and each copy is multiplied by the calculated complex weight of the corresponding unit (the amplitude ratio is the modulus of the complex weight, and the weight also includes a fixed phase compensation part to correct the phase difference introduced by the unit position). The weighted multi-channel digital signal streams are sent to the corresponding digital up-conversion channels to be converted into intermediate frequency or radio frequency digital signals, and then drive the data converters of their respective channels to recover analog signals. Finally, these analog signals are amplified and filtered by the radio frequency front end and synchronously radiated by the corresponding physical antenna units. These electromagnetic waves radiated in space with specific amplitude and phase relationships interfere with each other, synthesizing an equivalent plane wave in the far field region (at the radar under test), the direction of which is precisely the angle of the simulated target.

[0090] The technical advantage of this implementation method is that it achieves continuous and high-precision simulation of the target spatial angle, eliminating the phase center jump error caused by beam discretization in traditional simulators.

[0091] In a preferred embodiment, the processing performed within the FPGA is executed in a distributed parallel manner by multiple FPGA nodes, with each FPGA node handling multiple analog channels.

[0092] Specifically, a scalable, high-performance FPGA cluster computing architecture is described. The entire processing task performed within the FPGA, including multi-scattering point range image generation, micro-motion feature modulation, and environmental effect superposition, is not handled by a single large FPGA, but rather broken down and distributed across multiple independent FPGA chips for collaborative completion. These FPGA chips are called nodes, and they are typically mounted on the same backplane or connected via high-speed serial interconnects (such as Aurora, SRIO, and PCIe), forming a tightly coupled distributed computing system.

[0093] Each FPGA node is configured to process multiple analog channels. Here, an analog channel is a logical concept, typically corresponding to an independent digital beamforming channel, or a target / direction that needs to be simulated independently. In practice, the processing capacity of a single FPGA node is determined during the system planning phase. For example, a node might be designed to process signals from 16 analog channels simultaneously. This means that within that node, 16 sets of essentially parallel processing logic are implemented (possibly sharing some resources such as large memory). Each channel independently receives its assigned baseband I / Q data stream, independently performs multi-tap delay, CORDIC modulation, ambient convolution, and other operations, and ultimately outputs the corresponding digital signal for that channel.

[0094] The distributed parallel execution mechanism is as follows: The control layer (host computer) decomposes the task of the entire simulation scenario. For example, if it is necessary to simulate 32 targets from different directions, the host computer may send the task parameters of the first 16 targets to the first FPGA node via a high-speed bus (such as PCIe), and the task parameters of the last 16 targets to the second FPGA node. After receiving the parameters, each node runs its internal multiple channel processing logic independently and in parallel. Frequent data exchange between nodes is usually not required because they are processing independent spatial directions or targets. After all nodes have completed processing, the multi-channel digital output signals generated by each node are converged to a central digital beamforming and distribution unit (which may be another FPGA or dedicated chip, or integrated into the main control FPGA). This unit then performs the spatial angle synthesis and distribution steps to map each signal to the specific physical unit of the digital array feeding system.

[0095] The technical effect of this implementation method is to greatly improve the overall processing capability, channel capacity and system scalability of the radar echo simulation system, and effectively solve the contradiction between real-time performance and computational load.

[0096] In a preferred embodiment, the target spatial angle information is generated in real time based on the target's dynamic spatial position model;

[0097] The dynamic spatial position model is updated by the control layer in each processing cycle according to preset target trajectory parameters. The target trajectory parameters include the real-time three-dimensional spatial coordinates of the target. The FPGA or the control layer calculates the target spatial angle information in real time based on the real-time three-dimensional spatial coordinates and the known geometric position of the digital array power supply system.

[0098] The digital array power supply system adjusts the phase and amplitude relationship of the output signals of each physical unit according to the target spatial angle information, so that the signals emitted by all physical units are coherently superimposed in the air to form an equivalent plane wavefront, the normal direction of which points to the dynamic spatial position.

[0099] Specifically, its implementation begins with constructing and updating a dynamic spatial position model of the target. This model is a digital twin of the target's motion state in three-dimensional space. It is updated in real-time by the control layer (i.e., the host computer software) based on preset target trajectory parameters in each signal processing cycle (typically the radar pulse repetition cycle or shorter). The target trajectory parameters are the core of the driving model, including at least the target's real-time three-dimensional spatial coordinates (X, Y, Z). These coordinates can originate from a preset mathematical trajectory equation (such as uniform linear motion or circular motion), or from more complex six-degree-of-freedom dynamic model simulations, or even from externally injected real-time data from actual aircraft. At each update moment, the control layer calculates or receives the target's new coordinates.

[0100] Subsequently, real-time calculation of the target's spatial angle information is performed. This calculation can be completed by the control layer or by a specific node in the FPGA cluster (such as the main control FPGA) sending the target coordinates via a high-speed interface. The calculation requires two inputs: the real-time three-dimensional coordinates of the target obtained in the previous step, and the known geometric position of the digital array feeding system in the same global coordinate system, particularly the coordinates of its phase reference center (usually the array center). Based on these two coordinate points, the line-of-sight vector from the array reference center to the target position can be determined through vector calculation. Transforming this line-of-sight vector into the array's local coordinate system yields the azimuth and elevation angles of the target relative to the array's normal direction. This pair of angle values ​​constitutes the accurate target spatial angle information. This process is continuous, ensuring that the angle information reflects the target's dynamic movement in real time.

[0101] Finally, the digital array feed system forms an equivalent planar wavefront based on the target's spatial angle information. This step is the specific physical implementation of spatial angle synthesis. After receiving the real-time calculated azimuth and elevation angles, the system first determines which physical units to activate and calculates their complex weights. However, this goes a step further, emphasizing the adjustment of the phase and amplitude relationships of the output signals of each physical unit. The adjustment of the phase relationship is particularly crucial: to ensure that the signals emitted by all units are in phase and superimposed in the target direction (constructive interference), a phase compensation (i.e., the phase component in the complex weight) must be applied to each unit. This compensation value precisely cancels out the path difference caused by the unit's positional deviation from the reference center in the array. The adjustment of the amplitude relationship (i.e., the amplitude component in the complex weight) is used to control the beam shape and sidelobe level. When all activated physical units modulate and transmit the synthesized signal according to the calculated complex weights containing precise phase and amplitude relationships, these signals will interfere during spatial propagation. In the far-field region (i.e., the location of the radar under test), the superposition of these interfering fields is equivalent to an electromagnetic wave originating from a very distant location with a planar wavefront. The normal direction of this equivalent planar wavefront points exactly to the spatial angle calculated from the real-time target coordinates, thus accurately simulating the physical scenario of a moving target existing in that direction.

[0102] The technical effect of this implementation is that it achieves a high degree of synchronization and precise matching between spatial directivity and target dynamic movement in radar echo simulation, thus forming a dynamic, closed-loop spatial scene generation system.

[0103] In a preferred embodiment, when simulating multiple targets simultaneously, the method further includes dynamic resource scheduling, which includes the following steps:

[0104] The simulation priority is determined based on the attributes of each objective;

[0105] Based on the simulation priority, dynamically configure the hardware resources within the FPGA or multiple FPGA nodes for performing the multi-scattering point range image generation process and the micro-motion feature modulation process;

[0106] For high-priority targets, more scattering points and a higher-precision modulation model are configured; for low-priority targets, the hardware resources they occupy are reduced.

[0107] Specifically, its implementation begins with determining the simulation priority of each target based on its attributes. When simulating complex battlefields or test scenarios involving multiple targets simultaneously, the system (usually the control layer's host computer software) maintains a set of attributes for each simulated target instance. These attributes, which dynamically determine its importance, mainly include: target type (e.g., fighter jet, helicopter, cruise missile, vehicle, decoy), target distance (instantaneous slant range relative to radar), and threat level assigned by the mission scenario (e.g., high-value target, priority target, general target). For example, a fighter jet approaching at high speed at close range typically has a higher simulation priority than a transport aircraft flying slowly at a long distance due to its type and distance attributes. The control layer comprehensively evaluates these attributes based on preset, configurable priority calculation rules (e.g., weighted scoring method) to calculate a quantified simulation priority value or level label for each target. This priority is not static but dynamically updated as the target moves (distance changes) and the tactical situation evolves.

[0108] Subsequently, the system dynamically configures hardware resources within the FPGA or multiple FPGA nodes based on simulation priorities. These hardware resources specifically refer to the physical logic units used to execute core processing steps, primarily including: the number of parallel pipeline channels for multi-scattering point range image generation processing and their associated block memory (BRAM); and CORDIC computation units (especially at the second level) for micro-motion feature modulation processing. Dynamic resource configuration is an online decision-making and allocation process. The control layer compares the priority ranking list of targets with the real-time resource occupancy status table of the FPGA cluster. For high-priority targets, the system allocates more hardware resources to support higher-precision simulations. Specifically:

[0109] Configure a larger number of scattering points: This means enabling a larger number of delay taps for the target in the multi-tap delay line. For example, for a high-priority fighter target, 16 scattering points may be allocated to finely simulate its fuselage, wings, air intakes, tail nozzles, and other details; while for a low-priority target, only 4 scattering points may be allocated to roughly simulate its outline.

[0110] Configure a higher precision modulation model: This means enabling a more complex micro-motion model and higher processing precision for the target in the aforementioned micro-motion modulation link. For example, a second-level CORDIC can be enabled for high-priority helicopter targets, and a high-precision DDS kernel can be used to generate rotor modulation signals that include Doppler modulation; while for low-priority targets, micro-motion modulation may be simplified or even turned off, or a low-precision lookup table model may be used.

[0111] Conversely, for low-priority targets or targets at the edge of the radar beam (whose echo signals are weaker and have less impact on the test), the system will proactively reduce the hardware resources they occupy. For example, it may reduce the number of scattering points, reduce the iteration bits of CORDIC operations to save DSP slices, or schedule multiple low-priority targets into the same FPGA processing channel for time-sharing resource reuse. When a high-priority target appears or a low-priority target leaves, the resource manager will trigger reconfiguration, reallocating pipelines, memory, and computing units. The entire process must be completed between frames or pulses to ensure the continuity of the simulation.

[0112] The technical effect of this implementation is to solve the fundamental contradiction between limited FPGA hardware resources and the demand for infinite simulation fidelity in multi-objective, high-complexity testing scenarios, and to achieve the optimal balance between system performance and resource utilization efficiency.

[0113] In a preferred embodiment, the micro-motion characteristic modulation processing of multiple echo components includes the following steps:

[0114] For each echo component, configuration information is determined based on its corresponding target component identifier, which is used to distinguish whether the target component simulated by the echo component is a stationary component or a moving component.

[0115] Based on the configuration information, the cascaded CORDIC module is controlled to perform differentiated modulation operations on each echo component;

[0116] Specifically, for the echo component identified as a simulated moving part, the second stage of the cascaded CORDIC module is activated, and micro-Doppler modulation is performed based on the micro-motion model parameters corresponding to the moving part;

[0117] For echo components identified as simulating stationary components, the second stage of the cascaded CORDIC module is disabled or bypassed.

[0118] Specifically, target component identifiers are established and utilized to guide the cascaded CORDIC modules in performing different operations. First, during the target modeling phase (typically at the control layer), a complex extended target (such as a helicopter) is decomposed into multiple scattering centers. Each scattering center is not only associated with its position and RCS weight in the target coordinate system but is also assigned a specific target component identifier. This identifier is a metadata tag indicating the type of physical component simulated by that scattering point. The most critical type distinction is between stationary and moving components. For example, the helicopter's fuselage, cockpit, and horizontal tail are typically identified as stationary components; while its main rotor hub, rotor blade tips, and tail rotor are identified as moving components.

[0119] When performing micro-motion characteristic modulation processing, for each echo component, the system first determines the configuration information based on its corresponding target component identifier. This process can be achieved through a lookup table: using the aforementioned component identifier as an index, a predefined configuration rule table is queried to obtain the configuration information customized for that type of component. This configuration information is a control vector, and its core fields include at least:

[0120] Enable microDoppler modulation: A Boolean flag.

[0121] When enabled, the micro-motion model parameters used are: if enabled, a specific set of parameters are associated, such as the rotor speed, number of blades, and initial phase for simulating rotor speed; or the frequency, amplitude, and modulation waveform index for simulating engine vibration.

[0122] Next, based on the configuration information, the system controls the cascaded CORDIC module to perform differentiated modulation operations on each echo component. For echo components identified as simulating moving parts, the system enables the second stage of the cascaded CORDIC module. Specifically, the control logic sets the enable flag, allowing the data stream of this echo component to pass normally through the second-stage CORDIC. Simultaneously, the micro-motion model parameters corresponding to the moving part in the configuration information are loaded into the micro-motion parameter generation unit (such as a DDS kernel or lookup table logic). This generation unit generates a nonlinear modulation phase increment sequence in real time based on these parameters, driving the second-stage CORDIC to perform specific micro-Doppler modulation on this signal, consistent with the physical motion of the component. For example, a strongly periodic sinusoidal phase modulation is applied to the scattering point representing the rotor blade tip; a phase jitter of a specific frequency and amplitude is applied to the scattering point representing the vibrating engine. For echo components identified as simulating stationary parts, the system performs simplified processing. The micro-Doppler modulation enable flag in the configuration information is set to no. Accordingly, the control logic disables or bypasses the second stage of the cascaded CORDIC module. Disabling refers to shutting down the operation of the second-stage CORDIC by gating the clock or enabling signal to save power and computation cycles. Bypassing refers to routing the output signal of the first-stage CORDIC directly to the final output of the cascaded module through a data selector, bypassing the second-stage CORDIC. Regardless of the method, the technical effect is equivalent: the echo component representing the stationary component only undergoes the main Doppler modulation performed by the first-stage CORDIC, without any additional micro-Doppler modulation generated by the component's own movement. This aligns with the physical fact that stationary components move with the overall target but do not possess independent micro-motions.

[0123] The technical effect of this implementation is that it enables precise signal simulation of components with different physical characteristics within a single target model, improving the simulation accuracy of the target's micro-motion characteristics from the overall target to the component level, and generating composite target echoes that are physically more accurate and feature-rich.

[0124] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the inventive concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. A real-time radar echo simulation method based on FPGA and digital array, characterized in that, Includes the following steps: The radar transmit signal is received and digitized and down-converted to obtain the baseband I / Q signal; Within the FPGA, the baseband I / Q signal is processed to generate a multi-scattering point range image, forming multiple echo components corresponding to different scattering points of the target; The multiple echo components are subjected to micro-motion characteristic modulation processing: through a multi-level phase modulation unit, each echo component is sequentially subjected to main Doppler modulation and micro Doppler modulation to generate an echo signal that has both main motion and micro-motion characteristics. The echo signal modulated by the micro-motion feature is superimposed and synthesized with the simulated environmental effect signal to obtain the synthesized signal; The synthesized signal is up-converted and digital-to-analog converted, and then output to the radar under test through a digital array feed system. The step of outputting the power to the radar under test through the digital array feeding system includes the following steps: Based on the target space angle information, determine one or more physical units corresponding to the digital array power supply system; Calculate the output amplitude ratio of one or more of the physical units; The synthesized signal is distributed to the corresponding physical units according to the output amplitude ratio, and then transmitted after digital-to-analog conversion; The target spatial angle information is generated in real time based on the target's dynamic spatial position model; The dynamic spatial position model is updated by the control layer in each processing cycle according to preset target trajectory parameters. The target trajectory parameters include the real-time three-dimensional spatial coordinates of the target. The FPGA or the control layer calculates the target spatial angle information in real time based on the real-time three-dimensional spatial coordinates and the known geometric position of the digital array power supply system. The digital array power supply system adjusts the phase and amplitude relationship of the output signals of each physical unit according to the target spatial angle information, so that the signals emitted by all physical units are coherently superimposed in the air to form an equivalent plane wavefront, the normal direction of which points to the dynamic spatial position.

2. The real-time radar echo simulation method based on FPGA and digital array according to claim 1, characterized in that, The multi-level phase modulation unit is a cascaded coordinate rotating digital computer (CORDIC) module; The subject Doppler modulation is executed by the first stage of the cascaded CORDIC module, which performs rotation calculations based on the phase increment corresponding to the target subject's motion velocity to simulate the subject Doppler frequency shift. The micro-Doppler modulation is executed by the second stage of the cascaded CORDIC module, which performs nonlinear rotation calculations based on the modulation phase increment generated by the preset micro-motion model parameters to superimpose micro-Doppler features onto the echo component.

3. The real-time radar echo simulation method based on FPGA and digital array according to claim 1, characterized in that, The multi-scattering point range image generation process for the baseband I / Q signal includes the following steps: Build multiple parallel processing pipelines within the FPGA; For each pipeline, a multi-tap delay line is constructed using memory to generate multiple signal copies with different time delays. Each signal copy represents a scattering point of the target and is assigned an independent radar cross section (RCS) weight.

4. The real-time radar echo simulation method based on FPGA and digital array according to claim 1, characterized in that, The simulated environmental effect signal is generated by an environmental multipath convolution module, which performs the following operations: Based on the ray tracing approximation model, the time delay and attenuation coefficient of the reflected path relative to the direct path are calculated; By utilizing the pulsating array convolution structure within the FPGA, the time delay and attenuation coefficients are applied to clutter data generated based on a clutter statistical model to generate an environmental effect signal that includes multipath effects and clutter.

5. The real-time radar echo simulation method based on FPGA and digital array according to claim 2, characterized in that, The modulation phase increment is generated by a direct digital frequency synthesis (DDS) core or lookup table logic based on the micro-motion model parameters, which include rotor speed or fuselage vibration frequency.

6. The real-time radar echo simulation method based on FPGA and digital array according to claim 1, characterized in that, The processing performed within the FPGA is carried out in a distributed and parallel manner by multiple FPGA nodes, with each FPGA node handling multiple analog channels.

7. The real-time radar echo simulation method based on FPGA and digital array according to claim 1, characterized in that, When simulating multiple targets simultaneously, the method further includes dynamic resource scheduling, which comprises the following steps: The simulation priority is determined based on the attributes of each objective; Based on the simulation priority, dynamically configure the hardware resources within the FPGA or multiple FPGA nodes for performing the multi-scattering point range image generation process and the micro-motion feature modulation process; For high-priority targets, more scattering points and a higher-precision modulation model are configured; for low-priority targets, the hardware resources they occupy are reduced.

8. The real-time radar echo simulation method based on FPGA and digital array according to claim 2, characterized in that, The micro-motion feature modulation processing of multiple echo components includes the following steps: For each echo component, configuration information is determined based on its corresponding target component identifier, which is used to distinguish whether the target component simulated by the echo component is a stationary component or a moving component. Based on the configuration information, the cascaded CORDIC module is controlled to perform differentiated modulation operations on each echo component; Specifically, for the echo component identified as a simulated moving part, the second stage of the cascaded CORDIC module is activated, and micro-Doppler modulation is performed based on the micro-motion model parameters corresponding to the moving part; For echo components identified as simulating stationary components, the second stage of the cascaded CORDIC module is disabled or bypassed.

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