Method and system for storing and recovering control information of chip kernel cluster

Abstract

The embodiment of the invention discloses a control information storage and recovery method and system for a chip kernel cluster. The method comprises the following steps: determining a kernel set cluster which is to execute control information storage or recovery operation in a chip, the kernel set cluster comprising a plurality of function registers; obtaining key parameters, wherein the key parameters comprise operation parameters, a base address of a kernel cluster and an offset address; based on the base address and the offset address, obtaining a starting virtual address and a terminating virtual address; traversing to the termination virtual address according to an incremental sequence by taking the initial virtual address as a starting point, and sequentially determining function registers to be operated at present; and performing storage operation or recovery operation on the control information of the current to-be-operated function register according to the operation parameters. According to the method, the orderly storage or recovery operation of the control information can be realized by configuring the key parameters and progressively increasing the virtual addresses, and the operation accuracy is guaranteed.

Description

Technical Field

[0001] This disclosure relates to the field of data management and recovery technology, and in particular to a method and system for saving and recovering control information of a chip core cluster. Background Technology

[0002] With the continuous evolution of server chip design technology, the number of CPU cores integrated in a single server chip has increased dramatically. To facilitate control and management, core clusters are used as the basic unit to manage these CPU cores. When system demands require certain core clusters to be idle, the entire core cluster will enter a power-down state to reduce power consumption.

[0003] To ensure the continuity of control information after a safe power failure and power-on of the kernel cluster, the system management unit (MMU) needs to save and restore the control information of the kernel cluster. However, the control information of the kernel cluster is characterized by its scattered and numerous register addresses. The MMU can only operate on individual addresses one by one. In practice, it is difficult to accurately check each of the scattered and numerous register addresses, which can easily lead to disorder in the management of control information. Summary of the Invention

[0004] In view of this, the present disclosure provides a method and system for saving and restoring control information of a chip core cluster, which can realize the orderly saving or restoration of control information by configuring key parameters and incrementing virtual addresses, thus ensuring the accuracy of the operation.

[0005] In a first aspect, embodiments of this disclosure provide a method for saving and restoring control information of a chip core cluster, employing the following technical solution: Identify the kernel cluster in the chip for which control information saving or restoring operations are to be performed, wherein the kernel cluster contains multiple function registers; Obtain key parameters, including operation parameters, the base address of the kernel cluster, and the offset address; Based on the base address and the offset address, obtain the starting virtual address and the ending virtual address; Starting from the initial virtual address, traverse to the ending virtual address in ascending order to determine the function register to be operated in sequence; The control information of the function register to be operated is saved or restored according to the operation parameters.

[0006] Optionally, obtaining the key parameters includes: Determine the type of operation to be executed based on the control information, and configure the operation parameters based on the type of operation to be executed; Obtain the physical addresses of all function registers to be operated on in the kernel cluster and the base address of the kernel cluster. Based on the difference between the physical address of each function register to be operated on and the base address, obtain the corresponding offset address.

[0007] Optionally, obtaining the key parameters includes: Determine the key function registers in the kernel cluster and the type of operation to be executed for the control information, and configure the operation parameters based on the type of operation to be executed; Obtain the physical addresses of all function registers to be operated in the kernel cluster and the base address of the kernel cluster, and filter out the physical addresses of key function registers from the physical addresses of all function registers to be operated. Extract the minimum value from the physical addresses of all critical function registers; From the physical addresses of the function registers to be operated on, select physical addresses that are less than or equal to the minimum value, and obtain the corresponding offset address based on the difference between the selected physical address and the base address.

[0008] Optionally, the method for saving and restoring the control information of the chip core cluster further includes: When the operation to be performed is a save operation, the key parameters also include control information for all function registers to be operated; or, When the type of operation to be performed is a save operation, the key parameters also include control information of the function register to be operated on, whose physical address is less than or equal to the minimum value.

[0009] Optionally, obtaining the starting virtual address and the ending virtual address based on the base address and the offset address includes: Based on the base address and the offset address, obtain the set of physical addresses; Obtain the translation rules between physical addresses and virtual addresses; Based on the conversion rules, the smallest physical address in the physical address set is converted into a starting virtual address, and the largest physical address is converted into a terminating virtual address.

[0010] Optionally, the method for saving and restoring the control information of the chip core cluster further includes: Identify the key functional registers in the kernel cluster; The key parameters also include the physical address of the key function register, and the virtual address of the interrupt bit is obtained based on the physical address of the key function register.

[0011] Optionally, the step of traversing from the starting virtual address to the ending virtual address in ascending order to determine the currently operable function registers includes: Based on the conversion rules, the current virtual address is converted into a physical address, where the starting virtual address is the initial current virtual address; When a converted physical address exists in the set of physical addresses, the function register to which the converted physical address belongs is determined as the function register to be operated. When the current virtual address is not equal to the interrupt bit virtual address and not equal to the termination virtual address, the current virtual address is incremented to obtain a new current virtual address, and a new current function register to be operated is determined based on the new current virtual address. Continue executing the above operation process until the current virtual address is equal to the interrupt bit virtual address or equal to the termination virtual address, then stop incrementing the current virtual address.

[0012] Optionally, the method for saving and restoring the control information of the chip core cluster further includes: When the control information of the function register to be operated is successfully saved or restored according to the operation parameters, the function register to be operated is defined as the function register that has been operated. When the save or restore operation of the control information of the function register to be operated according to the operation parameters fails, or when the physical address of the function register to be operated is equal to the physical address of the critical function register, an interrupt is triggered. During the interruption, the physical addresses of all function registers to be operated are reacquired, and the critical parameters are reacquired based on the physical addresses of all function registers to be operated.

[0013] Optionally, the method for saving and restoring the control information of the chip core cluster further includes: Select the maximum value among the physical addresses of all function registers as the termination physical address; When the physical address of the currently pending function register is equal to the termination physical address, an interrupt is triggered. During the interrupt process, the execution information of the current kernel cluster operation task is read. After the interrupt is completed, the resources are released and the current kernel cluster operation task is exited.

[0014] Optionally, the step of saving or restoring the control information of the currently operated function register according to the operation parameters includes: When the operation parameter is 0, the control information of the function register to be operated is written into the data storage unit based on the preset read-write mapping rule; When the operation parameter is 1, the control information of the function register to be operated is read from the data storage unit based on the preset read-write mapping rules.

[0015] Optionally, before determining the kernel cluster in the chip to be used for control information saving or restoring operations, the control information saving and restoring method for the chip kernel cluster further includes: Perform read and write tests on the reserved storage bits contained in the data storage unit; When the read / write test of the reserved storage bit fails, an idle storage bit is selected from the spare storage bits contained in the data storage unit; Replace the storage address of the reserved storage location with the storage address of the free storage location; The read / write mapping rule is constructed based on the storage addresses of the reserved storage bits and the free storage bits obtained from successful read / write tests.

[0016] Secondly, this disclosure also provides a chip core cluster control information storage and recovery system, the system including a system management unit and a storage and recovery engine; The system management unit is used to determine the kernel cluster in the chip to perform control information saving or recovery operations, and the kernel cluster contains multiple function registers; Acquire key parameters and send them to the save and restore engine. The key parameters include operation parameters, the base address of the kernel cluster, and the offset address. The save and restore engine is used to obtain the starting virtual address and the ending virtual address based on the base address and the offset address; Starting from the initial virtual address, traverse to the ending virtual address in ascending order to determine the function register to be operated in sequence; The control information of the function register to be operated is saved or restored according to the operation parameters.

[0017] Optionally, the save and restore engine includes a control status register; The system management unit is specifically used to determine the type of operation to be performed on the control information, and to configure the operation parameters based on the type of operation to be performed. Obtain the physical addresses of all function registers to be operated in the kernel cluster and the base address of the kernel cluster. Based on the difference between the physical address of each function register to be operated and the base address, obtain the corresponding offset address. Configure the key parameters into the control status register.

[0018] Optionally, the save and restore engine includes a control status register; The system management unit is specifically used to determine the key function registers in the kernel cluster and the type of operation to be executed for the control information, and to configure the operation parameters based on the type of operation to be executed. Obtain the physical addresses of all function registers to be operated in the kernel cluster and the base address of the kernel cluster, and filter out the physical addresses of key function registers from the physical addresses of all function registers to be operated. Extract the minimum value from the physical addresses of all critical function registers; From the physical addresses of the function registers to be operated on, select physical addresses that are less than or equal to the minimum value, and obtain the corresponding offset address based on the difference between the selected physical address and the base address; Configure the key parameters into the control status register.

[0019] Optionally, when the operation to be performed is a save operation, the key parameters may also include control information for all function registers to be operated; or, When the type of operation to be performed is a save operation, the key parameters also include control information of the function register to be operated on, whose physical address is less than or equal to the minimum value.

[0020] Optionally, the save and restore engine includes a control status register, an address counter, an address management unit, and a read / write control unit; The control status register is used to receive key parameters sent by the system management unit and obtain a set of physical addresses based on the base address and the offset address; Obtain the translation rules between physical addresses and virtual addresses; Based on the conversion rules, the smallest physical address in the physical address set is converted into a starting virtual address, and the largest physical address is converted into a terminating virtual address. Send the starting virtual address and the ending virtual address to the address counter; Send the physical address set to the address management unit; The operation parameters are sent to the read / write control unit.

[0021] Optionally, the system management unit is further configured to determine key function registers in the kernel cluster; the key parameters also include the physical address of the key function registers; The control status register is also used to convert the physical address of the critical function register into an interrupt bit virtual address and send it to the address counter.

[0022] Optionally, the address counter is used to send the current virtual address to the address management unit, and the starting virtual address is the initially sent current virtual address; The address management unit is used to convert the received current virtual address into a physical address based on the conversion rules. When a converted physical address exists in the set of physical addresses, the function register to which the converted physical address belongs is determined as the function register to be operated, and the physical address and control information of the function register to be operated are sent to the read / write control unit. The address counter is also used to determine whether the current virtual address is equal to the interrupt bit virtual address or whether it is equal to the termination virtual address; When the current virtual address is not equal to the interrupt bit virtual address and not equal to the termination virtual address, the current virtual address is incremented to obtain a new current virtual address, and the new current virtual address is sent to the address management unit. When the current virtual address is equal to the interrupt bit virtual address or equal to the termination virtual address, stop incrementing the current virtual address; The address management unit is further configured to determine a new currently operable function register based on the new current virtual address, and send the physical address and control information of the new currently operable function register to the read / write control unit.

[0023] Optionally, the read / write control unit is used to save or restore the control information of the currently operated function register according to the operation parameters. After the operation is completed, the physical address of the currently operated function register and the execution status of the operation are sent to the control status register. The control status register is also used to determine, based on the execution status, whether the operation of the control information of the currently operated function register is successful. When the operation is successful, the function register to be operated is defined as the function register that has been operated. When the operation fails, or when the physical address of the function register to be operated is equal to the physical address of the critical function register, an interrupt is triggered and an interrupt signal is sent to the system management unit. The system management unit is also used to, upon receiving an interrupt signal, reacquire the physical addresses of all function registers to be operated and, based on the physical addresses of all function registers to be operated, reacquire the key parameters.

[0024] Optionally, the system management unit is further configured to select the maximum value among the physical addresses of all function registers as the termination physical address and send the termination physical address to the control status register. The control status register is also used to trigger an interrupt and send an interrupt signal to the system management unit when the physical address of the currently operated function register is equal to the termination physical address. The system management unit is also used to read the execution information of the current kernel cluster operation task after receiving an interrupt signal, and release resources and exit the current kernel cluster operation task after completing the interrupt handling.

[0025] Optionally, the save and restore engine further includes a data storage unit; The read / write control unit is used to write the control information of the function register to be operated into the data storage unit based on a preset read / write mapping rule when the operation parameter is 0. When the operation parameter is 1, the control information of the function register to be operated is read from the data storage unit based on the preset read-write mapping rules.

[0026] Optionally, the system management unit is further configured to perform read / write tests on the reserved storage bits contained in the data storage unit before determining the kernel cluster in the chip to perform the control information saving or recovery operation; When the read / write test of the reserved storage bit fails, an idle storage bit is selected from the spare storage bits contained in the data storage unit; Replace the storage address of the reserved storage location with the storage address of the free storage location; The read / write control unit is also used to construct the read / write mapping rules based on the storage addresses of the reserved storage bits and the storage addresses of the free storage bits that have been successfully read / write tested.

[0027] The chip core cluster control information saving and recovery method provided in this disclosure, by clearly identifying the core cluster to be operated on, can accurately focus on the object to be processed, avoiding operations on irrelevant registers and improving the targeting and efficiency of the operation. After obtaining key parameters, including operation parameters, base address, and offset address, the starting virtual address and ending virtual address are accurately calculated based on these parameters. In this way, when traversing the virtual address, it can start from a precise starting point and determine the current function register to be operated on in ascending order, ensuring that the control information of each function register is saved or restored in an orderly manner, greatly reducing the possibility of operation errors and ensuring the accuracy and integrity of control information processing.

[0028] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 A schematic flowchart illustrating the method for saving and restoring control information of a chip core cluster provided in this embodiment of the disclosure; Figure 2 A schematic diagram of the structure of the chip core cluster control information saving and recovery system provided in this embodiment of the disclosure; Figure 3 A flowchart illustrating the method for obtaining key parameters provided in the embodiments of this disclosure; Figure 4 Another flowchart illustrating the method for obtaining key parameters provided in the embodiments of this disclosure; Figure 5 This is a flowchart illustrating the read / write mapping rule construction method provided in this embodiment of the disclosure. Detailed Implementation

[0031] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0032] It should be understood that the following specific examples illustrate the implementation of this disclosure, and those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. This disclosure can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0033] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this disclosure, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.

[0034] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this disclosure. The drawings only show the components related to this disclosure and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0035] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0036] Reference Figure 1 This disclosure provides a method for saving and restoring control information of a chip core cluster, including the following steps: S1: Determine the kernel cluster in the chip to perform control information saving or recovery operations. The kernel cluster contains multiple function registers. S2: Obtain key parameters, including operation parameters, base address of kernel cluster, and offset address; S3: Based on the base address and offset address, obtain the start virtual address and end virtual address; based on the physical address of the critical function register, obtain the interrupt bit virtual address. S4: Starting from the beginning virtual address, traverse to the end virtual address in ascending order, and determine the function register to be operated in turn; S5: Save or restore the control information of the function register to be operated based on the operation parameters.

[0037] The chip core cluster control information saving and recovery method disclosed herein, by clearly identifying the core cluster to be operated on, can precisely focus on the object to be processed, avoiding operations on irrelevant registers and improving the targeting and efficiency of the operation. After obtaining key parameters, including operation parameters, base address, and offset address, the starting virtual address and ending virtual address are accurately calculated based on these parameters. In this way, when traversing the virtual address, it can start from a precise starting point and determine the current function register to be operated on in ascending order, ensuring that the control information of each function register is saved or restored in an orderly manner, greatly reducing the possibility of operational errors and ensuring the accuracy and integrity of control information processing.

[0038] In S1, refer to Figure 2 The diagram shows the structure of the control information saving and recovery system of the chip core cluster. The system includes a system management unit and a saving and recovery engine. The saving and recovery engine can be set outside the system management unit or inside the system management unit. The saving and recovery engine includes a control status register, an address counter, an address management unit, a read and write control unit, a data storage unit, and an engine bus. The system includes: a control status register (DC register), a control status register (DC register), and a system management unit (SMU). The DC register receives configuration information from the SMU, drives downstream units, and collects status updates from downstream units, transmitting this information to the SMU via a system management interrupt. An address counter, similar to a program counter in a central processing unit, increments the current virtual address after each virtual address operation, aligning it to the next virtual address. An address management unit converts the virtual address in the address counter to the physical address of the target register. It relies on the virtual-to-physical mapping provided by the DC register and its own stored set of physical addresses to determine the actual physical address corresponding to the current save / restore operation register. The read / write control unit, upon receiving the physical address from the address management unit and the type of read / write operation to be performed, initiates an access operation to that physical address, saving or restoring the register's control information. A data storage unit stores register control information. The SMU is connected to a system bus, and the engine bus is a bridge module that converts the internal bus signals of the save / restore engine into general-purpose system bus signals.

[0039] The system management unit (SMU), as the primary control unit, configures key parameters of the save-and-restore engine, thereby guiding the engine to complete the current kernel cluster operation task. Before this, the SMU identifies the kernel cluster within the server chip to be used for control information save or restore operations. It can utilize the chip's architecture documentation and design specifications to clarify the functions and uses of different kernel clusters within the chip, and pinpoint the relevant kernel clusters based on the specific requirements of the control information save or restore operation. Simultaneously, it can use the chip's management interface and monitoring tools to collect kernel cluster operational status information, accurately capturing the chip's power-on / power-off process. During chip operation, the power-on / power-off process has specific impacts on different kernel clusters. By analyzing the state changes of each kernel cluster during this process, the kernel cluster to be used for control information save or restore operations can be located more accurately. The kernel cluster contains numerous registers, such as the instruction pointer register (IP), which stores the address of the next instruction to be executed, guiding the program's execution flow; data registers, which can be used to temporarily store data involved in operations and the results of operations, facilitating data processing; and status registers, which reflect the current state of the processor, such as the characteristics of the operation results (whether there is an overflow, whether it is zero, etc.). These registers each have unique implementation functions, and are therefore called function registers.

[0040] In S2, the system management unit can send information about all pending function registers to the save-and-restore engine, or it can execute these pending function registers in batches, sending only the information about the function registers needed for the current stage to the save-and-restore engine. Therefore, there are two methods for obtaining key parameters. The first specific implementation is based on the goal of "the system management unit sending information about all pending function registers to the save-and-restore engine," as described in [reference]. Figure 3 The flowchart illustrating the method for obtaining key parameters shows that "obtaining key parameters" includes the following steps: S21: Determine the type of operation to be performed on the control information, and configure the operation parameters based on the type of operation to be performed; S22: Obtain the physical address of all function registers to be operated on in the kernel cluster and the base address of the kernel cluster. Based on the difference between the physical address and the base address of each function register to be operated on, obtain the corresponding offset address.

[0041] In the above steps, it is determined whether the operation is to power on or power off the kernel cluster. If it is a power off operation, the operation type to be performed is a save operation, and the operation parameter is configured to 0. If it is a power on operation, the operation type to be performed is a restore operation, and the operation parameter is configured to 1.

[0042] The base address can be understood as the starting position of the kernel cluster in memory, much like a building's address, identifying its starting point in memory space. The offset address is a value relative to the base address, used to locate the specific register to be operated on within the kernel cluster. By combining the base address and the offset address, the specific register within the kernel cluster to be operated on can be accurately located. This method requires the system management unit to identify all function registers within the kernel cluster that require control information saving or restoring operations. The difference between the physical address of the function register and the base address is used directly as the offset address of the function register, or the difference is converted into an offset address according to a preset mapping rule. Subsequently, the save / restor engine can determine all the function registers to be operated on based on the key parameters configured by the system management unit.

[0043] After completing the preceding series of operations, the key parameter construction phase begins. This phase requires comprehensive consideration of multiple factors, specifically, the key parameters are constructed based on the determined operating parameters, pre-set base addresses, and calculated offset addresses. Each of these factors carries different information: the operating parameters reflect the relevant requirements and conditions of the specific operation, and the base address provides a reference for address positioning. They work together to form the core of the key parameters. In this way, the control status register in the recovery engine can be saved, and relevant information about all function registers to be operated can be obtained through the key parameters.

[0044] In the first specific implementation of obtaining key parameters, the key parameters are further supplemented according to the type of operation to be executed. When the type of operation to be executed is a save operation, it means that relevant information needs to be retained. At this time, in addition to the parts constituted above, the key parameters also need to include the control information of all function registers to be operated. This control information records the various states and settings of the function registers during the operation process, which is crucial for subsequent recovery operations or accurate understanding of the register states. Including this control information in the key parameters ensures that after the save operation is executed, the register states can be accurately restored and corresponding operations can be performed based on these complete key parameters. When the type of operation to be executed is a recovery operation, it is necessary to read the control information from the save location; therefore, the key parameters at this time do not include control information.

[0045] The second specific implementation method is based on the objective of "the system management unit executing these function registers to be operated in batches, and only sending the relevant information of the function registers that need to be executed in the current stage to the save and restore engine," and refers to the method described above. Figure 4 Another flowchart illustrating the method for obtaining key parameters is shown. "Obtaining key parameters" includes the following steps: S23: Determine the key function registers in the kernel cluster and the types of operations to be performed on control information, and configure operation parameters based on the types of operations to be performed; S24: Obtain the physical addresses of all function registers to be operated on in the kernel cluster and the base address of the kernel cluster, and filter out the physical addresses of key function registers from the physical addresses of all function registers to be operated on. S25: Extract the minimum value from the physical addresses of all critical function registers; S26: Filter out the physical addresses less than or equal to the minimum value from the physical addresses of the function registers to be operated on, and obtain the corresponding offset address based on the difference between the filtered physical address and the base address.

[0046] In the above steps, determining the starting point of each stage within the framework of the phased configuration strategy is a crucial step in optimizing the save-and-restore operation. Since the critical function register with the smallest physical address corresponds to the first breakpoint in the entire execution flow, this can be used as a basis for rationally dividing the save-and-restore process. Using the minimum physical address of all critical function registers as a node, the entire execution flow is divided into the initial stage. In this stage, it is necessary to accurately identify the function registers that require save-and-restore operations before that critical function register. This means filtering out all function registers whose physical addresses are less than the minimum value. These function registers, along with the critical function register with the smallest physical address, constitute the main objects of the save-and-restore operation in the initial stage. After determining the objects of operation in this stage, it is necessary to further calculate the corresponding offset addresses. Combined with a pre-set base address, by accurately calculating the offset addresses of these function registers and critical function registers relative to the base address, accurate positioning information can be provided to the save-and-restore engine, allowing the engine to clearly know the specific locations of all function registers that need to perform save-and-restore operations in the current stage. This method of stage division and parameter calculation based on the minimum physical address of critical function registers is highly consistent with the phased configuration strategy. It enables save and restore operations to be performed in an orderly manner according to the physical location of the function registers, with a clear scope of operation for each stage. This allows the system to dynamically adjust the operation of subsequent stages based on the results of the previous stage, thereby improving the efficiency and flexibility of the entire save and restore process.

[0047] In the second specific implementation of obtaining key parameters, the key parameters are further supplemented according to the type of operation to be executed. When the type of operation to be executed is a save operation, the key parameters also include the control information of the function register to be operated on whose physical address is less than or equal to the minimum value; when the type of operation to be executed is a restore operation, the key parameters do not include control information.

[0048] Furthermore, even in the first specific implementation of obtaining key parameters described above, it is still necessary to determine the key function registers in the kernel cluster. Key parameters also include the physical addresses of these key function registers. The physical addresses of the key function registers clearly indicate the location of the interrupt operation. Based on the physical addresses of the key function registers, the virtual address of the interrupt bit is obtained. During the process of traversing the virtual addresses in ascending order, if the current virtual address being traversed is equal to the virtual address of the interrupt bit, the incrementing operation on the current virtual address is stopped, and the key parameters are obtained again.

[0049] In traditional solutions, each time the system management unit performs a function register control information saving or restoration operation, it takes a long time. This results in the system management unit's resources being occupied for an extended period, making it unable to simultaneously handle other important system tasks. Consequently, the service quality of the system management unit is reduced, affecting the operation of the server chip and being extremely detrimental to control events in the system that require real-time responses.

[0050] Therefore, this method incorporates an interrupt mechanism to improve process flexibility. When the current virtual address being traversed equals the interrupt bit virtual address, the increment operation on the current virtual address is stopped, and key parameters are reacquired. This mechanism allows the entire operation process to be dynamically adjusted according to actual conditions. In complex application scenarios, situations may arise where it is necessary to readjust operation parameters or update register address information. This interrupt and parameter reacquisition method can respond to these changes promptly, ensuring that control information saving and recovery operations can be performed continuously and stably. This enhances the adaptability and reliability of the method, enabling it to better cope with diverse server chip application environments.

[0051] The system management unit identifies key function registers from all function registers after determining which kernel cluster requires a save or restore operation. On one hand, it refers to the chip's technical documentation and register manual to understand the function and description of each register, selecting registers that play a crucial role in the save or restore operation of control information, such as registers controlling frequency and voltage. Configuring these registers triggers the power-on initialization of frequency and voltage, and saving or restoring these special registers may lead to modifications of control information in subsequent registers or changes to the save or restore logic of subsequent registers. On the other hand, it analyzes and simulates the functions of the kernel cluster to observe which register data changes have a significant impact on the operation result during the save or restore operation, identifying these registers as key function registers. Furthermore, it can also combine actual application scenarios and historical experience to comprehensively determine key function registers. In summary, by consulting documents, utilizing management interfaces and monitoring tools, performing functional analysis and simulation, and combining practical experience, it is possible to effectively identify the kernel cluster in the server chip that is to perform control information saving or recovery operations, identify and record the key function registers within it, and record them by obtaining the physical addresses of all function registers to be operated on in the kernel cluster and then marking the physical addresses of the key function registers separately.

[0052] When the system management unit detects a save-and-restore operation, it sends control information such as the corresponding address, interrupt breakpoint, and save-and-restore operation type to the control status register in the save-and-restore engine. The save-and-restore engine performs the save-and-restore operation based on these parameters and reports the result to the system management unit via an interrupt after completion. During this process, because some control information is correlated or breakpoints need to be added at certain save-and-restore nodes to involve the system management unit in some complex tasks, the save-and-restore engine design incorporates breakpoint functionality. That is, when certain specific addresses are reached, the save-and-restore execution is paused, and the system management unit is involved in the processing. After the system management unit completes its processing, the save-and-restore engine flow is reconfigured. This breakpoint feature allows the entire save-and-restore process to be divided into multiple stages as needed.

[0053] In complex system operating environments, interruptions caused by the presence of critical function registers are often multiple. Each time such an interruption occurs due to a critical function register, the save-and-restore engine must re-execute the save and restore operations. Therefore, when configuring critical parameters, the one-time batch sending strategy described in the first specific implementation method can be considered, that is, sending the location information of all breakpoints to the control status register at once. If the control information does not change dynamically during program execution, or the breakpoint positions remain stable, this one-time full sending method can significantly improve the system's operating efficiency. It reduces the communication overhead caused by multiple interactions, allowing the save-and-restore engine to obtain complete critical parameters in a shorter time, thereby completing the save-and-restore operation more efficiently and reducing system response latency. In addition, the system management unit can also adopt the phased configuration strategy described in the second specific implementation method, sending only the relevant information from the initial execution function register to the first critical function register to the control status register. Based on the location of the critical function registers, the entire save-and-restore process can be divided into multiple independent stages as needed. In each stage, only the parameters required for that stage are configured in the control status register, allowing the save-and-restore engine to execute only the save-and-restore operation of the current stage. This phased execution approach offers high flexibility, allowing the system to dynamically adjust operational parameters and execution strategies for subsequent phases based on the results of the previous phase. This better adapts to various changes that may occur during system operation, thereby improving the overall stability and reliability of the system.

[0054] In S3, after the system management unit configures the key parameters into the control status register, the control status register calculates the corresponding physical addresses based on the base address and offset address, forming a physical address set. It then obtains the conversion rules between physical and virtual addresses. These rules can be pre-configured in the control status register or sent to it by the system management unit. Based on these rules, the control status register converts the smallest physical address in the physical address set to the starting virtual address, the largest physical address to the ending virtual address, and the physical address of the key function register to the interrupt bit virtual address. The starting virtual address, ending virtual address, and interrupt bit virtual address are then sent to the address counter, the physical address set is sent to the address management unit, and the operation parameters are sent to the read / write control unit.

[0055] In S4, after the address counter receives the start virtual address, end virtual address, and interrupt bit virtual address from the control status register, it stores these addresses and increments from the start virtual address. The current virtual address is then sent to the address management unit, with the start virtual address being the initially sent current virtual address. Since virtual addresses are only logical addresses and cannot be directly used to access actual kernel cluster registers, the address management unit converts the received current virtual address into a physical address based on conversion rules. These rules can be pre-configured in the address management unit or sent by the control status register. The address management unit matches the converted physical address with physical addresses in the physical address set. If the converted physical address is not found in the physical address set, it continues to wait for the next virtual address sent by the address counter and performs the conversion. If the converted physical address exists in the physical address set, the function register to which the converted physical address belongs is determined as the currently operable function register, and the physical address and control information of the currently operable function register are sent to the read / write control unit.

[0056] Each time the address counter acquires the current virtual address, it checks whether the current virtual address is equal to the interrupt bit virtual address or the termination virtual address. Only when the current virtual address is neither equal to the interrupt bit virtual address nor the termination virtual address will the current virtual address be incremented to acquire a new current virtual address, which is then sent to the address management unit. The address management unit determines the new function register to be operated on based on the new current virtual address and sends the physical address and control information of the new function register to the read / write control unit. This process continues until the current virtual address equals either the interrupt bit virtual address or the termination virtual address. At this point, the incrementing operation on the current virtual address stops, but the current virtual address is still sent to the address management unit to ensure that subsequent save and restore operations on the function register pointed to by the current virtual address can be performed.

[0057] In S5, after determining the function register to be operated on, the read / write control unit saves or restores the control information of the function register to be operated on according to the operation parameters, and configures the execution status according to the operation's execution status. For example, if the operation is successful, the execution status is configured to 0; if the operation fails, the execution status is configured to 1. After the operation is completed, the physical address of the function register to be operated on and the execution status of the operation are sent to the control status register. The control status register determines whether the operation on the control information of the function register to be operated on was successful based on the execution status. When the operation is successful, the control status register defines the function register to be operated on as an operated function register; when the operation fails, or when the physical address of the function register to be operated on is equal to the physical address of a critical function register, the control status register triggers an interrupt and sends an interrupt signal to the system management unit. Upon receiving an interrupt signal, the system management unit jumps to the corresponding interrupt service routine. During the interrupt, it reacquires the physical addresses of all pending function registers. Based on these addresses, it reacquires the critical parameters. It's important to note that as the kernel cluster operation progresses, the number of pending function registers gradually decreases. Consequently, the base address and offset address in the reacquired critical parameters will change accordingly. Since function registers may be interconnected, saving or restoring control information for one register may affect the control information of other registers. Given this interconnectivity and potential impact, critical function registers need to be redefined. Therefore, the actual critical function registers used in subsequent execution may differ from the initial plan, and the physical addresses of critical function registers in the reacquired critical parameters will also change dynamically. If the interrupt is caused by a failed save or restore operation, the system management unit repairs the failed operation during the interrupt. After repair, it re-executes the corresponding save or restore operation and defines the currently pending function register as an operated function register.

[0058] The system management unit also selects the maximum physical address among all function registers as the termination physical address and sends it to the control status register. The control status register compares the physical address of the currently pending function register with the termination physical address. When the physical address of the currently pending function register equals the termination physical address, an interrupt is triggered, and an interrupt signal is sent to the system management unit. Upon receiving the interrupt signal, the system management unit jumps to the corresponding interrupt service routine. During the interrupt process, it reads the execution information of the current kernel cluster operation task. After completing the interrupt handling, it releases resources and exits the current kernel cluster operation task, such as releasing temporarily occupied memory, semaphores, and other resources during interrupt handling. After exiting the current kernel cluster operation task flow, it restores the previously saved context information, allowing the system to return to normal operation and continue executing the interrupted task or scheduling other suitable tasks.

[0059] Furthermore, the address counter sends the current virtual address to the read / write control unit. The read / write control unit then sends the current virtual address, the execution status of the saved or operated function, and the physical address of the currently pending function register to the control status register. This allows the control status register to record the execution status of subsequent units (address counter, address management unit, read / write control unit, data storage unit), thereby collecting status update data from these units and determining whether any abnormalities have occurred in the control information saving or recovery operation. It also confirms whether the control information operation on the critical function register and the control information operation on the last function register have been completed, thus promptly notifying the system management unit via an interrupt. The control status register includes a breakpoint enable control register, which stores the address matching the "power-off function enable bit," i.e., the physical address and termination physical address of the critical function register. It determines whether the physical address of the currently pending function register is equal to the physical address of the critical function register or the termination physical address. If they are equal, the breakpoint enable control register triggers an interrupt and sends an interrupt signal to the system management unit.

[0060] During the execution of current kernel cluster operation tasks, interrupts are generated for various reasons, mainly including the following three situations: First, the operation is completed normally, specifically referring to the completion of the save or restore operation of all function controllers; second, an error response occurs during the operation, that is, the save or restore operation of the control information of any function controller fails; third, the interrupt bit virtual address is triggered, that is, the save or restore operation of the critical function register has been completed.

[0061] To enable the system management unit to quickly identify the cause of an interrupt, the control status register is configured with status information. This status information is implemented by setting three binary bits, all of which are initially set to 0. Each binary bit corresponds one-to-one with an interrupt cause: the first binary bit corresponds to the interrupt cause of normal operation completion, the second binary bit corresponds to the interrupt cause of error recovery during operation, and the third binary bit corresponds to the interrupt cause of triggering the virtual address of the interrupt bit. During operation execution, the values ​​of the binary bits are updated according to different conditions: when the physical address of the currently operated function register is equal to the termination physical address, the value of the first binary bit is set from 0 to 1; when the execution status of the save or operation shows failure, the value of the second binary bit is changed from 0 to 1; when the physical address of the currently operated function register is consistent with the physical address of the critical function register, the value of the third binary bit is changed from 0 to 1. When an interrupt occurs, the system management unit can sense the status information by reading the values ​​of these three binary bits in the control status register, thereby accurately determining the specific cause of the interrupt and taking corresponding processing measures based on different interrupt causes.

[0062] When it comes to the actual saving or restoring of control information, the read / write control unit and the data storage unit need to cooperate to complete the task. When the operation parameter is 0, the read / write control unit writes the control information of the function register to be operated into the data storage unit based on the preset read / write mapping rules; when the operation parameter is 1, it reads the control information of the function register to be operated from the data storage unit based on the preset read / write mapping rules.

[0063] The read / write mapping rules are established before determining the kernel cluster in the server chip where control information saving or restoring operations will be performed, as shown in the reference. Figure 5 The flowchart illustrating the read-write mapping rule construction method shows the following steps: S51: Perform read / write tests on the reserved storage bits contained in the data storage unit; S52: When the read / write test of the reserved storage bit fails, select an idle storage bit from the spare storage bits contained in the data storage unit; S53: Replace the storage address of the reserved storage bit with the storage address of the free storage bit; S54: Based on the storage addresses of reserved storage bits and free storage bits that have passed the read / write test, construct read / write mapping rules.

[0064] The system management unit is responsible for performing read / write tests on the reserved storage slots within the data storage unit, selecting free storage slots, and replacing the storage addresses of the reserved storage slots. The read / write control unit is responsible for constructing read / write mapping rules based on the storage addresses of the reserved and free storage slots that have successfully completed the read / write tests. Furthermore, when all read / write tests on the reserved storage slots are successful, there is no need to select free storage slots from the spare storage slots within the data storage unit; the read / write control unit can construct the read / write mapping rules based on the storage addresses of the reserved storage slots that have successfully completed the read / write tests.

[0065] To ensure the reliability of the save and recovery engine, a dedicated repair mechanism is employed to address potential bad pixels in the data storage units. This mechanism primarily involves control status registers, backup storage media arrays, read / write tests, bad pixel repair, and remapping design. The control status registers include a set of repair registers specifically designed to repair bad bits (bad pixels) in the storage media of potential data storage units. These registers act as "control switches," controlling the repair operation for bad pixels. Simultaneously, a portion of the storage media array that is not normally used is reserved within the data storage unit. This portion serves as backup "storage resources" to replace storage locations with bad pixels. Each backup storage location corresponds one-to-one with a dedicated repair register, meaning each repair register controls a specific backup storage location. After the entire system is powered on (i.e., the entire server chip system and its related components are fully powered on), the system management unit performs read / write tests on the save and recovery engine's data storage units. Specifically, test data is written to the storage unit and then read back. By comparing the written and read data, the presence of bad pixels in the storage unit is determined. If bad sectors are detected during read / write tests, the system management unit takes appropriate corrective measures. It activates the repair register corresponding to a fully functional storage line, thereby activating the backup storage location associated with that register. Then, using a remapping design, the bad sector's storage address is replaced with a functional storage line. In other words, the address that originally pointed to the bad sector is remapped to a backup, functional storage location. Thus, in subsequent save and restore operations, the system uses the normal storage location, rather than the one with the bad sector, ensuring the reliability of the save / restore engine.

[0066] Taking a data storage unit with 1024 storage locations as an example, 64 of which are reserved as spare storage media arrays. During read / write testing, the system management unit discovers a bad pixel at storage location 512. At this point, it locates and activates the corresponding repair register, and through a remapping operation, redirects the address that originally pointed to location 512 to a normal location in the spare array. In this way, subsequent operations on location 512 will be performed at the new normal location, effectively avoiding data storage and retrieval problems caused by the bad pixel.

[0067] In summary, in server chip systems, existing technologies suffer from several drawbacks when performing power-down save or power-on recovery operations on the kernel cluster. This is because the kernel cluster requires access to a large number of function registers with discontinuous addresses, leading to discrepancies between the saved and restored values ​​of some registers. Furthermore, this operation requires completing the entire configuration process within a single operation, which consumes system management unit resources for an extended period, preventing it from handling other critical system tasks. This ultimately reduces the service quality of the system management unit and impacts the normal operation of the server chip.

[0068] To address the characteristics of strong correlation and discrete addresses in kernel cluster control information, this application proposes a hardware-based and software-hardware combined solution for efficient kernel cluster control register saving and restoring. On one hand, this solution reduces the need for the system management unit (SMU) to directly perform large-scale configuration of control registers during kernel cluster power-down and power-up processes, improving the SMU's efficiency. Simultaneously, updating the original software solution to a hardware solution significantly shortens the power-down and power-up process time, reducing power consumption per kernel cluster. On the other hand, the breakpoint interrupt design allows for more flexible segmentation of the entire save or restore process, enabling flexible combinations based on actual needs, thus achieving a complete and efficient solution. Furthermore, the control information in special registers, after being saved or restored, may affect the subsequent saving or restoring logic of other control information. Since the SMU possesses powerful computational and analytical capabilities, this solution introduces an interrupt mechanism to the SMU, allowing it to manage the relationships between registers and adjust control information, thereby accelerating the entire operation and saving time.

[0069] Furthermore, if the system management unit sends the physical addresses of all function registers to be operated on to the save and restore engine, the data transmission pressure will be very high. However, this solution only needs to send the base address and offset address to the save and restore engine, which can then obtain the physical addresses of all function registers to be operated on based on these two parameters, thus effectively reducing the transmission pressure. Converting the starting physical address to the starting virtual address, and then converting the virtual address back to the physical address through address increment to operate on the corresponding function registers, enhances the system's flexibility and scalability. The virtual address space is independent of the physical address space. When the system adjusts or expands hardware resources, only the mapping relationship between virtual and physical addresses needs to be modified, without large-scale modifications to the code operating on function registers, facilitating system upgrades and maintenance. In a multi-tasking or multi-process system environment, different tasks or processes can have their own independent virtual address spaces. Through reasonable address mapping, limited physical memory resources can be utilized more efficiently, avoiding memory conflicts and waste, and improving the overall performance and efficiency of the system. Virtual address increment operations also allow for precise control over the timing and order of operations on each function register, ensuring that the system operates according to predetermined logic.

[0070] Reference Figure 2 This disclosure provides a control information saving and recovery system, including: the system includes a system management unit and a save and recovery engine; The system management unit is used to determine the kernel cluster in the chip to perform control information saving or restoring operations. The kernel cluster contains multiple function registers. The key parameters are obtained and sent to the save and restore engine. The key parameters include operation parameters, the base address of the kernel cluster, and the offset address. The save and restore engine is used to obtain the starting and ending virtual addresses based on the base address and offset address; Starting from the beginning virtual address, traverse to the end virtual address in ascending order to determine the function register to be operated on in sequence; The control information of the function register to be operated is saved or restored according to the operation parameters.

[0071] Furthermore, the save / recovery engine includes a control status register, into which the system management unit configures key parameters. The system management unit obtains these key parameters using two methods, as detailed below: The first type: System management unit, which is specifically used to determine the type of operation to be performed on the control information and configure operation parameters based on the type of operation to be performed; Obtain the physical addresses of all function registers to be operated on in the kernel cluster and the base address of the kernel cluster. Based on the difference between the physical address and the base address of each function register to be operated on, obtain the corresponding offset address.

[0072] The second type is the system management unit, which is specifically used to determine the key function registers in the kernel cluster and the types of operations to be performed on control information, and to configure operation parameters based on the types of operations to be performed. Obtain the physical addresses of all function registers to be operated on in the kernel cluster and the base address of the kernel cluster, and filter out the physical addresses of key function registers from the physical addresses of all function registers to be operated on. Extract the minimum value from the physical addresses of all critical function registers; From the physical addresses of the function registers to be operated on, select physical addresses that are less than or equal to the minimum value, and obtain the corresponding offset address based on the difference between the selected physical address and the base address; Configure the key parameters in the control status register.

[0073] Furthermore, the save and restore engine also includes an address counter, an address management unit, and a read / write control unit; The control status register is used to receive key parameters sent by the system management unit and obtain the physical address set based on the base address and offset address. Obtain the translation rules between physical addresses and virtual addresses; Based on the conversion rules, the smallest physical address in the physical address set is converted into the starting virtual address, and the largest physical address is converted into the ending virtual address. Send the start virtual address and end virtual address to the address counter; Send the physical address set to the address management unit; The operation parameters are sent to the read / write control unit.

[0074] Furthermore, the system management unit is also used to determine the critical function registers in the kernel cluster; the critical parameters also include the physical addresses of the critical function registers. The control status register is also used to convert the physical address of the critical function register into the virtual address of the interrupt bit and send it to the address counter.

[0075] Furthermore, the address counter is used to send the current virtual address to the address management unit, with the starting virtual address being the initially sent current virtual address; The address management unit is used to convert the received current virtual address into a physical address based on the conversion rules. When a converted physical address exists in the physical address set, the function register to which the converted physical address belongs is determined as the function register to be operated, and the physical address and control information of the function register to be operated are sent to the read / write control unit. The address counter is also used to determine whether the current virtual address is equal to the interrupt bit virtual address or the termination virtual address; When the current virtual address is not equal to the interrupt virtual address and not equal to the termination virtual address, increment the current virtual address to obtain a new current virtual address, and send the new current virtual address to the address management unit. When the current virtual address is equal to the interrupt virtual address or equal to the termination virtual address, stop incrementing the current virtual address. The address management unit is also used to determine the new currently operable function register based on the new current virtual address, and send the physical address and control information of the new currently operable function register to the read / write control unit.

[0076] Furthermore, the read / write control unit is used to save or restore the control information of the currently operated function register according to the operation parameters. After the operation is completed, the physical address of the currently operated function register and the execution status of the operation are sent to the control status register. The control status register is also used to determine, based on the execution status, whether the operation of the control information of the currently pending function register was successful; When the operation is successful, the function register to be operated is defined as the function register that has been operated. When the operation fails, or when the physical address of the function register to be operated is equal to the physical address of the critical function register, an interrupt is triggered and an interrupt signal is sent to the system management unit. The system management unit is also used to reacquire the physical addresses of all function registers to be operated after receiving an interrupt signal, and to reacquire key parameters based on the physical addresses of all function registers to be operated.

[0077] Furthermore, the system management unit is also used to select the maximum value among the physical addresses of all function registers as the termination physical address and send the termination physical address to the control status register. The control status register is also used to trigger an interrupt and send an interrupt signal to the system management unit when the physical address of the currently operated function register is equal to the termination physical address. The system management unit is also used to read the execution information of the current kernel cluster operation task after receiving an interrupt signal, release resources and exit the current kernel cluster operation task after completing the interrupt handling.

[0078] Furthermore, the save and restore engine also includes a data storage unit; The read / write control unit is used to write the control information of the function register to be operated into the data storage unit based on the preset read / write mapping rules when the operation parameter is 0. When the operation parameter is 1, the control information of the function register to be operated is read from the data storage unit based on the preset read-write mapping rules.

[0079] Furthermore, the system management unit is also used to perform read / write tests on the reserved storage bits contained in the data storage unit before determining the kernel cluster in the chip where the control information saving or restoring operation is to be performed; When a read / write test of a reserved storage location fails, an available storage location is selected from the spare storage locations contained in the data storage unit. Replace the storage address of the reserved storage location with the storage address of the free storage location; The read / write control unit is also used to construct read / write mapping rules based on the storage addresses of reserved storage bits and free storage bits that have been successfully read / write tested.

[0080] The system adopts a pure hardware-based save and restore unit design, which realizes task dispatch based on the system management unit, interrupt reporting after task completion, and configurable interrupt breakpoint reporting, which greatly releases the resources of the system management unit and avoids the degradation of the service quality of the system management unit.

[0081] The various variations and specific examples of the control information saving and recovery method provided above are also applicable to the control information saving and recovery system provided in this disclosure. Through the foregoing detailed description of the control information saving and recovery method, those skilled in the art can clearly understand the implementation method of the control information saving and recovery system. For the sake of brevity, they will not be described in detail here.

[0082] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0083] In this disclosure, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The block diagrams of devices, apparatuses, devices, and systems involved in this disclosure are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as "comprising," "including," "having," etc., are open-ended terms meaning "including but not limited to," and are used interchangeably with them. The terms "or" and "and" as used herein refer to the terms "and / or," and are used interchangeably with them unless the context clearly indicates otherwise. The term "such as" as used herein refers to the phrase "such as but not limited to," and is used interchangeably with it.

[0084] Additionally, as used herein, the "or" used in a list of items beginning with "at least one" indicates a separate list, such that a list of, for example, "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word "exemplary" does not imply that the described example is preferred or better than other examples.

[0085] It should also be noted that in the systems and methods of this disclosure, the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalent solutions to this disclosure.

[0086] Various changes, substitutions, and modifications can be made to the technology described herein without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, events, means, methods, and actions described above. Currently existing or later-developed processes, machines, manufactures, events, means, methods, or actions that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein can be utilized. Therefore, the appended claims include such processes, machines, manufactures, events, means, methods, or actions within their scope.

[0087] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0088] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A method for saving and restoring control information of a chip core cluster, characterized in that, include: Identify the kernel cluster in the chip for which control information saving or restoring operations are to be performed, wherein the kernel cluster contains multiple function registers; Obtain key parameters, including operation parameters, the base address of the kernel cluster, and the offset address; Based on the base address and the offset address, obtain the starting virtual address and the ending virtual address; Starting from the initial virtual address, traverse to the ending virtual address in ascending order to determine the function register to be operated in sequence; The control information of the function register to be operated is saved or restored according to the operation parameters.

2. The method for saving and restoring control information of a chip core cluster according to claim 1, characterized in that, The acquisition of key parameters includes: Determine the type of operation to be executed based on the control information, and configure the operation parameters based on the type of operation to be executed; Obtain the physical addresses of all function registers to be operated on in the kernel cluster and the base address of the kernel cluster. Based on the difference between the physical address of each function register to be operated on and the base address, obtain the corresponding offset address.

3. The method for saving and restoring control information of a chip core cluster according to claim 1, characterized in that, The acquisition of key parameters includes: Determine the key function registers in the kernel cluster and the type of operation to be executed for the control information, and configure the operation parameters based on the type of operation to be executed; Obtain the physical addresses of all function registers to be operated in the kernel cluster and the base address of the kernel cluster, and filter out the physical addresses of key function registers from the physical addresses of all function registers to be operated. Extract the minimum value from the physical addresses of all critical function registers; From the physical addresses of the function registers to be operated on, select physical addresses that are less than or equal to the minimum value, and obtain the corresponding offset address based on the difference between the selected physical address and the base address.

4. The method for saving and restoring control information of a chip core cluster according to claim 2 or 3, characterized in that, Also includes: When the type of operation to be performed is a save operation, the key parameters also include control information for all function registers to be operated. or, When the type of operation to be performed is a save operation, the key parameters also include control information of the function register to be operated on, whose physical address is less than or equal to the minimum value.

5. The method for saving and restoring control information of a chip core cluster according to claim 1, characterized in that, The step of obtaining the starting virtual address and the ending virtual address based on the base address and the offset address includes: Based on the base address and the offset address, obtain the set of physical addresses; Obtain the translation rules between physical addresses and virtual addresses; Based on the conversion rules, the smallest physical address in the physical address set is converted into a starting virtual address, and the largest physical address is converted into a terminating virtual address.

6. The method for saving and restoring control information of a chip core cluster according to claim 1, characterized in that, Also includes: Identify the key functional registers in the kernel cluster; The key parameters also include the physical address of the key function register, and the virtual address of the interrupt bit is obtained based on the physical address of the key function register.

7. The method for saving and restoring control information of a chip core cluster according to claim 6, characterized in that, The step of determining the currently operable function registers by traversing from the starting virtual address to the ending virtual address in ascending order includes: Based on the conversion rules, the current virtual address is converted into a physical address, where the starting virtual address is the initial current virtual address; When a converted physical address exists in the set of physical addresses, the function register to which the converted physical address belongs is determined as the function register to be operated. When the current virtual address is not equal to the interrupt bit virtual address and not equal to the termination virtual address, the current virtual address is incremented to obtain a new current virtual address, and a new current function register to be operated is determined based on the new current virtual address. Continue executing the above operation process until the current virtual address is equal to the interrupt bit virtual address or equal to the termination virtual address, then stop incrementing the current virtual address.

8. The method for saving and restoring control information of a chip core cluster according to claim 6, characterized in that, Also includes: When the control information of the function register to be operated is successfully saved or restored according to the operation parameters, the function register to be operated is defined as the function register that has been operated. When the save or restore operation of the control information of the function register to be operated according to the operation parameters fails, or when the physical address of the function register to be operated is equal to the physical address of the critical function register, an interrupt is triggered. During the interruption, the physical addresses of all function registers to be operated are reacquired, and the critical parameters are reacquired based on the physical addresses of all function registers to be operated.

9. The method for saving and restoring control information of a chip core cluster according to claim 8, characterized in that, Also includes: Select the maximum value among the physical addresses of all function registers as the termination physical address; When the physical address of the currently pending function register is equal to the termination physical address, an interrupt is triggered. During the interrupt process, the execution information of the current kernel cluster operation task is read. After the interrupt is completed, the resources are released and the current kernel cluster operation task is exited.

10. The method for saving and restoring control information of a chip core cluster according to claim 1, characterized in that, The step of saving or restoring the control information of the currently operated function register according to the operation parameters includes: When the operation parameter is 0, the control information of the function register to be operated is written into the data storage unit based on the preset read-write mapping rule; When the operation parameter is 1, the control information of the function register to be operated is read from the data storage unit based on the preset read-write mapping rules.

11. The method for saving and restoring control information of a chip core cluster according to claim 10, characterized in that, Before determining the kernel cluster in the chip from which the control information saving or restoring operation is to be performed, the following is also included: Perform read and write tests on the reserved storage bits contained in the data storage unit; When the read / write test of the reserved storage bit fails, an idle storage bit is selected from the spare storage bits contained in the data storage unit; Replace the storage address of the reserved storage location with the storage address of the free storage location; The read / write mapping rule is constructed based on the storage addresses of the reserved storage bits and the free storage bits obtained from successful read / write tests.

12. A system for saving and restoring control information of a chip core cluster, characterized in that, The system includes a system management unit and a save / restore engine; The system management unit is used to determine the kernel cluster in the chip to perform control information saving or recovery operations, and the kernel cluster contains multiple function registers; Acquire key parameters and send them to the save and restore engine. The key parameters include operation parameters, the base address of the kernel cluster, and the offset address. The save and restore engine is used to obtain the starting virtual address and the ending virtual address based on the base address and the offset address; Starting from the initial virtual address, traverse to the ending virtual address in ascending order to determine the function register to be operated in sequence; The control information of the function register to be operated is saved or restored according to the operation parameters.

13. The chip core cluster control information storage and recovery system according to claim 12, characterized in that, The save and restore engine includes a control status register; The system management unit is specifically used to determine the type of operation to be performed on the control information, and to configure the operation parameters based on the type of operation to be performed. Obtain the physical addresses of all function registers to be operated in the kernel cluster and the base address of the kernel cluster. Based on the difference between the physical address of each function register to be operated and the base address, obtain the corresponding offset address. Configure the key parameters into the control status register.

14. The chip core cluster control information storage and recovery system according to claim 12, characterized in that, The save and restore engine includes a control status register; The system management unit is specifically used to determine the key function registers in the kernel cluster and the type of operation to be executed for the control information, and to configure the operation parameters based on the type of operation to be executed. Obtain the physical addresses of all function registers to be operated in the kernel cluster and the base address of the kernel cluster, and filter out the physical addresses of key function registers from the physical addresses of all function registers to be operated. Extract the minimum value from the physical addresses of all critical function registers; From the physical addresses of the function registers to be operated on, select physical addresses that are less than or equal to the minimum value, and obtain the corresponding offset address based on the difference between the selected physical address and the base address; Configure the key parameters into the control status register.

15. The chip core cluster control information storage and recovery system according to claim 13 or 14, characterized in that, When the operation to be performed is a save operation, the key parameters also include control information for all function registers to be operated; or, When the type of operation to be performed is a save operation, the key parameters also include control information of the function register to be operated on, whose physical address is less than or equal to the minimum value.

16. The chip core cluster control information storage and recovery system according to claim 12, characterized in that, The save and restore engine includes a control status register, an address counter, an address management unit, and a read / write control unit; The control status register is used to receive key parameters sent by the system management unit and obtain a set of physical addresses based on the base address and the offset address; Obtain the translation rules between physical addresses and virtual addresses; Based on the conversion rules, the smallest physical address in the physical address set is converted into a starting virtual address, and the largest physical address is converted into a terminating virtual address. Send the starting virtual address and the ending virtual address to the address counter; Send the physical address set to the address management unit; The operation parameters are sent to the read / write control unit.

17. The chip core cluster control information storage and recovery system according to claim 16, characterized in that, The system management unit is also used to determine the key function registers in the kernel cluster; the key parameters also include the physical address of the key function registers; The control status register is also used to convert the physical address of the critical function register into an interrupt bit virtual address and send it to the address counter.

18. The chip core cluster control information storage and recovery system according to claim 17, characterized in that, The address counter is used to send the current virtual address to the address management unit, and the starting virtual address is the initially sent current virtual address; The address management unit is used to convert the received current virtual address into a physical address based on the conversion rules. When a converted physical address exists in the set of physical addresses, the function register to which the converted physical address belongs is determined as the function register to be operated, and the physical address and control information of the function register to be operated are sent to the read / write control unit. The address counter is also used to determine whether the current virtual address is equal to the interrupt bit virtual address or whether it is equal to the termination virtual address; When the current virtual address is not equal to the interrupt bit virtual address and not equal to the termination virtual address, the current virtual address is incremented to obtain a new current virtual address, and the new current virtual address is sent to the address management unit. When the current virtual address is equal to the interrupt bit virtual address or equal to the termination virtual address, stop incrementing the current virtual address; The address management unit is further configured to determine a new currently operable function register based on the new current virtual address, and send the physical address and control information of the new currently operable function register to the read / write control unit.

19. The chip core cluster control information storage and recovery system according to claim 17, characterized in that, The read / write control unit is used to save or restore the control information of the function register to be operated according to the operation parameters. After the operation is completed, the physical address of the function register to be operated and the execution status of the operation are sent to the control status register. The control status register is also used to determine, based on the execution status, whether the operation of the control information of the currently operated function register is successful. When the operation is successful, the function register to be operated is defined as the function register that has been operated. When the operation fails, or when the physical address of the function register to be operated is equal to the physical address of the critical function register, an interrupt is triggered and an interrupt signal is sent to the system management unit. The system management unit is also used to, upon receiving an interrupt signal, reacquire the physical addresses of all function registers to be operated and, based on the physical addresses of all function registers to be operated, reacquire the key parameters.

20. The chip core cluster control information storage and recovery system according to claim 19, characterized in that, The system management unit is also used to select the maximum value among the physical addresses of all function registers as the termination physical address and send the termination physical address to the control status register. The control status register is also used to trigger an interrupt and send an interrupt signal to the system management unit when the physical address of the currently operated function register is equal to the termination physical address. The system management unit is also used to read the execution information of the current kernel cluster operation task after receiving an interrupt signal, and release resources and exit the current kernel cluster operation task after completing the interrupt handling.

21. The chip core cluster control information storage and recovery system according to claim 16, characterized in that, The save and restore engine also includes a data storage unit; The read / write control unit is used to write the control information of the function register to be operated into the data storage unit based on a preset read / write mapping rule when the operation parameter is 0. When the operation parameter is 1, the control information of the function register to be operated is read from the data storage unit based on the preset read-write mapping rules.

22. The chip core cluster control information storage and recovery system according to claim 21, characterized in that, The system management unit is also used to perform read / write tests on the reserved storage bits contained in the data storage unit before the kernel cluster in the determined chip is to perform the control information saving or recovery operation. When the read / write test of the reserved storage bit fails, an idle storage bit is selected from the spare storage bits contained in the data storage unit; Replace the storage address of the reserved storage location with the storage address of the free storage location; The read / write control unit is also used to construct the read / write mapping rules based on the storage addresses of the reserved storage bits and the storage addresses of the free storage bits that have been successfully read / write tested.

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