Pixel circuit and display device

Abstract

The invention provides a pixel circuit and a display device. The pixel circuit comprises a first light-emitting element, a second light-emitting element and a driving circuit. The anode of the first light-emitting element is electrically connected with a first power supply voltage end, and the cathode of the first light-emitting element is electrically connected with the first end of the driving circuit; the anode of the second light-emitting element is electrically connected with the second power supply voltage end, and the cathode of the second light-emitting element is electrically connected with the first end of the driving circuit; the control end of the driving circuit is electrically connected with the first node, the second end of the driving circuit is electrically connected with the second node, and the driving circuit is used for generating driving current under the control of the potential of the first node. The light-emitting element is arranged to be inverted, so that the display brightness and the pixel density are improved, and the display effect is improved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a pixel circuit and a display device. Background Technology

[0002] Users of mobile phones, laptops, and automotive displays are increasingly demanding privacy features. They desire control over image viewing angles, wanting a wide viewing angle when operating the screen in normal mode and a narrow viewing angle when operating in privacy mode. Display pixels can be categorized into normal pixels and privacy-protected pixels. Normal pixels maintain good brightness at both narrow and wide viewing angles, while privacy-protected pixels are brighter at narrow viewing angles and dimmer at wide viewing angles. When using the screen normally, both normal and privacy-protected pixels are typically activated together for higher PPI (pixel density) and better display quality; when using the screen in privacy mode, only the privacy-protected pixels are usually activated. In related technologies, when the pixel circuitry operates in privacy mode, the first light-emitting element emits light, resulting in a lower actual PPI and affecting display quality. Summary of the Invention

[0003] The main objective of this invention is to provide a pixel circuit and a display device that solves the problem that existing pixel circuits cannot guarantee display quality when operating in privacy mode.

[0004] In one aspect, embodiments of the present invention provide a pixel circuit, including a first light-emitting element, a second light-emitting element, and a driving circuit;

[0005] The anode of the first light-emitting element is electrically connected to the first power supply voltage terminal, and the cathode of the first light-emitting element is electrically connected to the first terminal of the driving circuit.

[0006] The anode of the second light-emitting element is electrically connected to the second power supply voltage terminal, and the cathode of the second light-emitting element is electrically connected to the first terminal of the driving circuit.

[0007] The control terminal of the driving circuit is electrically connected to the first node, and the second terminal of the driving circuit is electrically connected to the second node. The driving circuit is used to generate a driving current under the control of the potential of the first node.

[0008] In at least one embodiment of the present invention, the pixel circuit further includes a first light-emitting control circuit and a second light-emitting control circuit; the cathode of the first light-emitting element is electrically connected to the connection node through the first light-emitting control circuit, and the cathode of the second light-emitting element is electrically connected to the connection node through the second light-emitting control circuit.

[0009] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the cathode of the first light-emitting element and the connection node under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0010] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the cathode of the second light-emitting element and the connection node under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

[0011] The connection node is electrically connected to the first terminal of the driving circuit; or...

[0012] The pixel circuit also includes a first light-emitting control circuit and a second light-emitting control circuit.

[0013] The first power supply voltage terminal is electrically connected to the anode of the first light-emitting element through the first light-emitting control circuit, and the second power supply voltage terminal is electrically connected to the anode of the second light-emitting element through the second light-emitting control circuit.

[0014] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0015] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

[0016] Both the cathodes of the first and second light-emitting elements are electrically connected to a connection node, and the connection node is electrically connected to the first terminal of the driving circuit; or,

[0017] The pixel circuit also includes a first light-emitting control circuit and a second light-emitting control circuit.

[0018] The first power supply voltage terminal is electrically connected to the anode of the first light-emitting element through the first light-emitting control circuit, and the cathode of the second light-emitting element is electrically connected to the connection node through the second light-emitting control circuit; the cathode of the first light-emitting element is electrically connected to the connection node, and the first terminal of the driving circuit is electrically connected to the connection node.

[0019] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0020] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit, under the control of the second light-emitting control signal provided by the second light-emitting control terminal, controls the connection or disconnection between the cathode of the second light-emitting element and the connection node.

[0021] The pixel circuit also includes a first light-emitting control circuit and a second light-emitting control circuit.

[0022] The cathode of the first light-emitting element is electrically connected to the connection node through the first light-emitting control circuit, and the second power supply voltage terminal is electrically connected to the anode of the second light-emitting element through the second light-emitting control circuit; the cathode of the second light-emitting element is electrically connected to the connection node, and the first terminal of the driving circuit is electrically connected to the connection node.

[0023] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the cathode of the first light-emitting element and the connection node under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0024] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal. The pixel circuit described in at least one embodiment of the present invention further includes a first initialization circuit and a second initialization circuit.

[0025] The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal and the cathode of the first light-emitting element, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the cathode of the first light-emitting element under the control of the first initial control signal provided by the first initial control terminal.

[0026] The second initialization circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the cathode of the second light-emitting element, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the cathode of the second light-emitting element under the control of the second initial control signal provided by the second initial control terminal.

[0027] In at least one embodiment of the present invention, the first initial voltage terminal and the second initial voltage terminal are the same voltage terminal; and / or, the first initial control terminal and the second initial control terminal are the same control terminal.

[0028] The pixel circuit described in at least one embodiment of the present invention further includes a first initialization circuit;

[0029] The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the first terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal.

[0030] The pixel circuit described in at least one embodiment of the present invention further includes a third initialization circuit;

[0031] The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first terminal of the drive circuit under the control of the third initial control signal provided by the third initial control terminal.

[0032] The pixel circuit described in at least one embodiment of the present invention further includes an on / off control circuit;

[0033] The connection node is electrically connected to the first terminal of the drive circuit through the on / off control circuit;

[0034] The control terminal of the on / off control circuit is electrically connected to the on / off control terminal. The on / off control circuit is used to control the connection node and the first terminal of the drive circuit to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal.

[0035] The pixel circuit described in at least one embodiment of the present invention further includes a first initialization circuit and a second initialization circuit;

[0036] The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal and the connection node, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the connection node under the control of the first initial control signal provided by the first initial control terminal;

[0037] The second initialization circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the connection node, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the connection node under the control of the second initial control signal provided by the second initial control terminal.

[0038] The pixel circuit described in at least one embodiment of the present invention further includes a third initialization circuit;

[0039] The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first terminal of the drive circuit under the control of the third initial control signal provided by the third initial control terminal; or...

[0040] The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the connection node, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the connection node under the control of the third initial control signal provided by the third initial control terminal. The pixel circuit of at least one embodiment of the present invention further includes a first energy storage circuit, a setting circuit, a data writing circuit, a reset circuit, and a third light emission control circuit;

[0041] The first end of the first energy storage circuit is electrically connected to the first node, and the second end of the first energy storage circuit is electrically connected to the second node. The first energy storage circuit is used to store electrical energy.

[0042] The set circuit is electrically connected to the set control terminal, the reference voltage terminal and the first node respectively, and is used to write the reference voltage provided by the reference voltage terminal into the first node under the control of the set control signal provided by the set control terminal.

[0043] The data writing circuit is electrically connected to the write control terminal, the data line and the first node respectively, and is used to write the data voltage provided by the data line to the first node under the control of the write control signal provided by the write control terminal;

[0044] The reset circuit is electrically connected to the reset control terminal, the initial voltage terminal, and the second terminal of the drive circuit, respectively, and is used to write the initial voltage provided by the initial voltage terminal into the second terminal of the drive circuit under the control of the reset control signal provided by the reset control terminal.

[0045] The third light-emitting control circuit is electrically connected to the first light-emitting control terminal, the second terminal of the driving circuit, and the first voltage terminal, respectively, and is used to control the connection or disconnection between the second terminal of the driving circuit and the first voltage terminal under the control of the first light-emitting control signal.

[0046] The pixel circuit described in at least one embodiment of the present invention further includes a first energy storage circuit, a second energy storage circuit, a setting circuit, a compensation control circuit, a data writing circuit, a reset circuit, and a third light emission control circuit;

[0047] The first end of the first energy storage circuit is electrically connected to the second node, and the second end of the first energy storage circuit is electrically connected to the third node. The first energy storage circuit is used to store electrical energy.

[0048] The first end of the second energy storage circuit is electrically connected to the third node, and the second end of the second energy storage circuit is electrically connected to the fourth node. The second energy storage circuit is used to store electrical energy.

[0049] The set circuit is electrically connected to the set control terminal, the reference voltage terminal and the first node respectively, and is used to write the reference voltage into the first node under the control of the set control signal provided by the set control terminal;

[0050] The compensation control circuit is electrically connected to the light-emitting control terminal, the first node and the fourth node respectively, and is used to control the connection between the first node and the fourth node under the control of the light-emitting control signal provided by the light-emitting control terminal.

[0051] The data writing circuit is electrically connected to the write control terminal, the data line and the fourth node respectively, and is used to write the data voltage provided by the data line to the fourth node under the control of the write control signal provided by the write control terminal;

[0052] The reset circuit is electrically connected to the set control terminal, the reference voltage terminal and the third node respectively, and is used to write the reference voltage into the third node under the control of the set control signal provided by the set control terminal;

[0053] The third light-emitting control circuit is electrically connected to the light-emitting control terminal, the second node, and the first voltage terminal, respectively, and is used to control the connection between the second node and the first voltage terminal under the control of the light-emitting control signal.

[0054] 12. The driving circuit as described in claim 2, 3 or 8, wherein the first light-emitting element is a privacy light-emitting element and the second light-emitting element is a normal display light-emitting element.

[0055] In at least one embodiment of the present invention, the channel width-to-length ratio of the transistor included in the second light-emitting control circuit is smaller than the channel width-to-length ratio of the transistor included in the first light-emitting control circuit.

[0056] In at least one embodiment of the present invention, the pixel circuit includes a first initialization circuit and a second initialization circuit;

[0057] The voltage value of the first initial voltage is greater than the voltage value of the second initial voltage.

[0058] In at least one embodiment of the present invention, the pixel circuit includes a first initialization circuit and a second initialization circuit; the first power supply voltage terminal and the second power supply voltage terminal are different voltage terminals;

[0059] The voltage value of the first power supply voltage signal provided by the first power supply voltage terminal is greater than the voltage value of the second power supply voltage signal provided by the second power supply voltage terminal;

[0060] The voltage value of the first initial voltage is greater than or equal to the voltage value of the second initial voltage.

[0061] In at least one embodiment of the present invention, the pixel circuit includes an oxide transistor.

[0062] In at least one embodiment of the present invention, the first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0063] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the cathode of the first light-emitting element, and the second electrode of the first transistor is electrically connected to the first terminal of the driving circuit.

[0064] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the cathode of the second light-emitting element, and the second terminal of the second transistor is electrically connected to the first terminal of the driving circuit; or,

[0065] The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0066] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first transistor is electrically connected to the anode of the first light-emitting element.

[0067] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the second power supply voltage terminal, and the second terminal of the second transistor is electrically connected to the anode of the second light-emitting element; or,

[0068] The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0069] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first transistor is electrically connected to the anode of the first light-emitting element.

[0070] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the cathode of the second light-emitting element, and the second terminal of the second transistor is electrically connected to the first terminal of the driving circuit; or,

[0071] The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0072] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the cathode of the first light-emitting element, and the second electrode of the first transistor is electrically connected to the first terminal of the driving circuit.

[0073] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the second power supply voltage terminal, and the second terminal of the second transistor is electrically connected to the anode of the second light-emitting element.

[0074] In a second aspect, embodiments of the present invention provide a pixel driving method applied to the aforementioned pixel circuit, wherein the display cycle includes a shared display phase and a privacy display phase; the shared display phase includes a first light-emitting phase, and the privacy display phase includes a second light-emitting phase; the pixel driving method includes:

[0075] In the first light-emitting stage, the driving circuit drives the first light-emitting element and the second light-emitting element to emit light;

[0076] In the second light-emitting stage, the driving circuit drives the first light-emitting element to emit light.

[0077] In at least one embodiment of the present invention, the pixel circuit further includes a first initialization circuit and a second initialization circuit; the shared display stage includes a first initialization stage disposed before the first light emission stage, and the pixel driving method includes: in the first initialization stage,

[0078] Under the control of the first initial control signal, the first initialization circuit writes the first initial voltage into the cathode of the first light-emitting element;

[0079] The second initialization circuit, under the control of the second initial control signal, writes the second initial voltage into the cathode of the second light-emitting element.

[0080] In at least one embodiment of the present invention, the pixel circuit further includes a first initialization circuit and a second initialization circuit; the privacy display stage includes a second initialization stage disposed before the second light emission stage, and the pixel driving method includes: in the second initialization stage,

[0081] Under the control of the first initialization circuit and the first initial control signal, the first initial voltage is written into the cathode of the first light-emitting element.

[0082] In a second aspect, embodiments of the present invention provide a display device including the pixel circuit described above.

[0083] The pixel circuit and display device described in this embodiment of the invention improve display brightness and pixel density, thereby enhancing the display effect, by setting the light-emitting element to be inverted. Attached Figure Description

[0084] Figure 1 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0085] Figure 2A This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0086] Figure 2B This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0087] Figure 2C This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0088] Figure 2D This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0089] Figure 3A This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0090] Figure 3B This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0091] Figure 4A This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0092] Figure 4B This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0093] Figure 4C This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0094] Figure 5 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0095] Figure 6 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0096] Figure 7 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0097] Figure 8A This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0098] Figure 8B This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0099] Figure 9A This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0100] Figure 9B This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0101] Figure 9C This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0102] Figure 9D This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0103] Figure 10 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0104] Figure 11 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0105] Figure 12 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0106] Figure 13A This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0107] Figure 13B This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0108] Figure 14 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0109] Figure 15 This is a structural diagram of the pixel circuit according to at least one embodiment of the present invention;

[0110] Figure 16 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0111] Figure 17 This is the present invention. Figure 16 The timing diagram of at least one embodiment of the pixel circuit shown;

[0112] Figure 18 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0113] Figure 19 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0114] Figure 20 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0115] Figure 21 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0116] Figure 22A , Figure 22B and Figure 22C This is the present invention. Figure 21 The timing diagram of at least one embodiment of the pixel circuit shown;

[0117] Figure 23 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0118] Figure 24 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0119] Figure 25A , Figure 25B and Figure 25C This is the present invention. Figure 24 The timing diagram of at least one embodiment of the pixel circuit shown;

[0120] Figure 26 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0121] Figure 27A , Figure 27B and Figure 27C This is the present invention. Figure 26 The timing diagram of at least one embodiment of the pixel circuit shown;

[0122] Figure 28 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0123] Figure 29 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0124] Figure 30 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0125] Figure 31 This is a circuit diagram of the pixel circuit according to at least one embodiment of the present invention;

[0126] Figure 32A and Figure 32B This is the present invention. Figure 31 The timing diagram shows the operation of at least one embodiment of the pixel circuit. Detailed Implementation

[0127] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0128] In all embodiments of this invention, the transistors used can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. In these embodiments, to distinguish between the two terminals of the transistor other than the gate, one terminal is referred to as the first terminal, and the other as the second terminal.

[0129] In actual operation, when the transistor is a thin-film transistor or a field-effect transistor, the first electrode can be the drain and the second electrode can be the source; or, the first electrode can be the source and the second electrode can be the drain.

[0130] The pixel circuit described in this embodiment of the invention includes a first light-emitting element, a second light-emitting element, and a driving circuit;

[0131] The anode of the first light-emitting element is electrically connected to the first power supply voltage terminal, and the cathode of the first light-emitting element is electrically connected to the first terminal of the driving circuit.

[0132] The anode of the second light-emitting element is electrically connected to the second power supply voltage terminal, and the first electrode of the second light-emitting element is electrically connected to the first terminal of the driving circuit.

[0133] The control terminal of the driving circuit is electrically connected to the first node, and the second terminal of the driving circuit is electrically connected to the second node. The driving circuit is used to generate a driving current under the control of the potential of the first node.

[0134] In at least one embodiment of the present invention, the first light-emitting element is a privacy light-emitting element, and the second light-emitting element is a normal display light-emitting element.

[0135] In related technologies, when the pixel circuit is working in privacy mode, the first light-emitting element emits light, which reduces the actual display PPI (Pixels Per Inch) and affects the display effect. At least one embodiment of the present invention improves the display brightness and PPI by setting the light-emitting element to be inverted, thereby improving the display effect.

[0136] In at least one embodiment of the present invention, the pixel circuit including the inverted light-emitting element has relatively high PPI, aperture ratio, brightness and lifetime. The PPI can reach up to 1700, which can be achieved by means of AP (Advanced Patterning) technology. Furthermore, the evaporation sequence of HTL (hole transport layer), HIL (hole injection layer), ETL (electron transport layer) and EIL (electron injection layer) can be compatible with existing production lines.

[0137] like Figure 1 As shown, the pixel circuit described in this embodiment of the invention includes a first light-emitting element E1, a second light-emitting element E2, and a driving circuit 10;

[0138] The anode of the first light-emitting element E1 is electrically connected to the first power supply voltage terminal ELVDD1, and the cathode of the first light-emitting element E1 is electrically connected to the first terminal of the driving circuit 10.

[0139] The anode of the second light-emitting element E2 is electrically connected to the second power supply voltage terminal ELVDD2, and the cathode of the second light-emitting element E2 is electrically connected to the first terminal of the driving circuit 10.

[0140] The control terminal of the drive circuit 10 is electrically connected to the first node N1, and the second terminal of the drive circuit 10 is electrically connected to the second node N2. The drive circuit is used to generate a drive current under the control of the potential of the first node N1.

[0141] Optionally, the first power supply voltage terminal and the second power supply voltage terminal can be the same power supply voltage terminal.

[0142] The pixel circuit described in at least one embodiment of the present invention further includes a first light-emitting control circuit and a second light-emitting control circuit;

[0143] The cathode of the first light-emitting element is electrically connected to the connection node through the first light-emitting control circuit, and the cathode of the second light-emitting element is electrically connected to the connection node through the second light-emitting control circuit.

[0144] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the cathode of the first light-emitting element and the connection node under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0145] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the cathode of the second light-emitting element and the connection node under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

[0146] The connection node is electrically connected to the first end of the drive circuit.

[0147] In a specific implementation, the pixel circuit may further include a first light-emitting control circuit and a second light-emitting control circuit. Under the control of a first light-emitting control signal, the first light-emitting control circuit controls the connection or disconnection between the cathode of the first light-emitting element and the connection node. Under the control of a second light-emitting control signal, the second light-emitting control circuit controls the connection or disconnection between the cathode of the second light-emitting element and the connection node.

[0148] In at least one embodiment of the present invention, the channel width-to-length ratio of the transistor included in the second light-emitting control circuit may be smaller than the channel width-to-length ratio of the transistor included in the first light-emitting control circuit.

[0149] In a specific implementation, the first light-emitting element can be a privacy light-emitting element, and the second light-emitting element can be a normal light-emitting element;

[0150] The brightness of the privacy pixel in the frontal viewing direction is less than that of the normal pixel in the frontal viewing direction. In order to improve the consistency of the brightness of the two types of pixels in the frontal viewing direction, the channel width-to-length ratio of the transistor included in the second light-emitting control circuit is set to be less than that of the channel width-to-length ratio of the transistor included in the first light-emitting control circuit, so as to reduce the resistance on the light-emitting path of the first light-emitting element.

[0151] In at least one embodiment of the present invention, all transistors are oxide transistors, and the pixel circuit is an oxide pixel circuit.

[0152] like Figure 2A As shown, in Figure 1 Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first light-emitting control circuit 21 and a second light-emitting control circuit 22;

[0153] The cathode of the first light-emitting element E1 is electrically connected to the connection node NJ through the first light-emitting control circuit 21, and the cathode of the second light-emitting element E2 is electrically connected to the connection node NJ through the second light-emitting control circuit 22.

[0154] The control terminal of the first light-emitting control circuit 21 is electrically connected to the first light-emitting control terminal EM1. The first light-emitting control circuit 21 is used to control the connection or disconnection between the cathode of the first light-emitting element E1 and the connection node NJ under the control of the first light-emitting control signal provided by the first light-emitting control terminal EM1.

[0155] The control terminal of the second light-emitting control circuit 22 is electrically connected to the second light-emitting control terminal EM2. The second light-emitting control circuit 22 is used to control the connection or disconnection between the cathode of the second light-emitting element E2 and the connection node NJ under the control of the second light-emitting control signal provided by the second light-emitting control terminal EM2.

[0156] The connection node NJ is electrically connected to the first end of the drive circuit 10.

[0157] The pixel circuit described in at least one embodiment of the present invention further includes a first light-emitting control circuit and a second light-emitting control circuit;

[0158] The first power supply voltage terminal is electrically connected to the anode of the first light-emitting element through the first light-emitting control circuit, and the second power supply voltage terminal is electrically connected to the anode of the second light-emitting element through the second light-emitting control circuit.

[0159] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0160] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

[0161] The cathodes of the first light-emitting element and the second light-emitting element are both electrically connected to a connection node, which is electrically connected to the first end of the driving circuit.

[0162] In a specific implementation, the pixel circuit may further include a first light-emitting control circuit and a second light-emitting control circuit. The first light-emitting control circuit, under the control of a first light-emitting control signal, controls the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element. The second light-emitting control circuit, under the control of a second light-emitting control signal, controls the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element.

[0163] like Figure 2B As shown, in Figure 1 Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first light-emitting control circuit 21 and a second light-emitting control circuit 22;

[0164] The first power supply voltage terminal ELVDD1 is electrically connected to the anode of the first light-emitting element E1 through the first light-emitting control circuit 21, and the second power supply voltage terminal ELVDD2 is electrically connected to the anode of the second light-emitting element E2 through the second light-emitting control circuit 22.

[0165] The control terminal of the first light-emitting control circuit 21 is electrically connected to the first light-emitting control terminal EM1. The first light-emitting control circuit 21 is used to control the connection or disconnection between the first power supply voltage terminal ELVDD1 and the anode of the first light-emitting element E1 under the control of the first light-emitting control signal provided by the first light-emitting control terminal EM1.

[0166] The control terminal of the second light-emitting control circuit 22 is electrically connected to the second light-emitting control terminal EM2. The second light-emitting control circuit 22 is used to control the connection or disconnection between the second power supply voltage terminal ELVDD2 and the anode of the second light-emitting element E2 under the control of the second light-emitting control signal provided by the second light-emitting control terminal EM2.

[0167] The cathodes of the first light-emitting element E1 and the second light-emitting element E2 are both electrically connected to the connection node NJ, which is electrically connected to the first end of the driving circuit 10.

[0168] The pixel circuit described in at least one embodiment of the present invention further includes a first light-emitting control circuit and a second light-emitting control circuit;

[0169] The first power supply voltage terminal is electrically connected to the anode of the first light-emitting element through the first light-emitting control circuit, and the cathode of the second light-emitting element is electrically connected to the connection node through the second light-emitting control circuit; the cathode of the first light-emitting element is electrically connected to the connection node, and the first terminal of the driving circuit is electrically connected to the connection node.

[0170] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0171] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the cathode of the second light-emitting element and the connection node under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

[0172] In a specific implementation, the pixel circuit may further include a first light-emitting control circuit and a second light-emitting control circuit; the first light-emitting control circuit, under the control of a first light-emitting control signal, controls the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element; the second light-emitting control circuit, under the control of a second light-emitting control signal, controls the connection or disconnection between the cathode of the second light-emitting element and the connection node.

[0173] like Figure 2C As shown, in Figure 1 Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first light-emitting control circuit 21 and a second light-emitting control circuit 22;

[0174] The first power supply voltage terminal ELVDD1 is electrically connected to the anode of the first light-emitting element E1 through the first light-emitting control circuit 21, and the cathode of the second light-emitting element E2 is electrically connected to the connection node NJ1 through the second light-emitting control circuit 22; the cathode of the first light-emitting element E1 is electrically connected to the connection node NJ, and the first terminal of the driving circuit 10 is electrically connected to the connection node NJ.

[0175] The control terminal of the first light-emitting control circuit 21 is electrically connected to the first light-emitting control terminal EM1. The first light-emitting control circuit 21 is used to control the connection or disconnection between the first power supply voltage terminal ELVDD1 and the anode of the first light-emitting element E1 under the control of the first light-emitting control signal provided by the first light-emitting control terminal EM1.

[0176] The control terminal of the second light-emitting control circuit 22 is electrically connected to the second light-emitting control terminal EM2. The second light-emitting control circuit 22 is used to control the connection or disconnection between the cathode of the second light-emitting element E2 and the connection node NJ under the control of the second light-emitting control signal provided by the second light-emitting control terminal EM2.

[0177] The pixel circuit described in at least one embodiment of the present invention further includes a first light-emitting control circuit and a second light-emitting control circuit;

[0178] The cathode of the first light-emitting element is electrically connected to the connection node through the first light-emitting control circuit, and the second power supply voltage terminal is electrically connected to the anode of the second light-emitting element through the second light-emitting control circuit; the cathode of the second light-emitting element is electrically connected to the connection node, and the first terminal of the driving circuit is electrically connected to the connection node.

[0179] The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the cathode of the first light-emitting element and the connection node under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0180] The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

[0181] In a specific implementation, the pixel circuit further includes a first light-emitting control circuit and a second light-emitting control circuit; the first light-emitting control circuit, under the control of a first light-emitting control signal, controls the connection or disconnection between the cathode of the first light-emitting element and the connection node; the second light-emitting control circuit, under the control of a second light-emitting control signal, controls the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element.

[0182] like Figure 2D As shown, in Figure 1 Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first light-emitting control circuit 21 and a second light-emitting control circuit 22;

[0183] The cathode of the first light-emitting element E1 is electrically connected to the connection node NJ through the first light-emitting control circuit 21, and the second power supply voltage terminal ELVDD2 is electrically connected to the anode of the second light-emitting element E2 through the second light-emitting control circuit 22; the cathode of the second light-emitting element E2 is electrically connected to the connection node NJ, and the first terminal of the driving circuit 10 is electrically connected to the connection node NJ.

[0184] The control terminal of the first light-emitting control circuit 21 is electrically connected to the first light-emitting control terminal EM1. The first light-emitting control circuit 21 is used to control the connection or disconnection between the cathode of the first light-emitting element E1 and the connection node NJ under the control of the first light-emitting control signal provided by the first light-emitting control terminal EM1.

[0185] The control terminal of the second light-emitting control circuit 22 is electrically connected to the second light-emitting control terminal EM2. The second light-emitting control circuit 22 is used to control the connection or disconnection between the second power supply voltage terminal ELVDD2 and the anode of the second light-emitting element E2 under the control of the second light-emitting control signal provided by the second light-emitting control terminal EM2.

[0186] The pixel circuit described in at least one embodiment of the present invention further includes a first initialization circuit and a second initialization circuit;

[0187] The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal and the cathode of the first light-emitting element, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the cathode of the first light-emitting element under the control of the first initial control signal provided by the first initial control terminal, so as to clear the residual charge on the cathode of the first light-emitting element.

[0188] The second initialization circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the cathode of the second light-emitting element, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the cathode of the second light-emitting element under the control of the second initial control signal provided by the second initial control terminal, so as to clear the residual charge on the cathode of the second light-emitting element.

[0189] In a specific implementation, the pixel circuit may further include a first initialization circuit and a second initialization circuit; the first initialization circuit, under the control of a first initial control signal, writes a first initial voltage into the cathode of the first light-emitting element; the second initialization circuit, under the control of a second initial control signal, writes a second initial voltage into the cathode of the second light-emitting element.

[0190] In at least one embodiment of the present invention, the first initial voltage terminal and the second initial voltage terminal are the same voltage terminal; and / or, the first initial control terminal and the second initial control terminal are the same control terminal; so as to reduce the number of voltage terminals used.

[0191] In at least one embodiment of the present invention, the voltage value of the first initial voltage may be greater than the voltage value of the second initial voltage.

[0192] In practical implementation, the area of ​​the privacy pixel is made larger, while the area of ​​the normal pixel is made smaller. This can improve the phenomenon that the privacy pixel has a long activation time and rapid brightness decay in different modes. To ensure that the activation time of the first light-emitting element and the second light-emitting element are consistent, the voltage value of the first initial voltage can be made greater than the voltage value of the second initial voltage. This makes the cathode reset voltage of the first light-emitting element higher than the cathode reset voltage of the second light-emitting element. After reset, the voltage difference between the cathode and anode of the first light-emitting element is smaller, while the voltage difference between the cathode and anode of the second light-emitting element is larger, so that the light emission start time of the first light-emitting element is consistent with the light emission start time of the second light-emitting element.

[0193] like Figure 3A As shown, in Figure 2A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first initialization circuit 31 and a second initialization circuit 32;

[0194] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1 and the cathode of the first light-emitting element E1, respectively, and is used to write the first initial voltage Vint1 provided by the first initial voltage terminal I1 into the cathode of the first light-emitting element E1 under the control of the first initial control signal provided by the first initial control terminal GC1.

[0195] The second initialization circuit 32 is electrically connected to the second initial control terminal GC2, the second initial voltage terminal I2 and the cathode of the second light-emitting element E2, respectively, and is used to write the second initial voltage Vint2 provided by the second initial voltage terminal I2 into the cathode of the second light-emitting element E2 under the control of the second initial control signal provided by the second initial control terminal GC2.

[0196] like Figure 3B As shown, in Figure 2C Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first initialization circuit 31 and a second initialization circuit 32;

[0197] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1 and the cathode of the first light-emitting element E1, respectively, and is used to write the first initial voltage Vint1 provided by the first initial voltage terminal I1 into the cathode of the first light-emitting element E1 under the control of the first initial control signal provided by the first initial control terminal GC1.

[0198] The second initialization circuit 32 is electrically connected to the second initial control terminal GC2, the second initial voltage terminal I2 and the cathode of the second light-emitting element E2, respectively, and is used to write the second initial voltage Vint2 provided by the second initial voltage terminal I2 into the cathode of the second light-emitting element E2 under the control of the second initial control signal provided by the second initial control terminal GC2.

[0199] The pixel circuit described in at least one embodiment of the present invention further includes a first initialization circuit;

[0200] The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the first terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal.

[0201] In a specific implementation, the pixel circuit may further include a first initialization circuit. Under the control of a first initial control signal, the first initialization circuit writes a first initial voltage into the first terminal of the driving circuit. When the first light-emitting control circuit and the second light-emitting control circuit are turned on, the residual charge on the cathode of the first light-emitting element can be cleared.

[0202] like Figure 4A As shown, in Figure 2A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first initialization circuit 31;

[0203] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1 and the first terminal of the driving circuit 10, respectively, and is used to write the first initial voltage Vint1 provided by the first initial voltage terminal I1 into the first terminal of the driving circuit 10 under the control of the first initial control signal provided by the first initial control terminal GC1.

[0204] like Figure 4B As shown, in Figure 2B Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first initialization circuit 31;

[0205] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1 and the first terminal of the driving circuit 10, respectively, and is used to write the first initial voltage Vint1 provided by the first initial voltage terminal I1 into the first terminal of the driving circuit 10 under the control of the first initial control signal provided by the first initial control terminal GC1.

[0206] like Figure 4C As shown, in Figure 2C Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first initialization circuit 31;

[0207] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1 and the first terminal of the driving circuit 10, respectively, and is used to write the first initial voltage Vint1 provided by the first initial voltage terminal I1 into the first terminal of the driving circuit 10 under the control of the first initial control signal provided by the first initial control terminal GC1.

[0208] The pixel circuit described in at least one embodiment of the present invention further includes a third initialization circuit;

[0209] The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first terminal of the drive circuit under the control of the third initial control signal provided by the third initial control terminal.

[0210] In a specific implementation, the pixel circuit may further include a third initialization circuit. Under the control of a third initial control signal, the third initialization circuit controls the connection or disconnection between the third initial voltage terminal and the first terminal of the driving circuit. When the third initialization circuit writes the third initial voltage to the first terminal of the driving circuit, it can improve the hysteresis phenomenon of the driving transistor in the driving circuit.

[0211] like Figure 5 As shown, in Figure 3A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a third initialization circuit 33;

[0212] The third initialization circuit 33 is electrically connected to the third initial control terminal GC3, the third initial voltage terminal I3 and the first terminal of the drive circuit 10, respectively, and is used to control the connection or disconnection between the third initial voltage terminal I3 and the first terminal of the drive circuit 10 under the control of the third initial control signal provided by the third initial control terminal GC3.

[0213] The third initial voltage terminal I3 is used to provide the third initial voltage Vint3.

[0214] In at least one embodiment of the present invention, the pixel circuit further includes an on / off control circuit;

[0215] The connection node is electrically connected to the first terminal of the drive circuit through the on / off control circuit;

[0216] The control terminal of the on / off control circuit is electrically connected to the on / off control terminal. The on / off control circuit is used to control the connection node and the first terminal of the drive circuit to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal.

[0217] In a specific implementation, the pixel circuit may further include an on / off control circuit, which controls the connection or disconnection between the connection node and the first end of the driving circuit under the control of the on / off control signal.

[0218] like Figure 6 As shown, in Figure 5 Based on at least one embodiment of the pixel circuit shown, in at least one embodiment of the present invention, the pixel circuit further includes an on / off control circuit 30;

[0219] The connection node NJ is electrically connected to the first terminal of the drive circuit 10 through the on / off control circuit 30.

[0220] The control terminal of the on / off control circuit 30 is electrically connected to the on / off control terminal EM4. The on / off control circuit 30 is used to control the connection node NJ and the first terminal of the drive circuit 10 to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal EM4.

[0221] The pixel circuit described in at least one embodiment of the present invention further includes a first initialization circuit and a second initialization circuit;

[0222] The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal and the connection node, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the connection node under the control of the first initial control signal provided by the first initial control terminal;

[0223] The second initialization circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the connection node, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the connection node under the control of the second initial control signal provided by the second initial control terminal.

[0224] The pixel circuit described in at least one embodiment of the present invention further includes a third initialization circuit;

[0225] The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first terminal of the drive circuit under the control of the third initial control signal provided by the third initial control terminal; or...

[0226] The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the connection node, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the connection node under the control of the third initial control signal provided by the third initial control terminal.

[0227] like Figure 7 As shown, in Figure 3A Based on at least one embodiment of the pixel circuit, the pixel circuit further includes an on / off control circuit 30;

[0228] The connection node NJ is electrically connected to the first terminal of the drive circuit 10 through the on / off control circuit 30.

[0229] The control terminal of the on / off control circuit 30 is electrically connected to the on / off control terminal EM4. The on / off control circuit 30 is used to control the connection node NJ and the first terminal of the drive circuit 10 to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal EM4.

[0230] like Figure 8A As shown, in Figure 2A Based on at least one embodiment of the pixel circuit shown, the pixel circuit further includes an on / off control circuit 30, a first initialization circuit 31, and a second initialization circuit 32;

[0231] The connection node NJ is electrically connected to the first terminal of the drive circuit 10 through the on / off control circuit 30.

[0232] The control terminal of the on / off control circuit 30 is electrically connected to the on / off control terminal EM4. The on / off control circuit 30 is used to control the connection node NJ and the first terminal of the drive circuit 10 to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal EM4.

[0233] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1 and the connection node NJ respectively, and is used to write the first initial voltage provided by the first initial voltage terminal I1 into the connection node NJ under the control of the first initial control signal provided by the first initial control terminal GC1.

[0234] The second initialization circuit 32 is electrically connected to the second initial control terminal GC2, the second initial voltage terminal I2 and the connection node NJ respectively, and is used to write the second initial voltage provided by the second initial voltage terminal I2 into the connection node NJ under the control of the second initial control signal provided by the second initial control terminal GC2.

[0235] like Figure 8B As shown, in Figure 7 Based on at least one embodiment of the pixel circuit shown, the pixel circuit further includes a third initialization circuit 33;

[0236] The third initialization circuit 33 is electrically connected to the third initial control terminal GC3, the third initial voltage terminal I3, and the connection node NJ, respectively, and is used to control the connection or disconnection between the third initial voltage terminal I3 and the connection node NJ under the control of the third initial control signal provided by the third initial control terminal GC3.

[0237] The pixel circuit described in at least one embodiment of the present invention may further include a first energy storage circuit, a setting circuit, a data writing circuit, a reset circuit, and a third light emission control circuit;

[0238] The first end of the first energy storage circuit is electrically connected to the first node, and the second end of the first energy storage circuit is electrically connected to the second node. The first energy storage circuit is used to store electrical energy.

[0239] The set circuit is electrically connected to the set control terminal, the reference voltage terminal and the first node respectively, and is used to write the reference voltage provided by the reference voltage terminal into the first node under the control of the set control signal provided by the set control terminal.

[0240] The data writing circuit is electrically connected to the write control terminal, the data line and the first node respectively, and is used to write the data voltage provided by the data line to the first node under the control of the write control signal provided by the write control terminal;

[0241] The reset circuit is electrically connected to the reset control terminal, the initial voltage terminal, and the second terminal of the drive circuit, respectively, and is used to write the initial voltage provided by the initial voltage terminal into the second terminal of the drive circuit under the control of the reset control signal provided by the reset control terminal.

[0242] The third light-emitting control circuit is electrically connected to the first light-emitting control terminal, the second terminal of the driving circuit, and the first voltage terminal, respectively, and is used to control the connection or disconnection between the second terminal of the driving circuit and the first voltage terminal under the control of the first light-emitting control signal.

[0243] In a specific implementation, the pixel circuit may further include a first energy storage circuit, a setting circuit, a data writing circuit, a reset circuit, and a third light emission control circuit; the setting circuit, under the control of a setting control signal, writes a reference voltage into the first node to set the potential of the first node; the data writing circuit, under the control of a writing control signal, writes a data voltage into the first node to perform data voltage writing; the reset circuit, under the control of a reset control signal, writes an initial voltage into the second terminal of the driving circuit to reset the potential of the second terminal of the driving circuit; and the third light emission control circuit, under the control of a first light emission control signal, controls the connection and disconnection between the second terminal of the driving circuit and the first voltage terminal.

[0244] like Figure 9A As shown, in Figure 2A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0245] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0246] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0247] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0248] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0249] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the second terminal of the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0250] In at least one embodiment of the present invention, the reset circuit 44 may be omitted, and only the third light-emitting control circuit 45 may be provided. The third light-emitting control circuit 45 may be used to reset the potential of the second terminal of the driving circuit 10. In this case, the control terminal of the third light-emitting control circuit 45 is not electrically connected to the first light-emitting control terminal EM1, but is electrically connected to a separately provided control terminal.

[0251] like Figure 9B As shown, in Figure 2B Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0252] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0253] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0254] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0255] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0256] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0257] like Figure 9C As shown, in Figure 2C Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0258] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0259] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0260] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0261] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0262] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0263] like Figure 9D As shown, in Figure 2D Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0264] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0265] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0266] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0267] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0268] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0269] like Figure 10As shown, in Figure 3A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0270] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0271] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0272] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0273] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0274] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0275] like Figure 11 As shown, in Figure 5 Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0276] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0277] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0278] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0279] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0280] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0281] like Figure 12 As shown, in Figure 6 Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0282] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0283] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0284] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0285] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0286] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0287] like Figure 13A As shown, in Figure 8A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0288] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0289] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0290] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0291] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0292] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0293] like Figure 13BAs shown, in Figure 8B Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0294] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0295] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0296] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0297] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0298] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0299] like Figure 14 As shown, in Figure 4A Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention may further include an on / off control circuit 30, a third initialization circuit 33, a first energy storage circuit 41, a setting circuit 42, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0300] The connection node NJ is electrically connected to the first terminal of the drive circuit 10 through the on / off control circuit 30.

[0301] The control terminal of the on / off control circuit 30 is electrically connected to the on / off control terminal EM4. The on / off control circuit 30 is used to control the connection node NJ and the first terminal of the drive circuit 10 to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal EM4.

[0302] The third initialization circuit 33 is electrically connected to the third initial control terminal GC3, the third initial voltage terminal I3 and the first terminal of the drive circuit 10, respectively, and is used to control the connection or disconnection between the third initial voltage terminal I3 and the first terminal of the drive circuit 10 under the control of the third initial control signal provided by the third initial control terminal GC3.

[0303] The third initial voltage terminal I3 is used to provide the third initial voltage Vint3;

[0304] The first terminal of the first energy storage circuit 41 is electrically connected to the first node N1, and the second terminal of the first energy storage circuit 41 is electrically connected to the second node N2. The first energy storage circuit 41 is used to store electrical energy.

[0305] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the first node N1 respectively, and is used to write the reference voltage Vref provided by the reference voltage terminal REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0306] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the first node N1 respectively, and is used to write the data voltage Vdata provided by the data line DL into the first node N1 under the control of the write control signal provided by the write control terminal GW.

[0307] The reset circuit 44 is electrically connected to the reset control terminal GI, the initial voltage terminal I0 and the second terminal of the drive circuit 10, respectively, and is used to write the initial voltage Vint provided by the initial voltage terminal I0 into the second terminal of the drive circuit 10 under the control of the reset control signal provided by the reset control terminal GI.

[0308] The third light-emitting control circuit 45 is electrically connected to the first light-emitting control terminal EM1, the second terminal of the driving circuit 10, and the first voltage terminal V1, respectively, and is used to control the connection or disconnection between the driving circuit 10 and the first voltage terminal V1 under the control of the first light-emitting control signal.

[0309] The pixel circuit described in at least one embodiment of the present invention may further include a first energy storage circuit, a second energy storage circuit, a setting circuit, a compensation control circuit, a data writing circuit, a reset circuit, and a third light emission control circuit;

[0310] The first end of the first energy storage circuit is electrically connected to the second node, and the second end of the first energy storage circuit is electrically connected to the third node. The first energy storage circuit is used to store electrical energy.

[0311] The first end of the second energy storage circuit is electrically connected to the third node, and the second end of the second energy storage circuit is electrically connected to the fourth node. The second energy storage circuit is used to store electrical energy.

[0312] The set circuit is electrically connected to the set control terminal, the reference voltage terminal and the first node respectively, and is used to write the reference voltage into the first node under the control of the set control signal provided by the set control terminal;

[0313] The compensation control circuit is electrically connected to the light-emitting control terminal, the first node and the fourth node respectively, and is used to control the connection between the first node and the fourth node under the control of the light-emitting control signal provided by the light-emitting control terminal.

[0314] The data writing circuit is electrically connected to the write control terminal, the data line and the fourth node respectively, and is used to write the data voltage provided by the data line to the fourth node under the control of the write control signal provided by the write control terminal;

[0315] The reset circuit is electrically connected to the set control terminal, the reference voltage terminal and the third node respectively, and is used to write the reference voltage into the third node under the control of the set control signal provided by the set control terminal;

[0316] The third light-emitting control circuit is electrically connected to the light-emitting control terminal, the second node, and the first voltage terminal, respectively, and is used to control the connection between the second node and the first voltage terminal under the control of the light-emitting control signal.

[0317] In a specific implementation, the pixel circuit may further include a first energy storage circuit, a second energy storage circuit, a set circuit, a compensation control circuit, a data writing circuit, a reset circuit, and a third light emission control circuit; the first energy storage circuit is electrically connected to the second node and the third node respectively; the second energy storage circuit is electrically connected to the third node and the fourth node respectively; the set circuit, under the control of the set control signal, writes the reference voltage to the first node; the compensation control circuit, under the control of the light emission control signal, controls the connection between the first node and the fourth node; the data writing circuit, under the control of the write control signal, writes the data voltage to the fourth node; the reset circuit, under the control of the set control signal, writes the reference voltage to the third node; and the third light emission control circuit, under the control of the light emission control signal, controls the connection between the second node and the first voltage terminal.

[0318] like Figure 15 As shown, in Figure 2B Based on at least one embodiment of the pixel circuit shown, the pixel circuit of at least one embodiment of the present invention further includes a first initialization circuit 31, a first energy storage circuit 41, a second energy storage circuit 40, a setting circuit 42, a compensation control circuit 46, a data writing circuit 43, a reset circuit 44, and a third light emission control circuit 45.

[0319] The first initialization circuit 31 is electrically connected to the first initial control terminal GC1, the first initial voltage terminal I1, and the connection node NJ, respectively, and is used to write the first initial voltage Vint1 provided by the first initial voltage terminal I1 into the connection node NJ under the control of the first initial control signal provided by the first initial control terminal GC1.

[0320] The first terminal of the first energy storage circuit 41 is electrically connected to the second node N2, and the second terminal of the first energy storage circuit 41 is electrically connected to the third node N3. The first energy storage circuit 41 is used to store electrical energy.

[0321] The first end of the second energy storage circuit 40 is electrically connected to the third node N3, and the second end of the second energy storage circuit 40 is electrically connected to the fourth node N4. The second energy storage circuit 40 is used to store electrical energy.

[0322] The set circuit 42 is electrically connected to the set control terminal GR, the reference voltage terminal REF, and the first node N1, respectively, and is used to write the reference voltage Vref provided by REF into the first node N1 under the control of the set control signal provided by the set control terminal GR.

[0323] The compensation control circuit 46 is electrically connected to the light-emitting control terminal EM, the first node N1 and the fourth node N4 respectively, and is used to control the connection between the first node N1 and the fourth node N4 under the control of the light-emitting control signal provided by the light-emitting control terminal EM.

[0324] The data writing circuit 43 is electrically connected to the write control terminal GW, the data line DL and the fourth node N4 respectively, and is used to write the data voltage provided by the data line DL into the fourth node N4 under the control of the write control signal provided by the write control terminal GW.

[0325] The reset circuit 44 is electrically connected to the set control terminal GR, the reference voltage terminal REF and the third node N3 respectively, and is used to write the reference voltage Vref into the third node N3 under the control of the set control signal provided by the set control terminal GR.

[0326] The third light-emitting control circuit 45 is electrically connected to the light-emitting control terminal EM, the second node N2 and the first voltage terminal V1 respectively, and is used to control the connection between the second node N2 and the first voltage terminal V1 under the control of the light-emitting control signal.

[0327] In at least one embodiment of the present invention, the pixel circuit includes a first initialization circuit and a second initialization circuit, wherein the first power supply voltage terminal and the second power supply voltage terminal are different voltage terminals;

[0328] The voltage value of the first power supply voltage signal provided by the first power supply voltage terminal is greater than the voltage value of the second power supply voltage signal provided by the second power supply voltage terminal;

[0329] The voltage value of the first initial voltage is greater than or equal to the voltage value of the second initial voltage.

[0330] In practical implementation, since the light-emitting material layer of the privacy light-emitting element is surrounded by a light-blocking pattern, the brightness of the privacy light-emitting element is low. Therefore, the voltage value of the first power supply voltage signal can be greater than the voltage value of the second power supply voltage signal. At this time, the cathode reset voltage corresponding to the first light-emitting element should also be no less than the cathode reset voltage corresponding to the second light-emitting element. That is, the voltage value of the first initial voltage is set to be greater than or equal to the voltage value of the second initial voltage to improve the light-emitting brightness of the privacy light-emitting element.

[0331] For example, when the voltage value of the first power supply voltage signal is 8V and the voltage value of the second power supply voltage signal is 7V, the voltage values ​​of the first initial voltage and the second initial voltage can both be 6V, or the voltage values ​​of the first initial voltage and the second initial voltage can be 6V and 5.5V, respectively. Optionally, the first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0332] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the cathode of the first light-emitting element, and the second electrode of the first transistor is electrically connected to the first terminal of the driving circuit.

[0333] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the cathode of the second light-emitting element, and the second terminal of the second transistor is electrically connected to the first terminal of the driving circuit.

[0334] Optionally, the first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0335] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first transistor is electrically connected to the anode of the first light-emitting element.

[0336] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the second power supply voltage terminal, and the second terminal of the second transistor is electrically connected to the anode of the second light-emitting element.

[0337] Optionally, the first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0338] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first transistor is electrically connected to the anode of the first light-emitting element.

[0339] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the cathode of the second light-emitting element, and the second terminal of the second transistor is electrically connected to the first terminal of the driving circuit.

[0340] Optionally, the first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor;

[0341] The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the cathode of the first light-emitting element, and the second electrode of the first transistor is electrically connected to the first terminal of the driving circuit.

[0342] The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the second power supply voltage terminal, and the second terminal of the second transistor is electrically connected to the anode of the second light-emitting element.

[0343] Optionally, the first initialization circuit includes a third transistor, and the second initialization circuit includes a fourth transistor;

[0344] The gate of the third transistor is electrically connected to the first initial control terminal, the first terminal of the third transistor is electrically connected to the first initial voltage terminal, and the second terminal of the third transistor is electrically connected to the cathode of the first light-emitting element.

[0345] The gate of the fourth transistor is electrically connected to the second initial control terminal, the first terminal of the fourth transistor is electrically connected to the second initial voltage terminal, and the second terminal of the fourth transistor is electrically connected to the cathode of the second light-emitting element.

[0346] Optionally, the first initialization circuit includes a third transistor;

[0347] The gate of the third transistor is electrically connected to the first initial control terminal, the first terminal of the third transistor is electrically connected to the first initial voltage terminal, and the second terminal of the third transistor is electrically connected to the first terminal of the driving circuit.

[0348] Optionally, the third initialization circuit includes a fifth transistor;

[0349] The gate of the fifth transistor is electrically connected to the third initial control terminal, the first terminal of the fifth transistor is electrically connected to the third initial voltage terminal, and the second terminal of the fifth transistor is electrically connected to the first terminal of the driving circuit.

[0350] Optionally, the on / off control circuit includes a sixth transistor;

[0351] The gate of the sixth transistor is electrically connected to the on / off control terminal, the first terminal of the sixth transistor is electrically connected to the connection node, and the second terminal of the sixth transistor is electrically connected to the first terminal of the driving circuit.

[0352] Optionally, the third initialization circuit includes a fifth transistor;

[0353] The gate of the fifth transistor is electrically connected to the third initial control terminal, the first terminal of the fifth transistor is electrically connected to the third initial voltage terminal, and the second terminal of the fifth transistor is electrically connected to the first terminal of the driving circuit; or...

[0354] The gate of the fifth transistor is electrically connected to the third initial control terminal, the first terminal of the fifth transistor is electrically connected to the third initial voltage terminal, and the second terminal of the fifth transistor is electrically connected to the connection node.

[0355] Optionally, the first energy storage circuit includes a first capacitor, the set circuit includes an eleventh transistor, the data writing circuit includes a seventh transistor, the reset circuit includes a ninth transistor, and the third light-emitting control circuit includes a tenth transistor.

[0356] The first terminal of the first capacitor is electrically connected to the first node, and the second terminal of the first capacitor is electrically connected to the second node;

[0357] The gate of the eleventh transistor is electrically connected to the set control terminal, the first terminal of the eleventh transistor is electrically connected to the reference voltage terminal, and the second terminal of the eleventh transistor is electrically connected to the first node.

[0358] The gate of the seventh transistor is electrically connected to the write control terminal, the first terminal of the seventh transistor is electrically connected to the data line, and the second terminal of the seventh transistor is electrically connected to the first node.

[0359] The gate of the ninth transistor is electrically connected to the reset control terminal, the first terminal of the ninth transistor is electrically connected to the initial voltage terminal, and the second terminal of the ninth transistor is electrically connected to the second terminal of the driving circuit.

[0360] The gate of the tenth transistor is electrically connected to the first light-emitting control terminal, the first terminal of the tenth transistor is electrically connected to the second terminal of the driving circuit, and the second terminal of the tenth transistor is electrically connected to the first voltage terminal.

[0361] Optionally, the first voltage terminal can be a low voltage terminal.

[0362] Optionally, the first energy storage circuit includes a first capacitor, the second energy storage circuit includes a second capacitor; the set circuit includes an eleventh transistor, the compensation control circuit includes an eighth transistor, the data writing circuit includes a seventh transistor; the reset circuit includes a ninth transistor, and the third light-emitting control circuit includes a tenth transistor.

[0363] The first terminal of the first capacitor is electrically connected to the first node, and the second terminal of the first capacitor is electrically connected to the fourth node.

[0364] The first terminal of the second capacitor is electrically connected to the fourth node, and the second terminal of the second capacitor is electrically connected to the third power supply voltage terminal.

[0365] The gate of the eleventh transistor is electrically connected to the set control terminal, the first terminal of the eleventh transistor is electrically connected to the reference voltage terminal, and the second terminal of the eleventh transistor is electrically connected to the fourth node.

[0366] The gate of the eighth transistor is electrically connected to the compensation control terminal, the first terminal of the eighth transistor is electrically connected to the first node, and the second terminal of the eighth transistor is electrically connected to the second node.

[0367] The gate of the seventh transistor is electrically connected to the write control terminal, the first terminal of the seventh transistor is electrically connected to the data line, and the second terminal of the seventh transistor is electrically connected to the fourth node.

[0368] The gate of the ninth transistor is electrically connected to the reset control terminal, the first terminal of the ninth transistor is electrically connected to the reset voltage terminal, and the second terminal of the ninth transistor is electrically connected to the first node.

[0369] The gate of the tenth transistor is electrically connected to the first light-emitting control terminal, the first terminal of the tenth transistor is electrically connected to the second terminal of the driving circuit, and the second terminal of the tenth transistor is electrically connected to the first voltage terminal.

[0370] like Figure 16 As shown, in Figure 9A Based on at least one embodiment of the pixel circuit shown, the first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0371] The anode of O1 is electrically connected to the power supply voltage terminal ELVDD, and the anode of O2 is electrically connected to the power supply voltage terminal ELVDD.

[0372] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the cathode of O1, and the source of the first transistor T1 is electrically connected to the connection node NJ.

[0373] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the cathode of O2, and the source of the second transistor T2 is electrically connected to the connection node NJ.

[0374] The driving circuit includes a driving transistor DT;

[0375] The gate of DT is electrically connected to the first node N1, the drain of DT is electrically connected to the connection node NJ, and the source of DT is electrically connected to the second node N2.

[0376] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0377] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0378] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0379] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0380] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0381] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0382] exist Figure 16 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0383] Optionally, the first terminal of the sustaining capacitor is electrically connected to the second terminal of the driving circuit, and the second terminal of the sustaining capacitor is electrically connected to the DC voltage terminal; the DC voltage terminal may be, for example, a low voltage terminal, a power supply voltage terminal, an initial voltage terminal, or a reference voltage terminal.

[0384] exist Figure 16 In at least one embodiment of the pixel circuit shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0385] exist Figure 16 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0386] Figure 17 yes Figure 16 The timing diagram shows the operation of at least one embodiment of the pixel circuit.

[0387] like Figure 17 As shown, the present invention Figure 16 At least one embodiment of the pixel circuit shown, when in operation,

[0388] During the privacy display phase, which includes the light-emitting phases SE1, EM1 provides a high voltage signal, EM2 provides a low voltage signal, T1 is turned on, T2 is turned off, T10 is turned on, and DT drives O1 to emit light; GR provides a low voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, and T7, T9, and T11 are turned off.

[0389] During the shared display phase, which includes the light-emitting phase SE2, EM1 provides a high voltage signal, EM2 provides a high voltage signal, T1 and T2 are turned on, T10 is turned on, and DT drives O1 and O2 to emit light; GR provides a low voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, and T7, T9, and T11 are turned off.

[0390] This invention Figure 18 At least one embodiment of the pixel circuit shown is related to the present invention. Figure 16 The differences in at least one embodiment of the pixel circuit shown are as follows: the anode of O1 is electrically connected to the first power supply voltage terminal ELVDD1, and the anode of O2 is electrically connected to the second power supply voltage terminal ELVDD2.

[0391] exist Figure 18 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0392] The voltage value Vdd1 of the first power supply voltage signal provided by the first power supply voltage terminal ELVDD1 is greater than the voltage value Vdd2 of the second power supply voltage signal provided by the second power supply voltage terminal ELVDD2.

[0393] like Figure 19 As shown, in Figure 9B Based on at least one embodiment of the pixel circuit shown, the first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0394] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the power supply voltage terminal ELVDD, and the source of the first transistor T1 is electrically connected to the anode of O1.

[0395] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the power supply voltage terminal ELVDD, and the source of the second transistor T2 is electrically connected to the anode of O2.

[0396] The cathodes of O1 and O2 are both electrically connected to the connection node NJ.

[0397] The driving circuit includes a driving transistor DT;

[0398] The gate of DT is electrically connected to the first node N1, the drain of DT is electrically connected to the connection node NJ, and the source of DT is electrically connected to the second node N2.

[0399] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0400] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0401] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0402] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0403] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0404] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0405] exist Figure 19 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0406] exist Figure 19 In at least one embodiment of the pixel circuit shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0407] exist Figure 19 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0408] like Figure 20 As shown, in Figure 9CBased on at least one embodiment of the pixel circuit shown, the first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0409] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the power supply voltage terminal ELVDD, and the source of the first transistor T1 is electrically connected to the anode of O1; the anode of O1 is electrically connected to the connection node NJ.

[0410] The anode of O2 is electrically connected to the power supply voltage terminal ELVDD; the gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2; the drain of the second transistor T2 is electrically connected to the cathode of O2; and the source of the second transistor T2 is electrically connected to the connection node NJ.

[0411] The driving circuit includes a driving transistor DT;

[0412] The gate of DT is electrically connected to the first node N1, the drain of DT is electrically connected to the connection node NJ, and the source of DT is electrically connected to the second node N2.

[0413] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0414] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0415] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0416] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0417] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0418] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0419] exist Figure 20 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0420] exist Figure 20 In at least one embodiment of the pixel circuit shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0421] exist Figure 20 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0422] like Figure 21 As shown, in Figure 10 Based on at least one embodiment of the pixel circuit shown,

[0423] The first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0424] The anode of O1 is electrically connected to the power supply voltage terminal ELVDD, and the anode of O2 is electrically connected to the power supply voltage terminal ELVDD.

[0425] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the cathode of O1, and the source of the first transistor T1 is electrically connected to the connection node NJ.

[0426] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the cathode of O2, and the source of the second transistor T2 is electrically connected to the connection node NJ.

[0427] The driving circuit includes a driving transistor DT;

[0428] The gate of DT is electrically connected to the first node N1, the drain of DT is electrically connected to the connection node NJ, and the source of DT is electrically connected to the second node N2.

[0429] The first initialization circuit includes a third transistor T3, and the second initialization circuit includes a fourth transistor T4;

[0430] The gate of the third transistor T3 is electrically connected to the first initial control terminal GC1, the drain of the third transistor T3 is electrically connected to the first initial voltage terminal I1, and the source of the third transistor T3 is electrically connected to the cathode of O1; the first initial voltage terminal I1 is used to provide the first initial voltage Vint1.

[0431] The gate of the fourth transistor T4 is electrically connected to the second initial control terminal GC2, the drain of the fourth transistor T4 is electrically connected to the first initial voltage terminal I1, and the source of the fourth transistor T4 is electrically connected to the cathode of O2.

[0432] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0433] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0434] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0435] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0436] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0437] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0438] exist Figure 21 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0439] exist Figure 21 In at least one embodiment shown, the first initial voltage terminal and the second initial voltage terminal are the same initial voltage terminal.

[0440] exist Figure 21 In at least one embodiment shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0441] exist Figure 21 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0442] Figure 22A , Figure 22B and Figure 22C This is the present invention. Figure 21 The timing diagram shows the operation of at least one embodiment of the pixel circuit.

[0443] like Figure 22A As shown, the present invention Figure 21 At least one embodiment of the pixel circuit shown, when in operation,

[0444] During the privacy display phase, which includes the following light-emitting phases: SE1, EM1 provides a high-voltage signal, EM2 provides a low-voltage signal, T1 is on, T2 is off, T10 is on, and DT drives O1 to emit light; GR provides a low-voltage signal, GI provides a low-voltage signal, GW provides a low-voltage signal, and T7, T9, and T11 are off; GC1 and GC2 both provide low-voltage signals, and T3 and T4 are off.

[0445] In the shared display phase, which includes the light-emitting phase SE2, EM1 provides a high voltage signal, EM2 provides a high voltage signal, T1 and T2 are turned on, T10 is turned on, and DT drives O1 and O2 to emit light; GR provides a low voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, and T7, T9, and T11 are turned off; GC1 and GC2 both provide low voltage signals, and T3 and T4 are turned off.

[0446] like Figure 22B As shown, the present invention Figure 21 When at least one embodiment of the pixel circuit shown is in operation, the shared display phase may include a first initialization phase S11, a first compensation phase S12, a first writing phase S13 and a first light emission phase S14, which are set sequentially.

[0447] In the first initialization phase S11, EM1 provides a low voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a high voltage signal, GW provides a low voltage signal, and GC1 and GC2 both provide high voltage signals. T11 is turned on, T9 is turned on, and T3 and T4 are both turned on. REF provides a reference voltage Vref to N1, and I0 provides an initial voltage Vint to N2 so that DT can be turned on at the beginning of the first compensation phase S12. I1 provides a first initial voltage Vint1 to the cathodes of O1 and O2 to clear the residual charge on the cathodes of O1 and O2.

[0448] In the first compensation phase S12, EM1 provides a high voltage signal, EM2 provides a high voltage signal, GR provides a high voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, GC1 and GC2 provide high voltage signals, T1, T2, T3 and T4 are all turned on, and REF provides the reference voltage Vref to N1;

[0449] At the start of the first compensation phase S12, DT is turned on, Vref charges C1 until the potential of N2 becomes Vref-Vth, at which point DT is turned off; Vth is the threshold voltage of DT.

[0450] In the first write phase S13, EM1 and EM2 both provide low voltage signals, GR provides a low voltage signal, GI provides a low voltage signal, GW provides a high voltage signal, GC1 and GC2 both provide high voltage signals, T3 and T4 are turned on, I1 provides the first initial voltage Vint1 to the cathodes of O1 and O2; T1 and T2 are turned off; DL provides the data voltage Vdata to N1.

[0451] In the first light-emitting stage S14, EM1 and EM2 provide high voltage signals, GC1 and GC2 both provide low voltage signals, GR, GI and GW both provide low voltage signals, T1, T2 and T10 are all turned on, and DT drives O1 and O2 to emit light; the gate-source voltage of DT is Vdata-Vref+Vth.

[0452] like Figure 22C As shown, the present invention Figure 21 When at least one embodiment of the pixel circuit shown is in operation, the privacy display stage may include a second initialization stage S21, a second compensation stage S22, a second writing stage S23, and a second light emission stage S24, which are set sequentially.

[0453] In the second initialization phase S21, EM1 provides a low voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a high voltage signal, GW provides a low voltage signal, GC1 provides a high voltage signal, GC2 provides a low voltage signal, T1 and T2 are turned off, REF provides a reference voltage Vref to N1, and I0 provides an initial voltage Vint to N2 so that DT can be turned on at the beginning of the second compensation phase S22; T3 is turned on, and I1 provides a first initial voltage Vint1 to the cathode of O1 to clear the residual charge on the cathode of O1;

[0454] In the second compensation phase S22, EM1 provides a high voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, GC1 provides a high voltage signal, GC2 provides a low voltage signal, T1 is turned on, T3 is turned on, T11 is turned on, and REF provides the reference voltage Vref to N1.

[0455] At the start of the second compensation phase S22, DT is turned on and charges C1 through Vref until the potential of N2 becomes Vref-Vth, at which point DT is turned off; Vth is the threshold voltage of DT.

[0456] In the second data writing stage S23, EM1 and EM2 both provide low voltage signals, GR provides a low voltage signal, GI provides a low voltage signal, GW provides a high voltage signal, GC1 provides a high voltage signal, GC2 provides a low voltage signal, T7 is turned on, and DL provides the data voltage Vdata to N1;

[0457] In the second light-emitting stage S24, EM1 provides a high voltage signal, EM2 provides a low voltage signal, and GR, GI, GW, GC1 and GC2 all provide low voltage signals. T2 is turned on, and DT drives O2 to emit light. The gate-source voltage of DT is equal to Vdata-Vref+Vth.

[0458] like Figure 23 As shown, in Figure 10 Based on at least one embodiment of the pixel circuit shown,

[0459] The first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0460] The anode of O1 is electrically connected to the power supply voltage terminal ELVDD, and the anode of O2 is electrically connected to the power supply voltage terminal ELVDD.

[0461] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the cathode of O1, and the source of the first transistor T1 is electrically connected to the connection node NJ.

[0462] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the cathode of O2, and the source of the second transistor T2 is electrically connected to the connection node NJ.

[0463] The driving circuit includes a driving transistor DT;

[0464] The gate of DT is electrically connected to the first node N1, the drain of DT is electrically connected to the connection node NJ, and the source of DT is electrically connected to the second node N2.

[0465] The first initialization circuit includes a third transistor T3, and the second initialization circuit includes a fourth transistor T4;

[0466] The gate of the third transistor T3 is electrically connected to the first initial control terminal GC1, the drain of the third transistor T3 is electrically connected to the first initial voltage terminal I1, and the source of the third transistor T3 is electrically connected to the cathode of O1; the first initial voltage terminal I1 is used to provide the first initial voltage Vint1.

[0467] The gate of the fourth transistor T4 is electrically connected to the second initial control terminal GC2, the drain of the fourth transistor T4 is electrically connected to the second initial voltage terminal I2, and the source of the fourth transistor T4 is electrically connected to the cathode of O2; the second initial voltage terminal I2 is used to provide the second initial voltage Vint2.

[0468] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0469] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0470] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0471] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0472] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0473] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0474] exist Figure 23 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0475] exist Figure 23 In at least one embodiment shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0476] exist Figure 23 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0477] exist Figure 23 In at least one of the embodiments shown, the first initial control terminal and the second initial control terminal can be the same initial control terminal to reduce the number of initial control terminals used.

[0478] exist Figure 23 In at least one embodiment shown, T3 and T4 may be omitted, and an initial transistor may be used to reset the connection node NJ via an initial voltage terminal. The gate of the initial transistor may be electrically connected to GC1.

[0479] This invention Figure 24 At least one embodiment of the pixel circuit shown is related to the present invention. Figure 23 The difference in at least one embodiment of the pixel circuit shown is as follows: it also includes a third initialization circuit;

[0480] The third initialization circuit includes a fifth transistor T5;

[0481] The gate of the fifth transistor T5 is electrically connected to the third initial control terminal GC3, the drain of the fifth transistor T5 is electrically connected to the third initial voltage terminal I3, and the source of the fifth transistor T5 is electrically connected to the drain of DT.

[0482] The third initial voltage terminal I3 is used to provide the third initial voltage Vint3.

[0483] In this invention Figure 24 In at least one embodiment of the pixel circuit shown, the first initial control terminal and the third initial control terminal may be the same initial control terminal; or, the second initial control terminal and the third initial control terminal may be the same initial control terminal; or, the first initial control terminal, the second initial control terminal and the third initial control terminal may be the same initial control terminal.

[0484] This invention Figure 24 In at least one embodiment of the pixel circuit shown, during operation, in privacy mode, O1 emits light, and during the light-emitting phase included in the privacy display phase, T1, DT, and T10 are turned on, while the remaining transistors are turned off; in shared mode, O1 and O2 emit light together, and during the light-emitting phase included in the shared display phase, T1, DT, T10, and T2 are turned on, while the remaining transistors are turned off.

[0485] This invention Figure 24 In at least one embodiment of the pixel circuit shown, during operation, in privacy mode, during the light-emitting phase included in the privacy display phase, O1 needs to be turned on. Therefore, during the time period for resetting the potential of node N1, the threshold voltage compensation time period, or the data writing time period, T1 can be turned on to reset the potential of the cathode of O1. In sharing mode, during the light-emitting phase included in the sharing display phase, O1 and O2 need to be turned on. Then, during the time period for resetting the potential of node N1, the threshold voltage compensation time period, or the data writing time period, T1 and T2 can be turned on to reset the potential of the cathodes of O1 and O2.

[0486] Figure 25A , Figure 25B and Figure 25C This is the present invention. Figure 24 The timing diagram shows the operation of at least one embodiment of the pixel circuit.

[0487] like Figure 25A As shown, the present invention Figure 24 At least one embodiment of the pixel circuit shown, when in operation,

[0488] During the privacy display phase, which includes the following light-emitting phases: SE1, EM1 provides a high-voltage signal, EM2 provides a low-voltage signal, T1 is on, T2 is off, T10 is on, and DT drives O1 to emit light; GR provides a low-voltage signal, GI provides a low-voltage signal, GW provides a low-voltage signal, and T7, T9, and T11 are off; GC1, GC2, and GC3 all provide low-voltage signals, and T3, T4, and T5 are off.

[0489] In the shared display phase, which includes the light-emitting phase SE2, EM1 provides a high voltage signal, EM2 provides a high voltage signal, T1 and T2 are turned on, T10 is turned on, and DT drives O1 and O2 to emit light; GR provides a low voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, and T7, T9, and T11 are turned off; GC1, GC2, and GC3 all provide low voltage signals, and T3, T4, and T5 are turned off.

[0490] like Figure 25B As shown, the present invention Figure 24 When at least one embodiment of the pixel circuit shown is in operation, the shared display phase may include a first initialization phase S11, a first compensation phase S12, a first writing phase S13 and a first light emission phase S14, which are set sequentially.

[0491] In the first initialization phase S11, EM1 provides a low voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a high voltage signal, GW provides a low voltage signal, GC1 and GC2 both provide high voltage signals, GC3 provides a low voltage signal, T5 is turned off, T11 is turned on, T9 is turned on, T3 and T4 both are turned on, REF provides a reference voltage Vref to N1, and I0 provides an initial voltage Vint to N2 so that DT can be turned on at the beginning of the first compensation phase S12; I1 provides a first initial voltage Vint1 to the cathodes of O1 and O2 to clear the residual charge on the cathodes of O1 and O2.

[0492] In the first compensation phase S12, EM1 provides a low voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, and GC1, GC2, and G3 all provide high voltage signals. T1 and T2 are turned off, T3 and T4 are turned on, and I1 provides the first initial voltage Vint1 to the cathodes of O1 and O2 to clear the residual charge on the cathodes of O1 and O2. T5 is turned on, T11 is turned on, and T9 is turned off.

[0493] At the start of the first compensation phase S12, DT is turned on and charges C1 through Vref until the potential of N2 becomes Vref-Vth, at which point DT is turned off; Vth is the threshold voltage of DT.

[0494] In the first write phase S13, EM1 and EM2 both provide low voltage signals, GR provides a low voltage signal, GI provides a low voltage signal, GW provides a high voltage signal, GC1 and GC2 both provide high voltage signals, GC3 provides a low voltage signal, T3 and T4 are both turned on, I1 provides the first initial voltage Vint1 to the cathode of O1 and the cathode of O2; T7 is turned on, DL provides the data voltage Vdata to N1;

[0495] In the first light-emitting stage S14, both EM1 and EM2 provide high voltage signals, T1 and T2 are turned on, DT drives O1 and O2 to emit light, and the gate-source voltage of DT is equal to Vdata-Vref+Vth.

[0496] like Figure 25C As shown, the present invention Figure 24 When at least one embodiment of the pixel circuit shown is in operation, the privacy display stage may include a second initialization stage S21, a second compensation stage S22, a second writing stage S23, and a second light emission stage S24, which are set sequentially.

[0497] In the second initialization phase S21, EM1 provides a low voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a high voltage signal, GW provides a low voltage signal, GC1 provides a high voltage signal, GC2 provides a low voltage signal, and GC3 provides a low voltage signal. T1 and T2 are turned off. REF provides a reference voltage Vref to N1, and I0 provides an initial voltage Vint to N2, so that DT can be turned on at the beginning of the second compensation phase S22. T3 is turned on, and I1 provides a first initial voltage Vint1 to the cathode of O1 to clear the residual charge on the cathode of O1.

[0498] In the second compensation stage S22, EM1 provides a low voltage signal, EM2 provides a low voltage signal, GR provides a high voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, GC1 provides a high voltage signal, GC2 provides a low voltage signal, GC3 provides a high voltage signal, T11 is turned on, REF provides a reference voltage Vref to N1, T5 is turned on, and NJ and I3 are connected.

[0499] At the start of the second compensation phase S22, DT is turned on, charging C1 through Vref until the potential of N2 becomes Vref-Vth, at which point DT is turned off; Vth is the threshold voltage of DT.

[0500] In the second write phase S23, EM1 and EM2 both provide low voltage signals, GR and GI both provide low voltage signals, GW provides a high voltage signal, GC1 provides a high voltage signal, GC2 and GC3 both provide low voltage signals, T7 is turned on, DL provides the data voltage Vdata to N1; T3 is turned on, I1 provides the first initial voltage Vint1 to the cathode of O1; T1 and T2 are turned off.

[0501] In the second light-emitting stage S24, EM1 provides a high voltage signal, EM2 provides a low voltage signal, T1 and T10 are both turned on, DT drives O1 to emit light, and the gate-source voltage of DT is equal to Vdata-Vref+Vth.

[0502] like Figure 26 As shown, in Figure 12 Based on at least one embodiment of the pixel circuit shown,

[0503] The first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0504] The anode of O1 is electrically connected to the power supply voltage terminal ELVDD, and the anode of O2 is electrically connected to the power supply voltage terminal ELVDD.

[0505] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the cathode of O1, and the source of the first transistor T1 is electrically connected to the cathode of O1.

[0506] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the cathode of O2, and the source of the second transistor T2 is electrically connected to the cathode of O1.

[0507] The third initialization circuit includes a fifth transistor T5;

[0508] The gate of the fifth transistor T5 is electrically connected to the third initial control terminal GC3, the drain of the fifth transistor T5 is electrically connected to the third initial voltage terminal I3, and the source of the fifth transistor T5 is electrically connected to the drain of the driving transistor DT.

[0509] The on / off control circuit includes a sixth transistor T6;

[0510] The gate of the sixth transistor T6 is electrically connected to the on / off control terminal EM4, the drain of the sixth transistor T6 is electrically connected to the connection node NJ, and the source of the sixth transistor T6 is electrically connected to the drain of the driving transistor DT.

[0511] The driving circuit includes a driving transistor DT;

[0512] The gate of DT is electrically connected to the first node N1, and the source of DT is electrically connected to the second node N2.

[0513] The first initialization circuit includes a third transistor T3, and the second initialization circuit includes a fourth transistor T4;

[0514] The gate of the third transistor T3 is electrically connected to the first initial control terminal GC1, the drain of the third transistor T3 is electrically connected to the first initial voltage terminal I1, and the source of the third transistor T3 is electrically connected to the cathode of O1; the first initial voltage terminal I1 is used to provide the first initial voltage Vint1.

[0515] The gate of the fourth transistor T4 is electrically connected to the second initial control terminal GC2, the drain of the fourth transistor T4 is electrically connected to the first initial voltage terminal I1, and the source of the fourth transistor T4 is electrically connected to the cathode of O2.

[0516] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0517] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0518] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0519] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0520] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0521] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0522] exist Figure 26 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0523] exist Figure 26 In at least one embodiment shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0524] exist Figure 26 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0525] Figure 27A , Figure 27B and Figure 27C yes Figure 26 The timing diagram shows the operation of at least one embodiment of the pixel circuit.

[0526] like Figure 27A As shown, the present invention Figure 26 At least one embodiment of the pixel circuit shown, when in operation,

[0527] During the privacy display phase, which includes the following light-emitting phases: SE1, EM1 provides a high-voltage signal, EM2 provides a low-voltage signal, EM4 provides a high-voltage signal, T1 is on, T2 is off, T10 is on, T6 is on, and DT drives O1 to emit light; GR provides a low-voltage signal, GI provides a low-voltage signal, GW provides a low-voltage signal, and T7, T9, and T11 are off; GC1, GC2, and GC3 all provide low-voltage signals, and T3, T4, and T5 are off.

[0528] In the shared display phase, which includes the light-emitting phase SE2, EM1 provides a high voltage signal, EM2 provides a high voltage signal, EM4 provides a high voltage signal, T1 and T2 are turned on, T10 is turned on, T6 is turned on, and DT drives O1 and O2 to emit light; GR provides a low voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, and T7, T9, and T11 are turned off; GC1, GC2, and GC3 all provide low voltage signals, and T3, T4, and T5 are turned off.

[0529] like Figure 27B As shown, the present invention Figure 26When at least one embodiment of the pixel circuit shown is in operation, the shared display phase may include a first initialization phase S11, a first compensation phase S12, a first writing phase S13 and a first light emission phase S14, which are set sequentially.

[0530] In the first initialization phase S11, EM1 provides a low voltage signal, EM2 provides a low voltage signal, EM4 provides a low voltage signal, GR provides a high voltage signal, GI provides a high voltage signal, GW provides a low voltage signal, GC1 and GC2 both provide high voltage signals, GC3 provides a low voltage signal, T6 is turned off, T5 is turned off, T11 is turned on, T9 is turned on, T3 and T4 both are turned on, REF provides a reference voltage Vref to N1, I0 provides an initial voltage Vint to N2 so that DT can be turned on at the beginning of the first compensation phase S12; I1 provides a first initial voltage Vint1 to the cathodes of O1 and O2 to clear the residual charge on the cathodes of O1 and O2;

[0531] In the first compensation phase S12, EM1, EM2, and EM4 all provide low voltage signals, GR provides a high voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, GC1, GC2, and GC3 all provide high voltage signals, T1, T2, and T6 are all off, T3 and T4 are all on, I1 provides the first initial voltage Vint1 to the cathodes of O1 and O2; T11 is on, REF provides the reference voltage Vref to N1, and T5 is on.

[0532] At the start of the first compensation phase S12, DT is turned on and charges C1 through Vref until the potential of N2 becomes Vref-Vth, at which point DT is turned off; Vth is the threshold voltage of DT.

[0533] In the first write phase S13, EM1, EM2, and EM4 all provide low voltage signals, GR provides a low voltage signal, GI provides a low voltage signal, GW provides a high voltage signal, GC1 and GC2 both provide high voltage signals, GC3 provides a low voltage signal, T7 is turned on, and DL provides the data voltage Vdata to N1; T3 and T4 are turned on, and I1 provides the first initial voltage Vint1 to the cathodes of O1 and O2; in the first light emission phase S14, EM1, EM2, and EM4 all provide high voltage signals, T1, T2, T6, and T10 are all turned on, and DT drives O1 and O2 to emit light. The gate-source voltage of DT is equal to Vdata - Vref + Vth. Figure 27C As shown, the present invention Figure 26 When at least one embodiment of the pixel circuit shown is in operation, the privacy display stage may include a second initialization stage S21, a second compensation stage S22, a second writing stage S23, and a second light emission stage S24, which are set sequentially.

[0534] In the second initialization phase S21, EM1, EM2, and EM4 all provide low voltage signals, GR provides a high voltage signal, GI provides a high voltage signal, GW provides a low voltage signal, GC1 provides a high voltage signal, and GC2 and GC3 both provide low voltage signals. T11 and T9 are turned on, REF provides a reference voltage Vref to N1, and I0 provides an initial voltage Vint to N2 so that DT can be turned on at the start of the second compensation phase S22. T3 is turned on, and I1 provides a first initial voltage Vint1 to the cathode of O1 to clear the residual charge on the cathode of O1.

[0535] In the second compensation phase S22, EM1, EM2 and EM4 all provide low voltage signals, GR provides a high voltage signal, GI provides a low voltage signal, GW provides a low voltage signal, GC1 and GC3 both provide high voltage signals, GC2 provides a low voltage signal, T11 is turned on, T1 and T2 are turned off, T3 is turned on, I1 provides the cathode from Vint1 to O1; T5 is turned on.

[0536] At the start of the second compensation phase S22, DT is turned on, charging C1 through Vref until the potential of N2 becomes Vref-Vth, at which point DT is turned off; Vth is the threshold voltage of DT.

[0537] In the second write phase S23, EM1, EM2 and EM4 all provide low voltage signals, GR provides a low voltage signal, GI provides a low voltage signal, GW provides a high voltage signal, GC1 provides a high voltage signal, GC2 and GC3 both provide low voltage signals, T3 is turned on, I1 provides the first initial voltage Vint1 to the cathode of O1; T7 is turned on, DL provides the data voltage Vdata to N1;

[0538] In the second light-emitting stage S24, EM1 and EM4 both provide high voltage signals, EM2 provides a low voltage signal, T1 and T6 are turned on, T2 is turned off, DT drives O1 to emit light, and the gate-source voltage of DT is equal to Vdata-Vref+Vth.

[0539] This invention Figure 28 At least one embodiment of the pixel circuit shown is related to the present invention. Figure 26 The differences between at least one embodiment of the pixel circuit shown are as follows:

[0540] The source of the fifth transistor T5 is electrically connected to the connection node NJ.

[0541] This invention Figure 29 At least one embodiment of the pixel circuit shown is related to the present invention. Figure 26 The differences between at least one embodiment of the pixel circuit shown are as follows:

[0542] The source of T1 is electrically connected to the connection node NJ, and the source of T2 is electrically connected to the connection node NJ.

[0543] like Figure 30 As shown, in Figure 14 Based on at least one embodiment of the pixel circuit shown, the first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0544] The anode of O1 is electrically connected to the power supply voltage terminal ELVDD, and the anode of O2 is electrically connected to the power supply voltage terminal ELVDD.

[0545] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the cathode of O1, and the source of the first transistor T1 is electrically connected to the connection node NJ.

[0546] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the cathode of O2, and the source of the second transistor T2 is electrically connected to the connection node NJ.

[0547] The third initialization circuit includes a fifth transistor T5;

[0548] The gate of the fifth transistor T5 is electrically connected to the third initial control terminal GC3, the drain of the fifth transistor T5 is electrically connected to the third initial voltage terminal I3, and the source of the fifth transistor T5 is electrically connected to the drain of the driving transistor DT.

[0549] The on / off control circuit includes a sixth transistor T6;

[0550] The gate of the sixth transistor T6 is electrically connected to the on / off control terminal EM4, the drain of the sixth transistor T6 is electrically connected to the connection node NJ, and the source of the sixth transistor T6 is electrically connected to the drain of the driving transistor DT.

[0551] The driving circuit includes a driving transistor DT;

[0552] The gate of DT is electrically connected to the first node N1, and the source of DT is electrically connected to the second node N2.

[0553] The first initialization circuit includes a third transistor T3;

[0554] The gate of the third transistor T3 is electrically connected to the first initial control terminal GC1, the drain of the third transistor T3 is electrically connected to the first initial voltage terminal I1, and the source of the third transistor T3 is electrically connected to the connection node NJ; the first initial voltage terminal I1 is used to provide the first initial voltage Vint1.

[0555] The first energy storage circuit includes a first capacitor C1, the set circuit includes an eleventh transistor T11, the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0556] The first terminal of the first capacitor C1 is electrically connected to the first node N1, and the second terminal of the first capacitor C1 is electrically connected to the second node N2.

[0557] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1; the reference voltage terminal REF is used to provide the reference voltage Vref.

[0558] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the first node N1.

[0559] The gate of the ninth transistor T9 is electrically connected to the reset control terminal GI, the drain of the ninth transistor T9 is electrically connected to the initial voltage terminal I0, and the source of the ninth transistor T9 is electrically connected to the source of DT; the initial voltage terminal I0 is used to provide the initial voltage Vint.

[0560] The gate of the tenth transistor T10 is electrically connected to the first light-emitting control terminal EM1, the drain of the tenth transistor T10 is electrically connected to the source of DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0561] exist Figure 30 In the diagram, the capacitor labeled Ch is the sustaining capacitor, which is used to maintain the potential of the source of DT. The first end of Ch is electrically connected to the source of DT, and the second end of Ch is electrically connected to the low voltage terminal ELVSS.

[0562] exist Figure 30 In at least one embodiment shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0563] exist Figure 30In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0564] like Figure 31 As shown, in Figure 15 Based on at least one embodiment of the pixel circuit shown,

[0565] The first light-emitting control circuit includes a first transistor T1, and the second light-emitting control circuit includes a second transistor T2; the first light-emitting element is a first organic light-emitting diode O1, and the second light-emitting element is a second organic light-emitting diode O2;

[0566] The gate of the first transistor T1 is electrically connected to the first light-emitting control terminal EM1, the drain of the first transistor T1 is electrically connected to the power supply voltage terminal ELVDD, and the source of the first transistor T1 is electrically connected to the anode of O1.

[0567] The gate of the second transistor T2 is electrically connected to the second light-emitting control terminal EM2, the drain of the second transistor T2 is electrically connected to the power supply voltage terminal ELVDD, and the source of the second transistor T2 is electrically connected to the anode of O1; the first initialization circuit includes a third transistor T3;

[0568] The gate of the third transistor T3 is electrically connected to the first initial control terminal GC1, the drain of the third transistor T3 is electrically connected to the first initial voltage terminal I1, and the source of the third transistor T3 is electrically connected to the drain of the driving transistor DT.

[0569] The driving circuit includes a driving transistor DT; DT is a dual-gate transistor.

[0570] The first gate of DT is electrically connected to the first node N1, the source of DT is electrically connected to the second node N2; the drain of DT is electrically connected to the cathodes of O1 and O2; the second gate of DT is electrically connected to the second node N2.

[0571] The first energy storage circuit includes a first capacitor C1, and the second energy storage circuit includes a second capacitor C2; the set circuit includes an eleventh transistor T11, the compensation control circuit includes an eighth transistor T8, and the data writing circuit includes a seventh transistor T7; the reset circuit includes a ninth transistor T9, and the third light-emitting control circuit includes a tenth transistor T10.

[0572] The first terminal of the first capacitor C1 is electrically connected to the second node N2, and the second terminal of the first capacitor C1 is electrically connected to the third node N3;

[0573] The first terminal of the second capacitor C2 is electrically connected to the third node N3, and the second terminal of the second capacitor C2 is electrically connected to the fourth node N4;

[0574] The gate of the eleventh transistor T11 is electrically connected to the set control terminal GR, the drain of the eleventh transistor T11 is electrically connected to the reference voltage terminal REF, and the source of the eleventh transistor T11 is electrically connected to the first node N1.

[0575] The gate of the eighth transistor T8 is electrically connected to the light-emitting control terminal EM, the drain of the eighth transistor T8 is electrically connected to the first node N1, and the source of the eighth transistor T8 is electrically connected to the fourth node N4.

[0576] The gate of the seventh transistor T7 is electrically connected to the write control terminal GW, the drain of the seventh transistor T7 is electrically connected to the data line DL, and the source of the seventh transistor T7 is electrically connected to the fourth node N4.

[0577] The gate of the ninth transistor T9 is electrically connected to the set control terminal GR, the drain of the ninth transistor T9 is electrically connected to the reference voltage terminal REF, and the source of the ninth transistor T9 is electrically connected to the third node N3.

[0578] The gate of the tenth transistor T10 is electrically connected to the light-emitting control terminal EM, the drain of the tenth transistor T10 is electrically connected to the source of the driving transistor DT, and the source of the tenth transistor T10 is electrically connected to the low-voltage terminal ELVSS.

[0579] exist Figure 31 In at least one embodiment shown, all transistors are n-type transistors and all transistors are oxide transistors.

[0580] exist Figure 31 In at least one embodiment shown, O1 is a privacy-protected organic light-emitting diode (OLED), and O2 is a normal organic light-emitting diode (OLED).

[0581] Figure 32A and Figure 32B yes Figure 31 The timing diagram shows the operation of at least one embodiment of the pixel circuit.

[0582] Figure 32A yes Figure 31 The timing diagram shown is of the pixel circuit operating in shared mode. Figure 32B yes Figure 31 The timing diagram shown is of the pixel circuit operating in privacy mode.

[0583] like Figure 32A As shown, in the first light-emitting stage S14 of the shared display stage, EM, EM1 and EM2 all provide high voltage signals, and T1, T2 and T10 are all turned on to perform shared display.

[0584] like Figure 32B As shown, in the second light-emitting stage S24 of the privacy display stage, EM and EM1 both provide high voltage signals, EM2 provides low voltage signals, T1 and T10 are both turned on, and T2 is turned off to perform privacy display.

[0585] The pixel driving method described in this embodiment of the invention is applied to the aforementioned pixel circuit, and the display cycle includes a shared display phase and a privacy display phase; the shared display phase includes a first light-emitting phase, and the privacy display phase includes a second light-emitting phase; the pixel driving method includes:

[0586] In the first light-emitting stage, the driving circuit drives the first light-emitting element and the second light-emitting element to emit light;

[0587] In the second light-emitting stage, the driving circuit drives the first light-emitting element to emit light.

[0588] In at least one embodiment of the present invention, the pixel circuit further includes a first initialization circuit and a second initialization circuit; the shared display stage includes a first initialization stage disposed before the first light emission stage, and the pixel driving method includes: in the first initialization stage,

[0589] Under the control of the first initial control signal, the first initialization circuit writes the first initial voltage into the cathode of the first light-emitting element;

[0590] The second initialization circuit, under the control of the second initial control signal, writes the second initial voltage into the cathode of the second light-emitting element.

[0591] In at least one embodiment of the present invention, the pixel circuit further includes a first initialization circuit and a second initialization circuit; the privacy display stage includes a second initialization stage disposed before the second light emission stage, and the pixel driving method includes: in the second initialization stage,

[0592] Under the control of the first initialization circuit and the first initial control signal, the first initial voltage is written into the cathode of the first light-emitting element.

[0593] The display device described in this embodiment of the invention includes the pixel circuit described above.

[0594] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A pixel circuit, characterized in that, It includes a first light-emitting element, a second light-emitting element, and a driving circuit; The anode of the first light-emitting element is electrically connected to the first power supply voltage terminal, and the cathode of the first light-emitting element is electrically connected to the first terminal of the driving circuit. The anode of the second light-emitting element is electrically connected to the second power supply voltage terminal, and the cathode of the second light-emitting element is electrically connected to the first terminal of the driving circuit. The control terminal of the driving circuit is electrically connected to the first node, and the second terminal of the driving circuit is electrically connected to the second node. The driving circuit is used to generate a driving current under the control of the potential of the first node.

2. The pixel circuit as described in claim 1, characterized in that, The pixel circuit further includes a first light-emitting control circuit and a second light-emitting control circuit; the cathode of the first light-emitting element is electrically connected to the connection node through the first light-emitting control circuit, and the cathode of the second light-emitting element is electrically connected to the connection node through the second light-emitting control circuit. The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the cathode of the first light-emitting element and the connection node under the control of the first light-emitting control signal provided by the first light-emitting control terminal. The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the cathode of the second light-emitting element and the connection node under the control of the second light-emitting control signal provided by the second light-emitting control terminal. The connection node is electrically connected to the first terminal of the driving circuit; or... The pixel circuit also includes a first light-emitting control circuit and a second light-emitting control circuit. The first power supply voltage terminal is electrically connected to the anode of the first light-emitting element through the first light-emitting control circuit, and the second power supply voltage terminal is electrically connected to the anode of the second light-emitting element through the second light-emitting control circuit. The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element under the control of the first light-emitting control signal provided by the first light-emitting control terminal. The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal. Both the cathodes of the first and second light-emitting elements are electrically connected to a connection node, and the connection node is electrically connected to the first terminal of the driving circuit; or, The pixel circuit also includes a first light-emitting control circuit and a second light-emitting control circuit. The first power supply voltage terminal is electrically connected to the anode of the first light-emitting element through the first light-emitting control circuit, and the cathode of the second light-emitting element is electrically connected to the connection node through the second light-emitting control circuit; the cathode of the first light-emitting element is electrically connected to the connection node, and the first terminal of the driving circuit is electrically connected to the connection node. The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the first power supply voltage terminal and the anode of the first light-emitting element under the control of the first light-emitting control signal provided by the first light-emitting control terminal. The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit, under the control of the second light-emitting control signal provided by the second light-emitting control terminal, controls the connection or disconnection between the cathode of the second light-emitting element and the connection node. The pixel circuit also includes a first light-emitting control circuit and a second light-emitting control circuit. The cathode of the first light-emitting element is electrically connected to the connection node through the first light-emitting control circuit, and the second power supply voltage terminal is electrically connected to the anode of the second light-emitting element through the second light-emitting control circuit; the cathode of the second light-emitting element is electrically connected to the connection node, and the first terminal of the driving circuit is electrically connected to the connection node. The control terminal of the first light-emitting control circuit is electrically connected to the first light-emitting control terminal. The first light-emitting control circuit is used to control the connection or disconnection between the cathode of the first light-emitting element and the connection node under the control of the first light-emitting control signal provided by the first light-emitting control terminal. The control terminal of the second light-emitting control circuit is electrically connected to the second light-emitting control terminal. The second light-emitting control circuit is used to control the connection or disconnection between the second power supply voltage terminal and the anode of the second light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal.

3. The pixel circuit as described in claim 2, characterized in that, It also includes a first initialization circuit and a second initialization circuit; The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal and the cathode of the first light-emitting element, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the cathode of the first light-emitting element under the control of the first initial control signal provided by the first initial control terminal. The second initialization circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the cathode of the second light-emitting element, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the cathode of the second light-emitting element under the control of the second initial control signal provided by the second initial control terminal.

4. The pixel circuit as described in claim 3, characterized in that, The first initial voltage terminal and the second initial voltage terminal are the same voltage terminal; and / or, the first initial control terminal and the second initial control terminal are the same control terminal.

5. The pixel circuit as described in claim 2, characterized in that, It also includes a first initialization circuit; The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the first terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal.

6. The pixel circuit as described in claim 2, characterized in that, It also includes a third initialization circuit; The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first terminal of the drive circuit under the control of the third initial control signal provided by the third initial control terminal.

7. The pixel circuit as described in claim 2, characterized in that, It also includes on / off control circuitry; The connection node is electrically connected to the first terminal of the drive circuit through the on / off control circuit; The control terminal of the on / off control circuit is electrically connected to the on / off control terminal. The on / off control circuit is used to control the connection node and the first terminal of the drive circuit to be connected or disconnected under the control of the on / off control signal provided by the on / off control terminal.

8. The pixel circuit as described in claim 7, characterized in that, It also includes a first initialization circuit and a second initialization circuit; The first initialization circuit is electrically connected to the first initial control terminal, the first initial voltage terminal and the connection node, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the connection node under the control of the first initial control signal provided by the first initial control terminal; The second initialization circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the connection node, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the connection node under the control of the second initial control signal provided by the second initial control terminal.

9. The pixel circuit as described in claim 7, characterized in that, It also includes a third initialization circuit; The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first terminal of the drive circuit under the control of the third initial control signal provided by the third initial control terminal; or... The third initialization circuit is electrically connected to the third initial control terminal, the third initial voltage terminal, and the connection node, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the connection node under the control of the third initial control signal provided by the third initial control terminal.

10. The pixel circuit as described in claim 2, characterized in that, It also includes a first energy storage circuit, a setting circuit, a data writing circuit, a reset circuit, and a third light-emitting control circuit; The first end of the first energy storage circuit is electrically connected to the first node, and the second end of the first energy storage circuit is electrically connected to the second node. The first energy storage circuit is used to store electrical energy. The set circuit is electrically connected to the set control terminal, the reference voltage terminal and the first node respectively, and is used to write the reference voltage provided by the reference voltage terminal into the first node under the control of the set control signal provided by the set control terminal. The data writing circuit is electrically connected to the write control terminal, the data line and the first node respectively, and is used to write the data voltage provided by the data line to the first node under the control of the write control signal provided by the write control terminal; The reset circuit is electrically connected to the reset control terminal, the initial voltage terminal, and the second terminal of the drive circuit, respectively, and is used to write the initial voltage provided by the initial voltage terminal into the second terminal of the drive circuit under the control of the reset control signal provided by the reset control terminal. The third light-emitting control circuit is electrically connected to the first light-emitting control terminal, the second terminal of the driving circuit, and the first voltage terminal, respectively, and is used to control the connection or disconnection between the second terminal of the driving circuit and the first voltage terminal under the control of the first light-emitting control signal.

11. The pixel circuit as described in claim 2, characterized in that, It also includes a first energy storage circuit, a second energy storage circuit, a set circuit, a compensation control circuit, a data writing circuit, a reset circuit, and a third light-emitting control circuit; The first end of the first energy storage circuit is electrically connected to the second node, and the second end of the first energy storage circuit is electrically connected to the third node. The first energy storage circuit is used to store electrical energy. The first end of the second energy storage circuit is electrically connected to the third node, and the second end of the second energy storage circuit is electrically connected to the fourth node. The second energy storage circuit is used to store electrical energy. The set circuit is electrically connected to the set control terminal, the reference voltage terminal and the first node respectively, and is used to write the reference voltage into the first node under the control of the set control signal provided by the set control terminal; The compensation control circuit is electrically connected to the light-emitting control terminal, the first node and the fourth node respectively, and is used to control the connection between the first node and the fourth node under the control of the light-emitting control signal provided by the light-emitting control terminal. The data writing circuit is electrically connected to the write control terminal, the data line and the fourth node respectively, and is used to write the data voltage provided by the data line to the fourth node under the control of the write control signal provided by the write control terminal; The reset circuit is electrically connected to the set control terminal, the reference voltage terminal and the third node respectively, and is used to write the reference voltage into the third node under the control of the set control signal provided by the set control terminal; The third light-emitting control circuit is electrically connected to the light-emitting control terminal, the second node, and the first voltage terminal, respectively, and is used to control the connection between the second node and the first voltage terminal under the control of the light-emitting control signal.

12. The driving circuit as described in claim 2, 3, or 8, characterized in that, The first light-emitting element is a privacy light-emitting element, and the second light-emitting element is a normal display light-emitting element.

13. The pixel circuit as described in claim 12, characterized in that, The channel width-to-length ratio of the transistors included in the second light-emitting control circuit is smaller than that of the channel width-to-length ratio of the transistors included in the first light-emitting control circuit.

14. The pixel circuit as described in claim 12, characterized in that, The pixel circuit includes a first initialization circuit and a second initialization circuit. The voltage value of the first initial voltage is greater than the voltage value of the second initial voltage.

15. The driving circuit as described in claim 12, characterized in that, The pixel circuit includes a first initialization circuit and a second initialization circuit; the first power supply voltage terminal and the second power supply voltage terminal are different voltage terminals; The voltage value of the first power supply voltage signal provided by the first power supply voltage terminal is greater than the voltage value of the second power supply voltage signal provided by the second power supply voltage terminal; The voltage value of the first initial voltage is greater than or equal to the voltage value of the second initial voltage.

16. The pixel circuit according to any one of claims 1 to 11, characterized in that, The pixel circuit includes oxide transistors.

17. The pixel circuit as described in claim 2, characterized in that, The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor; The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the cathode of the first light-emitting element, and the second electrode of the first transistor is electrically connected to the first terminal of the driving circuit. The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the cathode of the second light-emitting element, and the second terminal of the second transistor is electrically connected to the first terminal of the driving circuit; or, The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor; The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first transistor is electrically connected to the anode of the first light-emitting element. The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the second power supply voltage terminal, and the second terminal of the second transistor is electrically connected to the anode of the second light-emitting element; or, The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor; The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first transistor is electrically connected to the anode of the first light-emitting element. The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the cathode of the second light-emitting element, and the second terminal of the second transistor is electrically connected to the first terminal of the driving circuit; or, The first light-emitting control circuit includes a first transistor, and the second light-emitting control circuit includes a second transistor; The gate of the first transistor is electrically connected to the first light-emitting control terminal, the first electrode of the first transistor is electrically connected to the cathode of the first light-emitting element, and the second electrode of the first transistor is electrically connected to the first terminal of the driving circuit. The gate of the second transistor is electrically connected to the second light-emitting control terminal, the first terminal of the second transistor is electrically connected to the second power supply voltage terminal, and the second terminal of the second transistor is electrically connected to the anode of the second light-emitting element.

18. A pixel driving method, applied to a pixel circuit as described in any one of claims 1 to 17, characterized in that, The display cycle includes a shared display phase and a privacy display phase; the shared display phase includes a first light-emitting phase, and the privacy display phase includes a second light-emitting phase; the pixel driving method includes: In the first light-emitting stage, the driving circuit drives the first light-emitting element and the second light-emitting element to emit light; In the second light-emitting stage, the driving circuit drives the first light-emitting element to emit light.

19. The pixel driving method as described in claim 18, characterized in that, The pixel circuit further includes a first initialization circuit and a second initialization circuit; the shared display stage includes a first initialization stage set before the first light-emitting stage, and the pixel driving method includes: in the first initialization stage... Under the control of the first initial control signal, the first initialization circuit writes the first initial voltage into the cathode of the first light-emitting element; The second initialization circuit, under the control of the second initial control signal, writes the second initial voltage into the cathode of the second light-emitting element.

20. The pixel driving method as described in claim 18, characterized in that, The pixel circuit further includes a first initialization circuit and a second initialization circuit; the privacy display stage includes a second initialization stage disposed before the second light emission stage, and the pixel driving method includes: in the second initialization stage... Under the control of the first initialization circuit and the first initial control signal, the first initial voltage is written into the cathode of the first light-emitting element.

21. A display device, characterized in that, Includes the pixel circuit as described in any one of claims 1 to 17.

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