Method for improving passivation of tunneling passivation back contact battery

Abstract

The invention discloses a method for improving passivation of a tunneling passivation back contact battery. Comprising the following steps. The method comprises the following steps of: performing double-sided polishing on an N-type silicon wafer; preparing a tunneling oxide layer and a polycrystalline silicon layer by adopting a low-pressure chemical vapor deposition method; performing boron doping to form a PN junction and a P-type polycrystalline silicon layer; performing wet etching; texturing and cleaning; preparation of double-sided aluminum oxide and silicon nitride layers; and silk-screen printing and sintering. When the tunneling oxide layer and the polycrystalline silicon layer are prepared by the low-pressure chemical vapor deposition method, a method of simultaneous purging of silane and an oxygen pipeline and purging of an independent oxygen pipeline is adopted, so that the interference of silicon powder on tunneling oxygen deposition can be effectively eliminated, and the defect state density of tunneling oxygen and a silicon wafer interface is remarkably reduced; and the coating integrity of the passivation layer on the surface of the silicon wafer is improved, so that the carrier recombination rate and the conversion efficiency of the tunneling passivation back contact battery are improved.

Description

Technical Field

[0001] This invention belongs to the field of solar cell technology, specifically relating to a method for improving the passivation of tunneling passivation back contact cells. Background Technology

[0002] With the global photovoltaic industry pursuing higher efficiency, tunneling passivation back contact cells, due to their unique back-side all-electrode and all-passivation structure, possess the advantages of no front-side shading (increasing short-circuit current) and low carrier recombination (increasing open-circuit voltage), have become one of the core directions for the commercialization of high-efficiency crystalline silicon cells. The realization of their high efficiency performance highly depends on the quality of the back-side "tunneling silicon oxide + doped polycrystalline silicon" passivation layer, with the deposition effect of the tunneling silicon oxide layer being the key factor determining passivation performance.

[0003] The tunneling silicon oxide layer (typically 1.5-3 nm thick) must simultaneously meet two core requirements: first, to ensure efficient transport of majority carriers through the quantum tunneling effect; and second, to suppress interfacial recombination by establishing dangling bonds on the saturated silicon substrate surface. Its deposition quality (thickness uniformity, density, and interfacial state density) directly affects the interfacial recombination rate and tunneling conductivity of the passivation layer, and also determines its interfacial compatibility with subsequent doped polycrystalline silicon layers. Poor quality can lead to increased contact resistance and deteriorated passivation stability.

[0004] Existing deposition processes are limited by insufficient thickness control precision and doping contamination, making it difficult to achieve a tunneling layer with high uniformity, low interface state density, and no pinholes. This has become a key bottleneck restricting the efficiency breakthrough and mass production yield improvement of tunneling passivation back contact cells. Therefore, researching a tunneling oxygen deposition process to improve the passivation performance of tunneling passivation back contact cells is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a method for improving the passivation of tunneling passivated back contact solar cells. This application employs a symmetrical purging method, namely, a purging method combining simultaneous silane and oxygen pipeline purging with separate oxygen pipeline purging. This effectively eliminates the interference of silicon powder on tunneling oxygen deposition, significantly reduces the defect state density at the tunneling oxygen-silicon wafer interface, and improves the integrity of the passivation layer's coverage of the silicon wafer surface. This optimizes the open-circuit voltage and fill factor of the tunneling passivated back contact solar cell, thereby improving the carrier recombination rate and conversion efficiency.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A method for improving the passivation of tunnel passivation back contact batteries includes the following steps: Step S1: Polish the N-type silicon wafer on both sides with polishing fluid to remove the mechanical damage layer and surface oil formed during the silicon wafer cutting process; Step S2: Low-pressure chemical vapor deposition (LPCVD) is used in a tube furnace to thermally oxidize the back side to form a tunneling oxide layer and a polycrystalline silicon layer; Step S3: Boron doping is performed using a boron diffusion furnace to form a PN junction and a P-type polycrystalline silicon layer; Step S4: Wet etching is performed on the laser-patterned area to expose the silicon substrate. Then, a tunneling oxide layer and a polysilicon layer are generated in the N region using low-pressure chemical vapor deposition. Phosphorus diffusion is then performed to form a heavily doped N-type polysilicon layer. Step S5: Use laser to isolate the P-region and N-region, then perform acid etching, texturing, and cleaning; Step S6: Prepare double-sided alumina and silicon nitride layers using atomic layer deposition and plasma-enhanced chemical vapor deposition, followed by screen printing and sintering; In step S2, during the low-pressure chemical vapor deposition process for generating the tunneling oxide layer and the polycrystalline silicon layer, silane and oxygen pipelines are purged simultaneously, and then the oxygen pipeline is purged separately.

[0007] Furthermore, the specific process for generating the tunneling oxide layer and the polycrystalline silicon layer in step S2 is as follows: Step S21: The silicon wafer is placed in a tube furnace using low-pressure chemical vapor deposition. After being placed in the furnace, the temperature is increased and oxygen is introduced. Oxidation is carried out sequentially at atmospheric pressure and low pressure to prepare a tunneling oxide layer. Step S22: Keep the pressure constant, increase the temperature, and introduce silane to deposit polycrystalline silicon; Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, purge the silane and oxygen lines; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

[0008] Furthermore, in step S21, the temperature is increased to 570-630℃; the oxygen flow rate is 25000-35000 sccm.

[0009] Furthermore, in step S21, the low voltage is 130-190 mTorr.

[0010] Furthermore, in step S22, the temperature is increased to 600-650°C; the flow rate of the introduced silane is 1300-1900 sccm.

[0011] Furthermore, the purging of the silane and oxygen lines in step S24 is divided into two steps, and the specific purging method is as follows: Step 1: Simultaneously purge the silane line with N2 at a flow rate of 1000-3000 sccm and the oxygen line with N2 at a flow rate of 1000-7000 sccm; Step 2: Purge the oxygen line separately with N2 at a flow rate of 1000-7000 sccm and then perform vacuuming.

[0012] Compared with the prior art, the positive and beneficial effects of this invention are as follows: (1) Traditional processes only purge the silane pipeline. Residual silicon powder is easily carried by the airflow at the end of the process into the unpurged oxygen pipeline and deposited. Therefore, this invention adds a symmetrical purging method, namely "simultaneous purging of silane and oxygen pipelines + separate purging of oxygen pipeline", which effectively avoids the problem of silicon powder being drawn into the oxygen pipeline in reverse due to the negative pressure of silane pipeline purging. It can directly remove the silicon powder that may diffuse into the oxygen pipeline inlet and inside during the silane pipeline purging process, and block the residue of silicon powder in the oxygen pipeline from the source. This avoids the silicon powder from clogging the pipeline or adhering to the silicon wafer surface during subsequent processes with oxygen transportation, thereby eliminating the risk of oxygen pipeline blockage.

[0013] (2) If silicon powder adheres to the surface of the silicon wafer, it will cause problems such as uneven thickness and pinhole defects in the tunneling oxygen film during the deposition process, thereby reducing the passivation effect. In this invention, oxygen pipeline purging is added when silane pipeline is purged. After the addition of oxygen pipeline purging, there is no silicon powder residue in the oxygen pipeline, and the purity and airflow stability of the transported oxygen are greatly improved, ensuring that the tunneling oxygen film is deposited uniformly and densely on the surface of the silicon wafer, thereby improving the deposition quality of tunneling oxygen and the crystal integrity of the polycrystalline silicon layer, and thus greatly enhancing the passivation effect.

[0014] (3) By adopting a symmetrical purging method, namely the purging method of "simultaneous purging of silane and oxygen pipelines + purging of oxygen pipeline", the present invention can effectively eliminate the interference of silicon powder on tunneling oxygen deposition, significantly reduce the defect state density at the interface between tunneling oxygen and silicon wafer, improve the integrity of the passivation layer on the silicon wafer surface, optimize the open circuit voltage and fill factor of the tunneling passivated back contact cell, and thus improve the carrier recombination rate and conversion efficiency of the tunneling passivated back contact cell. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the tunneling passivated back contact battery structure in this invention; Figure 2 This is a side view of the tubular furnace used in Embodiment 1, Comparative Example 1, and Comparative Example 2 of the present invention; Figure 3 This is a front view of the tubular furnace used in Embodiment 1, Comparative Example 1, and Comparative Example 2 of the present invention; Figure 4 This is a schematic diagram of the symmetrical synchronous purging of the silane tube in Embodiment 1 of the present invention, and a schematic diagram of the air intake during purging of the silane dense-sparse hole spray pipe 9, the equally spaced oxygen pipeline 10 and the silane dense-sparse hole spray pipe 11. Figure 5 These are schematic diagrams of the silane tube being purged individually in Comparative Examples 1 and 2 of the present invention, as well as schematic diagrams of air intake during purging of the silane dense-sparse hole spray pipe 9, the equally spaced oxygen pipeline 10, and the silane dense-sparse hole spray pipe 11. Figure 6 This is a PL (photoluminescence) pattern of the silicon wafer in Embodiment 1 of the present invention; Figure 7 This is a PL (photoluminescence) pattern of the silicon wafer in Embodiment 1 of the present invention; Figure 8 This is a PL (photoluminescence) pattern of the silicon wafer in Embodiment 1 of the present invention; Figure 9 This is a PL diagram of the silicon wafer in Comparative Example 1 of this invention when a large amount of silicon powder is present in the oxygen tube; Figure 10 This is a PL diagram of the silicon wafer when the oxygen pipe is blocked in Comparative Example 2 of the present invention; The component names corresponding to the labels in the above figures are as follows: 1. N-type silicon wafer; 2. P-region tunneling oxide layer; 3. P-region polycrystalline silicon layer; 4. N-region tunneling oxide layer; 5. N-region polycrystalline silicon layer; 6. Alumina layer; 7. Silicon nitride layer; 8. Electrode; 9. Silane dense-dip nozzle spray pipe; 10. Equally spaced oxygen pipeline; 11. Silane dense-dip nozzle spray pipe; 12. Silane dense-dip nozzle spray pipe. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0017] Example 1 A method for improving the passivation of tunnel passivation back contact batteries includes the following steps: Step S1: Polish both sides of the N-type silicon wafer using a low-concentration alkaline polishing solution to remove the mechanical damage layer and surface oil formed during the wafer cutting process, creating a flat and smooth surface. The surface reflectance is measured using a D8 reflectance meter, and is approximately 41%. The polishing solution mainly consists of a 1.9% sodium hydroxide solution and a 1.5% additive. The additive includes the following components by mass percentage: reaction promoter 0.5wt%-1wt%, corrosion and scale inhibitor 1wt%-3wt%, pH adjuster 2wt%-4wt%, defoamer 0.05wt%-1wt%, 1,3-bis(2-hydroxyethyl)-2-imidazolinone 0.05wt%-0.15wt%, 2 5-Furanyl dimethyl 0.03wt%-0.12wt%, Quinoline yellow 0.01wt%-0.06wt%, Sodium glycyrrhizate 0.01wt%-0.05wt%, Melamine 0.06wt%-0.11wt%, Hydroxypropyl chitosan 0.04wt%-0.1wt%, with the balance being deionized water; Step S2: A tunneling oxide layer and a polycrystalline silicon layer are generated on the back side by low-pressure chemical vapor deposition in a tube furnace using thermal oxidation. Step S3: Boron doping is performed using a boron diffusion furnace to form a PN junction and a P-type polycrystalline silicon layer: after evacuating to 120 mbar, nitrogen gas is introduced for purging, followed by a mixture of boron source gas, oxygen, and nitrogen gas (volume ratio 1:2.5:8). Diffusion is carried out at 950℃ and 120 mbar for 20 minutes with a boron source flow rate of 150 sccm. The resistivity of the P-type polycrystalline silicon layer sheet after diffusion is 130 Ω. Step S4: Wet etching is performed on the laser-patterned area to expose the silicon substrate. Then, a tunneling oxide layer and a polycrystalline silicon layer are formed in the N-region using low-pressure chemical vapor deposition in a tube furnace, followed by phosphorus diffusion to form a heavily doped N-type polycrystalline silicon layer. A 20W laser is used to pattern the front side of the silicon wafer at a scanning speed of 1500 mm / s and a patterning accuracy of 10 μm. Subsequently, a mixture of hydrofluoric acid and nitric acid with a volume ratio of 1:4 is used for etching at 25°C for 30 seconds. The wafer is then placed back into the tube furnace, where a 1.8 nm thick N-region tunneling oxide layer is formed at 615°C and atmospheric pressure. A 200 nm polycrystalline silicon layer is formed at 640°C and 180 mTorr for 70 minutes. Finally, phosphorus diffusion is performed at 860°C and 150 mbar for 60 minutes with a phosphorus source flow rate of 2000 sccm. The sheet resistance of the N-type polycrystalline silicon layer is 50 Ω. Step S5: Use a laser to isolate the P-region and N-region, then perform acid etching, texturing, and cleaning: Use a 12W laser to isolate the P-region and N-region, with a scanning speed of 3000mm / s, an isolation groove linewidth of 30μm, and a depth of 2μm; With the assistance of a 1.3% sodium hydroxide solution and a 0.5% additive (the same additive composition as in step S1), a pyramidal texturing structure is formed on the isolation area formed on the patterned surface of the silicon wafer and on the other side of the silicon wafer to increase the absorption of sunlight on the surface; Step S6: A 6 nm thick double-sided alumina layer is deposited at 210 °C using atomic layer deposition (ALD) at a deposition rate of 0.3 nm / cycle. Subsequently, a 70 nm thick silicon nitride layer is deposited on the front side and an 85 nm thick layer on the back side using plasma-enhanced chemical vapor deposition (PECVD) at 500 °C and 1800 mTorr, with a silane to ammonia flow rate ratio of 1:4 and a refractive index of 2.1. Finally, electrodes are printed onto the silicon wafer using screen printing, followed by sintering and photoinjection to form a tunneling passivated back contact cell. A schematic diagram of the cell's specific structure is shown below. Figure 1 As shown.

[0018] The specific process for generating the tunneling oxide layer and the polysilicon layer in step S2 is as follows: Step S21: After the silicon wafer is placed in the boat, it is heated to 615°C and then kept under normal pressure. Figure 2 Oxygen at 30,000 sccm was introduced into the 10 equally spaced oxygen pipelines for 10 min of oxidation. Then, the pressure was evacuated to 160 mTorr and the tubes were sealed for oxidation for 12 min to prepare the tunnel oxide layer. Step S22: Maintaining a low pressure of 160 mTorr, increase the temperature to 625°C. Figure 2 Silane is introduced into 1600 sccm through silane in silane spray pipe 9, silane spray pipe 11, and silane spray pipe 12 for polycrystalline silicon deposition. Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, perform a two-step purging process on the 9-hole silane spray tube, 11-hole silane spray tube, 12-hole silane spray tube, and 10 equally spaced oxygen lines: Step 1: Simultaneously purge the 9-hole silane spray tube, 11-hole silane spray tube, 12-hole silane spray tube, and 10 equally spaced oxygen lines with N2 at a flow rate of 3000 sccm; Step 2: Then, separately purge the 10 equally spaced oxygen lines with N2 at a flow rate of 3500 sccm before vacuuming. The specific purging method is as follows... Figure 4 As shown; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

[0019] Example 2 In this embodiment, a method for improving the passivation of tunnel passivation back contact battery is the same as the steps in embodiment 1, except for step S2. The specific process for generating the tunneling oxide layer and the polysilicon layer in step S2 is as follows: Step S21: After the silicon wafer is placed in the boat, it is heated to 615°C and then kept under normal pressure. Figure 2 Oxygen at 30,000 sccm was introduced into the 10 equally spaced oxygen pipelines for 10 min of oxidation. Then, the pressure was evacuated to 160 mTorr and the tubes were sealed for oxidation for 12 min to prepare the tunnel oxide layer. Step S22: Maintaining a low pressure of 160 mTorr, increase the temperature to 625°C. Figure 2 Silane is introduced into 1600 sccm through silane in silane spray pipe 9, silane spray pipe 11, and silane spray pipe 12 for polycrystalline silicon deposition. Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, perform a two-step purging process on the 9-hole silane spray tube, 11-hole silane spray tube, 12-hole silane spray tube, and 10 equally spaced oxygen line: Step 1: Simultaneously purge the 9-hole silane spray tube, 11-hole silane spray tube, 12-hole silane spray tube, and 10 equally spaced oxygen line with N2 at a flow rate of 1000 sccm; Step 2: Then, separately purge the 10 equally spaced oxygen line with N2 at a flow rate of 3500 sccm before vacuuming. The specific purging method is as follows: Figure 4 As shown; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

[0020] Example 3 In this embodiment, a method for improving the passivation of tunnel passivation back contact battery is the same as the steps in embodiment 1, except for step S2. The specific process for generating the tunneling oxide layer and the polysilicon layer in step S2 is as follows: Step S21: After the silicon wafer is placed in the boat, it is heated to 615°C and then kept under normal pressure. Figure 2 Oxygen at 30,000 sccm was introduced into the 10 equally spaced oxygen pipelines for 10 min of oxidation. Then, the pressure was evacuated to 160 mTorr and the tubes were sealed for oxidation for 12 min to prepare the tunnel oxide layer. Step S22: Maintaining a low pressure of 160 mTorr, increase the temperature to 625°C. Figure 2Silane is introduced into 1600 sccm through silane in silane spray pipe 9, silane spray pipe 11, and silane spray pipe 12 for polycrystalline silicon deposition. Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, perform a two-step purging process on the 9-hole silane spray tube, 11-hole silane spray tube, 12-hole silane spray tube, and 10 equally spaced oxygen lines: Step 1: Simultaneously purge the 9-hole silane spray tube, 11-hole silane spray tube, 12-hole silane spray tube, and 10 equally spaced oxygen lines with N2 at a flow rate of 3000 sccm. Step 2: Then, separately purge the 10 equally spaced oxygen lines with N2 at a flow rate of 7000 sccm before vacuuming. The specific purging method is as follows... Figure 4 As shown; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

[0021] Comparative Example 1 A method for improving the passivation of tunneling passivation back contact batteries is the same as in Example 1, except that step S2 is different. The specific process of step S2 in this comparative example is as follows: Step S21: After the silicon wafer is placed in the boat, it is heated to 615°C. First, oxygen is introduced at 30000 sccm under normal pressure for 10 min for oxidation. Then, vacuum is applied to a pressure of 160 mTorr for tube-sealing oxidation for 12 min to prepare a tunnel oxide layer. Step S22: Keep the low pressure of 160mTorr constant, raise the temperature to 625°C, and introduce 1600sccm of silane to deposit polycrystalline silicon. Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, purge the silane lines: purge the silane spray pipes 9, 11, and 12 with N2 at a flow rate of 3000 sccm, then evacuate the system. The purging method is as follows: Figure 5 As shown; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

[0022] Comparative Example 2 A method for improving the passivation of tunneling passivation back contact batteries is the same as in Example 1, except that step S2 is different. The specific process of step S2 in this comparative example is as follows: Step S21: After the silicon wafer is placed in the boat, it is heated to 615°C. First, oxygen is introduced at 30000 sccm under normal pressure for 10 min for oxidation. Then, vacuum is applied to a pressure of 160 mTorr for tube-sealing oxidation for 12 min to prepare a tunnel oxide layer. Step S22: Keep the low pressure of 160mTorr constant, raise the temperature to 625°C, and introduce 1600sccm of silane to deposit polycrystalline silicon. Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, perform a two-step purging of the silane and oxygen lines: First, purge the silane orifice spray pipes 9, 11, and 12 with N2 at a flow rate of 3000 sccm. Then, separately purge the oxygen line 10 with N2 at a flow rate of 3500 sccm before vacuuming. The purging method is as follows: Figure 5 As shown; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

[0023] PL (photoluminescence) tests were performed on the silicon wafers after diffusion treatment in Examples 1-3, Comparative Example 1 and Comparative Example 2. The specific results are shown in Table 1.

[0024] Table 1. PL test results of silicon wafers after diffusion treatment in Examples 1-3 and Comparative Examples 1 and 2

[0025] As shown in Table 1, when the process scheme in Example 1 is adopted, the air intake method during purging of the silane and oxygen pipelines is as follows: Figure 4 As shown, after the two-step purging of the silane and oxygen lines, there was no significant amount of silicon powder or blockage in the oxygen line. This effectively prevented the backflow of silicon powder into the oxygen line caused by the negative pressure during silane line purging. Silicon powder that might have diffused into the oxygen line inlet and interior during the silane line purging process was promptly removed, preventing silicon powder residue in the oxygen line from the source. This avoids silicon powder clogging the line or adhering to the wafer surface during subsequent processes. The passivation effect of the wafers in various areas of the furnace tube showed no abnormally low values, with an overall average of 20822. (PL image shown). Figure 6 As shown; when using the process scheme of Comparative Example 1, the gas inlet method for silane pipeline purging is as follows. Figure 5 As shown, without purging the oxygen line and only purging the silane line, a large amount of silicon powder will enter the oxygen line. The presence of a large amount of silicon powder in the oxygen line will worsen the overall passivation effect of the tunneling passivation back contact cell, with an overall average value of 8461. (PL image shown). Figure 7As shown, the presence of a large amount of silicon powder on the silicon wafer surface leads to a significant decrease in the passivation effect of the tunneling passivation back contact cell; when using the process scheme of Comparative Example 2, the gas intake method during purging of the silane pipeline and oxygen pipeline is as follows. Figure 5 As shown, a large amount of silicon powder in the silane inlet pipe will enter the oxygen pipe, and then the oxygen pipe (inlet from the furnace tail) will be purged. This will cause silicon powder in the furnace tail area to be blown towards the furnace mouth, which will lead to blockage of the oxygen spray holes in the furnace mouth and the middle of the furnace. This will result in a thinner oxide layer deposition quality on the silicon wafers in the furnace mouth and the middle of the furnace, and a poorer passivation effect. The values ​​are 15740 and 16483, as shown in the PL image. Figure 8 As shown, Figure 8 The grayish areas in the middle are due to uneven oxygen deposition quality during tunneling.

[0026] The oxide layer thickness of the TBC batteries prepared in Examples 1-3, Comparative Examples 1 and 2 was measured by using a full-spectrum ellipsometer to measure the change in polarization state after polarized light is reflected from the sample surface. The oxide layer thickness was calculated by combining the optical model and tested. The specific test results are shown in Table 2.

[0027] Table 2. Oxide layer thickness test results of TBC batteries prepared in Examples 1-3 and Comparative Examples 1 and 2

[0028] As shown in Table 2, in Example 1, the oxide layer thickness showed no significant difference across regions, with an average of 1.621 nm. In Comparative Example 1, when a large amount of silicon powder was present in the oxygen pipe, the overall oxide layer thickness did not change significantly, with an average of 1.620 nm, but the appearance and passivation quality were poor. In Comparative Example 2, when the oxygen pipe was partially blocked, it caused blockages at the furnace opening and within the furnace. The corresponding PL diagrams are shown below. Figure 8 As shown, the thickness of the bright PL region at the edge is 1.623-1.622 nm, the thickness of the dark PL region at the edge is 1.539-1.571 nm, and the thickness of the middle region is 1.521 nm. The bright PL region has a good edge passivation effect, while the dark PL region has a poor edge and middle passivation effect.

[0029] The TBC batteries prepared in Example 1, Comparative Example 1, and Comparative Example 2 were tested for electrical performance using an EL tester. The results are as follows: photoelectric conversion efficiency Eta, open circuit voltage Uoc, short circuit current Isc, and fill factor FF. The specific results are shown in Table 3.

[0030] Table 3 Performance test results of TBC solar cells prepared in Examples 1-3 and Comparative Examples 1 and 2

[0031] As shown in Table 3, the performance data of the battery in Example 1 of this invention are superior to those of Comparative Example 1 and Comparative Example 2. Compared with Comparative Example 1, the conversion efficiency of the battery in Example 1 increased by 0.885%; compared with Comparative Example 2, the conversion efficiency of the battery in Example 1 increased by 0.775%. This is mainly because the poor tunneling oxide deposition quality caused by the large amount of silicon powder deposition in Comparative Example 1 resulted in poor passivation under PL, which in turn led to a serious decrease in its photoelectric conversion efficiency. In Comparative Example 2, the poor oxide layer deposition quality of some silicon wafers at the furnace mouth and in the furnace led to a lower overall battery efficiency.

[0032] In summary, this invention, through the steps of "simultaneous purging of silane and oxygen pipelines + separate purging of the oxygen pipeline," effectively avoids the problem of silicon powder being drawn back into the oxygen pipeline due to negative pressure during silane pipeline purging. It directly and promptly removes silicon powder that may diffuse into the oxygen pipeline inlet and interior during the silane pipeline purging process, preventing silicon powder residue in the oxygen pipeline from the source. This avoids silicon powder clogging the pipeline or adhering to the silicon wafer surface during subsequent processes, thus eliminating the risk of oxygen pipeline blockage. Furthermore, given that silicon powder adhering to the silicon wafer surface can cause uneven thickness and pinhole defects in the tunneling oxygen film during deposition, this invention also addresses the issue of silicon powder adhering to the silicon wafer surface. This reduces the passivation effect. After purging with the new oxygen pipeline, there is no silicon powder residue in the oxygen pipeline, and the stability of the delivered oxygen flow is greatly improved. This ensures that the tunneling oxygen film is deposited uniformly and densely on the silicon wafer surface, thereby improving the deposition quality of tunneling oxygen and the crystal integrity of the polycrystalline silicon layer, and thus greatly enhancing the passivation effect. Finally, by eliminating the interference of silicon powder on tunneling oxygen deposition, the defect state density at the tunneling oxygen-silicon wafer interface is significantly reduced, and the integrity of the passivation layer covering the silicon wafer surface is improved. This optimizes the open-circuit voltage and fill factor of the battery, thereby improving the carrier recombination rate and conversion efficiency of the tunneling passivated back contact battery.

[0033] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for improving the passivation of tunnel passivation back contact batteries, characterized in that, Includes the following steps: Step S1: Polish the N-type silicon wafer on both sides to remove the mechanical damage layer and surface oil formed during the silicon wafer cutting process; Step S2: A tunneling oxide layer and a polycrystalline silicon layer are generated on the back side by thermal oxidation using low-pressure chemical vapor deposition. Step S3: Boron doping is performed using a boron diffusion furnace to form a PN junction and a P-type polycrystalline silicon layer; Step S4: Wet etching is performed on the laser-patterned area to expose the silicon substrate. Then, a tunneling oxide layer and a polysilicon layer are generated in the N region using low-pressure chemical vapor deposition. Phosphorus diffusion is then performed to form a heavily doped N-type polysilicon layer. Step S5: Use laser to isolate the P-region and N-region, then perform acid etching, texturing, and cleaning; Step S6: Prepare double-sided alumina and silicon nitride layers using atomic layer deposition and plasma-enhanced chemical vapor deposition, followed by screen printing and sintering; In step S2, during the low-pressure chemical vapor deposition process for generating the tunneling oxide layer and the polycrystalline silicon layer, silane and oxygen pipelines are purged simultaneously, and then the oxygen pipeline is purged separately.

2. The method for improving the passivation of tunneling passivation back contact batteries according to claim 1, characterized in that, The specific process for generating the tunneling oxide layer and the polycrystalline silicon layer in step S2 is as follows: Step S21: After the silicon wafer is placed in the boat, it is heated and oxygen is introduced. It is oxidized sequentially under normal pressure and low pressure to prepare a tunneling oxide layer. Step S22: Keep the pressure constant, increase the temperature, and introduce silane to deposit polycrystalline silicon; Step S23: After the polycrystalline silicon deposition is completed, a vacuum is drawn. Step S24: After vacuuming, purge the silane and oxygen lines; Step S25: After purging, cool down to 560℃ and return to normal pressure before unloading.

3. The method for improving the passivation of tunneling passivation back contact batteries according to claim 2, characterized in that, In step S21, the temperature is raised to 570-630℃; the oxygen flow rate is 25000-35000 sccm.

4. The method for improving the passivation of tunneling passivation back contact batteries according to claim 2, characterized in that, In step S21, the low pressure is 130-190 mTorr.

5. The method for improving the passivation of tunneling passivation back contact batteries according to claim 2, characterized in that, In step S22, the temperature is raised to 600-650℃; the flow rate of silane introduced is 1300-1900 sccm.

6. The method for improving the passivation of tunneling passivation back contact batteries according to claim 2, characterized in that, The purging of the silane pipeline and the oxygen pipeline in step S24 is divided into two steps. The specific purging method is as follows: Step 1: Simultaneously introduce N2 with a flow rate of 1000-3000 sccm to purge the silane pipeline and N2 with a flow rate of 1000-7000 sccm to purge the oxygen pipeline. Step 2: After purging the oxygen line with N2 at a flow rate of 1000-7000 sccm, a vacuum is then created.

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