Hard mask layer structure for silicon carbide substrate ion implantation and ion implantation method
By using an amorphous carbon film layer as a hard mask layer structure on a silicon carbide substrate, combined with PECVD and a self-cleaning system, the problems of low throughput, high cost and low etching selectivity in the silicon carbide substrate ion implantation process are solved, achieving a highly efficient and economical ion implantation effect.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2026-03-13
AI Technical Summary
In the existing technology, the ion implantation process for silicon carbide substrates has problems such as low throughput, high cost and low etching selectivity, especially when using polysilicon layers as hard mask layers, which leads to increased production efficiency and economic costs.
An amorphous carbon film layer is used as the main structure of the hard mask layer. This includes forming a first silicon oxide layer, an amorphous carbon film layer, and a second silicon oxide layer sequentially on a silicon carbide substrate. The amorphous carbon film layer is deposited by PECVD. PECVD and RPS self-cleaning system are used to improve production efficiency. Etching is performed using oxygen and fluorine-containing gases. The thickness of the photoresist layer is optimized to improve the selectivity.
It improves production efficiency, reduces costs, and eliminates the need for additional process equipment, achieving high selectivity ion implantation results and increasing capacity and etching efficiency.
Smart Images
Figure CN121666050A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor coating technology, and in particular to a hard mask layer structure and ion implantation method for ion implantation on a silicon carbide substrate. Background Technology
[0002] Currently, in the manufacturing process of semiconductor SiC devices, due to the low diffusion coefficient of SiC material, a reasonable diffusion coefficient can only be obtained above 2000℃. Therefore, unlike Si materials, high-temperature diffusion processes cannot be used for elemental doping. Ion implantation is the only option for SiC doping. Ion implantation is used to locally dope the epitaxial region to construct the active region. Only a portion of the region needs to be doped, and a hard mask layer is required to block ions outside the implanted region. On the other hand, due to the high energy and dose of ion implantation, the substrate surface will suffer a lot of lattice damage when directly bombarded. Therefore, a protective layer is needed above the implanted area of the substrate for protection.
[0003] The pattern is exposed using a photoresist (PR) layer of 400, and then transferred to the underlying hard mask (HM) layer through an etching process. The HM acts as a barrier during ion implantation. The effect is shown in the image below. Figure 1 and Figure 2 An ion implantation mask layer generally consists of two parts. The first part is a protective layer, also known as a stop layer, separation layer, or sacrificial layer. It is typically used as a stop layer to prevent the etching gas from directly etching the epitaxial layer and causing damage. It also protects the SiC surface during ion implantation, preventing direct ion bombardment and increased surface roughness. This layer is often made of silicon dioxide (SiO2, also known as OX, hereinafter referred to as OX), and is therefore also called a sacrificial oxide layer. Figure 1 and Figure 2 The first silicon oxide layer is 200; the second part is HM, on which patterns are etched to block ion implantation.
[0004] As can be seen from the above process, the HM layer in contact with the protective layer requires an etching stop signal to halt etching. Therefore, if the protective layer is OX, the contacting HM cannot be OX; otherwise, etching cannot be stopped. Based on this, in addition to a single-layer structure, the HM can also use a composite layer structure, such as polysilicon (poly) + OX, poly + silicon nitride (SIN), etc. The more layers selected, the more complex the subsequent etching process becomes, and the higher the cost of frequent equipment switching. The protective layer is not limited to OX; it can also be poly or SiN, etc., with the same logic: the portion of the upper HM adjacent to the protective layer cannot be the same layer.
[0005] like Figure 1 and Figure 2In current HM structure selection, a 0.1μm OX + 2μm poly composition, or a 0.1μm OX + 0.2μm poly + 1.8μm OX structure, or other thicknesses of poly + OX, poly + SiN composition are generally chosen. Current film structures dominated by polycrystalline silicon layers 300 or polycrystalline silicon composite layers have the following problems:
[0006] 1. Low production capacity: Generally, furnace tube equipment is used to decompose SiH4 at high temperature to obtain a polycrystalline silicon layer and deposit it on the substrate surface. Taking the ASMA400D model single furnace tube equipment as an example, a maximum of 150 wafers can be processed at a time. However, there is a long time for transport and heating and cooling before and after coating. The coating rate is about 10nm / min. It takes about 8 hours to deposit a 1μm thick polycrystalline silicon layer. The required polycrystalline silicon layer thickness is usually 2μm. If a 2μm thick layer is grown, the dummy wafer film layer is easy to grow and stick together on the wafer boat, which requires manual removal. Therefore, a 2μm thick polycrystalline silicon layer is often grown in two separate processes.
[0007] Furthermore, since the furnace tube equipment lacks a self-cleaning system, nitrogen (N2) is used to blow off the easily detachable film layer inside the furnace tube wall. However, most of the film layer cannot be blown off and requires manual PM (preventive maintenance). The PM cycle is performed once every 20μm of polysilicon layer thickness, and each PM cycle takes 8 hours. The total time for one 2μm polysilicon layer is 16.8 hours, which translates to a daily production capacity of 214 pcs (waferper day). If a composite film layer is selected, and the polysilicon layer is thinner, such as 0.2μm, the overall time does not change much, but a single heating and cooling cycle of the polysilicon layer still requires 4-5 hours.
[0008] 2. High cost: On the one hand, the high frequency of PM (partial photomask) requires a certain amount of manpower; on the other hand, furnace tubes have poor flexibility. When the production capacity is less than 50 wafers or even less, using furnace tubes will still require one long film-making cycle. In addition to HM (high-performance mask), polysilicon can also be used to make the polysilicon gate of SiC MOSFETs, which will also occupy furnace tube capacity. Using polysilicon as a hard mask layer requires the purchase of a large number of polysilicon machines to meet the production capacity.
[0009] 3. Low etching selectivity: During the etching of polysilicon layers, the photoresist layer serves as a mask layer for the polysilicon layer. The etching selectivity ratio between polysilicon and photoresist is 3:1. Therefore, when etching 2μm polysilicon, 2μm of photoresist is generally required on top.
[0010] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention
[0011] The purpose of this invention is to provide a hard mask layer structure and ion implantation method for silicon carbide substrate ion implantation, so as to solve the problems of low throughput, high cost and low etching selectivity.
[0012] To address the aforementioned technical problems, this invention provides a hard mask layer structure for ion implantation on a silicon carbide substrate, used for ion implantation, comprising:
[0013] silicon carbide substrate;
[0014] An amorphous carbon film layer is disposed on top of the silicon carbide substrate, and a first silicon oxide layer is disposed between the silicon carbide substrate and the amorphous carbon film layer to protect the silicon carbide substrate.
[0015] A second silicon oxide layer is disposed on top of the amorphous carbon film layer.
[0016] Preferably, the sum of the thicknesses of the amorphous carbon film layer and the second silicon oxide layer is not less than 1.5 μm.
[0017] Preferably, the amorphous carbon film layer is formed by PECVD deposition.
[0018] Preferably, the working gas for PECVD deposition of the amorphous carbon film includes a reactant gas and a carrier gas, wherein the reactant gas includes at least one hydrocarbon compound and the carrier gas is argon or helium.
[0019] Preferably, the working gas for PECVD deposition of the amorphous carbon film includes a reactive gas, a carrier gas, and a silicon-doped gas to form a silicon-containing amorphous carbon film.
[0020] Preferably, the silicon doping ratio of the silicon-doped gas is less than 20%.
[0021] Based on the same technical concept, the present invention also provides an ion implantation method, employing the above-mentioned hard mask layer structure for ion implantation on a silicon carbide substrate, comprising the following steps:
[0022] A silicon carbide substrate is provided, and a first silicon oxide layer, an amorphous carbon film layer, and a second silicon oxide layer are sequentially formed on the top of the silicon carbide substrate;
[0023] A patterned photoresist layer is formed on top of the second silicon oxide layer, the second silicon oxide layer is etched through the photoresist layer, and then the amorphous carbon film layer is etched through the second silicon oxide layer.
[0024] Ion implantation is performed on the exposed areas of the amorphous carbon film to dope ions in the silicon carbide substrate.
[0025] Preferably, the gas used to etch the amorphous carbon film includes oxygen.
[0026] Preferably, the gas used to etch the amorphous carbon film also includes 5% COS or 5% HBr.
[0027] Preferably, the second silicon oxide layer is etched using a fluorine-containing gas.
[0028] Preferably, the thickness of the photoresist layer is positively correlated with the thickness of the second silicon oxide layer.
[0029] The silicon carbide substrate ion implantation hard mask layer structure provided by the present invention uses an amorphous carbon mask as the main structure of the hard mask layer to perform ion doping on the silicon carbide substrate. It has the advantages of high production capacity, low cost, no need for additional process equipment and high selectivity, as detailed below.
[0030] 1. High Capacity: Amorphous carbon masks can be deposited using PECVD. For example, using the AMATproducer APF two-piece chamber with an internal RPS (remote plasma clean) self-cleaning system, after deposition of 1.8μm, the chamber automatically runs a cleaning cycle to remove the inner wall film layer, extending the PM cycle. Each PM cycle can process 4000 2μm amorphous carbon masks. The hourly capacity is 8 masks, and with 85% uptime, the daily WPD is 163.2 masks. The chamber equipment can share a common transfer chamber, which can be paired with 1-3 process chambers, allowing for flexible configuration based on capacity. This significantly increases WPD for the same area; with a 3-chamber configuration, the daily WPD reaches 489.6 masks.
[0031] 2. Low cost: Amorphous carbon masks can be deposited using PECVD, offering flexibility for cavity equipment. Only two masks are deposited at a time, minimizing equipment waste during insufficient production capacity. Furthermore, the etching gas for amorphous carbon masks is primarily O2, while polysilicon etching gases mainly consist of Cl2, SF6, etc. Compared to halogen specialty gases, O2 has lower usage costs. In the final removal process, compared to using HNO3 for polysilicon structures, O2 is used for amorphous carbon masks, making the removal process simpler and more cost-effective.
[0032] 3. No need to add new process equipment: In the existing SiC FAB, carbon film is used as a high-temperature annealing protective layer for ion activation, and it belongs to the front-end equipment without metal contamination. Therefore, the carbon film forming equipment can be used for HM without metal contamination and can be shared with other equipment. The equipment capacity can be fully utilized without adding new equipment. If the equipment capacity is insufficient in the future, only the cavity needs to be added.
[0033] 4. High selectivity: The etching source for the second silicon oxide layer is a fluorine-containing gas, such as CF4, while the etching source for the amorphous carbon mask is O2. Neither O2 (nor O plasma) reacts with the second silicon oxide layer; only oxygen ions physically etch the surface of the second silicon oxide layer, resulting in extremely high selectivity. Therefore, the second silicon oxide layer above the amorphous carbon mask can be made relatively thin. The photoresist layer above the second silicon oxide layer only requires etching 0.2 μm of the second silicon oxide layer. The etching selectivity ratio between the second silicon oxide layer and the photoresist layer is 3:1, allowing the photoresist layer to also be made relatively thin. A thinner photoresist layer saves time and material costs, and also prevents the photoresist layer from tilting or collapsing in smaller process sizes with higher aspect ratios.
[0034] The ion implantation method provided by this invention and the hard mask layer structure for ion implantation on silicon carbide substrates provided by this invention belong to the same inventive concept. Therefore, the ion implantation method provided by this invention has at least all the advantages of the hard mask layer structure for ion implantation on silicon carbide substrates provided by this invention, which will not be repeated here. Attached Figure Description
[0035] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:
[0036] Figure 1 It is a mask layer structure in existing technology;
[0037] Figure 2 This is a schematic diagram of ion implantation of a mask layer structure in the prior art;
[0038] Figure 3 This is a schematic diagram of a mask layer according to an embodiment of the present invention;
[0039] Figure 4 This is a schematic diagram of ion implantation of a mask layer structure according to an embodiment of the present invention;
[0040] Figure 5 This is a flowchart of an embodiment of the present invention.
[0041] In the attached image:
[0042] 100. Silicon carbide substrate; 200. First silicon oxide layer; 300. Polycrystalline silicon layer; 400. Photoresist layer; 500. Amorphous carbon mask; 600. Second silicon oxide layer. Detailed Implementation
[0043] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.
[0044] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; the term “at least two” is generally used to mean “two or more”; furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," and "third" may explicitly or implicitly include one or at least two of those features. The term "proximal" typically refers to the end closer to the operator, and the term "distal" typically refers to the end closer to the patient. "One end" and "the other end," as well as "proximal" and "distal," generally refer to two corresponding parts, including not only endpoints. The terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can be fixed connections, detachable connections, or integral connections; they can be mechanical connections or electrical connections; they can be direct connections or indirect connections through an intermediate medium; they can be internal connections between two elements or interactions between two elements. Furthermore, as used in this invention, the placement of one element on another element generally only indicates a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of another element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0045] The inventors discovered that the limitations of the furnace tube equipment itself lead to a high production cost for growing polycrystalline silicon hard masks of the required thickness. In addition, other devices also have certain requirements for polycrystalline silicon growth. For example, the production capacity of the furnace tube equipment is difficult to balance the growth of hard mask layers and the formation of polycrystalline silicon gates. Therefore, using polycrystalline silicon layers and polycrystalline silicon composite films as hard mask layers has the problems of low production capacity and high cost.
[0046] Based on this, the core idea of this invention is to use an amorphous carbon mask as the main structure of the hard mask layer to ion-dope silicon carbide substrates, thereby effectively reducing production costs and increasing production capacity.
[0047] For details, please refer to Figures 2-5 This is a schematic diagram of an embodiment of the present invention. Figure 5 As shown, a hard mask layer structure for ion implantation on a silicon carbide substrate includes:
[0048] Silicon carbide substrate 100;
[0049] An amorphous carbon mask 500 is disposed on top of the silicon carbide substrate 100, and a first silicon oxide layer 200 is disposed between the silicon carbide substrate 100 and the amorphous carbon mask 500 to protect the silicon carbide substrate 100.
[0050] A second silicon oxide layer 600 is disposed on top of the amorphous carbon mask 500.
[0051] like Figure 3 As shown, an amorphous carbon mask 500 with an added second silicon oxide layer 600 replaces the structure of all-polycrystalline silicon or polycrystalline silicon plus silicon oxide as a hard mask. The amorphous carbon mask 500 is composed of a certain proportion of SP3 hybridized and SP2 hybridized C and a portion of H. Its atomic structure exhibits short-range order and long-range disorder, effectively blocking ions and preventing them from penetrating the film layer into the underlying epitaxial silicon carbide substrate 100 region, making it an excellent ion implantation barrier layer. The amorphous carbon mask 500 can be deposited using the PECVD method. The deposition equipment is a cavity structure, such as the AMATproducerAPF two-piece cavity, which can grow two wafers simultaneously at a time.
[0052] For example, the working gas for PECVD deposition of the amorphous carbon film includes a reactant gas and a carrier gas. The reactant gas includes at least one hydrocarbon, and the carrier gas is argon or helium. The reactant gas can be one or two hydrocarbon gases such as alkanes, alkenes, and alkynes (C2H2, C2H4, C3H6, etc.), and the carrier gas dilution gas is argon (Ar) or helium (He). At a reaction temperature of 300℃-400℃, the carbon film generated by PECVD using hydrocarbons as the reactant gas contains carbon and hydrogen components, with CH present in sp2 and sp3 bonded forms. Compared to carbon films generated by PVD sputtering, the PECVD composition contains additional H, which effectively alleviates stress, resulting in a higher quality carbon film.
[0053] Furthermore, the working gas for PECVD deposition of the amorphous carbon film includes a reactive gas, a carrier gas, and a silicon-doped gas to form a silicon-containing amorphous carbon film. To improve carbon film stress, Si components can be added to the original PECVD hydrocarbon reactive gas and argon carrier gas to form Si-DLC (silicon-containing amorphous carbon film). Due to the large atomic radius of Si, it is not easy to form sp2 bonds, but it is easy to form sp3 bonds to combine with C, which can effectively increase the sp3 / sp2 ratio in ACHM. At the same time, the sp3 of Si is not easily converted. Compared with pure ACHM, where the sp3 bonds of C gradually convert to sp2 bonds between 400℃ and 450℃ and are affected by heat, Si-ACHM can increase the temperature to 600℃, improving thermal stability. The Si-C bond energy is lower than the C-C bond energy, which can relax the distortion of C bonds around Si bonds, reduce carbon film stress, and also improve the flatness / uniformity of the carbon film. The pattern uniformity obtained by implantation etching is better.
[0054] More preferably, the silicon doping ratio of the silicon-doped gas is less than 20%. The Si doping ratio is controlled below 20%, as excessively high Si content affects thermal stability, and the film properties become dominated by Si characteristics. The Si-doped gas can be TMS (tetramethylsilane), SiH4 (silane), or other Si-containing compounds, with TMS being preferred due to its easy dissociation and higher safety compared to SiH4. The reference gas flow rates for 10% Si-DLC are C2H2 200 sccm, TMS 20 sccm, and Ar 2000 sccm.
[0055] Furthermore, ion doping using the aforementioned hard mask structure offers advantages such as high throughput, low cost, high selectivity, and no need for additional process equipment, as detailed below.
[0056] As described above, amorphous carbon masks 500 can be deposited using the PECVD method. Employing an AMATproducerAPF two-piece chamber with an internal RPS (remote plasma clean) self-cleaning system, the chamber automatically runs a cleaning cycle after deposition of 1.8 μm to remove the inner wall film layer, extending the PM cycle. Each PM cycle can process 4000 2 μm amorphous carbon masks 500. The hourly capacity is 8 wafers, and with 85% uptime, the daily WPD is 163.2 wafers. The chamber equipment can share a common transfer chamber, which can be used with 1-3 process chambers, allowing for flexible configuration based on production capacity. This significantly increases WPD for the same area.
[0057] On the other hand, the amorphous carbon mask 500 can be deposited using the PECVD method, offering flexibility for cavity equipment deposition. Only two masks are deposited at a time, preventing excessive equipment waste when production capacity is insufficient. Furthermore, during etching, the amorphous carbon mask 500 primarily uses O2 as the etching gas, while polysilicon etching gases mainly consist of Cl2, SF6, etc. Compared to halogen specialty gases, O2 has lower usage costs. In the final removal process, compared to using HNO3 for polysilicon structures, the amorphous carbon mask 500 uses O2 for removal, making the removal process simpler and more cost-effective.
[0058] In addition, existing SiC FABs use carbon films as a high-temperature annealing protective layer for ion activation, and are made on front-end metal-free equipment. Therefore, the carbon film forming equipment can be used for HM without metal contamination and can be shared with other equipment, making full use of the equipment's capacity without the need for new equipment. If the equipment's capacity is insufficient in the future, only the cavity needs to be added.
[0059] The etching source for the second silicon oxide layer 600 is a fluorine-containing gas, such as CF4, while the etching source for the amorphous carbon mask 500 is O2. Neither O2 (nor O plasma) reacts with the second silicon oxide layer 600; only oxygen ions physically etch the surface of the second silicon oxide layer 600 during the process. This selectivity is extremely high, allowing the second silicon oxide layer 600 above the amorphous carbon mask 500 to be made relatively thin. The photoresist layer 400 above the second silicon oxide layer 600 only needs to etch 0.2 μm of the second silicon oxide layer 600. The etching selectivity ratio between the second silicon oxide layer 600 and the photoresist layer 400 is 3:1, allowing the photoresist layer 400 to also be made relatively thin. Making the photoresist layer 400 thin saves time and material costs, and also prevents the photoresist layer 400 from tilting or collapsing in smaller process sizes with higher aspect ratios.
[0060] Among them, the amorphous carbon hard mask 500 (ACHM) is also known by various names such as APF (advance patterning film), ACL (amorphous carbon layer), and DLC (diamond like carbon). The first silicon dioxide layer 200 and the second silicon dioxide layer 600 are both silicon dioxide layers.
[0061] In one embodiment, the hard mask layer structure consists of a 0.1 μm first silicon oxide layer 200, a 1.8 μm amorphous carbon mask 500, a 0.2 μm second silicon oxide layer 600, and a 0.5 μm photoresist layer 400 from top to bottom, but is not limited to this thickness. The specific thickness can be used according to the actual ion implantation needs.
[0062] To effectively block ions, the total thickness of the amorphous carbon mask 500 and the second silicon oxide layer 600 is generally not less than 1.5 μm. For example... Figure 3 The process involves several layers, including a 0.1 μm first silicon dioxide layer 200 (consistent with conventional techniques), which serves as a protective layer for ion implantation and as the endpoint layer for etching the amorphous carbon mask 500; a 1.8 μm amorphous carbon mask 500 as the main HM (Hypermask) to block ion implantation; a 0.2 μm second silicon dioxide layer 600 as the etching mask for the amorphous carbon mask 500. Since both the photoresist layer 400 and the amorphous carbon mask 500 etching processes use O2, their selectivity is low. Therefore, a second silicon dioxide layer 600 is added in between. The pattern from the photoresist layer 400 is first transferred to the second silicon dioxide layer 600, and then from the second silicon dioxide layer 600 to the amorphous carbon mask 500. A 0.5 μm photoresist layer 400 acts as the mask for the second silicon dioxide layer 600, transferring the pattern onto it. Finally, a BOE (silicon dioxide remover) and an Asher machine (carbon or photoresist remover) are used in the removal process. When etching trenches in the amorphous carbon mask 500, oxygen ions are the main component. 5% COS or 5% HBr can be added. COS provides better protection for the experimental surface. During etching, COS can form sulfides on the sidewalls of the carbon film to block sidewall etching, thus better protecting the etched morphology of the amorphous carbon mask 500.
[0063] Specifically, the sum of the thicknesses of the amorphous carbon mask 500 and the second silicon oxide layer 600 is not less than 1.5 μm. The specific thickness is determined by the injection energy. If the energy is low, the sum of the thicknesses may be less than 1.5 μm.
[0064] Based on the same technical concept, this disclosure also provides an ion implantation method employing a hard mask layer structure for ion implantation on a silicon carbide substrate as described above. Figure 5 As shown, an ion implantation method includes the following steps:
[0065] S1, a silicon carbide substrate 100 is provided, and a first silicon oxide layer 200, an amorphous carbon mask 500 and a second silicon oxide layer 600 are sequentially formed on the top of the silicon carbide substrate 100.
[0066] In one embodiment, the amorphous carbon mask 500 is formed by PECVD deposition. The sum of the thicknesses of the amorphous carbon mask 500 and the second silicon oxide layer 600 is not less than 1.5 μm.
[0067] like Figure 3As shown, an amorphous carbon mask 500 with an added second silicon oxide layer 600 replaces the structure of all-polycrystalline silicon or polycrystalline silicon plus silicon oxide as a hard mask. The amorphous carbon mask 500 is composed of a certain proportion of SP3 hybridized and SP2 hybridized C and a portion of H. Its atomic structure exhibits short-range order and long-range disorder, effectively blocking ions and preventing them from penetrating the film layer into the underlying epitaxial silicon carbide substrate 100 region, making it an excellent ion implantation barrier layer. The amorphous carbon mask 500 can be deposited using the PECVD method. The deposition equipment is a cavity structure, such as the AMATproducerAPF two-piece cavity, which can grow two wafers simultaneously at a time.
[0068] In one embodiment, the hard mask layer structure consists of a 0.1 μm first silicon oxide layer 200, a 1.8 μm amorphous carbon mask 500, a 0.2 μm second silicon oxide layer 600, and a 0.5 μm photoresist layer 400 from top to bottom, but is not limited to this thickness. The specific thickness can be used according to the actual ion implantation needs.
[0069] To effectively block ions, the total thickness of the amorphous carbon mask 500 and the second silicon oxide layer 600 is generally not less than 1.5 μm. For example... Figure 3 The process involves several layers, including a 0.1 μm first silicon oxide layer 200 (consistent with previous techniques), serving as a protective layer for ion implantation and as the endpoint layer for etching the amorphous carbon mask 500; a 1.8 μm amorphous carbon mask 500 as the main HM (Hypermask) to block ion implantation; a 0.2 μm second silicon oxide layer 600 as the etching mask for the amorphous carbon mask 500. Since both the photoresist layer 400 and the amorphous carbon mask 500 etching processes use O2, their selectivity is low. Therefore, a second silicon oxide layer 600 is added in between. The pattern from the photoresist layer 400 is first transferred to the second silicon oxide layer 600, and then from the second silicon oxide layer 600 to the amorphous carbon mask 500. A 0.5 μm photoresist layer 400 serves as the mask for the second silicon oxide layer 600, transferring the pattern onto it. Finally, a BOE (silicon dioxide remover) and an Asher machine (carbon or photoresist remover) are used in the removal process. When etching trenches in the amorphous carbon mask 500, oxygen ions are the main component. 5% COS or 5% HBr can be added. COS provides better protection for the experimental surface. During etching, COS can form sulfides on the sidewalls of the carbon film to block sidewall etching, thus better protecting the etched morphology of the amorphous carbon mask 500.
[0070] S2, a patterned photoresist layer 400 is formed on top of the second silicon oxide layer 600. The second silicon oxide layer 600 is etched through the photoresist layer 400, and then the amorphous carbon mask 500 is etched through the second silicon oxide layer 600. The gas used to etch the amorphous carbon mask 500 includes oxygen. The gas used to etch the amorphous carbon mask 500 also includes 5% COS or 5% HBr. A fluorine-containing gas is used to etch the second silicon oxide layer 600. The thickness of the photoresist layer 400 is positively correlated with the thickness of the second silicon oxide layer 600. The thickness of the photoresist layer 400 is determined by the thickness of the second silicon oxide layer 600, and is generally 1 / 2 to 1 of the thickness of the second silicon oxide layer. If the thickness cannot reach the minimum thickness required for a good morphology of the photoresist, the minimum thickness of the coating machine is used. The thickness of the photoresist layer 400 is not higher than 0.3 μm.
[0071] S3, Ion implantation is performed on the area exposed by the amorphous carbon mask 500 to dope ions in the silicon carbide substrate 100.
[0072] Furthermore, ion doping using the aforementioned hard mask structure offers advantages such as high production capacity, low cost, and high selectivity, as detailed below.
[0073] As described above, amorphous carbon masks 500 can be deposited using the PECVD method. Employing an AMATproducerAPF two-piece chamber with an internal RPS (remote plasma clean) self-cleaning system, the chamber automatically runs a cleaning cycle after deposition of 1.8 μm to remove the inner wall film layer, extending the PM cycle. Each PM cycle can process 4000 2 μm amorphous carbon masks 500. The hourly capacity is 8 wafers, and with 85% uptime, the daily WPD is 163.2 wafers. The chamber equipment can share a common transfer chamber, which can be used with 1-3 process chambers, allowing for flexible configuration based on production capacity. This significantly increases WPD for the same area.
[0074] On the other hand, the amorphous carbon mask 500 can be deposited using the PECVD method, offering flexibility for cavity equipment deposition. Only two masks are deposited at a time, preventing excessive equipment waste when production capacity is insufficient. Furthermore, during etching, the amorphous carbon mask 500 primarily uses O2 as the etching gas, while polysilicon etching gases mainly consist of Cl2, SF6, etc. Compared to halogen specialty gases, O2 has lower usage costs. In the final removal process, compared to using HNO3 for polysilicon structures, the amorphous carbon mask 500 uses O2 for removal, making the removal process simpler and more cost-effective.
[0075] In addition, existing SiC FABs use carbon films as a high-temperature annealing protective layer for ion activation, and are made on front-end metal-free equipment. Therefore, the carbon film forming equipment can be used for HM without metal contamination and can be shared with other equipment, making full use of the equipment's capacity without the need for new equipment. If the equipment's capacity is insufficient in the future, only the cavity needs to be added.
[0076] The etching source for the second silicon oxide layer 600 is a fluorine-containing gas, such as CF4, while the etching source for the amorphous carbon mask 500 is O2. Neither O2 (nor O plasma) reacts with the second silicon oxide layer 600; only oxygen ions physically etch the surface of the second silicon oxide layer 600 during the process. This selectivity is extremely high, allowing the second silicon oxide layer 600 above the amorphous carbon mask 500 to be made relatively thin. The photoresist layer 400 above the second silicon oxide layer 600 only needs to etch 0.2 μm of the second silicon oxide layer 600. The etching selectivity ratio between the second silicon oxide layer 600 and the photoresist layer 400 is 3:1, allowing the photoresist layer 400 to also be made relatively thin. Making the photoresist layer 400 thinner saves time and material costs, and also prevents the photoresist layer 400 from tilting or collapsing in smaller process sizes with higher aspect ratios.
[0077] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.
Claims
1. A hard mask layer structure for ion implantation on a silicon carbide substrate, used for ion implantation, characterized in that, include: silicon carbide substrate; An amorphous carbon film layer is disposed on top of the silicon carbide substrate, and a first silicon oxide layer is disposed between the silicon carbide substrate and the amorphous carbon film layer to protect the silicon carbide substrate. A second silicon oxide layer is disposed on top of the amorphous carbon film layer.
2. The hard mask layer structure for ion implantation on a silicon carbide substrate according to claim 1, characterized in that, The sum of the thicknesses of the amorphous carbon film and the second silicon oxide layer is not less than 1.5 μm.
3. The hard mask layer structure for silicon carbide substrate ion implantation according to claim 1, wherein the amorphous carbon film layer is formed by PECVD deposition.
4. The hard mask layer structure for ion implantation on a silicon carbide substrate according to claim 3, characterized in that, The working gas for PECVD deposition of the amorphous carbon film includes a reactant gas and a carrier gas, wherein the reactant gas includes at least one hydrocarbon and the carrier gas is argon or helium.
5. The hard mask layer structure for ion implantation on a silicon carbide substrate according to claim 4, characterized in that, The working gas for PECVD deposition of the amorphous carbon film includes a reactive gas, a carrier gas, and a silicon-doped gas to form a silicon-containing amorphous carbon film.
6. The hard mask layer structure for ion implantation on a silicon carbide substrate according to claim 5, characterized in that, The silicon doping ratio of the silicon-doped gas is less than 20%.
7. An ion implantation method, characterized in that, The hard mask layer structure for silicon carbide substrate ion implantation as described in any one of claims 1-6 further includes the following steps: A silicon carbide substrate is provided, and a first silicon oxide layer, an amorphous carbon film layer, and a second silicon oxide layer are sequentially formed on the top of the silicon carbide substrate; A patterned photoresist layer is formed on top of the second silicon oxide layer, the second silicon oxide layer is etched through the photoresist layer, and then the amorphous carbon film layer is etched through the second silicon oxide layer. Ion implantation is performed on the exposed areas of the amorphous carbon film to dope ions in the silicon carbide substrate.
8. The ion implantation method according to claim 7, characterized in that, The second silicon oxide layer is etched using a fluorine-containing gas.
9. The ion implantation method according to claim 7, characterized in that, When etching the amorphous carbon film to form the desired pattern, the gas used to etch the amorphous carbon film includes oxygen, and the gas used to etch the amorphous carbon film also includes 5% COS or 5% HBr.
10. The ion implantation method according to claim 7, characterized in that, The thickness of the photoresist layer is positively correlated with the thickness of the second silicon oxide layer.