Semiconductor device and power conversion device

Abstract

A semiconductor device (21) includes a first semiconductor element (30H) forming an upper arm and a second semiconductor element (30L) forming a lower arm. The first semiconductor element (30H) and the second semiconductor element (30L) are arranged side by side. The semiconductor devices form a semiconductor element group. The semiconductor device (21) includes a clamp circuit member (40) that forms a clamp circuit (13) connected in parallel to the upper arm and the lower arm. The clamp circuit member (40) is provided adjacent to the semiconductor element group in an element arrangement direction in which the first semiconductor element (30H) and the second semiconductor element (30L) are arranged.

Description

[0001] Citation of relevant applications

[0002] This application is based on Japanese Patent Application No. 2023-129544, filed on August 8, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The disclosure in this specification relates to a semiconductor device and a power conversion device. Background Technology

[0004] Reference Figures 1 to 3 Patent Document 1 discloses a module in which a clamping circuit is adjacent to a semiconductor element constituting an upper arm and a semiconductor element constituting a lower arm. The clamping circuit is arranged with the two semiconductor elements in a direction orthogonal to the arrangement direction of the semiconductor elements in the upper arm and the lower arm.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2015-207739 Summary of the Invention

[0008] According to the module in Patent Document 1, the clamping circuit is opposite to two semiconductor elements, and therefore is susceptible to heat dissipation from the two semiconductor elements.

[0009] The purpose of this disclosure is to provide a semiconductor device and a power conversion device for suppressing the thermal effects of semiconductor elements on clamping circuits.

[0010] The various methods disclosed in this specification employ different technical means to achieve their respective objectives. Furthermore, the symbols enclosed in parentheses in the claims and each claim are examples indicating a correspondence with specific elements described in an embodiment described later as a method, and do not limit the scope of the technology.

[0011] One of the disclosed semiconductor devices includes: a first semiconductor element forming an upper arm; a second semiconductor element arranged relative to the first semiconductor element and forming a lower arm; and a clamping circuit component forming a clamping circuit connected in parallel with the upper and lower arms, the clamping circuit component being arranged adjacent to the semiconductor element group formed by the arrangement of the first and second semiconductor elements in the element arrangement direction. Additionally, one of the disclosed power conversion devices includes the above-described semiconductor device and a smoothing capacitor.

[0012] According to this semiconductor device, a clamping circuit component is provided that is adjacent to one of a first semiconductor element and a second semiconductor element arranged in an array, but not adjacent to the other. This allows for the suppression of thermal effects on the clamping circuit from the other semiconductor element constituting the upper and lower arms. This semiconductor device can suppress the thermal effects of semiconductor elements on the clamping circuit. Furthermore, a power conversion device can be provided that, by having the structure of this semiconductor device, can suppress the thermal effects of semiconductor elements on the clamping circuit. Attached Figure Description

[0013] Figure 1 This is a circuit diagram of the power conversion device according to the first embodiment.

[0014] Figure 2 It is a top view used to illustrate the structure of a semiconductor device.

[0015] Figure 3 It is a cross-sectional view showing a portion of the structure of a semiconductor device.

[0016] Figure 4 It is a top view showing the positional relationship between the semiconductor elements and clamping circuits in the upper and lower arms.

[0017] Figure 5 It is a top view showing the positional relationship between the semiconductor elements and clamping circuits in the upper and lower arms.

[0018] Figure 6 It is a top view showing the positional relationship between the semiconductor elements and clamping circuits in the upper and lower arms. Detailed Implementation

[0019] Hereinafter, various embodiments for implementing this disclosure will be described with reference to the accompanying drawings. In each embodiment, the same reference numerals are sometimes used to denote parts corresponding to those described in previous embodiments, and repeated descriptions are omitted. Where only a portion of the structure is described in each embodiment, other previously described embodiments can be applied to the remaining parts of the structure. Not only are combinations of combinable parts specifically and explicitly described in each embodiment, but even without explicit description, embodiments can be partially combined as long as they do not hinder combination.

[0020] First Implementation Method

[0021] Reference Figures 1 to 6A first embodiment of the disclosed power conversion device will be described. Examples of its applications are as follows. The power conversion device can be applied to vehicle-mounted power conversion devices installed in vehicles such as electric vehicles, hybrid vehicles, and plug-in hybrid vehicles. It can also be installed in aircraft such as electric vertical takeoff and landing aircraft or drones, ships, construction machinery, and agricultural machinery. Hereinafter, examples of applying the power conversion device to vehicles will be described.

[0022] like Figure 1 As shown, the vehicle's drive system 1 includes a DC power supply 2, an electric generator 3, and a power conversion device 4. The DC power supply 2 is a DC voltage source composed of a rechargeable secondary battery. Examples of secondary batteries include lithium-ion batteries and nickel-metal hydride batteries. The electric generator 3 is, for example, a three-phase AC rotating electric motor. The electric generator 3 functions as the vehicle's driving force, i.e., an electric motor. During regeneration, the electric generator 3 functions as a generator. The power conversion device 4 performs power conversion between the DC power supply 2 and the electric generator 3.

[0023] The power conversion device 4 includes a power conversion circuit. For example... Figure 1 As shown, the power conversion device 4 includes a smoothing capacitor 5 and an inverter 6 as a power conversion circuit. The smoothing capacitor 5 mainly functions to smooth the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to the P-line 7, which is the high-potential side power line, and the N-line 8, which is the low-potential side power line.

[0024] The smoothing capacitor 5 is connected in parallel with the DC power supply 2. P-line 7 is connected to the positive terminal of the DC power supply 2. N-line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to P-line 7 between the DC power supply 2 and the inverter 6. The negative terminal of the smoothing capacitor 5 is connected to N-line 8 between the DC power supply 2 and the inverter 6. P-line 7 has multiple P-buses that connect electrical components to each other. N-line 8 has multiple N-buses that connect electrical components to each other.

[0025] Inverter 6 is a DC-AC conversion circuit. Inverter 6 converts DC voltage to three-phase AC voltage according to the switching control of the control circuit on the control circuit board and outputs it to the electric generator 3. Through this operation, the electric generator 3 is driven to produce a specified torque. During regenerative braking of the vehicle, inverter 6 receives the rotational force from the wheels and converts the three-phase AC voltage generated by the electric generator 3 back to DC voltage according to the switching control of the control circuit. The converted DC power is output to line P 7. Thus, inverter 6 performs bidirectional power conversion between the DC power supply 2 and the electric generator 3.

[0026] The control circuit for the switching element generates a drive command to operate MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command, for example, based on a torque request input from the host ECU and signals detected by various sensors. ECU is short for Electronic Control Unit. Various sensors exist, such as current sensors, rotation angle sensors, and voltage sensors. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the electric generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs a PWM signal as a drive command, for example. The control circuit is configured to include a processor and a memory, for example. PWM is short for Pulse Width Modulation.

[0027] Inverter 6 has upper and lower arm circuits 9 corresponding to each of the three phases. The upper and lower arm circuits 9 are sometimes referred to as bridge branches. The upper and lower arm circuits 9 have an upper arm 9H and a lower arm 9L. The upper arm 9H is set on the P-line 7 side and the lower arm 9L is set on the N-line 8 side, and they are connected in series between the P-line 7 and the N-line 8.

[0028] The connection point between the upper arm 9H and the lower arm 9L is connected to the corresponding phase winding 3a of the electric generator 3 via the output line 10. The upper and lower arm circuit 9U of phase U in the upper and lower arm circuit 9 is connected to the winding 3a of phase U via the corresponding output line 10. The upper and lower arm circuit 9V of phase V is connected to the winding 3a of phase V via the corresponding output line 10. The upper and lower arm circuit 9W of phase W is connected to the winding 3a of phase W via the corresponding output line 10. At least a portion of the output line 10 is composed of conductive components such as busbars.

[0029] Inverter 6 has six arms. Each arm has a switching element. The number of switching elements constituting each arm is not particularly limited; it can be one or more. In the case of multiple switching elements, the multiple switching elements connected in parallel to each other are turned on and off at the same time by a common gate drive signal.

[0030] In this specification, an n-channel MOSFET 11 is used as the switching element constituting each arm. MOSFET is short for Metal Oxide Semiconductor Field Effect Transistor. In the upper arm 9H, the drain of MOSFET 11 is connected to the P-line 7. In the lower arm 9L, the source of MOSFET 11 is connected to the N-line 8. The source of MOSFET 11 in the upper arm 9H and the drain of MOSFET 11 in the lower arm 9L are connected to each other.

[0031] A return-current diode 12 is connected in reverse parallel to each MOSFET 11. The diode 12 can be a parasitic diode of the MOSFET 11, or it can be a non-parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11. The cathode of the diode 12 is connected to the drain.

[0032] The switching element is not limited to MOSFET 11. IGBTs can also be used as switching elements. IGBT is short for Insulated Gate Bipolar Transistor. In the case of IGBTs, a diode for return current is also connected in reverse parallel.

[0033] In addition to the upper and lower arm circuits 9 described above, the inverter 6 also includes a clamping circuit 13. The clamping circuit 13 absorbs the transient high voltage generated during switching, i.e., the so-called switching surge. This enables high-speed switching. The clamping circuit 13 can also be provided independently of the upper and lower arm circuits 9 and connected in parallel with the corresponding upper and lower arm circuits 9.

[0034] The clamping circuit 13 has at least a capacitor 131. The clamping circuit 13 can be, for example, a C-clamping circuit with a capacitor 131, or it can be... Figure 1 The circuit shown is an RC clamping circuit with capacitor 131 and resistor 132. It can also be an RCD clamping circuit with capacitor 131, resistor 132, and diode.

[0035] Figure 2 This is a top view showing the structure of an example of a semiconductor device. Figure 3 This is a cross-sectional view showing a portion of a semiconductor device. Hereinafter, the thickness direction of the substrate is designated as the Z-direction, and a direction orthogonal to the Z-direction is designated as the Y-direction. The direction orthogonal to both the Z and Y directions is designated as the X-direction. Unless otherwise specified, the shape viewed from above along the Z-direction, in other words, the shape along the XY plane defined by the X and Y directions, is designated as a planar shape. Furthermore, the view from above along the Z-direction is sometimes simply referred to as a top-view view.

[0036] like Figure 2 As shown, the semiconductor device 21 includes upper and lower arm circuits 9, clamping circuit components 40, and a housing 60. (As...) Figure 3 As shown, the semiconductor device 21 may also include a cooler 70. The semiconductor device 21, together with the capacitor device providing the smoothing capacitor 5, the input terminal block, the output terminal block, etc., constitute the power conversion device 4. The semiconductor device 21 may also be housed together with other components such as the capacitor device in a housing that forms the outer contour of the power conversion device 4.

[0037] Semiconductor device 21 includes a first semiconductor element 30H forming an upper arm 9H and a second semiconductor element 30L forming a lower arm 9L. The first semiconductor element 30H and the second semiconductor element 30L form a group of semiconductor elements arranged in an element arrangement direction. The element arrangement direction corresponds to the Y direction in each figure. Semiconductor device 21 includes clamping circuit components 40 arranged adjacent to the semiconductor element group in the element arrangement direction. Clamping circuit components 40 include clamping circuits 13 connected in parallel with the upper arm 9H and the lower arm 9L. Clamping circuit components 40 are formed, for example, from thin film elements.

[0038] The first semiconductor element 30H forms a flat outer contour and includes a plurality of semiconductor elements 30 contained within the outer contour. The second semiconductor element 30L forms a flat outer contour and includes a plurality of semiconductor elements 30 contained within the outer contour. "A plurality of" here refers to two or more. The number of semiconductor elements 30 included in each of the first semiconductor element 30H and the second semiconductor element 30L is not particularly limited. Each may contain one or more. The plurality of semiconductor elements 30 are connected in parallel to provide a MOSFET 11 for one phase arm. The plurality of semiconductor elements 30 are arranged along the X-direction.

[0039] The flat outer contour is, for example, in the form of a thin plate or a thin film. Each semiconductor element 30 is positioned with its minimum length direction (thickness direction) perpendicular to the element arrangement direction. The thickness direction is the thickness direction of the thin plate, equivalent to the Z-direction. Multiple semiconductor elements 30 included in the first semiconductor element 30H are arranged in a direction orthogonal to both the element arrangement direction and the thickness direction, with the flat surface being the largest. Multiple semiconductor elements 30 included in the second semiconductor element 30L are arranged in a direction orthogonal to both the flat surface and the thickness direction, with the flat surface being the largest. Figure 2 As shown, multiple semiconductor elements are arranged along the X direction. In contrast, with the first and second semiconductor elements arranged in the X direction, the current in the shorter path among the multiple current paths formed between the clamping circuit and the semiconductor elements becomes larger, resulting in an imbalance. According to the structure described in this specification, for example... Figure 2 As shown, multiple current paths can be evenly formed between the clamping circuit and the semiconductor element.

[0040] Semiconductor element 30 is formed on a semiconductor substrate made of silicon (Si) or a wide-bandgap semiconductor with a wider bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. Semiconductor element 30 is sometimes referred to as a power element or a semiconductor chip.

[0041] The vertical element is configured such that a main current flows through it in the thickness direction of the semiconductor element 30. The semiconductor element 30 is arranged along the Z-direction in its thickness direction. The semiconductor element 30 has main electrodes on both sides in the thickness direction. As a vertical element, the semiconductor element 30 of this embodiment has an n-channel MOSFET 11 formed on a semiconductor substrate made of SiC. As the main electrodes, the semiconductor element 30 has a drain on one side of the plate and a source on the other side of the plate.

[0042] By turning on MOSFET 11, current flows between the main electrodes, i.e., between the drain and the source. In the case where diode 12 is a parasitic diode, the source also serves as the anode electrode, and the drain also serves as the cathode electrode. The drain is the main electrode on the high-potential side, and the source is the main electrode on the low-potential side. Semiconductor element 30 appears rectangular when viewed from above in the Z-direction.

[0043] like Figure 3 As shown, the first semiconductor element 30H and the second semiconductor element 30L are arranged at approximately the same height in the Z direction. A plurality of semiconductor elements 30 included in the first semiconductor element 30H are arranged in the same orientation with their drains located on the P-line 511 side. The plurality of semiconductor elements 30 of the first semiconductor element 30H are arranged in the same orientation with their sources located on opposite sides of the P-line 511. A plurality of semiconductor elements 30 included in the second semiconductor element 30L are arranged in the same orientation with their drains located on the O-line 531 side. The plurality of semiconductor elements 30 of the second semiconductor element 30L are arranged in the same orientation as the plurality of semiconductor elements 30 of the first semiconductor element 30H, with their sources located on the N-line 521 side.

[0044] Semiconductor device 21 has a P terminal 51 connected to the drain of the first semiconductor element 30H via a P-line 511. Semiconductor device 21 has an N terminal 52 connected to the source of the second semiconductor element 30L via an N-line 521. P terminal 51 is an external connection terminal electrically connected to P line 7. P terminal 51 is electrically connected to the positive terminal of smoothing capacitor 5. N terminal 52 is an external connection terminal electrically connected to N line 8. N terminal 52 is electrically connected to the negative terminal of smoothing capacitor 5.

[0045] P-wire 511 is formed from a wiring board. N-wire 521 is formed from a wiring board. P-terminal 51 is the end of P-wire 511 formed from a wiring board. P-terminal 51 is shaped to protrude in the component arrangement direction relative to the clamping circuit component 40 to the side opposite to the semiconductor component group. N-terminal 52 is the end of N-wire 521 formed from a wiring board. N-terminal 52 is shaped to protrude in the component arrangement direction relative to the clamping circuit component 40 to the side opposite to the semiconductor component group. Figure 3The P-connection board and N-connection board shown are positioned perpendicular to the component arrangement direction and staggered from each other in the minimum length direction, i.e., the thickness direction of the first semiconductor component.

[0046] P-wire 511 is connected to the drain of the first semiconductor element 30H. P-wire 511 electrically connects the drain of the first semiconductor element 30H to the P terminal 51. P-wire 511 is also connected to the positive terminal of the clamping circuit 13 included in the clamping circuit component 40. P-wire 511 electrically connects the positive terminal of the clamping circuit 13 to the P terminal 51. P-wire 511 is sometimes referred to as the positive terminal wiring, high-potential power supply wiring, etc.

[0047] The source of the second semiconductor element 30L is electrically connected to the N-line 521. The N-line 521 electrically connects the source of the second semiconductor element 30L to the N-terminal 52. The N-line 521 is connected to the negative terminal of the clamping circuit 13 included in the clamping circuit component 40. The N-line 521 is sometimes referred to as the negative terminal wiring, low-potential power supply wiring, etc.

[0048] Terminal 53 is an external connection terminal electrically connected to output line 10. Terminal 53 is electrically connected to the opposite winding 3a of the generator 3. Terminal 53 is sometimes referred to as an output terminal, AC terminal, etc. Terminal 531 is formed by a wiring board. Terminal 53 is the end of terminal 531 formed by a wiring board. Terminal 53 is shaped to protrude in the component arrangement direction relative to the second semiconductor element 30L to the side opposite to clamping circuit component 40. Terminal 53 protrudes in the semiconductor device 21 to the side opposite to P terminal 51 and N terminal 52. Terminal 531 is electrically connected to the drain of the second semiconductor element 30L. Terminal 531 connects the source of the second semiconductor element 30L to N terminal 52.

[0049] O-line 532 is formed by a wiring board. O-line 532 is connected to the source of the first semiconductor element 30H. Figure 3 As shown, P-wire 511 and O-wire 531 are arranged at approximately the same height in the Z direction. P-wire 511 and O-wire 531 are formed to overlap in the component arrangement direction. Figure 3 As shown, N-line 521 and O-line 532 are arranged at approximately the same height in the Z direction. N-line 521 and O-line 532 are formed to overlap in the element arrangement direction. O-line 532 electrically connects the source of the first semiconductor element 30H to O-line 531. O-line 531 is sometimes referred to as an output line, etc.

[0050] like Figure 3As shown, O-wires 531 and 532 are electrically connected via a height adjustment member 81. The height adjustment member 81 is a conductive member that is offset to cause the height positions of O-wires 531 and 532 to be staggered in the Z direction.

[0051] The signal terminal 54 is shaped to protrude in the component arrangement direction relative to the second semiconductor element 30L, opposite to the clamping circuit component 40. The signal terminal 54 is located on the same side as the O terminal 53 in the semiconductor device 21, and protrudes in the opposite direction to the P terminal 51 and the N terminal 52. The signal terminal 54 is connected to the pads of the first semiconductor element 30H via signal wiring.

[0052] The signal terminal 55 is shaped to protrude in the component arrangement direction relative to the second semiconductor element 30L, opposite to the clamping circuit component 40. The signal terminal 55 is located on the same side as the O terminal 53 in the semiconductor device 21, and protrudes in the opposite direction to the P terminal 51 and N terminal 52. The signal terminal 55 is connected to the pads of the second semiconductor element 30L via signal wiring.

[0053] Each signal terminal electrically connects the semiconductor element 30 to the control circuit board. Each signal terminal is electrically connected to the pads of the semiconductor element 30 via connecting members such as bonding wires. The signal terminals include at least a terminal for applying a drive voltage to the gate of the semiconductor element 30. The signal terminals may also include a terminal for detecting the source potential of the semiconductor element 30. The signal terminals may also include a terminal for detecting the drain potential of the semiconductor element 30. The signal terminals may also include a terminal for detecting the temperature of the semiconductor element 30.

[0054] The clamping circuit component 40, as an electronic component, includes at least a capacitor and provides... Figure 1 The clamping circuit 13 is shown. The clamping circuit 13 is an RC clamping circuit. In addition to the capacitor 131, the clamping circuit 13 also includes a resistor 132.

[0055] like Figure 3 As shown, the semiconductor device 21 is disposed on one side of the cooler 70 in the Z direction. The semiconductor device 21 is fixed to the cooler 70. The cooler 70 is in close contact with the heat sink 61, which serves as a heat dissipation promoting component. An insulating member 62 is sandwiched between the heat sink 61 and the N-line 521 and O-line 532. The insulating member 62 is a sheet-like component formed of an insulating material, lubricating oil, gel-like substance, etc. As an example, besides Figure 2 The components other than the cooler 70 and radiator 61 shown are covered by the housing 60.

[0056] The housing 60 is formed using an electrically insulating material such as resin. The housing 60 may also be a resin molded body, for example. The housing 60 may also retain a component of the semiconductor device 21. A component of the semiconductor device 21 may be integrally formed with the housing 60 as an embedded part. The housing 60 may also be fixed to the housing of the power conversion device 4 together with the cooler 70. The housing 60 may also be formed, for example, from gel or cast resin.

[0057] Reference Figures 4 to 6 The positional relationship between the clamping circuit component 40 and the semiconductor element group including the first semiconductor element 30H and the second semiconductor element 30L in this specification is described. Figures 4 to 6 A diagram showing a top view of the semiconductor device 21 in the thickness direction of the semiconductor element 30 is shown.

[0058] exist Figure 4 In the diagram, a dashed line represents the extension line that extends from the edge of the outer contour of the semiconductor element group in the X direction towards the clamping circuit component 40 along the element arrangement direction. For example... Figure 4 As shown, the clamping circuit component 40 is disposed in the X direction within the range of the extension line including the two sides.

[0059] Figure 5 A dashed line represents the extension line that extends from the edge of the outer contour of the semiconductor element group in the X direction towards the clamping circuit component 40 along the element arrangement direction. For example... Figure 4 As shown, the clamping circuit component 40 is positioned in the X direction within a range that converges inwards beyond the extension lines of the sides.

[0060] exist Figure 6 In the diagram, a dashed line represents the extension line that extends from the edge of the outer contour of the semiconductor element group in the X direction towards the clamping circuit component 40 along the element arrangement direction. For example... Figure 6 As shown, the clamping circuit component 40 is disposed in the X direction within a range that overlaps with one of the extension lines of the two sides.

[0061] The effects of the semiconductor device 21 disclosed in the specification will be explained. The semiconductor device 21 includes a first semiconductor element 30H forming an upper arm 9H and a second semiconductor element 30L forming a lower arm 9L. The first semiconductor element 30H and the second semiconductor element 30L are arranged to form a semiconductor element group. The semiconductor device 21 has a clamping circuit component 40, which forms a clamping circuit 13 connected in parallel with the upper arm 9H and the lower arm 9L. The clamping circuit component 40 is arranged adjacent to the semiconductor element group in the element arrangement direction of the first semiconductor element 30H and the second semiconductor element 30L.

[0062] The semiconductor device 21 includes a clamping circuit component 40 adjacent to one of the first semiconductor element 30H and the second semiconductor element 30L arranged in an array, but not adjacent to the other. This structure suppresses heat dissipation exerted on the clamping circuit 13 from the semiconductor element of the other of the upper and lower arms. Therefore, the semiconductor device 21 can suppress the thermal effects on the clamping circuit 13 from the group of semiconductor elements. Furthermore, the current flowing from the clamping circuit to the drain of the first semiconductor element and the current returning from the source of the second semiconductor element to the clamping circuit flow in opposite directions. Therefore, a semiconductor device capable of reducing the inductance between the semiconductor element and the clamping circuit can be provided.

[0063] Semiconductor device 21 includes a P terminal 51 and an N terminal 52. The P terminal 51 is connected to the drain of a first semiconductor element via a P wiring 511, and the N terminal 52 is connected to the source of a second semiconductor element via an N wiring 521. The P terminal 51 and the N terminal 52 are configured to protrude in the element arrangement direction relative to the clamping circuit 13 to the side opposite to the semiconductor element group.

[0064] According to this structure, the P-terminal and N-terminal protrude to the front end of the region where the clamping circuit is mounted on the capacitor, thus suppressing the thermal effects from the semiconductor element on the two terminals. Furthermore, the current from the P-terminal to the drain of the first semiconductor element and the current from the source of the second semiconductor element to the N-terminal can be formed in opposite directions. Therefore, a semiconductor device capable of reducing the inductance between the semiconductor element and the smoothing capacitor 5 can be provided. Moreover, according to this structure, since the means for cooling the P-terminal and N-terminal can be miniaturized, a power conversion device including three corresponding semiconductor devices can be miniaturized.

[0065] P-line 511 extends in such a way that it forms a current from P-terminal 51 to the drain of the first semiconductor element. N-line 521 extends in such a way that it forms a current from the source of the second semiconductor element to N-terminal 52 in the opposite direction to the current flowing through P-line 511. According to this structure, a semiconductor device capable of reducing the inductance between the semiconductor element and the smoothing capacitor 5 can be provided.

[0066] At least one of the P-line 511 and N-line 521 is formed by a wiring board. According to this structure, the shape of the P-line 511 or N-line 521 can be simplified, and the semiconductor device can be made thinner. Therefore, a semiconductor device that facilitates the miniaturization of a power conversion device can be provided. This structure is useful for the miniaturization of power conversion devices having three corresponding semiconductor devices.

[0067] P-wire 511 and N-wire 521 are each formed from a single wiring board. The P-wire board and N-wire board are positioned offset from each other relative to the component arrangement direction and in the minimum length direction, i.e., the thickness direction of the first semiconductor element. According to this structure, a structure can be adopted in which the lengths of the P-wire, N-wire, first semiconductor element, and second semiconductor element in the thickness direction are compactly formed. Therefore, a structure that is very useful in miniaturizing power conversion devices including three corresponding semiconductor devices can be provided.

[0068] The semiconductor device includes an O-line 532 connecting the source of a first semiconductor element and the drain of a second semiconductor element. The O-line 532 and the N-line 521 are formed to overlap in the element arrangement direction. According to this structure, a structure can be adopted in which the lengths of the P-line, N-line, O-line, first semiconductor element, and second semiconductor element in the thickness direction are compactly formed.

[0069] The first semiconductor element 30H and the clamping circuit component 40 are arranged in an overlapping manner in the element arrangement direction. According to this structure, a structure can be adopted in which the lengths of the first semiconductor element 30H and the clamping circuit component 40 in the thickness direction are compactly formed.

[0070] The power conversion device 4 includes the semiconductor device described in this specification and the smoothing capacitor 5. Thus, as described above, it is possible to provide a power conversion device capable of suppressing the thermal effects of the semiconductor element group on the clamping circuit 13.

[0071] Other implementation methods

[0072] This disclosure is not limited to the illustrated embodiments. This disclosure includes illustrated embodiments and modifications made by those skilled in the art based thereon. For example, this disclosure is not limited to the combinations of components and elements shown in the embodiments, and various modifications can be made to implement it. This disclosure can be implemented in various combinations. This disclosure may have additional portions that can be added to the embodiments. This disclosure includes structures that omit components and elements of the embodiments. This disclosure includes substitutions or combinations of components and elements between one embodiment and another. The technical scope of this disclosure is not limited to the description of the embodiments. The technical scope of this disclosure is indicated by the description in the claims, and should be understood to also include all modifications within the meaning and scope equivalent to the description in the claims.

[0073] The power conversion device 4 described in the above embodiment can also be a power conversion circuit that includes a converter. The converter is a DC-DC conversion circuit that converts DC voltage into DC voltages of different values. This converter is located between the DC power supply 2 and the smoothing capacitor 5. The converter includes, for example, a reactor and the aforementioned upper and lower arm circuits 9. In this configuration, step-up and step-down voltage conversion is possible. The power conversion device 4 can also be configured to include a filter capacitor to remove power supply noise from the DC power supply 2. This filter capacitor is located between the DC power supply 2 and the converter.

[0074] The power conversion device that can achieve the purpose disclosed in the specification may also be a structure in which a part of the clamping circuit overlaps with a part of the semiconductor element in the thickness direction.

[0075] (The disclosure of technical ideas)

[0076] This specification discloses several technical ideas described in the following list of items. Some items are sometimes described by selectively referencing a multiple dependent form of a previous item in a subsequent item. Furthermore, some items are sometimes described by referring to a multiple dependent form of another multiple dependent form. These items described in multiple dependent forms define several technical ideas.

[0077] (Technical Idea 1)

[0078] A semiconductor device, comprising: A first semiconductor element (30H) is formed into an upper arm (9H). A second semiconductor element (30L) is arranged relative to the first semiconductor element and forms a lower arm (9L); and Clamping circuit component (40), wherein the clamping circuit component forms a clamping circuit (13) connected in parallel with the upper arm and the lower arm. The clamping circuit component is arranged adjacent to the semiconductor element group formed by arranging the first semiconductor element and the second semiconductor element in the element arrangement direction of the arrangement of the first semiconductor element and the second semiconductor element.

[0079] (Technical Idea 2)

[0080] As described in technical concept 1, in the semiconductor device, The first semiconductor element and the second semiconductor element each include a plurality of semiconductor elements respectively contained within a flat outer contour. The aforementioned semiconductor elements are arranged in a configuration where their minimum length direction (i.e., their thickness direction) is perpendicular to the direction in which they are arranged. The first semiconductor element and the second semiconductor element are respectively formed by the plurality of semiconductor elements, which are arranged in a direction orthogonal to the two directions of the element arrangement direction and the thickness direction, with the flat maximum surface being orthogonal to both the element arrangement direction and the thickness direction.

[0081] (Technical Idea 3)

[0082] The semiconductor device as described in Technical Concept 1 includes: The P terminal (51) is connected to the drain of the first semiconductor element via the P wiring (511); and The N-terminal (52) is connected to the source of the second semiconductor element via the N-wire (521). The P terminal and the N terminal are configured to protrude in the direction of the component arrangement toward the side opposite to the semiconductor component group.

[0083] (Technical Idea 4)

[0084] As described in technical concept 3, in the semiconductor device, The aforementioned P-wire extends in a manner that forms a current from the aforementioned P-terminal to the drain of the aforementioned first semiconductor element. The aforementioned N-line extends in such a way that it forms a current from the source of the aforementioned second semiconductor element to the aforementioned N-terminal in the opposite direction to the current flowing through the aforementioned P-line.

[0085] (Technical Idea 5)

[0086] As described in technical concept 3 or 4, in the semiconductor device, At least one of the above-mentioned P wiring and N wiring is formed by a single wiring board.

[0087] (Technical Idea 6)

[0088] As described in technical concept 5, in the semiconductor device, The aforementioned P-wiring and N-wiring are each formed by a single patch panel. The P-connection board and the N-connection board are positioned offset from each other in the thickness direction of the first semiconductor element, wherein the thickness direction of the first semiconductor element is perpendicular to the element arrangement direction and is the direction of minimum dimension length.

[0089] (Technical Idea 7)

[0090] As described in technical concept 3, in the semiconductor device, Includes an O-wire (532), which connects the source of the first semiconductor element to the drain of the second semiconductor element. The aforementioned O wiring and N wiring are formed in a manner that overlaps in the aforementioned component arrangement direction.

[0091] (Technical Idea 8)

[0092] As described in any of the technical ideas 1 to 7, in which, The first semiconductor element and the clamping circuit component are arranged to overlap in the direction in which the elements are arranged.

[0093] (Technical Idea 9)

[0094] A power conversion device, comprising: The semiconductor device described in any one of technical ideas 1 to 8; and Smoothing capacitor (5).

Claims

1. A semiconductor device, comprising: A first semiconductor element (30H) forms an upper arm (9H); A second semiconductor element (30L) is arranged relative to the first semiconductor element and forms a lower arm (9L); and Clamping circuit component (40), the clamping circuit component forming a clamping circuit (13) connected in parallel with the upper arm and the lower arm. The clamping circuit component is arranged adjacent to the semiconductor element group formed by arranging the first semiconductor element and the second semiconductor element in the element arrangement direction of the arrangement of the first semiconductor element and the second semiconductor element.

2. The semiconductor device as claimed in claim 1, characterized in that, The first semiconductor element and the second semiconductor element each include a plurality of semiconductor elements respectively contained within a flat outer contour. The plurality of semiconductor elements are arranged in a position where the length direction (i.e., the thickness direction) of their minimum dimension is perpendicular to the direction in which the elements are arranged. The first semiconductor element and the second semiconductor element are respectively formed by the plurality of semiconductor elements, which are arranged in a direction orthogonal to the two directions of the element arrangement direction and the thickness direction, with the flat maximum surface being orthogonal to both the element arrangement direction and the thickness direction.

3. The semiconductor device as claimed in claim 1, characterized in that, The semiconductor device includes: P-terminal (51), the P-terminal being connected to the drain of the first semiconductor element via P-wire (511); and The N-terminal (52) is connected to the source of the second semiconductor element via an N-wire (521). The P terminal and the N terminal are configured to protrude relative to the clamping circuit component on the side opposite to the semiconductor element group in the element arrangement direction.

4. The semiconductor device as claimed in claim 3, characterized in that, The P-wire extends in a manner that forms a current from the P-terminal to the drain of the first semiconductor element. The N-line extends in such a way that it forms a current from the source of the second semiconductor element to the N-terminal in the opposite direction to the current flowing through the P-line.

5. The semiconductor device as claimed in claim 3 or 4, characterized in that, At least one of the P-line and the N-line is formed by a single patch panel.

6. The semiconductor device as claimed in claim 5, characterized in that, The P-line and the N-line are each formed by a single patch panel. The P-connector and N-connector are positioned offset from each other in the thickness direction of the first semiconductor element, wherein the thickness direction of the first semiconductor element is perpendicular to the element arrangement direction and is the direction of minimum dimension length.

7. The semiconductor device as claimed in claim 3, characterized in that, Includes an O-line (532) that connects the source of the first semiconductor element to the drain of the second semiconductor element. The O wiring and the N wiring are formed in an overlapping manner in the component arrangement direction.

8. The semiconductor device according to any one of claims 1 to 4, characterized in that, The first semiconductor element and the clamping circuit component are arranged in an overlapping manner in the element arrangement direction.

9. A power conversion device, comprising: The semiconductor device as described in any one of claims 1 to 4; as well as Smoothing capacitor (5).

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