Parameter calibration methods and manufacturing methods for semiconductor devices
By calibrating the simulation model of semiconductor devices and adjusting process parameters, the problems of electric field and ion concentration variations at the corners of shallow trench isolation structures were solved, improving the threshold voltage uniformity and power consumption of NMOS devices, enhancing circuit performance and reliability, and saving costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NEXCHIP SEMICON CO LTD
- Filing Date
- 2026-02-11
- Publication Date
- 2026-05-26
AI Technical Summary
In narrow-channel devices, changes in electric field and ion concentration at the corners of shallow trench isolation structures lead to non-uniformity of threshold voltage and increased power consumption in NMOS devices, affecting circuit performance and reliability.
By acquiring simulation models of semiconductor devices, and using parameter databases to calibrate electric field and ion concentration distribution information, process parameters are adjusted to improve anomalies at corners, including increasing ion implantation dose and time, until the anomalies at corners disappear.
It improves the performance stability of semiconductor devices, reduces R&D and production costs, and accelerates the R&D process.
Smart Images
Figure CN121683692B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a parameter calibration method and manufacturing method for a semiconductor device. Background Technology
[0002] In narrow-channel devices, as the electric field and ion concentration at the corner of the shallow trench isolation (STI) structure change, the threshold voltage Vth of the NMOS device also changes. This causes the threshold voltage Vtlin in the linear region to decrease as the width of the active region decreases, resulting in poorer uniformity of the threshold voltage. This affects the normal operation and performance stability of the circuit, and increases the complexity and uncertainty of the circuit design.
[0003] In addition, the presence of the reverse narrow channel effect (RNWE) in NMOS devices can also change the electric field distribution in the channel and lead to an increase in leakage current, thereby increasing the power consumption of NMOS devices. In severe cases, it may even cause a series of problems related to thermal effects, such as increased chip temperature and decreased reliability. Summary of the Invention
[0004] Therefore, it is necessary to provide a parameter calibration method and manufacturing method for semiconductor devices to improve the performance of semiconductor devices, increase R&D speed, and save evaluation and production costs.
[0005] This application provides a parameter calibration method for semiconductor devices, including:
[0006] Obtain the simulation model corresponding to the semiconductor device;
[0007] The simulation model is calibrated based on the parameter database of the semiconductor device, wherein the parameter database includes at least the ion concentration distribution data of the semiconductor device and the corresponding electrical data when the active region width is different.
[0008] After testing and calibrating the simulation model, the electric field distribution and ion concentration distribution information at the corners of the shallow trench isolation structure in the simulation model are obtained.
[0009] If an anomaly is determined to occur at the corner based on the electric field distribution information and the ion concentration distribution information, the process parameters at the corner are adjusted, and the simulation model obtained after adjusting the process parameters is retested until no anomaly occurs at the corner of the simulation model.
[0010] If no abnormality occurs at the corner, output the process parameters corresponding to the current simulation model.
[0011] In one embodiment, the process of determining that an anomaly has occurred at the corner based on the electric field distribution information and the ion concentration distribution information includes:
[0012] Analyze the changes in ion concentration and electric field distribution at different locations at the same depth at the corner;
[0013] When both the ion concentration and threshold voltage at the corner decrease along the direction away from the shallow trench isolation structure, an anomaly occurs at the corner.
[0014] In one embodiment, the process of adjusting the process parameters at the corner when an anomaly occurs, and then retesting the simulation model obtained after adjusting the process parameters, includes:
[0015] If a problem occurs at the corner, the process parameters at the corner are adjusted to obtain the adjusted simulation model, wherein the process parameters include at least the concentration of implanted ions in the ion implantation process at the corner;
[0016] The adjusted simulation model is retested to determine whether any anomalies occur at the corners of the current simulation model.
[0017] If an anomaly occurs at the corner in the current simulation model, repeat the steps of adjusting the process parameters and testing the simulation model after adjusting the process parameters until no anomaly occurs at the corner in the current simulation model.
[0018] In one embodiment, the abnormality at the corner may be caused by the ions at the corner being released into the dielectric layer outside the shallow trench isolation structure, resulting in a decrease in the ion concentration and threshold voltage at the corner.
[0019] The method for adjusting the process parameters at the corner includes increasing at least one of the implantation dose and implantation time in the ion implantation process at the corner, so as to increase the concentration of implanted ions at the corner.
[0020] In one embodiment, the anomaly at the corner may be caused by an anti-narrow channel effect in the simulation model.
[0021] The method for adjusting the process parameters at the corner includes increasing at least one of the implantation dose and implantation time in the ion implantation process at the corner, so as to increase the concentration of implanted ions at the corner.
[0022] In one embodiment, the injected ions contained at the corner include at least boron ions.
[0023] In one embodiment, the ion concentration distribution data of the semiconductor device is obtained using secondary ion mass spectrometry.
[0024] In one embodiment, the electrical data corresponding to the semiconductor device having different active region widths include at least the threshold voltage, reverse bias leakage current, and cutoff current corresponding to the semiconductor device having different active region widths.
[0025] Accordingly, this application also provides a method for manufacturing a semiconductor device, comprising:
[0026] Using the parameter calibration method for semiconductor devices described above, the process parameters of the simulation model corresponding to the semiconductor device are obtained;
[0027] The semiconductor device is fabricated according to the stated process parameters.
[0028] In one embodiment, the process of fabricating the semiconductor device according to the process parameters includes:
[0029] Provide substrate;
[0030] A shallow trench isolation structure is formed within the substrate;
[0031] The shallow trench isolation structure is subjected to ion implantation using the aforementioned process parameters to adjust the ion concentration at the corners of the shallow trench isolation structure.
[0032] The unexpected effect of this application is that by calibrating the simulation model of the semiconductor device according to the parameter database of the semiconductor device, the accuracy of the test results based on the simulation model is improved; by analyzing whether there are any anomalies at the corners of the shallow trench isolation structure in the simulation model, and adjusting the process parameters of the simulation model with anomalies and retesting, the process parameters corresponding to the corners in the simulation model without anomalies are obtained, thereby effectively improving the performance of the semiconductor device, while speeding up the R&D progress and saving evaluation and production costs. Attached Figure Description
[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0034] Figure 1 This is a flowchart of a parameter calibration method for a semiconductor device provided in one embodiment of this application.
[0035] Figure 2 This is a schematic diagram of the structure corresponding to the step of obtaining the simulation model of the semiconductor device in the parameter calibration method for a semiconductor device provided in one embodiment of this application.
[0036] Figure 3 This is a schematic diagram showing the changes in electrical data of a semiconductor device with different active region widths in a parameter calibration method for a semiconductor device provided in one embodiment of this application.
[0037] Figure 4 This is a schematic diagram of the two-dimensional distribution of boron ion concentration at the corner of the active region in the simulation model of the semiconductor device parameter calibration method provided in one embodiment of this application.
[0038] Figure 5 This is a schematic diagram of the one-dimensional distribution of the boron ion concentration at the corner of the simulation model in the parameter calibration method for a semiconductor device provided in one embodiment of this application, along the direction away from the shallow trench isolation structure.
[0039] Figure 6 This is a schematic diagram showing the change in boron ion concentration in the oxide layer at the corner of a simulation model in a parameter calibration method for a semiconductor device provided in one embodiment of this application.
[0040] Figure 7 This is a schematic diagram of the one-dimensional distribution of boron ion concentration at the corner of the adjusted simulation model in the parameter calibration method for a semiconductor device provided in one embodiment of this application, along the direction away from the shallow trench isolation structure.
[0041] Figure 8 This is a schematic diagram showing the threshold voltage variation at the corner of the adjusted simulation model in the parameter calibration method for a semiconductor device provided in one embodiment of this application, when the active region width is different.
[0042] Figure 9 A flowchart illustrating a method for manufacturing a semiconductor device according to one embodiment of this application. Detailed Implementation
[0043] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.
[0045] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.
[0046] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.
[0047] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.
[0048] See Figure 1 One embodiment of this application provides a parameter calibration method for a semiconductor device, including the following steps S01 to S05.
[0049] Step S01: Obtain the simulation model corresponding to the semiconductor device.
[0050] Step S02: The simulation model is calibrated according to the parameter database of the semiconductor device. The parameter database includes at least the ion concentration distribution data of the semiconductor device and the corresponding electrical data when the active region width is different.
[0051] It should be noted that the parameter database typically includes all parameter information related to the semiconductor device. Appropriate parameter data can be selected from the parameter database according to the structure that needs to be calibrated, thereby performing targeted calibration of the simulation model.
[0052] Step S03: Test the calibrated simulation model and obtain the electric field distribution information and ion concentration distribution information at the corner of the shallow trench isolation structure in the simulation model.
[0053] It should be noted that the electric field distribution information and ion concentration distribution information obtained in step S03 are mainly used to confirm whether there are any abnormalities in the shallow trench isolation structure in the simulation model. The simulation model after testing and calibration can also be used to confirm whether there are any abnormalities in other parts of the simulation model, so as to adjust the relevant process parameters of the simulation model.
[0054] Step S04: If an anomaly is determined to occur at the corner based on the electric field distribution information and the ion concentration distribution information, adjust the process parameters at the corner, and retest the simulation model obtained after adjusting the process parameters until no anomaly occurs at the corner of the simulation model.
[0055] Step S05: If no abnormality occurs at the corner, output the process parameters corresponding to the current simulation model.
[0056] The semiconductor device parameter calibration method described above calibrates the semiconductor device simulation model based on the semiconductor device parameter database to improve the accuracy of test results based on the simulation model. By analyzing whether there are any anomalies at the corners of the shallow trench isolation structure in the simulation model, and adjusting the process parameters and retesting the simulation model with anomalies, the corresponding process parameters when there are no anomalies at the corners in the simulation model can be obtained. This effectively improves the performance of the semiconductor device, while speeding up the R&D process and saving evaluation and production costs.
[0057] See Figure 2 In one embodiment, a process simulation program corresponding to a semiconductor device can be established using TCAD simulation software, and a simulation model of the semiconductor device can be obtained by running the process simulation program.
[0058] In one embodiment, the ion concentration distribution data of the semiconductor device is obtained using secondary ion mass spectrometry (SIMS). Optionally, the electrical data corresponding to the semiconductor device with different active region widths include at least the threshold voltage (VTL), saturation current (IDS), and cutoff current (IOFF) corresponding to the semiconductor device with different active region widths (Width).
[0059] Figure 3 This diagram illustrates the variation of the threshold voltage in the linear region of a semiconductor device with different active region widths. (See attached diagram.) Figure 3 In one embodiment, the process of calibrating the simulation model according to the parameter database of the semiconductor device includes: Max represents the maximum value of the threshold voltage corresponding to different active region widths, Min represents the minimum value of the threshold voltage corresponding to different active region widths, TT represents the target value of the threshold voltage corresponding to different active region widths, and the threshold voltage variation curve TCAD_BSL of the calibrated simulation model under different active region widths is obtained by calibrating the simulation model according to the Si_BSL curve.
[0060] In one embodiment, the process of determining an anomaly at the corner based on electric field distribution information and ion concentration distribution information includes: analyzing the changes in ion concentration and electric field distribution at different locations at the same depth at the corner; and determining that an anomaly occurs at the corner when both the ion concentration and threshold voltage at the corner decrease along the direction away from the shallow trench isolation structure.
[0061] Figure 4 This is a two-dimensional schematic diagram of the boron ion concentration distribution at the corner of the source region in the simulation model. Figure 5This is a one-dimensional schematic diagram showing the variation of boron ion concentration at the corner along the direction away from the shallow trench isolation structure. (See attached diagram) Figure 4 and Figure 5 For example, along the direction away from the shallow trench isolation structure (i.e., from the red part to the blue part), the concentration of boron ions in the semiconductor device continuously decreases, which leads to a decrease in the threshold voltage of the semiconductor device. It can be seen that an anomaly occurs at the corner of the semiconductor device at this time.
[0062] Figure 6 This diagram illustrates the variation of boron ion concentration in the oxide layer at the corner of the simulation model. The red line represents the variation of boron ion concentration at different locations after ion implantation (IMP) in the well region without heat treatment, while the green line represents the variation of boron ion concentration at different locations after heat treatment of the semiconductor device. (See also...) Figure 6 In one embodiment, the anomaly at the corner may be caused by: ions at the corner being released into the dielectric layer outside the shallow trench isolation structure, resulting in a decrease in ion concentration and threshold voltage at the corner; or, a reverse narrow-channel effect (RNWE) may occur in the simulation model. Accordingly, adjusting the process parameters at the corner may involve increasing at least one of the implantation dose and implantation time in the ion implantation process at the corner to increase the concentration of implanted ions at the corner. Optionally, the implanted ions at the corner may include at least boron ions.
[0063] In one embodiment, the process of adjusting the process parameters at the corner and retesting the simulation model obtained after adjusting the process parameters when an anomaly occurs at the corner includes: adjusting the process parameters at the corner to obtain an adjusted simulation model, wherein the process parameters include at least the concentration of implanted ions in the ion implantation process at the corner; retesting the adjusted simulation model to determine whether an anomaly occurs at the corner in the current simulation model; if an anomaly still occurs at the corner in the current simulation model, repeating the steps of adjusting the process parameters and testing the simulation model after adjusting the process parameters until no anomaly occurs at the corner in the current simulation model.
[0064] Figure 7This is a one-dimensional schematic diagram of the boron ion concentration at the corner of the adjusted simulation model along the direction away from the shallow trench isolation structure. The red line represents the boron ion (B) concentration distribution in the active area (AA) of the semiconductor device in the standard process of record (POR) with an implantation energy of 90 keV; the green line represents the boron difluoride (BF2) ion concentration distribution in the active area (AA) of the semiconductor device with an implantation energy of 380 keV; and the blue line represents the boron ion concentration distribution when boron difluoride (BF2) ions are implanted in the shallow trench isolation structure of the semiconductor device.
[0065] Figure 8 This is a schematic diagram showing the threshold voltage variation at the corner of the adjusted simulation model with different active region widths. Figure 8 The purple line (POR) represents the threshold voltage variation corresponding to different active region widths during ion implantation without a shallow trench isolation structure under standard process conditions. The solid black line, long black dashed line, and short dashed line represent the upper, lower, and lower limits of the target, respectively. The green, red, and blue lines represent the boron ion concentration at the corner of the shallow trench isolation structure when it is 1×10⁻⁶. 13 / cm 3 2×10 13 / cm 3 and 3×10 13 / cm 3 The threshold voltage changes for different active region widths are shown, with the red line representing the best performance, i.e., a boron ion concentration of 2 × 10⁻⁶. 13 / cm 3 The optimal threshold voltage corresponds to different active region widths. (See also...) Figure 7 and Figure 8 After adding the boron difluoride (BF2) ion implantation process, the variation in ion concentration at the corner along the direction away from the shallow trench isolation structure decreased, and no significant decrease was observed. Correspondingly, the threshold voltage at the corner for different active region widths also did not show a significant decrease. Therefore, no anomalies were observed at the corner in the adjusted simulation model. Thus, the process parameters corresponding to the current simulation model can be output for use in the semiconductor device manufacturing process, thereby improving the performance of the semiconductor device.
[0066] Accordingly, see Figure 9 One embodiment of this application also provides a method for manufacturing a semiconductor device, including the following steps S1 and S2.
[0067] Step S1: Using the semiconductor device parameter calibration method described above, obtain the process parameters of the simulation model corresponding to the semiconductor device.
[0068] Step S2: Fabricate the semiconductor device according to the process parameters.
[0069] The semiconductor device manufacturing method described above, by using a semiconductor device parameter calibration method to obtain the process parameters of the simulation model corresponding to the semiconductor device, and preparing the semiconductor device according to the obtained process parameters, can improve the performance of the semiconductor device while shortening the research and development cycle of the semiconductor device, thereby helping to save evaluation costs and production costs.
[0070] In one embodiment, the process of fabricating a semiconductor device according to process parameters includes: providing a substrate; forming a shallow trench isolation structure within the substrate; and performing an ion implantation process on the shallow trench isolation structure using the process parameters to adjust the ion concentration at the corners of the shallow trench isolation structure. It should be noted that in other embodiments of this application, the process parameters can be adjustments made to parameters for other structures of the semiconductor device, and the specific manufacturing method of the semiconductor device can be adaptively adjusted based on the process parameters obtained from the semiconductor device parameter calibration method to ensure that the finally fabricated semiconductor device meets the process requirements.
[0071] The unexpected effect of this application is that by calibrating the simulation model of the semiconductor device according to the parameter database of the semiconductor device, the accuracy of the test results based on the simulation model is improved; by analyzing whether there are any anomalies at the corners of the shallow trench isolation structure in the simulation model, and adjusting the process parameters of the simulation model with anomalies and retesting, the process parameters corresponding to the corners in the simulation model without anomalies are obtained, thereby effectively improving the performance of the semiconductor device, while speeding up the R&D progress and saving evaluation and production costs.
[0072] In the description of this specification, the references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.
[0073] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0074] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A parameter calibration method for a semiconductor device, characterized in that, include: Obtain the simulation model corresponding to the semiconductor device; The simulation model is calibrated based on the parameter database of the semiconductor device, wherein the parameter database includes at least the ion concentration distribution data of the semiconductor device and the corresponding electrical data when the active region width is different. After testing and calibrating the simulation model, the electric field distribution and ion concentration distribution information at the corners of the shallow trench isolation structure in the simulation model are obtained. If an anomaly is determined to occur at the corner based on the electric field distribution information and the ion concentration distribution information, the process parameters at the corner are adjusted, and the simulation model obtained after adjusting the process parameters is retested until no anomaly occurs at the corner of the simulation model. If no abnormality occurs at the corner, output the process parameters corresponding to the current simulation model.
2. The parameter calibration method for semiconductor devices according to claim 1, characterized in that, The process of determining the anomaly at the corner based on the electric field distribution information and the ion concentration distribution information includes: Analyze the changes in ion concentration and electric field distribution at different locations at the same depth at the corner; When both the ion concentration and threshold voltage at the corner decrease along the direction away from the shallow trench isolation structure, an anomaly occurs at the corner.
3. The parameter calibration method for semiconductor devices according to claim 1, characterized in that, In the event of an anomaly at the corner, the process of adjusting the process parameters at the corner and retesting the simulation model obtained after adjusting the process parameters includes: If a problem occurs at the corner, the process parameters at the corner are adjusted to obtain the adjusted simulation model, wherein the process parameters include at least the concentration of implanted ions in the ion implantation process at the corner; The adjusted simulation model is retested to determine whether any anomalies occur at the corners of the current simulation model. If an anomaly occurs at the corner in the current simulation model, repeat the steps of adjusting the process parameters and testing the simulation model after adjusting the process parameters until no anomaly occurs at the corner in the current simulation model.
4. The parameter calibration method for semiconductor devices according to claim 3, characterized in that, The reasons for the abnormality at the corner include: ions at the corner are released into the dielectric layer outside the shallow trench isolation structure, resulting in a decrease in the ion concentration and threshold voltage at the corner; The method for adjusting the process parameters at the corner includes increasing at least one of the implantation dose and implantation time in the ion implantation process at the corner, so as to increase the concentration of implanted ions at the corner.
5. The parameter calibration method for a semiconductor device according to claim 3, characterized in that, The reasons for the anomaly at the corner include: the occurrence of the anti-narrow channel effect in the simulation model; The method for adjusting the process parameters at the corner includes increasing at least one of the implantation dose and implantation time in the ion implantation process at the corner, so as to increase the concentration of implanted ions at the corner.
6. The parameter calibration method for a semiconductor device according to claim 1 or 3, characterized in that, The injected ions contained at the corner include at least boron ions.
7. The parameter calibration method for a semiconductor device according to claim 1, characterized in that, Ion concentration distribution data of the semiconductor device obtained using secondary ion mass spectrometry.
8. The parameter calibration method for a semiconductor device according to claim 1, characterized in that, The electrical data corresponding to the semiconductor device having different active region widths include at least the threshold voltage, reverse bias leakage current, and cutoff current corresponding to the semiconductor device having different active region widths.
9. A method for manufacturing a semiconductor device, characterized in that, include: The process parameters of the simulation model corresponding to the semiconductor device are obtained by using the parameter calibration method of the semiconductor device as described in any one of claims 1 to 8. The semiconductor device is fabricated according to the stated process parameters.
10. The method for manufacturing a semiconductor device according to claim 9, characterized in that, The process of fabricating the semiconductor device according to the said process parameters includes: Provide substrate; A shallow trench isolation structure is formed within the substrate; The shallow trench isolation structure is subjected to ion implantation using the aforementioned process parameters to adjust the ion concentration at the corners of the shallow trench isolation structure.