A control method for wide voltage operation of a CLLC resonant converter

Abstract

The application relates to the field of power electronics, and discloses a control method for wide-voltage operation of a CLLC resonant converter. In the CLLC resonant converter, the same-name end of the primary side is connected to the emitter of a switching tube Q1 and the collector of a switching tube Q2, and the different-name end is connected to the emitter of a switching tube Q3 and the collector of a switching tube Q4; the same-name end of the secondary side is connected to the emitter of a switching tube S1 and the collector of a switching tube S2, and the different-name end is connected to the emitter of a switching tube S3 and the collector of a switching tube S4; the method comprises the following steps of O-mode under the PO mode: when being in the positive half cycle, if the output voltage of the secondary side is greater than zero, the switching tube S2 is turned on in advance by a phase difference alpha relative to the end phase of the O-mode; and when being in the negative half cycle, if the output voltage of the secondary side is less than zero, the switching tube S1 is turned on in advance by the phase difference alpha. The method is related to a circuit structure which is simple, can effectively widen the voltage gain range, realizes higher voltage gain at lower loss and cost, is more suitable for wide-range voltage operation, and has higher stability.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a control method for wide-voltage operation of a CLLC resonant converter. Background Technology

[0002] CLLC resonant converters have a simple topology, enable soft switching of the primary-side switching transistors and secondary-side rectifier transistors, and support bidirectional V2G energy transfer. They are widely used in on-board chargers (OBCs) for electric vehicles. The continuous development of electric vehicle charging technology has placed wider demands on the operating voltage range of the DC / DC converters following the on-board charger.

[0003] In terms of converter topology, to obtain higher voltage gain, some additional components can be added to the CLLC resonant converter. However, adding components will inevitably increase additional cost and complexity, and may result in the loss of soft switching under PFM (Pulse Frequency Modulation) control strategy, leading to increased converter losses.

[0004] In terms of modeling and analysis methods, the parameter design of existing CLLC resonant converters mostly relies on frequency domain analysis, but the accuracy is limited and the error is large. The design results often need to be iterated and corrected multiple times, which is not suitable for situations where the switching frequency deviates too far from the resonant frequency.

[0005] In terms of control strategies, PFM (Power Flow Mechanism) is the most widely used control strategy for CLLC resonant converters. When the CLLC resonant converter operates near its resonant frequency, this control method offers advantages such as high converter efficiency and simple control. However, when the CLLC resonant converter requires a higher output voltage, its switching frequency deviates significantly from the resonant frequency. This not only increases the design difficulty of magnetic components but also significantly reduces converter efficiency. Since the traditional PFM control strategy only controls the switching frequency, its voltage regulation capability is limited.

[0006] In summary, traditional CLLC resonant converters still have the following limitations in widening the voltage gain range: at the topology level, additional components are usually required, leading to structural complexity and increased losses; in terms of control strategy, traditional CLLC resonant converters mostly use PFM control, which adjusts the switching frequency to control the output voltage, but in order to achieve higher voltage gain, the switching frequency often needs to be significantly reduced, which deviates severely from the resonant frequency and affects efficiency. Summary of the Invention

[0007] To address the aforementioned technical problems in the prior art, this invention aims to provide a control method for wide-voltage operation of a CLLC resonant converter, which can operate under a wider voltage range, supports deep discharge of electric vehicle batteries, has high stability, and does not require the introduction of additional components, thus avoiding structural complexity and increased losses.

[0008] Specifically, this invention provides a control method for wide-voltage operation of a CLLC resonant converter, the technical solution of which is as follows:

[0009] In the CLLC resonant converter, the primary side terminals with the same name are connected to the emitter of switch Q1 and the collector of switch Q2, the primary side terminals with different names are connected to the emitter of switch Q3 and the collector of switch Q4, the secondary side terminals with the same name are connected to the emitter of switch S1 and the collector of switch S2, and the secondary side terminals with different names are connected to the emitter of switch S3 and the collector of switch S4.

[0010] In the O mode of the PO mode:

[0011] When in the positive half-cycle, if the secondary output voltage is greater than zero, the phase difference is earlier than the end phase of the 0-mode. Turn on the switch S2;

[0012] When in the negative half-cycle, if the secondary output voltage is less than zero, the phase difference is earlier than the end phase of the 0-mode. Turn on the switch S1.

[0013] Compared to existing technologies, the technical solution provided by this invention has a simple structure. Based on the existing CLLC resonant converter topology, without adding any components, it only adjusts the O mode of the PO mode of the CLLC resonant converter. Specifically, in the O mode, one of the synchronous switching transistors on the secondary side is turned on in advance, clamping the secondary resonant cavity to a zero-voltage state. Without reducing the switching frequency, the voltage gain range of the CLLC resonant converter can be effectively widened, achieving a higher voltage gain with lower loss and cost. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the topology of a CLLC resonant converter.

[0015] Figure 2 This is a schematic diagram of the three basic operating modes of a CLLC resonant converter.

[0016] Figure 3 This is a key waveform diagram of the PO mode of a CLLC resonant converter.

[0017] Figure 4 This is the equivalent circuit diagram of the S-mode of the CLLC resonant converter in this invention.

[0018] Figure 5 This is a key waveform diagram of the CLLC resonant converter in this invention when the lead conduction angle is 10°.

[0019] Figure 6 This is a key waveform diagram of the POSO mode of the CLLC resonant converter in this invention.

[0020] Figure 7 This is a key waveform diagram of the POS mode of the CLLC resonant converter in this invention.

[0021] Figure 8 This is a qualitative diagram of the apparent input power of the CLLC resonant converter in this invention.

[0022] Figure 9 This is a key waveform diagram of the POS mode of the CLLC resonant converter in the positive half-switching period of this invention.

[0023] Figure 10 This is a schematic diagram illustrating the key process of time-domain modeling for the CLLC resonant converter in this invention.

[0024] Figure 11 This is a three-dimensional gain surface plot of frequency and phase for time-domain modeling of the CLLC resonant converter in this invention.

[0025] Figure 12 This is a gain-switching frequency characteristic curve of the CLLC resonant converter in this invention.

[0026] Figure 13 This is a gain-phase characteristic curve of the CLLC resonant converter in this invention.

[0027] Figure 14 This is a circuit diagram of the PFM / PSM (Pulse Skipping Modulation) hybrid control used in the CLLC resonant converter of this invention.

[0028] Figure 15 The diagram shows the key operating waveforms of a CLLC resonant converter using PFM / PSM hybrid control.

[0029] Figure 16 This is a schematic diagram comparing the simulation results and time-domain modeling of the CLLC resonant converter in this invention.

[0030] Figure 17 The graph shows the relationship between the switching frequency and the output voltage under PFM / PSM hybrid control and PFM control in the CLLC resonant converter of this invention. Detailed Implementation

[0031] The technical solution provided by the present invention will be further described in detail below with reference to the accompanying drawings.

[0032] Vehicle-to-Grid (V2G) technology has emerged alongside the large-scale grid integration of electric vehicles. This technology organically combines the randomness and intermittency of EV battery charging with grid load fluctuations, enabling coordinated management of both. Implementing V2G requires on-board chargers to support bidirectional energy flow, respond to grid scheduling to complete charging and discharging, and possess characteristics such as high power density, high efficiency, and wide voltage gain. Compared to gasoline vehicles, while electric vehicles offer advantages such as environmental friendliness and convenience, they still face challenges including high battery cost, short battery life, insufficient reliability, limited driving range, and long charging times. Battery life and charging speed are closely related to the performance of the on-board charger. Therefore, the design and control of the on-board charger (OBC) are crucial for promoting the construction of fast-charging infrastructure and the application of V2G.

[0033] Electric vehicle on-board chargers (OBCs) typically consist of a front-end AC / DC rectifier and a rear-end DC / DC converter. The front-end generally uses a PFC (Power Factor Correction) converter to convert AC power into a stable DC bus voltage. The rear-end is an isolated DC / DC structure responsible for adjusting the DC voltage output from the front-end to a suitable voltage range for battery charging, and has a certain degree of regulation capability. Currently, most electric vehicles use lithium batteries as their energy storage unit. The charging process includes multiple stages such as pre-charging, constant current, and constant voltage, during which the battery voltage fluctuates significantly. In a deep discharge state, the lithium battery voltage can drop to as low as 27% of its rated value, while at a full charge it can reach 113%, with the ratio of the highest voltage to the lowest voltage being 4.18 times. To match such a wide voltage range, the OBC's rear-end DC / DC converter must have a wide output range capability. For safety reasons, a transformer-isolated DC / DC topology is generally chosen, but this introduces additional losses and increases size. Increasing the switching frequency can effectively reduce the size of inductors, transformers, and filter components, thereby increasing power density; therefore, higher frequency switching is an important way to achieve miniaturization. However, increasing the switching frequency leads to increased switching losses, necessitating the use of soft-switching technology to ensure efficiency. Therefore, high power density, high efficiency, high-frequency operation, and soft switching together constitute the key elements of a high-performance DC / DC converter.

[0034] To address the issues of large switching frequency variations and significant circulating current in isolated bidirectional DC / DC converters operating over a wide voltage range, existing research mainly focuses on topology optimization and control strategies to enable the converter to achieve a wider voltage gain range within a smaller frequency conversion range.

[0035] In terms of topology optimization, gain adjustment is often achieved by adding auxiliary switching transistors, adjusting the resonant network voltage, or changing the network structure. For example, an auxiliary switch can be introduced on the secondary side to switch between rectification and voltage multiplication modes by switching the series and parallel connections of capacitors; or a half-bridge CLLC resonant circuit and a Buck-Boost converter can be integrated to achieve high gain and soft switching with the help of pulse width modulation; or an LLC and Buck cascaded structure can be used to control the output by adjusting the duty cycle of the secondary side switch, but its energy flows in one direction; or a two-stage cascaded architecture can be used, with the front-stage Buck controlling the bus voltage and the rear-stage LLC regulating the output, and voltage and current surges can be suppressed by switching between full-bridge and half-bridge modes; or a hybrid multi-mode control can be used, that is, to achieve full-wave, half-wave and voltage multiplication operation by using stacked switches, and to broaden the gain by combining frequency conversion, pulse width and asymmetric pulse width modulation; or a three-level LLC converter with four operating modes can be designed to achieve soft switching and smooth transition over a wide gain range through flexible control; or an adjustable transformer turns ratio and a reconfigurable bridge structure can be used to achieve three effective turns ratios through switch reconfiguration, and the main side can be switched to half-bridge at low voltage to further extend the range.

[0036] In addition, changing the operating state by adding passive components is a common approach. This can be achieved by adding a parallel LC circuit on the primary side to form a five-element resonant cavity, combining voltage doubler rectification and pulse width modulation to achieve wide gain; or by using an LCL-T resonant network, with a stacked half-bridge on the primary side and relay switching between half-bridge and full-bridge on the secondary side, allowing for fixed frequency and phase shift control for easy parameter design; or by using a three-phase inverter and rectifier to form a dual-resonant-cavity LLC, which can switch to multiple operating modes, but component utilization is low in some modes; or by using a double half-bridge in parallel on both sides of the transformer to achieve multiple switching of input and output voltages, but this is complex to control and has poor efficiency under light loads; or by adding a bridge arm to a full-bridge LLC and reusing the resonant inductor for pre-energy storage to improve gain; or by introducing an anti-resonant cavity to utilize the third harmonic for power transmission, reducing circulating energy and losses; or by using a voltage-controlled variable capacitor and auxiliary clamping circuit, analyzing transient processes and bias effects to optimize resonant parameters.

[0037] Regarding control strategies, traditional CLLC resonant converters often employ PFM (Power Factor Modulation), but this strategy suffers from problems such as an excessively wide switching frequency range. Burst mode control can be used to improve performance under light loads, but this presents challenges due to control complexity and electromagnetic interference. Alternatively, extended phase shift control can be applied to the CLLC full-bridge, with modeling and analysis of the relationship between phase shift and efficiency to determine the soft-switching range. Another approach is to use phase-shift pulse width modulation (PWM), which enhances voltage regulation and efficiency under light loads and allows for precise analysis of voltage gain.

[0038] To address the challenges faced by traditional CLLC resonant converters under high voltage gain conditions, this invention proposes a novel operating mode S. This mode effectively widens the converter's voltage gain range by prematurely turning on a set of synchronous rectifier switches, clamping the secondary resonant cavity to a zero-voltage state.

[0039] To address the shortcomings of existing modeling and analysis methods, this invention adopts a time-domain modeling approach to construct a more accurate mathematical model, performs time-domain analysis on novel operating modes of the converter, and effectively verifies the constructed time-domain model using a simulation platform.

[0040] Building upon this foundation, a hybrid PFM / PSM control strategy is proposed, effectively overcoming the limited gain capability of a single PFM control and significantly improving voltage gain within a narrow frequency adjustment range. Furthermore, addressing the issue that traditional fundamental frequency analysis methods cannot accurately describe the time-varying operating state of the converter, this paper employs time-domain analysis to effectively model the converter and investigate its gain characteristics under a new mode. Finally, an experimental model is built using the PSIM simulation platform (Power Simulation, a simulation software for power electronics and motor control) to verify the accuracy of the time-domain modeling, the feasibility of the proposed new operating mode, and the effectiveness of the PFM / PSM hybrid control strategy.

[0041] I. CLLC Resonant Converter Topology and New Mode Construction:

[0042] Specifically, the topology diagram of the CLLC resonant converter is as follows: Figure 1 As shown. Among them, This is the actual input current. This is the actual input voltage. This is the voltage of the primary resonant network (primary resonant cavity voltage). This is the voltage of the secondary resonant network (secondary resonant cavity voltage). This is the actual output voltage. The transformer turns ratio is denoted as... . and These are the resonant inductance and resonant capacitance on the primary side, respectively. and These are the resonant inductor and resonant capacitor on the secondary side, respectively. The excitation inductor is Q1 and Q3, which are the upper transistors, and Q2 and Q4 are the lower transistors. The secondary rectification is composed of four transistors, S1 to S4.

[0043] A schematic diagram of the three basic operating modes that a CLLC resonant converter may contain within a single switching cycle under conventional operating conditions is shown below. Figure 2As shown, these are: P-mode (positive clamping), N-mode (negative clamping), and O-mode (discontinuous). In P-mode, the resonant inductor... With resonant capacitor Resonance occurs, and the voltage of the secondary resonant cavity... clamped in In N-mode, the resonant inductance With resonant capacitor Similarly, at resonance, the voltage of the secondary resonant cavity... clamped in In mode O, the magnetizing inductance Resonant inductor With resonant capacitor All three components resonate simultaneously, at which point there is no energy transfer between the input and output sides. (See diagram.) This represents the resonant inductor current on the primary side in P-mode. This refers to the resonant inductor current on the secondary side in P-mode. This is the resonant capacitor voltage on the primary side in P mode. This represents the resonant capacitor voltage on the secondary side in P-mode. This refers to the magnetizing inductor current in P mode. This represents the resonant inductor current on the primary side in the N-mode. This refers to the resonant inductor current on the secondary side in N-mode. This represents the resonant capacitor voltage on the primary side in N-mode. This represents the resonant capacitor voltage on the secondary side in N-mode. This refers to the magnetizing inductor current in the N-mode. This represents the resonant inductor current on the primary side in mode O. This represents the resonant capacitor voltage on the primary side in mode O. This represents the excitation inductance current in mode O.

[0044] During the half-switching cycle, the CLLC resonant converter can form various operating modes through combinations of different basic operating modes. Typical modes include PO mode, PON mode, PN mode, NP mode, NOP mode, and OPO mode. Among these, the PO mode is often used for boost mode. In this mode, the converter can easily achieve zero voltage switch (ZVS) and has low reactive power loss. In addition, the voltage gain of the PO mode increases monotonically as the switching frequency decreases, which is beneficial to the stability of the closed-loop control system. Therefore, under conventional operating conditions, to achieve boost operation, the CLLC resonant converter should be preferentially operated in the PO mode.

[0045] The key waveforms of the CLLC resonant converter in PO mode are shown below. Figure 3 As shown. The primary-side switches Q1 and Q4 are... If synchronous rectification is considered, the secondary-side rectifier switches S1 and S4 will be turned on synchronously. At this time, the CLLC resonant converter operates in P mode. The secondary resonant inductor current first gradually increases from 0 to its maximum value, then gradually decreases and returns to 0. The primary resonant current and the excitation current... The timing is equal, and then the CLLC resonant converter enters the O mode. During this stage, the primary resonant current and the excitation current remain consistent, while the secondary resonant current remains 0 until... At time O, the CLLC resonant converter re-enters symmetrical P-mode operation.

[0046] Although CLLC resonant converters offer numerous advantages when operating in the PO mode, their voltage gain range is somewhat limited. To extend the converter's voltage gain capability, this invention proposes to turn on a pair of bridge arms (switches S1 and S2) of the secondary rectifier bridge earlier during the PO mode. The specific method is as follows: Figure 3 As shown: Switch S1 is turned on ahead of time during the positive half-cycle, and switch S2 is turned on ahead of time during the negative half-cycle, with the phase difference between the two being turned on ahead of time. Both are called lead conduction angles, meaning they have the same phase difference relative to the end phase of the O mode. Simultaneously, switches Q1-Q4 and switches S3-S4 are still controlled using the PO mode control method. If the secondary resonant cavity voltage is satisfied at the early conduction time during the positive half-cycle... Greater than 0, or satisfying the secondary resonant cavity voltage at the time of early conduction during the negative half-cycle. If the value is less than 0, the secondary resonant cavity will be clamped to zero potential during this early conduction phase, thereby transforming the O-mode into a new mode, which this invention defines as the S-mode. The equivalent circuit diagram corresponding to the S-mode is shown below. Figure 4 As shown. Conversely, if the secondary resonant cavity voltage is turned on prematurely during the positive half-cycle... The voltage of the secondary resonant cavity is less than 0, or when it is turned on early in the negative half-cycle. If the value is greater than 0, the secondary resonant cavity cannot be effectively short-circuited. In this case, the S-mode will not appear.

[0047] In short, to achieve the S mode, the O mode of the PO mode is:

[0048] When in the positive half-cycle, if the secondary output voltage is greater than zero, the phase difference is earlier than the end phase of the 0-mode. Turn on the switch S2;

[0049] When in the negative half-cycle, if the secondary output voltage is less than zero, the phase difference is earlier than the end phase of the 0-mode. Turn on the switch S1.

[0050] Secondary resonant cavity voltage It is highly correlated with the converter's resonant parameters and operating conditions. To clarify its correspondence with the operating modes, this invention builds an open-loop simulation model in the PSIM simulation platform based on the following parameters:

[0051] ; ; ;

[0052] ; ; ;

[0053] in, For switching frequency, Indicates a constant current load;

[0054] This simulation allows for a detailed analysis of the secondary resonant cavity voltage at the moment of early conduction. How does the polarity determine whether the converter enters the S-mode?

[0055] Leading conduction angle Key waveforms of the CLLC resonant converter are as follows: Figure 5 As shown. Due to the lead-up conduction time Secondary resonant cavity voltage If the value is less than 0, the secondary resonant cavity cannot be effectively short-circuited, so the CLLC resonant converter still operates in the PO mode.

[0056] When the lead conduction angle is further increased to At the phase corresponding to the time, the secondary resonant cavity voltage The condition of a value greater than 0 is met, and the secondary resonant cavity is quickly short-circuited, causing the CLLC resonant converter to enter the S-mode. However, due to the voltage of the secondary resonant cavity at this moment... The amplitude is low, the energy in the resonant cavity is released rapidly, and the secondary resonant current quickly decays back to 0. Afterward, the CLLC resonant converter returns to O-mode operation. Ultimately, the CLLC resonant converter sequentially experiences the P-mode, O-mode, S-mode, and O-mode (i.e., POSO mode) within one switching cycle. The key waveforms of this process are shown below. Figure 6 As shown.

[0057] With the lead conduction angle With further increases, the secondary resonant cavity voltage If the lead-on time is sufficiently large to support continuous discharge during the lead-on phase, the S-mode completely replaces the O-mode during the lead-on period, and the CLLC resonant converter switches from POSO mode to POS mode. The key waveforms of the POS mode are shown below. Figure 7 As shown. Figure 7 As shown, in At that moment, the CLLC resonant converter operates in the P mode, which is no different from the P mode of the traditional PO mode. At that moment, the CLLC resonant converter entered the O mode and operated until... At that moment, the secondary-side rectifier switch S2 is turned on, and the secondary-side resonant cavity voltage... When the turn-on phase increases, the O mode gradually disappears until it completely transforms into the S mode. The CLLC resonant converter reaches the critical operating mode, the PS mode, in which the CLLC resonant converter has the maximum voltage gain.

[0058] With the lead conduction angle As the voltage continues to increase, the duration of the O mode under the POS mode gradually shortens and is eventually completely replaced by the S mode. The CLLC resonant converter then enters the critical operating state, i.e., the PS mode. Under this critical mode, the converter can achieve the maximum voltage gain.

[0059] Qualitative diagrams of the apparent input power of the CLLC resonant converter in PO mode, POS mode, and PS mode are shown below. Figure 8 As shown. Indicates the current of the resonant inductor. The area enclosed by the time axis. The resonant inductor current in the POS and PS modes compared to the conventional operating mode (PO mode) of a CLLC converter. Area enclosed by the time axis The area was increased respectively and area and area smaller than area Make the following assumptions:

[0060] 1. Input active power Equal to output active power ;

[0061] 2. Magnet inductance under three operating modes The resulting reactive power same;

[0062] 3. At the end of P mode, the auxiliary excitation inductor current under the three operating modes same.

[0063] Therefore, the apparent input power of the CLLC resonant converter is calculated. The formula is as follows:

[0064] ;

[0065] In the formula, This is the resonant inductor current on the primary side. For the switching cycle, This is the load resistance.

[0066] It is evident that the early turn-on of the rectifier switch increases the apparent input power. Due to reactive power and load resistance The output voltage remains unchanged. Also with apparent input power It increases with each increase, reaching its maximum in the PS mode.

[0067] II. Temporal Modeling:

[0068] Since the fundamental frequency analysis method equates the input and output signals to sine waves, it is only applicable to the region near the resonant frequency. The gain deviation is significant when deviating from the resonant point, making it unsuitable for designing wide-range output circuits and even less suitable for modeling and analyzing new modes. Time-domain analysis, compared to the traditional fundamental frequency analysis method, is more suitable for analyzing time-varying systems and offers higher accuracy. This invention employs a time-domain analysis method, namely, establishing a time-domain model through numerical calculation.

[0069] The circuit state equations, taking the P-mode as an example, are constructed as follows:

[0070] ;

[0071] In the formula, The differential symbol, This represents the resonant inductor current on the primary side in P-mode. This refers to the magnetizing inductor current in P mode. This is the resonant capacitor voltage on the primary side in P mode. This refers to the resonant inductor current on the secondary side in P-mode. This is the resonant capacitor voltage on the secondary side in P-mode.

[0072] Applying the Laplace transform and inverse Laplace transform to the above equation, the normalized time-domain expressions for the P-mode resonant current and resonant capacitor voltage are as follows:

[0073] ;

[0074] ;

[0075] ; ; ;

[0076] In the formula, Duration for The resonant capacitor voltage on the primary side at time P mode. for The resonant inductor current on the primary side in mode P at time P. for The resonant capacitor voltage on the secondary side in mode P at time t. for The resonant inductor current on the secondary side in mode P at time t. This represents the voltage gain of the resonant cavity. and These are intermediate computational quantities; , , and These are the unknown integral constants determined by the initial state of the resonant circuit, which are only related to the initial state of the resonant circuit and can reflect the energy storage state at the start of the P mode. This is the impedance reference value. The primary impedance is... This is the voltage reference value. This is the current reference value. The switching frequency reference value, It is the resonant frequency.

[0077] The normalized time domain formulas for the S-mode resonant current and resonant capacitor voltage are constructed as follows:

[0078] ;

[0079] In the formula, for The resonant capacitor voltage on the primary side in the S-mode at time S. for The resonant inductor current on the primary side in the S-mode at time S. for The resonant capacitor voltage on the secondary side in the S-mode at time t. for The resonant inductor current on the secondary side in the S-mode at time t. , , and These are the unknown integral constants determined by the initial state of the resonant circuit. They are only related to the initial state of the resonant circuit and can reflect the energy storage state at the start of the S-mode.

[0080] Similarly, the normalized time-domain formulas for the O-mode resonant current and resonant capacitor voltage are constructed as follows:

[0081] ;

[0082] ;

[0083] In the formula, for The resonant capacitor voltage on the primary side at time O mode. for The resonant inductor current on the primary side in mode O at time t. This is for intermediate computational costs. and These are the unknown integral constants determined by the initial state of the resonant circuit. They are only related to the initial state of the resonant circuit and can reflect the energy storage state at the start of the O mode.

[0084] Due to the resonant inductor current and resonant inductor current Resonant capacitor voltage and resonant capacitor and auxiliary excitation inductor current The CLLC resonant converter is symmetrical within both the positive and negative half-switching periods; therefore, analyzing only the positive half-switching period is sufficient to obtain its operating characteristics. The key waveforms of the POS mode during the positive half-switching period are shown below. Figure 9 As shown.

[0085] When a CLLC resonant converter transitions from one operating mode to another, the resonant inductor current and resonant capacitor voltage cannot change abruptly. Therefore, taking the transition from P-mode to O-mode as an example, the continuity condition of the resonant inductor current and resonant capacitor voltage can be expressed as:

[0086] ;

[0087] In the formula, The time elapsed for mode P. The time elapsed for mode O. Start with P mode The resonant inductor current on the primary side, This represents the resonant inductor current on the primary side of mode O at the initial moment. Start with O mode The resonant inductor current on the primary side, The resonant inductor current on the primary side of the S-mode at the initial moment; Start with P mode The resonant inductor current on the secondary side, The resonant inductor current on the secondary side of mode O at the initial moment. Start with O mode The resonant inductor current on the secondary side, The resonant inductor current on the secondary side of the S-mode at the initial moment; Start with P mode The voltage of the resonant capacitor on the primary side after the primary side, This represents the resonant capacitor voltage on the primary side of mode O at the initial moment. Start with O mode The voltage of the resonant capacitor on the primary side after the primary side, This represents the resonant capacitor voltage on the primary side of the S-mode at the initial moment. Start with P mode The voltage of the resonant capacitor on the secondary side, The initial resonant capacitor voltage on the secondary side of mode O. Start with O mode The voltage of the resonant capacitor on the secondary side, This represents the resonant capacitor voltage on the secondary side of the S-mode at the initial moment.

[0088] Due to the symmetry of the CLLC resonant converter, the resonant inductor current within half a switching cycle... and resonant inductor current Resonant capacitor voltage and resonant capacitor voltage The initial and final values ​​are opposite. Therefore, the symmetry condition for the resonant inductor current and the resonant capacitor voltage is as follows:

[0089] ;

[0090] In the formula, The time elapsed during the S-mode. This represents the resonant inductor current on the primary side of mode P at the initial moment. Start with S mode The resonant inductor current on the primary side, This represents the resonant capacitor voltage on the primary side of mode P at the initial moment. Start with S mode The resonant capacitor voltage on the primary side; This represents the resonant inductor current on the secondary side of the P-mode at the initial moment. Start with S mode The resonant inductor current on the secondary side, This represents the resonant capacitor voltage on the secondary side of the P-mode at the initial moment. Start with S mode The voltage of the resonant capacitor on the secondary side.

[0091] Since the P mode, O mode, and S mode together form the POS mode within half a switching cycle, the sum of the durations of each mode equals half a cycle length, as shown in the following formula:

[0092] ;

[0093] ;

[0094] In the formula, This is the normalized switching frequency.

[0095] The time elapsed in S mode By leading conduction angle The only certainty is that the formula is as follows:

[0096] .

[0097] Because when the CLLC resonant converter operates in O-mode and S-mode, the resonant inductor current... It does not flow through the load, but only when the CLLC resonant converter is operating in P mode. Therefore, it is a constant current load. It can be represented as:

[0098] ;

[0099] ;

[0100] In the formula, The phase angle, This is the normalized output current. Based on the actual output voltage. Actual input voltage Constant current load Leading conduction angle and transformer turns ratio Given the quantities, the corresponding normalized switching frequencies are obtained by solving the above 14 transcendental equations. And the corresponding resonant current and voltage variables, including: the time experienced by the P mode. The time experienced by mode O The time taken for the S mode Unknown integral constant , , , , , , , , and Based on this, the resonant inductor current and resonant capacitor voltage within the power frequency cycle can be visualized. The solution process is as follows: Figure 10 As shown.

[0101] Based on the above time-domain analysis, the frequency and phase three-dimensional gain surface plots of the CLLC resonant converter are constructed as follows: Figure 11 As shown, this relates to frequency and lead angle. The three-dimensional voltage gain surface. The following operational patterns can be observed from the figure:

[0102] When the lead conduction angle At that time, the CLLC resonant converter operates in the conventional PO mode. With the lead conduction angle... The evolution path of its operating modes is closely related to the degree of deviation of the switching frequency from the resonant frequency. If the deviation of the switching frequency from the resonant frequency is small, increasing the lead conduction angle... This allows the CLLC resonant converter to directly transition from the PO mode to the POS mode. If the switching frequency deviates significantly from the resonant frequency, the lead conduction angle will increase. As the gain increases, the CLLC resonant converter will successively experience the PO mode, the POSO mode with insignificant gain improvement, and finally the lead conduction angle. Only after increasing to a certain critical value does it enter the POS mode. During this process, as the lead conduction angle increases... As the voltage continues to increase, the duration of the O-mode is gradually replaced by the S-mode, resulting in a significant narrowing of the switching frequency range corresponding to the same voltage gain.

[0103] When the leading conduction angle When the voltage is increased further to the critical condition, the O mode completely disappears, and the CLLC resonant converter eventually operates in the PS mode, at which point the voltage gain reaches its maximum value.

[0104] To verify the PS mode's ability to compress the operating frequency range, this invention focuses on output active power. Under these conditions, the curve of voltage gain versus switching frequency was plotted and compared with that of the traditional PO mode. The results are as follows: Figure 12 As shown in the figure. The gain-switching frequency response curve of the CLLC resonant converter is shown in the figure below. Figure 12 As shown in the figure, the gain-phase characteristic curve of the CLLC resonant converter is as follows: Figure 13 As shown. Meanwhile, Figure 13 It also demonstrates the output active power. Under certain conditions, the lead conduction angle required for the PS mode to maintain a specific gain The changing trend.

[0105] Analysis shows that the voltage gain of the PS mode is higher than that of the PO mode across the entire switching frequency range. For example, at a normalized switching frequency of 0.7, the gain of the PS mode is 1.14 times that of the PO mode. More importantly, to achieve the same voltage gain, the PS mode requires a significantly narrower operating frequency range than the PO mode, making it more suitable for applications with a wide voltage input range.

[0106] III. PFM / PSM Hybrid Control Strategy:

[0107] Traditional CLLC resonant converters employ single pulse frequency control, resulting in a wide switching frequency range, low utilization of magnetic components, and complex drive and control circuit design. The crux of this problem lies in insufficient control freedom. To overcome this limitation and expand the gain range, this invention proposes a hybrid control strategy based on S-mode PFM and PSM. This strategy adjusts the switching frequency while simultaneously regulating the advance conduction angle of the secondary rectifier diode. Both theoretical and experimental results demonstrate that, through reasonable parameter design, the solution provided by this invention can achieve soft-switching operation under wide voltage / wide load conditions within a narrow frequency range, effectively improving the practical performance of CLLC resonant converters.

[0108] The circuit diagram of the PFM / PSM hybrid control used in the CLLC resonant converter is as follows: Figure 14 As shown, the main power circuit of the CLLC resonant converter includes a full-bridge inverter circuit, a primary-side resonant cavity, a high-frequency transformer, a secondary-side resonant cavity, and a full-bridge rectifier circuit. The control section consists of a sampling circuit, an error amplifier (EA), a sawtooth wave generator, a comparator generator, and a drive circuit.

[0109] During operation, the output voltage of the CLLC resonant converter is collected. Input error amplifier, minus reference voltage The switching frequency is then obtained after processing by a PI controller. ; switch frequency The sawtooth carrier wave is generated by inputting the sawtooth wave generator and the comparator generator respectively. and modulated wave ; Sawtooth carrier The modulation wave is generated by inputting the non-inverting inputs of the first and second comparators. The inverting input of the second comparator is connected to the input terminal; the inverting input of the first comparator is grounded, and its output is connected to the clock input of the JK flip-flop; the output of the second comparator is connected to the clock input of the D flip-flop; both the J and K terminals of the JK flip-flop are connected to the power supply voltage. The Q and non-Q terminals of the D flip-flop are connected to the first and second driver circuits, respectively. The D terminal of the D flip-flop is connected to the non-Q terminal, which is connected to the first input of the second AND gate via the second NOT gate. The Q terminal is connected to the first input of the first AND gate via the first NOT gate. The clock terminal is connected to the second inputs of the first and second AND gates. The outputs of the first and second AND gates are connected to the third and fourth driver circuits, respectively. The third driver circuit generates drive signals for switching transistors Q1 and Q4. The fourth driving circuit generates drive signals for switching transistors Q2 and Q3. The first driving circuit generates the driving signal for the switching transistor S1. The second driving circuit generates the driving signal for the switching transistor S2. Drive signals for switching transistors S3 and S4 drive signal The existing control methods will be followed.

[0110] The driving circuit includes a gate driver chip, an isolation power supply, and a gate driver resistor.

[0111] Gate driver chip: The PWM signal output by the resonant controller has weak voltage and current capabilities, and cannot directly and quickly drive the gate capacitance of the MOSFET / IGBT. The gate driver chip plays a role in power amplification and electrical isolation.

[0112] Isolated power supply: Provides an independent, floating power supply for the secondary side of an isolated gate driver chip.

[0113] Gate drive resistor: Connected between the gate drive chip and the isolation power supply (i.e., the three are connected in series), it is used to limit the gate charging current and control the switching speed.

[0114] The key operating waveforms of the CLLC resonant converter using PFM / PSM hybrid control are shown in the figure below. Figure 15 As shown in the figure. The output signal of the error amplifier is the switching frequency that is controlled in real time. . The slope is sawtooth carrier, To achieve this by adjusting the switching frequency The modulated wave obtained after performing a specific mathematical transformation This is the output signal of the first comparator. This is the output signal of the second comparator.

[0115] Among them, the output voltage of the CLLC resonant converter is controlled by a PI controller. and reference voltage Real-time calculation of switching frequency The formula is as follows:

[0116] ;

[0117] In the formula, This is the proportional control coefficient. The integral control coefficient, Indicates duration, A differential component representing time.

[0118] Output voltage After sampling, compared with the reference voltage The error is compared and processed by an error amplifier, resulting in an output switching frequency. This signal serves as the real-time switching frequency of the converter. It is processed in two ways: on the one hand, the switching frequency The input is fed into a sawtooth wave generator to produce a slope. The period is sawtooth carrier Regarding switching frequency Proportional control is performed to obtain the frequency signal. Then, a reset is performed using the Reset button, generating a sawtooth carrier. ; Sawtooth carrier Input the non-inverting input of the third comparator and input the π-shaped filter to the inverting input of the third comparator; connect the input of the third comparator to the reset button.

[0119] Sawtooth carrier After the third comparator, the generation period is The pulse signal is then passed through the first driving circuit and the second driving circuit to finally generate a switching frequency of . The drive signal for the primary-side switching transistor.

[0120] On the other hand, switching frequency The signal is fed into a comparator generator, whose output signal is a modulated wave. The formula is as follows:

[0121] ;

[0122] ;

[0123] In the formula, This is the proportionality coefficient. , For the amplitude limiting function, The minimum setting value for the normalized switching frequency, and the proportional coefficient. Used to prevent the secondary rectifier diodes from having a leading conduction angle when the converter is operating at its minimum switching frequency. If the value is too large and exceeds the stable operating boundary of the PS mode, its value needs to be determined comprehensively based on circuit parameters and operating conditions. Furthermore, since the S mode increases the resonant current, the loss of the POS mode is higher than that of the S mode at the same voltage gain; therefore, a limiting function is introduced. The aim is to improve the lead-out conduction angle when the gain requirement is low and the switching frequency is close to the resonant frequency. By imposing restrictions, the loss of the POS mode is not significantly higher than that of the PO mode within the gain requirement that the PO mode can meet, thereby optimizing the overall efficiency.

[0124] In practical engineering, the required gain range is usually determined first. Then, the gain curve is shaped by selecting the values ​​of resonant inductance, resonant capacitance and magnetizing inductance. Finally, through simulation and experimental verification, a safe and reliable minimum operating switching frequency is determined, i.e., a minimum value is set, under the premise of meeting the ZVS condition and avoiding magnetic saturation.

[0125] Modulated wave With sawtooth carrier The comparison generates a lead conduction pulse signal, and the lead conduction angle is calculated. (i.e., modulated wave) Greater than the sawtooth carrier The corresponding phase angle is calculated using the following formula:

[0126] ;

[0127] ;

[0128] It is evident that the PFM / PSM hybrid control strategy, while adjusting the switching frequency, also affects the lead angle. They are subject to coordinated regulation, and the two are negatively correlated. Specifically, this manifests as follows:

[0129] When the CLLC resonant converter operates at the resonant frequency (i.e. )hour, As the switching frequency decreases (normalized switching frequency) (reduce), leading conduction angle Nonlinear increase. Due to the limiting function. The role of normalized switching frequency When the deviation from the resonant frequency is small, the lead conduction angle is... Limited to a small value; when the normalized switching frequency Gradually decrease to the set minimum value At that time, the limiting function Increasing from 0 to 1, leading conduction angle It will also increase accordingly to its maximum value. .

[0130] In the traditional pulse frequency modulation method, increasing the output voltage of a CLLC resonant converter requires reducing the normalized switching frequency. Under the hybrid control strategy proposed in this invention, the switching frequency... The reduction will lead to an advanced conduction angle The increase, and the lead conduction angle The increase in frequency itself also helps to improve voltage gain. Therefore, at the switching frequency With leading conduction angle With the synergistic effect of [various factors], the CLLC resonant converter can achieve regulated output and soft-switching operation under wide input / output voltage and wide load conditions within a narrow switching frequency range.

[0131] IV. Simulation Verification:

[0132] To further demonstrate the correctness and feasibility of the time-domain modeling and analysis theory of the CLLC resonant converter and the PFM / PSM hybrid control strategy, this invention uses the PSIM simulation platform to build a simulation model based on the PWM / PFM hybrid control strategy. The simulation parameters of the CLLC resonant converter PFM / PSM hybrid control strategy are shown in Table 1.

[0133] Table 1 Simulation parameters of the PFM / PSM hybrid control strategy for the CLLC resonant converter

[0134] .

[0135] A diagram showing the comparison between simulation results and time-domain modeling is shown below. Figure 16 As shown in the figure, the blue curve represents the resonant inductor current during half a switching cycle. The green curve represents the resonant inductor current during half a switching cycle. The red curve represents the auxiliary magnetizing inductor current during half a switching cycle. The solid and dashed lines represent the simulation results and the time-domain analysis (theoretical) results, respectively. The comparison shows that the time-domain analysis model established in this invention has high accuracy. It should be noted that... Figure 16 The x-coordinate in the middle is With normalized switching frequency The ratio of .

[0136] The relationship between switching frequency and output voltage under PFM / PSM hybrid control and PFM control is shown in the following graph. Figure 17 As shown in the figure. It can be seen that under PFM / PSM hybrid control, as the switching frequency decreases, the actual output voltage of the CLLC resonant converter... It is also constantly increasing, eventually reaching the switching frequency. At that time, the output voltage reached 200V, and the converter did not exceed the PS boundary. In contrast, the CLLC resonant converter using the traditional PFM control strategy operating in the PO mode, even at the minimum switching frequency of 60kHz, only had an output voltage of 122V, and its maximum voltage gain was far lower than the novel control strategy provided by this invention. This effectively verifies the correctness and feasibility of the S-mode and PFM / PSM hybrid control strategy provided by this invention.

[0137] As can be seen from the above simulations and accompanying figures, compared with the prior art, the circuit structure involved in the technical solution provided by this invention is simple. Based on the existing CLLC resonant converter topology, without adding any components, it only adjusts the O mode of the PO mode of the CLLC resonant converter. Specifically, in the O mode, one of the synchronous switching transistors on the secondary side is turned on in advance, clamping the secondary resonant cavity to a zero-voltage state. Without reducing the switching frequency, the voltage gain range of the CLLC resonant converter can be effectively widened, achieving a higher voltage gain with lower losses and costs. Compared with traditional PFM control, the PFM / PSM hybrid control strategy is more adaptable to a wider voltage range, can support deep discharge of electric vehicle batteries, and has higher stability. The converter time-domain model including the S mode can accurately characterize the waveforms of voltage and current, as well as the switching frequency and ZVS performance on multiple time scales, including the switching cycle and the power frequency cycle.

Claims

1. A control method for wide-voltage operation of a CLLC resonant converter, wherein in the CLLC resonant converter, the primary side terminals of the same name are connected to the emitter of switch Q1 and the collector of switch Q2, the primary side terminals of different name are connected to the emitter of switch Q3 and the collector of switch Q4, the secondary side terminals of the same name are connected to the emitter of switch S1 and the collector of switch S2, and the secondary side terminals of different name are connected to the emitter of switch S3 and the collector of switch S4. Its features are, In the O mode of the PO mode: When in the positive half-cycle, if the secondary output voltage is greater than zero, the phase difference is earlier than the end phase of the 0-mode. Turn on the switch S2; When in the negative half-cycle, if the secondary output voltage is less than zero, the phase difference is earlier than the end phase of the 0-mode. Turn on the switch S1; The control methods for switching transistors S1 and S2 include: Acquire the output voltage of the CLLC resonant converter Input error amplifier, to obtain the switching frequency ; Switching frequency Input to a sawtooth wave generator to generate a sawtooth carrier wave. Input the non-inverting input of the second comparator; change the switching frequency. Input comparator to generate modulated wave Input the inverting input of the second comparator; Connect the output of the second comparator to the clock terminal of the D flip-flop; The D terminal of the D flip-flop is connected to the non-Q terminal, the non-Q terminal is connected to the first input terminal of the second AND gate via the second NOT gate, the Q terminal is connected to the first input terminal of the first AND gate via the first NOT gate, and the clock terminal is connected to the second input terminals of the first AND gate and the second AND gate; the output terminals of the first AND gate and the second AND gate are respectively connected to the first driving circuit and the second driving circuit. The first driving circuit generates a driving signal. Controlling the switching transistor S1, the second drive circuit generates a drive signal. Control switch S2; Among them, sawtooth carrier and modulated wave The phase difference is .

2. The control method for wide-voltage operation of a CLLC resonant converter as described in claim 1, characterized in that, The phase difference It is equal to the phase difference between the initial phase and the final phase of the O mode.

3. The control method for wide-voltage operation of a CLLC resonant converter as described in claim 1, characterized in that, Determine the phase difference The formula is as follows: ； ； ； In the formula, This is the proportionality coefficient. , To normalize the switching frequency, This is the minimum setting for the normalized switching frequency. For switching frequency, The resonant frequency, This is the proportional control coefficient. The integral control coefficient, The output voltage of the CLLC resonant converter. For reference voltage, Indicates duration, A differential component representing time.

4. The control method for wide-voltage operation of a CLLC resonant converter as described in claim 3, characterized in that, The switching frequency Input comparator to generate modulated wave ,include: ； ； In the formula, This represents the amplitude limiting function.

5. The control method for wide-voltage operation of a CLLC resonant converter as described in claim 3, characterized in that, Both the first driving circuit and the second driving circuit are gate driving chips. The isolated power supply is connected to the gate driver chip via the gate drive resistor to power the gate driver chip.

6. The control method for wide-voltage operation of a CLLC resonant converter as described in claim 3, characterized in that, It also includes control methods for switching transistors Q1, Q2, Q3, and Q4: sawtooth carrier The input is the non-inverting input of the first comparator; the inverting input of the first comparator is grounded, and the output is connected to the clock input of the JK flip-flop. The J and K terminals of the JK flip-flop are both connected to the power supply voltage, and the Q and non-Q terminals of the JK flip-flop are connected to the third and fourth drive circuits, respectively. The third driving circuit generates driving signals. The fourth drive circuit controls switching transistors Q1 and Q4, and generates drive signals. Control switching transistors Q2 and Q3.

7. The control method for wide-voltage operation of a CLLC resonant converter as described in claim 6, characterized in that, Both the third and fourth driving circuits are gate driving chips. The isolated power supply is connected to the gate driver chip via the gate drive resistor to power the gate driver chip.

8. A control method for wide-voltage operation of a CLLC resonant converter as described in any one of claims 3 to 7, characterized in that, The switching frequency Input to a sawtooth wave generator to generate a sawtooth carrier wave. Specifically, it includes: For switching frequency Proportional control is performed to obtain the frequency signal. Then, a sawtooth carrier is generated by resetting via the reset button. ; sawtooth carrier Input the non-inverting input of the third comparator and input the π-shaped filter to the inverting input of the third comparator; connect the input of the third comparator to the reset button.

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