Sampling current compensation method, sampling circuit, electric equipment and air conditioning unit

Abstract

The invention discloses a sampling current compensation method, a sampling circuit, electric equipment and an air conditioning unit, the sampling current compensation method is applied to a motor, the motor is connected with a driving module, and the sampling current compensation method comprises the following steps: at the starting moment of each control period of the motor, the driving module is connected with the sampling circuit; obtaining a double-resistance sampling value of the double-resistance sampling value of the three-phase current of the motor through double-resistance sampling; in each control period of the motor, obtaining a single-resistor sampling value of the three-phase current of the motor through single-resistor sampling; and for each phase, calculating a current compensation amount based on the single-resistance sampling value obtained in the current control period and the double-resistance sampling value obtained in the previous control period, and compensating the current of the phase based on the current compensation amount. According to the invention, the sampling error caused by digital delay can be reduced, and the control precision of the motor can be improved while the current harmonics are weakened.

Description

Technical Field

[0001] This invention relates to the field of electronic power technology, and more specifically, to a sampling current compensation method, a sampling circuit, electrical equipment, and an air conditioning unit. Background Technology

[0002] The principle of digital signal processing (DSP) systems is to discretize real-world continuous systems, allowing the controller to process digital signals within each discrete small interval to control motor operation. However, this leads to a problem: there is a digital delay between the sampled current and the measured current of the motor. The harmonic current caused by this digital delay can cause the motor to heat up, and it can also reduce the control accuracy of the motor.

[0003] There is currently no effective solution to the problem that digital delay exists between the sampled current and the measured current of the motor in existing technologies, which leads to motor heating and reduced control accuracy. Summary of the Invention

[0004] This invention provides a sampling current compensation method, a sampling circuit, an electrical device, and an air conditioning unit to solve the problem in the prior art where there is a digital delay between the sampling current and the measured current of the motor, which leads to motor heating and reduced control accuracy.

[0005] To address the aforementioned technical problems, this invention provides a sampling current compensation method applied to a motor connected to a drive module. The sampling current compensation method includes:

[0006] At the beginning of each control cycle of the motor, the dual-resistance sampling value of the three-phase current of the motor is obtained by dual-resistance sampling.

[0007] During each control cycle of the motor, the single-resistor sampling value of the three-phase current of the motor is obtained by single-resistor sampling;

[0008] For each phase, the current compensation amount is calculated based on the single resistance sampling value obtained in the current control cycle and the double resistance sampling value obtained in the previous control cycle, and the current of the phase is compensated based on the current compensation amount.

[0009] Furthermore, the dual-resistance sampling values ​​of the three-phase current of the motor are obtained through dual-resistance sampling, including:

[0010] The upper bridge arm of the drive module controlling the motor is turned off, and the lower bridge arm is turned on, so as to obtain two phase currents of the three-phase current.

[0011] Calculate the remaining phase current based on the obtained two-phase currents.

[0012] Furthermore, obtaining the single-resistance sampled value of the three-phase current of the motor through single-resistance sampling includes:

[0013] When the upper arm of the first phase, the lower arm of the second phase, and the lower arm of the third phase of the drive module are simultaneously turned on, the first phase current is sampled once; when the lower arm of the first phase, the upper arm of the second phase, and the upper arm of the third phase of the drive module are simultaneously turned on, the first phase current is sampled again; the average value of the two sampled first phase currents is calculated as the first phase current.

[0014] When the upper arm of the second phase, the lower arm of the first phase, and the lower arm of the third phase of the drive module are simultaneously turned on, the second phase current is sampled once; when the lower arm of the second phase, the upper arm of the first phase, and the upper arm of the third phase of the drive module are simultaneously turned on, the second phase current is sampled again; the average value of the two sampled second phase currents is calculated as the second phase current.

[0015] The third phase current is calculated based on the first phase current and the second phase current collected in the first sampling. The third phase current is calculated based on the first phase current and the second phase current collected in the second sampling. The average value of the two third phase currents is then used as the third phase current.

[0016] Furthermore, the current compensation is calculated based on the single-resistor sample value obtained in the current control cycle and the dual-resistor sample value obtained in the previous control cycle, according to the following formula:

[0017] comp=I T 2-I T-1 1;

[0018] Where comp is the current compensation amount, I T 2 represents the single-resistor sampling current of the current control cycle, I. T-1 1 represents the dual-resistor sampling current of the previous control cycle, and T represents the cycle number.

[0019] Furthermore, the current compensation is calculated based on the single-resistor sample value obtained in the current control cycle and the dual-resistor sample value obtained in the previous control cycle, according to the following formula:

[0020] comp = (I T 2-I T-1 1) *cos(w*t);

[0021] Where comp is the current compensation amount, I T 2 represents the single-resistor sampling current of the current control cycle, I. T-1 1 represents the dual-resistor sampling current of the previous control cycle, T is the cycle number, cosine function, w is the angular velocity of the current, and t is the current time.

[0022] Furthermore, the phase current is compensated based on the aforementioned current compensation amount, according to the following formula:

[0023] I' = I + comp;

[0024] Where I' is the compensated current value and I is the current value.

[0025] The present invention also provides a sampling circuit for implementing the above-described sampling current compensation method, characterized in that the sampling circuit comprises:

[0026] The first sampling resistor is set on the DC bus;

[0027] The second sampling resistor is connected in series in one phase of the drive module;

[0028] The third sampling resistor is connected in series in another phase of the drive module;

[0029] The compensation module is used to obtain the dual-resistance sampled values ​​of the three-phase current of the motor by dual-resistance sampling at the beginning of each control cycle of the motor; to obtain the single-resistance sampled values ​​of the three-phase current of the motor by single-resistance sampling within each control cycle of the motor; and to calculate the current compensation amount for each phase based on the single-resistance sampled value obtained in the current control cycle and the dual-resistance sampled value obtained in the previous control cycle, and to compensate the current of that phase based on the current compensation amount.

[0030] The present invention also provides an electrical device, including a motor and a drive module, and further including the sampling circuit described above.

[0031] Furthermore, the electrical equipment is a compressor or a fan.

[0032] The present invention also provides an air conditioning unit, including the above-mentioned electrical equipment.

[0033] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the above-described sampling current compensation method.

[0034] The present invention also provides an electronic device, comprising:

[0035] One or more processors;

[0036] A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the above-described sampling current compensation method.

[0037] By applying the technical solution of this invention, at the beginning of each control cycle of the motor, the dual-resistance sampling value of the three-phase current of the motor is obtained through dual-resistance sampling. Within each control cycle, the single-resistance sampling value of the three-phase current of the motor is obtained through single-resistance sampling. Since the time difference between the current cycle and the beginning of the previous control cycle is approximately 1.5 times the cycle length, the deviation between the current obtained by single-resistance sampling and the current obtained by dual-resistance sampling is approximately equal to the current error caused by digital delay. Therefore, by calculating the current compensation amount based on the single-resistance sampling value obtained in the current control cycle and the dual-resistance sampling value obtained in the previous control cycle, and by compensating the phase current based on the current compensation amount, the sampling current error caused by digital delay can be reduced. This reduces current harmonics and improves the control accuracy of the motor. Attached Figure Description

[0038] Figure 1 A schematic diagram illustrating digital latency in existing technologies;

[0039] Figure 2 This is a flowchart of a sampling current compensation method according to an embodiment of the present invention;

[0040] Figure 3 This is a structural diagram of the sampling circuit according to an embodiment of the present invention;

[0041] Figure 4 This is an equivalent circuit diagram of dual-resistor sampling according to an embodiment of the present invention;

[0042] Figure 5 This is an equivalent circuit diagram when the control signal is 100011 according to an embodiment of the present invention;

[0043] Figure 6 This is the equivalent circuit diagram when the control signal is 011100 according to an embodiment of the present invention;

[0044] Figure 7 This is an equivalent circuit diagram when the control signal is 010101 according to an embodiment of the present invention;

[0045] Figure 8 This is an equivalent circuit diagram when the control signal is 101010 according to an embodiment of the present invention;

[0046] Figure 9 This is the equivalent circuit diagram when the control signal is 001110 according to an embodiment of the present invention;

[0047] Figure 10 This is the equivalent circuit diagram when the control signal is 110001 according to an embodiment of the present invention;

[0048] Figure 11This is a three-phase control timing diagram for one cycle according to an embodiment of the present invention;

[0049] Figure 12 This is a schematic diagram of the sampling period according to an embodiment of the present invention;

[0050] Figure 13 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0052] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms, and “multiple” generally includes at least two unless the context clearly indicates otherwise.

[0053] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0054] It should be understood that although the terms first, second, third, etc., may be used to describe sampling resistors in the embodiments of the present invention, these sampling resistors should not be limited to these terms. These terms are only used to distinguish different sampling resistors. For example, without departing from the scope of the embodiments of the present invention, a first sampling resistor may also be referred to as a second sampling resistor, and similarly, a second sampling resistor may also be referred to as a first sampling resistor.

[0055] Depending on the context, the words “if” or “suppose” as used here can be interpreted as “when” or “in response to determination” or “in response to detection.” Similarly, depending on the context, the phrases “if determination” or “if detection (of the stated condition or event)” can be interpreted as “when determination” or “in response to determination” or “when detection (of the stated condition or event)” or “in response to detection (of the stated condition or event).”

[0056] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or device that includes said element.

[0057] The optional embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0058] Example 1

[0059] The principle of digital signal processing (DSP) systems is to discretize real-world continuous systems, allowing the controller to process digital signals within each discrete small interval to control motor operation. However, this leads to a problem: there is a digital delay between the sampled current and the measured current of the motor. The harmonic current caused by this digital delay can cause the motor to heat up, and it can also reduce the control accuracy of the motor.

[0060] In existing technologies, there is a digital delay between the sampled current and the measured current of the motor, which leads to motor overheating and reduced control accuracy.

[0061] This embodiment provides a sampling current compensation method applied to a motor, wherein the motor is connected to a drive module. Figure 1 A schematic diagram illustrating the digital latency of existing technologies, such as... Figure 1 As shown, the digital delay includes computation delay and PWM delay. The computation delay is one sampling period length Ts, and the PWM delay is half a period. Therefore, the digital delay = (1 + 0.5)Ts, which means that the current output time lags behind the sampling time by 1.5 periods.

[0062] Based on the above considerations, this embodiment provides a current compensation method. Figure 2 The flowchart of the sampling current compensation method according to an embodiment of the present invention is as follows: Figure 2 As shown, the sampling current compensation method includes:

[0063] S101, at the beginning of each control cycle of the motor, obtains the dual-resistance sampling value of the three-phase current of the motor through dual-resistance sampling.

[0064] Figure 3 This is a structural diagram of the sampling circuit according to an embodiment of the present invention, such as... Figure 3As shown, the sampling circuit includes: a first sampling resistor R1, which is set on the DC bus; a second sampling resistor R2, which is connected in series in one phase of the drive module; and a third sampling resistor R3, which is connected in series in the other phase of the drive module. At the beginning of each control cycle of the motor, the dual-resistance sampling values ​​of the three-phase current of the motor are obtained through the dual-resistance sampling.

[0065] S102 obtains the single-resistor sampling value of the three-phase current of the motor through single-resistor sampling in each control cycle of the motor.

[0066] At different times within each control cycle of the motor, each phase of the three-phase motor will have multiple different conduction states. The starting time is k, and the dual-resistor sampling is between k+nTs and k+(n+1)Ts. Therefore, the delay between the current of each phase obtained by single-resistor sampling and the current of each phase obtained by dual-resistor sampling is close to 1.5Ts.

[0067] S103: For each phase, calculate the current compensation amount based on the single resistance sampling value obtained in the current control cycle and the double resistance sampling value obtained in the previous control cycle, and compensate the current of the phase based on the current compensation amount.

[0068] Since the delay between the phase currents obtained by single-resistor sampling and those obtained by dual-resistor sampling is close to 1.5Ts, it can be inferred that the deviation between the current obtained by single-resistor sampling and the current obtained by dual-resistor sampling is approximately equal to the current error caused by the digital delay. Therefore, calculating the current compensation amount based on the single-resistor sampling value obtained in the current control cycle and the dual-resistor sampling value obtained in the previous control cycle, and compensating for the phase current based on the current compensation amount, can reduce the error of the sampling current.

[0069] The sampling current compensation method in this embodiment obtains the three-phase current of the motor through dual-resistor sampling at the beginning of each control cycle, and obtains the three-phase current of the motor through single-resistor sampling within each control cycle. Since the time difference between the current cycle and the beginning of the previous control cycle is approximately 1.5 times the cycle length, the deviation between the current obtained by single-resistor sampling and the current obtained by dual-resistor sampling is approximately equal to the current error caused by digital delay. Therefore, by calculating the current compensation amount based on the single-resistor sampling value obtained in the current control cycle and the dual-resistor sampling value obtained in the previous control cycle, and compensating for the current of that phase based on the current compensation amount, the sampling current error caused by digital delay can be reduced, thereby reducing current harmonics and improving the control accuracy of the motor.

[0070] To accurately obtain the current of each phase, the dual-resistance sampling value of the three-phase current of the motor is obtained through dual-resistance sampling, including: the upper bridge arm of the drive module controlling the motor is turned off and the lower bridge arm is turned on to obtain the current of two phases of the three phases; and the current of the remaining phase is calculated based on the obtained two phase currents.

[0071] Figure 4 The equivalent circuit diagram for dual-resistor sampling according to an embodiment of the present invention is as follows: Figure 4 As shown, when the control signals from S1 to S6 are 000111, that is, all the lower bridge arms of the drive module are closed and all the upper bridge arms are open, this arrangement occurs at time k+nTs (n is an integer). At this time, voltage drops U2 and U3 are generated on the sampling resistors R2 and R3 respectively. According to Ohm's law, the A-phase current Ia1 can be calculated by U2 / R2, and the B-phase current Ib1 can be calculated by U3 / R3. Since the sum of the three-phase currents is 0, the C-phase current Ic1 can be calculated.

[0072] Through the above embodiments, the sampling current of a single resistor is obtained within the sampling period. The time difference between the time in the current period and the start time of the previous control period is approximately 1.5 times the period length. Only when the distance between the midpoint of the current period and the start point of the previous period is 1.5 times the period length is the time difference between these two points accurately equal to the digital delay. Therefore, to obtain a more accurate digital delay compensation effect, it is necessary to obtain the current value at the midpoint of each control cycle of the motor. The sampling of the single resistor Z1 is performed within the time period from k+nTs to k+(n+1)Ts. There are three different large combinations of switching transistors that can sample currents of different phase sequences. Each large combination also has two small permutations. The specific logic is as follows: when the control signal combination is the small permutation 100011 and 011100, the A-phase current is sampled; when the control signal combination is the small permutation 010101 and 101010, the B-phase current is sampled; when the control signal combination is the small permutation 001110 and 110001, the C-phase current is sampled.

[0073] Figure 5 This is the equivalent circuit diagram when the control signal is 100011 according to an embodiment of the present invention. Figure 6 The equivalent circuit diagram according to an embodiment of the present invention is as follows: when the control signal is 011100. Figure 5 As shown, phase A is connected to phases B and C respectively. At this time, the first single-resistor sampling current Ia2 is obtained by sampling the current of phase A for the first time. Figure 6 As shown, phases B and C are connected to phase A. At this time, the current of phase A is sampled for the second time to obtain the second single-resistor sampling current Ia3.

[0074] Figure 7This is the equivalent circuit diagram when the control signal is 010101 according to an embodiment of the present invention. Figure 8 The equivalent circuit diagram according to an embodiment of the present invention is as follows: when the control signal is 101010. Figure 7 As shown, phase B is connected to phases A and C respectively. At this time, the current Ib2 of phase B is collected. Figure 8 As shown, phases A and C are connected to phase B, and the current Ib3 of phase B is collected.

[0075] Figure 9 This is the equivalent circuit diagram when the control signal is 001110 according to an embodiment of the present invention. Figure 10 The equivalent circuit diagram according to an embodiment of the present invention is as follows: when the control signal is 110001. Figure 9 As shown, phase C is connected to phases A and B respectively. At this time, the current Ib2 of phase C is collected. Figure 10 As shown, phases A and B are connected to phase C, and the current Ib3 of phase C is collected.

[0076] Figure 11 A three-phase control timing diagram for one cycle according to an embodiment of the present invention, such as Figure 11 As shown, under normal control logic, only two major combinations will appear in one cycle. Each major combination contains two minor permutations. In the diagram, the first major combination includes the minor permutations 100011 and 011100, corresponding to phase A. The second major combination includes the minor permutations 010101 and 101010, corresponding to phase B. For each major combination, the two minor permutations will appear twice symmetrically with the midpoint of the cycle as the axis of symmetry. Therefore, by sampling the current at the time points when the two minor permutations appear under a corresponding major combination, and averaging the two current samples, we can consider it as the sampled current value of that phase at the midpoint of the cycle. Similarly, in other cycles, it is also possible that the first major combination includes two minor permutations, 010101 and 101010, corresponding to phase B, and the second major combination includes two minor permutations, 001110 and 110001, corresponding to phase C; or, the first major combination includes two minor permutations, 100011 and 011100, corresponding to phase A, and the second major combination includes two minor permutations, 001110 and 110001, corresponding to phase C.

[0077] In summary, to obtain the current value at the midpoint of the cycle and thus achieve a more accurate current compensation effect, single-resistor sampling of the motor's three-phase current is used. This includes: sampling the first-phase current once when the upper arm of the first phase, the lower arm of the second phase, and the lower arm of the third phase of the drive module are simultaneously conducting; sampling the first-phase current again when the lower arm of the first phase, the upper arm of the second phase, and the upper arm of the third phase of the drive module are simultaneously conducting; calculating the average of the two sampled first-phase currents as the first-phase current; and sampling again when the upper arm of the second phase, the lower arm of the first phase, and the lower arm of the third phase of the drive module are simultaneously conducting. Second phase current; when the lower arm of the second phase, the upper arm of the first phase, and the upper arm of the third phase of the drive module are simultaneously turned on, the second phase current is collected again; the average value of the two collected second phase currents is calculated as the second phase current; based on the quantitative relationship that the sum of the three phase currents is 0, the first collected third phase current is calculated based on the first collected first phase current and the first collected second phase current; similarly, based on the quantitative relationship that the sum of the three phase currents is 0, the second collected third phase current is calculated based on the second collected first phase current and the second collected second phase current; the average value of the two collected third phase currents is calculated as the third phase current.

[0078] Since the distance between the midpoint of this cycle and the starting point of the previous cycle is 1.5 times the cycle length, the time difference between these two points is exactly equal to the digital delay. Therefore, the current difference between these two points is close to the current error caused by the digital delay. To obtain an accurate sampling current compensation, the current compensation is calculated based on the single-resistor sampling value obtained in the current control cycle and the dual-resistor sampling value obtained in the previous control cycle, according to the following formula: comp = I T 2-I T-1 1; where comp is the current compensation amount, I T 2 represents the single-resistor sampling current of the current control cycle, I. T-1 1 represents the dual-resistor sampling current from the previous control cycle.

[0079] For phase A, after obtaining the first single-resistor sampling current Ia2 and the second single-resistor sampling current Ia3 in the current control cycle T, the average value is calculated to obtain the single-resistor sampling current Ia3 of phase A in the current control cycle. T 2. Then subtract the dual-resistor sampling current I from the previous control cycle. T-1 1. Obtain the current compensation amount comp.

[0080] For phase B, after obtaining the first single-resistor sampling current Ib2 and the second single-resistor sampling current Ib3 in the current control cycle T, the average value is calculated to obtain the single-resistor sampling current Ib3 of phase B in the current control cycle. T 2. Then subtract the dual-resistor sampling current I from the previous control cycle.T-1 1. Obtain the current compensation amount comp.

[0081] For phase C, after obtaining the first single-resistor sampling current Ic2 and the second single-resistor sampling current Ic3 in the current control cycle T, the average value is calculated to obtain the single-resistor sampling current Ic3 of phase C in the current control cycle. T 2. Then subtract the dual-resistor sampling current I from the previous control cycle. T-1 1. Obtain the current compensation amount comp.

[0082] Ideally, the phase current is a sine wave. According to the properties of a sine wave, the rate of change of the phase current is constantly changing. Therefore, directly using the sampling delay error at time k-2 as the sampling compensation at time k is not ideal and still contains some error. Therefore, when calculating the current compensation, the rate of change of the current should be considered. Since the phase current is a sine wave, its derivative is a cosine function. Therefore, to obtain a more accurate current compensation, the current compensation is calculated based on the single-resistor sampling value obtained in the current control cycle and the dual-resistor sampling value obtained in the previous control cycle, using the following formula:

[0083] comp = (I T 2-I T-1 1) *cos(w*t);

[0084] Where comp is the current compensation amount, I T 2 represents the single-resistor sampling current of the current control cycle, I. T-1 1 represents the dual-resistor sampling current of the previous control cycle, cos is the cosine function, w is the angular velocity of the current, and t is the current time.

[0085] Assuming the current sampling current is I, in order to obtain an accurate current sampling value, the phase current is compensated based on the current compensation amount, according to the following formula: I'=I+comp; where I' is the compensated current value and I is the current current value.

[0086] Example 2

[0087] This embodiment provides another sampling current compensation method. The sampling circuit of the motor in this embodiment is as mentioned above. Figure 3 As shown in the diagram, sampling resistors R1, R2, and R3 are set. The logic of switches S1 to S6 is defined as 1 when closed and 0 when open, and the upper and lower switches cannot be closed simultaneously. Therefore, there are eight possible permutations. In the order of S1 to S6, 000111 represents all lower switches closed and all upper switches open. This permutation appears in... Figure 1In the formula k+nTs, n is an integer. At this time, voltage drops U2 and U3 are generated on the sampling resistors R2 and R3 respectively. According to Ohm's law, the phase A current Ia can be calculated by U2 / R2, and the phase B current Ib can be calculated by U3 / R3. Since the sum of the three phase currents is 0, the phase C current Ic can be calculated.

[0088] Single-resistor sampling occurs between time k+nTs and time k+(n+1)Ts. The switching transistors have three different large combinations that can sample currents of different phase sequences. Each large combination contains two smaller permutations, with the following logic: when the large combination is 100011 and 011100, the A-phase current is sampled; when the combination is 010101 and 101010, the B-phase current is sampled; and when the combination is 001110 and 110001, the C-phase current is sampled. Under normal control logic, only two smaller permutations from each of the two large combinations will appear in one cycle, and they will appear symmetrically with the midpoint of the cycle as the axis of symmetry. Sampling is triggered when they appear, and the average of the two samples is taken. This average can be considered as the different two-phase current values ​​between time k+nTs and time k+(n+1)Ts. The current value of the remaining phase is calculated by ensuring that the sum of the three-phase currents is zero.

[0089] Figure 12 This is a schematic diagram of the sampling period according to an embodiment of the present invention, such as... Figure 12 As shown, taking the current time k as the initial moment of a cycle as an example, the sampled current data at the intermediate time k-Ts and time k is known. This sampled current data is actually the value of the measured current that the current controller should use at time k-2Ts. The sampled current at time k will be obtained at k+1.5Ts.

[0090] Therefore, in this implementation, the sampling error caused by digital delay at time k-2Ts is obtained by subtracting the single-resistor sampling current value obtained between time k-Ts and time k from the value obtained by dual-resistor sampling at time k-2Ts. An ideal phase current is a sine wave. According to the properties of a sine wave, the rate of change of the phase current is constantly changing. Therefore, directly using the sampling delay error at time k-2 as the sampling compensation at time k is not ideal. This requires introducing the rotor's electrical angle to determine the trend of change. This is because the rotor's electrical rotation frequency and the current frequency are equal under normal control conditions. Based on the position of the electrical angle, the current angle of the sinusoidal current can be determined (taking the A-phase current angle and rotor electrical angle being the same as an example, then the B-phase current angle leads the A-phase current by 120°, and the C-phase current angle leads the A-phase current by 240°). During the A-phase compensation process, the derivative of the sine function, i.e., the cosine function, is used as the compensation coefficient to estimate the direction of current change at the next moment. Similarly, the rates of change of the currents in phases b and c lead the A-phase current by 120° and 240°, respectively. Then, by multiplying the absolute value of the actual current sampling delay error at the previous control cycle time obtained from the previous calculation by the above compensation coefficient, the current compensation amount required at the current time k can be obtained.

[0091] In summary, the embodiments of this invention mainly include the following points:

[0092] A sampling scheme using a combination of dual and single resistors is employed. The digital delay can be considered as consisting of two parts, such as... Figure 1 As shown, one is the calculation time, and the other is the PWM update delay time. Taking the current time as k as an example, the controller current data input at time k is sampled and the output voltage is calculated at time k, but the current sampling data at time k will not be output until the midpoint of the time interval k+Ts and k+2Ts. Because the sampling logic of dual resistors and single resistors is different, resulting in different sampling times, the sampling data of these time intervals can be used to calculate the current sampling delay error of the previous cycle (time k-2Ts) to calculate the current compensation amount at the current time.

[0093] The sampled current value is obtained using a dual-resistor sampling method. The trigger time for dual-resistor sampling is always k+nTs, where n is an integer. Taking the current time as k as an example, the compensation requires the current sampling delay error at time k-2Ts.

[0094] The current sampling error caused by digital delay is obtained based on a single-resistor, single-cycle, double-sampling logic. Single-resistor sampling requires a specific switching state to perform sampling, and two samplings are performed throughout the cycle. Taking time k as an example, the sampled current data at the midpoint between k-Ts and k is known. This sampled current data is actually the measured current value that the current controller should use at time k-2Ts. Subtracting this value from the sampled value at k-2Ts yields the current sampling error caused by the digital delay at k-2Ts.

[0095] The compensation coefficient is given based on the current electrical angle position of the rotor. Since the three-phase current controlling the motor can be considered as a sine wave with a phase difference of 120° under ideal conditions, the magnitude of its change is the magnitude of the derivative of this waveform, so it is set as the compensation coefficient.

[0096] This embodiment provides a sampling current compensation method for a digital signal processing system. This embodiment can provide sampling data with low phase delay for the current controller, resulting in more accurate current input to the motor. This improves the accuracy of the control output voltage, reduces the magnitude of current harmonics caused by sampling delay, and ultimately reduces motor heat generation and improves control precision.

[0097] Example 3

[0098] This embodiment provides a sampling circuit for implementing the sampling current compensation method of the above embodiments. The sampling circuit of this embodiment is as mentioned above. Figure 3 The diagram shows: a first sampling resistor R1, set on the DC bus; a second sampling resistor R2, connected in series in one phase of the drive module; a third sampling resistor R3, connected in series in another phase of the drive module; and a compensation module (not shown in the diagram), used to obtain the dual-resistance sampling values ​​of the three-phase current of the motor through dual-resistance sampling at the beginning of each control cycle of the motor; to obtain the single-resistance sampling values ​​of the three-phase current of the motor through single-resistance sampling within each control cycle of the motor; and to calculate the current compensation amount for each phase based on the single-resistance sampling value obtained in the current control cycle and the dual-resistance sampling value obtained in the previous control cycle, and to compensate the current of that phase based on the current compensation amount.

[0099] At different times within each control cycle of the motor, each phase of the three-phase motor will have multiple different conduction states. The starting time is k, and the dual-resistor sampling is between k+nTs and k+(n+1)Ts. Therefore, the delay between the current of each phase obtained by single-resistor sampling and the current of each phase obtained by dual-resistor sampling is close to 1.5Ts.

[0100] Since the delay between the phase currents obtained by single-resistor sampling and those obtained by dual-resistor sampling is close to 1.5Ts, it can be inferred that the deviation between the current obtained by single-resistor sampling and the current obtained by dual-resistor sampling is approximately equal to the current error caused by the digital delay. Therefore, calculating the current compensation amount based on the single-resistor sampling value obtained in the current control cycle and the dual-resistor sampling value obtained in the previous control cycle, and compensating for the phase current based on the current compensation amount, can reduce the error of the sampling current.

[0101] In this embodiment, the sampling circuit and compensation module obtain the dual-resistance sampling values ​​of the three-phase current of the motor through dual-resistance sampling at the beginning of each control cycle of the motor, and obtain the single-resistance sampling values ​​of the three-phase current of the motor through single-resistance sampling within each control cycle. Since the time difference between the time within the current cycle and the beginning of the previous control cycle is approximately 1.5 times the cycle length, the deviation between the current obtained by single-resistance sampling and the current obtained by dual-resistance sampling is approximately equal to the current error caused by digital delay. Therefore, the current compensation amount is calculated based on the single-resistance sampling value obtained in the current control cycle and the dual-resistance sampling value obtained in the previous control cycle. Compensating the phase current based on the current compensation amount can reduce the sampling current error caused by digital delay, thereby reducing current harmonics and improving the control accuracy of the motor.

[0102] In order to accurately obtain the current of each phase, when the compensation module obtains the dual-resistance sampling value of the three-phase current of the motor through dual-resistance sampling, it specifically performs the following operations: controls the upper bridge arm of the motor drive module to be turned off and the lower bridge arm to be turned on, thereby obtaining two of the three-phase currents; and calculates the current of the remaining phase based on the obtained two-phase currents.

[0103] As mentioned above Figure 4 As shown, when the control signals from S1 to S6 are 000111, that is, all the lower bridge arms of the drive module are closed and all the upper bridge arms are open, this arrangement occurs at time k+nTs (n is an integer). At this time, voltage drops U2 and U3 are generated on the sampling resistors R2 and R3 respectively. According to Ohm's law, the A-phase current Ia1 can be calculated by U2 / R2, and the B-phase current Ib1 can be calculated by U3 / R3. Since the sum of the three-phase currents is 0, the C-phase current Ic1 can be calculated.

[0104] Through the above embodiments, the sampling current of a single resistor is obtained within the sampling period. The time difference between the time in the current period and the start time of the previous control period is approximately 1.5 times the period length. Only when the distance between the midpoint of the current period and the start point of the previous period is 1.5 times the period length is the time difference between these two points accurately equal to the digital delay. Therefore, to obtain a more accurate digital delay compensation effect, it is necessary to obtain the current value at the midpoint of each control cycle of the motor. The sampling of the single resistor Z1 is performed within the time period from k+nTs to k+(n+1)Ts. There are three different large combinations of switching transistors that can sample currents of different phase sequences. Each large combination also has two small permutations. The specific logic is as follows: when the control signal combination is the small permutation 100011 and 011100, the A-phase current is sampled; when the control signal combination is the small permutation 010101 and 101010, the B-phase current is sampled; when the control signal combination is the small permutation 001110 and 110001, the C-phase current is sampled.

[0105] As mentioned above Figure 5 As shown, phase A is connected to phases B and C respectively. At this time, the first single-resistor sampling current Ia2 is obtained by sampling the current of phase A for the first time. As mentioned above... Figure 6 As shown, phases B and C are connected to phase A. At this time, the current of phase A is sampled for the second time to obtain the second single-resistor sampling current Ia3.

[0106] As mentioned above Figure 7 As shown, phase B is connected to phases A and C respectively. At this time, the current Ib2 of phase B is collected. As mentioned above... Figure 8 As shown, phases A and C are connected to phase B, and the current Ib3 of phase B is collected.

[0107] As mentioned above Figure 9 As shown, phase C is connected to phases A and B respectively. At this time, the current Ib2 of phase C is sampled. (As mentioned above...) Figure 10 As shown, phases A and B are connected to phase C, and the current Ib3 of phase C is collected.

[0108] As mentioned above Figure 11As shown, under normal control logic, only two major combinations will appear in one cycle. Each major combination contains two minor permutations. In the diagram, the first major combination includes the minor permutations 100011 and 011100, corresponding to phase A. The second major combination includes the minor permutations 010101 and 101010, corresponding to phase B. For each major combination, the two minor permutations will appear twice symmetrically with the midpoint of the cycle as the axis of symmetry. Therefore, by sampling the current at the time points when the two minor permutations appear under a corresponding major combination, and averaging the two current samples, we can consider it as the sampled current value of that phase at the midpoint of the cycle. Similarly, in other cycles, it is also possible that the first major combination includes two minor permutations, 010101 and 101010, corresponding to phase B, and the second major combination includes two minor permutations, 001110 and 110001, corresponding to phase C; or, the first major combination includes two minor permutations, 100011 and 011100, corresponding to phase A, and the second major combination includes two minor permutations, 001110 and 110001, corresponding to phase C.

[0109] In summary, to obtain the current value at the midpoint of the cycle and thus achieve a more accurate current compensation effect, the compensation module performs the following operations when obtaining the single-resistance sampling values ​​of the motor's three-phase current through single-resistance sampling: When the upper arm of the first phase, the lower arm of the second phase, and the lower arm of the third phase of the drive module are simultaneously conducting, the first-phase current is sampled once; when the lower arm of the first phase, the upper arm of the second phase, and the upper arm of the third phase of the drive module are simultaneously conducting, the first-phase current is sampled again; the average value of the two sampled first-phase currents is calculated as the first-phase current; when the upper arm of the second phase, the lower arm of the first phase, and the lower arm of the third phase of the drive module are simultaneously conducting... When the second phase current is simultaneously turned on, the second phase current is sampled once. When the lower bridge arm of the second phase, the upper bridge arm of the first phase, and the upper bridge arm of the third phase of the drive module are simultaneously turned on, the second phase current is sampled again. The average value of the two sampled second phase currents is calculated as the second phase current. Based on the quantitative relationship that the sum of the three phase currents is 0, the first sampled third phase current is calculated based on the first sampled first phase current and the first sampled second phase current. Similarly, based on the quantitative relationship that the sum of the three phase currents is 0, the second sampled third phase current is calculated based on the second sampled first phase current and the second sampled second phase current. The average value of the two sampled third phase currents is calculated as the third phase current.

[0110] Since the distance between the midpoint of this cycle and the starting point of the previous control cycle is 1.5 times the cycle length, the time difference between these two points is exactly equal to the digital delay. Therefore, the current difference between these two points is close to the current error caused by the digital delay. To obtain an accurate sampled current compensation, the current compensation is calculated based on the single-resistor sampled value obtained in the current control cycle and the dual-resistor sampled value obtained in the previous control cycle, according to the following formula: comp = I T 2-I T-1 1; where comp is the current compensation amount, I T 2 represents the single-resistor sampling current of the current control cycle, I. T-1 1 represents the dual-resistor sampling current from the previous control cycle.

[0111] For phase A, after obtaining the first single-resistor sampling current Ia2 and the second single-resistor sampling current Ia3 in the current control cycle T, the average value is calculated to obtain the single-resistor sampling current Ia3 of phase A in the current control cycle. T 2. Then subtract the dual-resistor sampling current I from the previous control cycle. T-1 1. Obtain the current compensation amount comp.

[0112] For phase B, after obtaining the first single-resistor sampling current Ib2 and the second single-resistor sampling current Ib3 in the current control cycle T, the average value is calculated to obtain the single-resistor sampling current Ib3 of phase B in the current control cycle. T 2. Then subtract the dual-resistor sampling current I from the previous control cycle. T-1 1. Obtain the current compensation amount comp.

[0113] For phase C, after obtaining the first single-resistor sampling current Ic2 and the second single-resistor sampling current Ic3 in the current control cycle T, the average value is calculated to obtain the single-resistor sampling current Ic3 of phase C in the current control cycle. T 2. Then subtract the dual-resistor sampling current I from the previous control cycle. T-1 1. Obtain the current compensation amount comp.

[0114] An ideal phase current is a sine wave. According to the properties of a sine wave, the rate of change of the phase current is constantly changing. Therefore, directly using the sampling delay error at time k-2 as the sampling compensation at time k is not ideal and still contains some error. Therefore, when calculating the current compensation amount, the rate of change of the current should be considered. Since the phase current is a sine wave, its derivative is a cosine function. Therefore, to obtain a more accurate current compensation amount, the compensation module calculates the current compensation amount based on the single-resistor sampling value obtained in the current control cycle and the dual-resistor sampling value obtained in the previous control cycle, according to the following formula:

[0115] comp = (I T2-I T-1 1) *cos(w*t);

[0116] Where comp is the current compensation amount, I T 2 represents the single-resistor sampling current of the current control cycle, I. T-1 1 represents the dual-resistor sampling current of the previous control cycle, cos is the cosine function, w is the angular velocity of the current, and t is the current time.

[0117] Assuming the current sampling current is I, in order to obtain an accurate current sampling value, the compensation module compensates the phase current based on the current compensation amount according to the following formula: I'=I+comp; where I' is the compensated current value and I is the current current value.

[0118] Example 4

[0119] This embodiment provides an electrical device, including a motor and a drive module, and also includes a sampling circuit as described in the above embodiment, which is used to reduce the sampling error caused by digital delay, and improve the control accuracy of the motor while reducing current harmonics.

[0120] In some embodiments of the present invention, the aforementioned electrical equipment is a compressor or a fan.

[0121] Example 5

[0122] This embodiment provides an air conditioning unit, including the electrical equipment described in the above embodiment.

[0123] Example 6

[0124] This embodiment provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described sampling current compensation method.

[0125] Example 7

[0126] This embodiment provides an electronic device, including:

[0127] One or more processors;

[0128] A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the above-described sampling current compensation method.

[0129] Figure 13 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present invention, such as... Figure 13 As shown, the electronic device includes:

[0130] One or more processors 1310 and memory 1320, Figure 13Take the 1310 processor as an example.

[0131] The aforementioned electronic device may further include: an input device 1330 and an output device 1340.

[0132] The processor 1310, memory 1320, input device 1330, and output device 1340 can be connected via a bus or other means. Figure 13 Taking the example of a connection between China and Israel via a bus.

[0133] The memory 1320, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the sampling current compensation method in this embodiment of the invention. The processor 1310 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions, and modules stored in the memory 1320, thereby implementing the above-described method embodiments.

[0134] The memory 1320 may include a program storage area and a data storage area, wherein the program storage area may store application programs required for operating the device and at least one function; and the data storage area may store data created based on the use of the anomaly detection device, etc. Furthermore, the memory 1320 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device.

[0135] Input device 1330 can receive input digital or character information, and generate key signal inputs related to user settings and function control of the electronic device. Output device 1340 may include display devices such as a display screen.

[0136] The one or more modules are stored in the memory 1320, and when executed by the one or more processors 1310, the sampling current compensation method in any of the above method embodiments is executed.

[0137] The aforementioned electronic device product can execute the method provided in the embodiments of the present invention, and has the corresponding functional modules and beneficial effects for executing the method. Technical details not described in detail in this embodiment can be found in the method provided in the embodiments of the present invention.

[0138] The electronic devices of this invention exist in various forms, including but not limited to:

[0139] (1) Mobile communication devices: These devices are characterized by their mobile communication capabilities and are primarily designed to provide voice and data communication. These terminals include smartphones (e.g., iPhones), multimedia phones, feature phones, and low-end phones.

[0140] (2) Ultra-mobile personal computer devices: These devices fall under the category of personal computers, have computing and processing functions, and generally also have mobile internet access capabilities. These terminals include: PDAs, MIDs, and UMPCs, such as iPads.

[0141] (3) Portable entertainment devices: These devices can display and play multimedia content. This category includes: audio and video players (such as iPods), handheld game consoles, e-books, as well as smart toys and portable car navigation devices.

[0142] (4) Server: A device that provides computing services. The components of a server include a processor, hard disk, memory, device bus, etc. Servers are similar to general computer architectures, but because they need to provide highly reliable services, they have higher requirements in terms of processing power, stability, reliability, security, scalability, and manageability.

[0143] (5) Other electronic devices with data interaction functions, such as televisions, in-vehicle screens, etc.

[0144] The device embodiments described above are merely illustrative. The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0145] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0146] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A sampling current compensation method applied to a motor connected to a driving module, characterized in that, The method comprises: At the beginning of each control cycle of the motor, a double-resistance sampling value of three-phase current of the motor is obtained by double-resistance sampling; In each control cycle of the motor, a single-resistance sampling value of three-phase current of the motor is obtained by single-resistance sampling; For each phase, a current compensation amount is calculated based on the single-resistance sampling value obtained in the current control cycle and the double-resistance sampling value obtained in the previous control cycle, and the current of the phase is compensated based on the current compensation amount.

2. The method of claim 1, wherein, The double-resistance sampling value of three-phase current of the motor is obtained by double-resistance sampling, comprising: The upper bridge arms of the driving module of the motor are all turned off, and the lower bridge arms are all turned on, so that two-phase current in the three-phase current is obtained; The remaining one-phase current is calculated according to the obtained two-phase current.

3. The method of claim 1, wherein, The single-resistance sampling value of three-phase current of the motor is obtained by single-resistance sampling, comprising: When the upper bridge arm of the first phase, the lower bridge arm of the second phase and the lower bridge arm of the third phase of the driving module are all turned on, the first-phase current is collected once; when the lower bridge arm of the first phase, the upper bridge arm of the second phase and the upper bridge arm of the third phase of the driving module are all turned on, the first-phase current is collected again; the average value of the first-phase current collected twice is calculated as the first-phase current; When the upper bridge arm of the second phase, the lower bridge arm of the first phase and the lower bridge arm of the third phase of the driving module are all turned on, the second-phase current is collected once; when the lower bridge arm of the second phase, the upper bridge arm of the first phase and the upper bridge arm of the third phase of the driving module are all turned on, the second-phase current is collected again; the average value of the second-phase current collected twice is calculated as the second-phase current; The first-collected third-phase current is calculated according to the first-collected first-phase current and the first-collected second-phase current, the second-collected third-phase current is calculated according to the second-collected first-phase current and the second-collected second-phase current, and the average value of the third-phase current collected twice is calculated as the third-phase current.

4. The method of claim 1, wherein, The current compensation amount is calculated based on the single-resistance sampling value obtained in the current control cycle and the double-resistance sampling value obtained in the previous control cycle, which is realized according to the following formula: comp = I T 2 - I T-1 1 ; Wherein, comp is the current compensation amount, I T 2 is a single-resistance sampled current of a current control period, I T-1 1 is a double-resistance sampled current of a previous control period, and T is a period number.

5. The method of claim 1, wherein, The current compensation amount is calculated based on the single-resistance sampling value obtained in the current control cycle and the double-resistance sampling value obtained in the previous control cycle, which is realized according to the following formula: comp = (I T 2 - I T-1 1) * cos(w*t); wherein comp is the current compensation amount, I T 2 is the single-resistance sampled current of the current control period, I T-1 1 is the double-resistance sampled current of the previous control period, T is the period number, cos is the cosine function, w is the angular velocity of the current, and t is the current time.

6. The method according to claim 4 or 5, characterized in that, The current of the phase is compensated based on the current compensation amount, which is realized according to the following formula: I' = I + comp; Wherein, I' is the compensated current value, I is the current value.

7. A sampling circuit for implementing the sampling current compensation method of any one of claims 1 to 6, characterized in that, The sampling circuit comprises: A first sampling resistor is arranged on the DC bus; A second sampling resistor is arranged in series in one phase of the driving module; A third sampling resistor is arranged in series in another phase of the driving module; The compensation module is configured to: obtain, at the beginning of each control cycle of the motor, a double-resistance sampling value of a double-resistance sampling value of three-phase currents of the motor through double-resistance sampling; obtain, in each control cycle of the motor, a single-resistance sampling value of the three-phase currents of the motor through single-resistance sampling; calculate, for each phase, a current compensation amount based on the single-resistance sampling value obtained in the current control cycle and the double-resistance sampling value obtained in the previous control cycle; and compensate the current of the phase based on the current compensation amount.

8. An electrical consumer comprising an electrical machine and a drive module, characterized in that The sampling circuit is as claimed in claim 7.

9. The powered device of claim 8, wherein, The electrical equipment is a compressor or a fan.

10. An air conditioning unit characterized by, The electrical equipment is as claimed in claim 8 or 9.

11. A computer readable storage medium having stored thereon a computer program, characterized in that, The program, when executed by a processor, implements the method as claimed in any one of claims 1 to 6.

12. An electronic device, comprising: The method comprises: one or more processors; a storage device configured to store one or more programs, which, when executed by the one or more processors, cause the one or more processors to implement the method as claimed in any one of claims 1 to 6.

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