Power amplifier output matching network for suppressing out-of-band gain
By sharing an inductor and adjusting the capacitance value in the power amplifier output matching network, a simplified out-of-band gain suppression structure is achieved, solving the problems of complex structure and high loss in the prior art. This structure is suitable for power amplifier designs in multiple frequency bands.
Patent Information
- Application Number
- CN202511622696.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-07
- Publication Date
- 2026-03-17
AI Technical Summary
Existing out-of-band rejection methods for power amplifiers suffer from problems such as complex structure, high insertion loss, large chip area, and difficulty in achieving precise out-of-band rejection frequency adjustment.
By using a third inductor shared by the output matching circuit and the out-of-band suppression circuit, the resonant frequency of the series resonant circuit can be controlled by adjusting the capacitance value of the first capacitor, thereby achieving precise suppression of out-of-band gain, avoiding the introduction of additional inductor components, and simplifying the circuit structure.
It achieves low-loss out-of-band gain suppression, reduces circuit complexity and chip area, is suitable for power amplifier designs of various types and frequency bands, and has stable in-band matching performance.
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Figure CN121690099A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of monolithic microwave integrated circuits, and more particularly to a power amplifier output matching network for suppressing out-of-band gain. Background Technology
[0002] As one of the core components of a communication system, the power amplifier amplifies signals to enable long-distance wireless transmission. With the development of wireless communication technology, the integration of wireless communication systems is becoming increasingly sophisticated, and internal electromagnetic interference inevitably becomes a pressing problem to be solved. To improve the electromagnetic compatibility of the system, power amplifiers are often required to have good gain suppression in non-operating frequency bands, i.e., out-of-band rejection.
[0003] Currently, there are several main methods to improve out-of-band rejection in power amplifiers: the first is to use an additional parallel resonant circuit in the matching circuit to achieve out-of-band rejection; the second is to combine out-of-band rejection and in-band impedance matching in a fusion design. The first method not only sacrifices chip area but also increases the insertion loss of the circuit, leading to a decrease in the output power and efficiency of the power amplifier; the second method requires a specific topology for the output matching network to simultaneously achieve out-of-band rejection and in-band impedance matching. The patent application CN112910419A describes achieving out-of-band rejection by constructing a parallel resonant circuit using "series capacitors + connecting microstrip lines" and "drain bias microstrip lines (seventh microstrip)". However, its circuit includes multiple sets of microstrip lines, series capacitors, parallel capacitors, etc., resulting in a complex structure. The layout design needs to consider parasitic interference between transmission lines, making implementation difficult. Summary of the Invention
[0004] Purpose of the invention: The purpose of this invention is to provide a power amplifier output matching network that is simple in structure, has low in-band loop loss, and can suppress out-of-band gain.
[0005] Technical solution: The power amplifier output matching network of the present invention includes a transistor connected to the input terminal, an output matching circuit, and an out-of-band rejection circuit. The drain of the transistor is connected to the first inductor of the output matching circuit. The other end of the first inductor is connected to the second inductor and the third inductor respectively. The third inductor and the first capacitor are connected in series to form the out-of-band rejection circuit. The output matching circuit and the out-of-band rejection circuit share the third inductor.
[0006] Furthermore, the out-of-band suppression circuit is connected in parallel with a second capacitor and then connected to the DC voltage source.
[0007] Furthermore, the output matching circuit includes a first inductor, a second inductor, a third inductor, and a second capacitor, as well as a third capacitor connected in series with the second inductor to the output terminal. After setting the in-band operating frequency, the load impedance can be matched to the required position of the transistor by optimizing the output matching circuit. Since the parameters of the third inductor have been determined when optimizing the output matching circuit, the out-of-band rejection target frequency is inversely proportional to the square root of the first capacitor. By changing the value of the first capacitor, the resonant frequency of the series resonant circuit can be directly controlled, thereby achieving precise adjustment of the out-of-band rejection target frequency without changing the optimized third inductor and the core parameters of the output matching circuit, ensuring the stability of the matching performance within the operating frequency band.
[0008] Preferably, the power amplifier further includes other matching circuits disposed on the gate side of the transistor, the other matching circuits being adapted to be electrically connected to the gate of the transistor; the source of the transistor is adapted to be grounded.
[0009] Furthermore, the transistors are high electron mobility transistors based on GaAs technology or high electron mobility transistors based on GaN technology or other microwave power transistors; the number of transistors is configured as one or more, and the number is determined by matching the power density of individual transistors according to the target output power value of the power amplifier, so that the total power carrying capacity of the transistors is adapted to the target output power value.
[0010] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: (1) The introduced out-of-band suppression circuit has low loss and has little impact on the output power and efficiency within the operating frequency band of the power amplifier; (2) The output matching circuit and the out-of-band suppression circuit share the same inductor, avoiding the introduction of additional inductor components and reducing the number of components and layout space of the circuit; (3) The out-of-band suppression function is realized by connecting the first capacitor in series on the basis of the shared inductor. The first capacitor can be integrated with the metal layer and dielectric layer of the existing circuit without occupying additional chip area; (4) The structure is simple. The out-of-band suppression target frequency can be accurately adjusted by adjusting the capacitance value of the first capacitor. It is suitable for the design of power amplifiers of various types and frequency bands. Attached Figure Description
[0011] Figure 1 This is the overall equivalent circuit structure diagram of the present invention;
[0012] Figure 2 This is a structural block diagram of an embodiment of the present invention;
[0013] Figure 3 This is a partial circuit schematic diagram of an embodiment of the present invention;
[0014] Figure 4 This is a comparison diagram of the output matching loss of the output matching network of the present invention and the output matching loss of the circuit without out-of-band suppression. Detailed Implementation
[0015] The technical solution of the present invention will be further described below with reference to the embodiments and accompanying drawings.
[0016] like Figure 1 As shown, an output matching network for a power amplifier that suppresses out-of-band gain is presented. This circuit structure can be applied to the design of monolithic integrated power amplifier circuits for microwaves and millimeter-waves. The input radio frequency signal (RFin) is input through the gate of a transistor and amplified at the drain. The amplified signal is then transmitted to the load through the output matching circuit 2. The transistors are high electron mobility transistors based on GaAs technology, high electron mobility transistors based on GaN technology, or other microwave power transistors. The number of transistors is configured as one or more, and the number is determined by matching the power density of individual transistors according to the target output power value of the power amplifier, so that the total power handling capacity of the transistors is adapted to the target output power value.
[0017] The output matching circuit consists of a first inductor 21, a second inductor 22, a third inductor 31, a second capacitor 23, and a third capacitor 24. One end of the first inductor 21 is connected to the drain of transistor 1, and the other end is split into two paths, connected to the second inductor 22 and the third inductor 31 respectively. The second inductor 22 and the third capacitor 24 are connected in series to the output terminal, forming a key branch for impedance matching. The third inductor 31 and the second capacitor 23 are connected in series to a DC voltage source to achieve isolation and matching adjustment between DC bias and RF signal. The third inductor 31 and the first capacitor 32 are connected in series to form an out-of-band rejection circuit 3, which uses resonant characteristics to suppress out-of-band gain.
[0018] Set in-band operating frequency Out-of-band rejection frequency The parameters of the first inductor 21, the second inductor 22, the third inductor 31, the second capacitor 23, and the third capacitor 24, and their in-band operating frequency. By optimizing the output matching circuit 2, the load impedance can be matched to the required position of transistor 1. Once the output matching circuit 2 is designed, the out-of-band gain of the power amplifier can be suppressed by utilizing the series resonant circuit formed by the third inductor and the first capacitor in the out-of-band rejection circuit 3, and the out-of-band rejection frequency can be adjusted. It can be represented as:
[0019]
[0020] L3 represents the parameters of the third inductor. This represents the parameters of the first capacitor.
[0021] Because the output matching circuit 2 and the out-of-band rejection circuit 3 share the third inductor, and since the parameters of the third inductor were determined during the optimization of the output matching circuit, only the first capacitor can be changed to achieve a change in the out-of-band rejection frequency. Once determined, the parameters of the first capacitor 32 are as follows:
[0022]
[0023] The second capacitor 23 can isolate the in-band operating frequency. The radio frequency signal enters the DC voltage source through the third inductor 31. Therefore, the impedance Z1 looking from this point towards the DC voltage source should be as small as possible. The impedance Z1 can be expressed as:
[0024]
[0025] This indicates the parameters of the second capacitor.
[0026] The second capacitor 23 and the first capacitor 32 are connected in parallel, therefore the impedance Z2 introduced by the first capacitor 32 can be expressed as:
[0027]
[0028] As can be seen from the above equation, introducing the first capacitor 32 into the out-of-band suppression circuit 3 can further isolate the in-band operating frequency. The radio frequency signal enters the DC voltage source through the third inductor 31.
[0029] This invention, through a reasonable circuit structure design, utilizes the third inductor and the first capacitor in the out-of-band rejection circuit to suppress the out-of-band frequency. Resonance is formed at the point, thereby achieving [the desired effect]. The out-of-band rejection (OBOR) at this location does not utilize additional inductors or capacitors in the OBOR design. Therefore, the layout size and insertion loss of its output matching network are not significantly different from those of an output matching network without OBOR characteristics, reducing circuit complexity and cost. This makes it highly practical and valuable for widespread adoption. Precise adjustment of the target OBOR frequency can be achieved simply by adjusting the value of the first capacitor, making it suitable for power amplifier designs of various types and frequency bands.
[0030] This embodiment is based on a GaAs power amplifier with an operating frequency of 26GHz~27GHz and an out-of-band rejection frequency of 22.4GHz. It provides a more detailed description of the power amplifier output matching network for suppressing out-of-band gain proposed in this invention.
[0031] like Figure 2As shown in the block diagram, the power amplifier in this embodiment employs a three-stage amplification topology, with each stage's matching network designed according to the required electrical performance. HEMT devices are used as transistors, and each stage transistor has an independent gate bias network and drain bias network. Both the gate bias network and drain bias network are integrated with their corresponding matching networks in the design. Figure 3 The circuit diagram shown is a partial schematic of an embodiment. The output matching circuit in the output matching network has low loss, minimizing the impact on the output power and efficiency of the power amplifier within its band. The output matching network integrates an out-of-band rejection circuit, reducing the impact or interference of the power amplifier's transmit power on out-of-band signals without increasing chip size. An external DC voltage source supplies power to the drain of the third-stage transistor via the output matching network. The gate of the third-stage transistor is connected to the second inter-stage matching network, the drain of the third-stage transistor is connected to the output matching network, and the source of the third-stage transistor is grounded at an appropriate location.
[0032] The output of the matching network in the example is as follows: Figure 4 As shown by the red line, the loss within the 26GHz~27GHz operating frequency band is approximately 0.3dB, and the output matching circuit has a relatively small impact on the in-band output power and efficiency; the out-of-band rejection circuit achieves significant gain suppression around 22.4GHz. The results are compared with those of the output matching network without out-of-band rejection circuit. Figure 4 (Blue line) The output matching network of the embodiment can meet the low loss requirement in the band, while achieving out-of-band gain suppression.
Claims
1. A power amplifier output matching network for suppressing out-of-band gain, comprising a transistor (1) connected to an input, an output matching circuit (2) and an out-of-band suppression circuit (3), characterized in that The drain of the transistor (1) is connected to a first inductor (21) of an output matching circuit (2), the other end of the first inductor is connected to a second inductor (22) and a third inductor (31) respectively, and the third inductor (31) and a first capacitor (32) are connected in series to form an out-of-band rejection circuit (3); the output matching circuit (2) and the out-of-band rejection circuit (3) share the third inductor (31).
2. A power amplifier output matching network that suppresses out-of-band gain according to claim 1, wherein, The out-of-band rejection circuit (3) is connected to a DC voltage source end in parallel with a second capacitor (23).
3. The power amplifier output matching network with out-of-band gain suppression of claim 1, wherein, The output matching circuit (2) comprises the first inductor (21), the second inductor (22), the third inductor (31), the second capacitor (23), and further comprises a third capacitor (24), which is connected to an output end in series with the second inductor (22).
4. The power amplifier output matching network with out-of-band gain suppression of claim 1, wherein, The power amplifier further comprises another matching circuit arranged on the gate side of the transistor (1), and the other matching circuit is adaptively connected to the gate of the transistor (1).
5. The power amplifier output matching network with out-of-band gain suppression of claim 1, wherein, The source of the transistor (1) is adaptively grounded.
6. The power amplifier output matching network with out-of-band gain suppression of claim 1, wherein, The transistor (1) is a high electron mobility transistor based on GaAs technology or a high electron mobility transistor based on GaN technology or other microwave power transistors.
7. The power amplifier output matching network with out-of-band gain suppression of claim 1, wherein, The number of the transistor (1) is configured as one or more, and the number is determined by matching and selecting the type according to the target output power value of the power amplifier and the power density of a single transistor, so that the total power carrying capacity of the transistor is adapted to the target output power value.
Citation Information
Patent Citations
Power amplifier chip output matching circuit with out-of-band gain suppression function
CN112910419A