Semiconductor device

Abstract

Provided is a semiconductor device having a shape in which defects are suppressed. The semiconductor chip is provided closer to the first direction than the first lead frame, and includes a first electrode and a second electrode electrically connected to the first lead frame. The first conductor is electrically connected to the second electrode. The second lead frame is aligned with the first lead frame at a position closer to the second direction than the first lead frame, and includes a first terminal and a plate portion connected to the first terminal. The plate portion is electrically connected to the first conductor. The plate portion has an inclination that spans a first surface on one side in the first direction and a side surface on one side in the second direction. The resin covers a portion of the first lead frame, the semiconductor chip, the first conductor, the plate portion of the second lead frame, and a portion of the first terminal of the second lead frame.

Description

[0001] Related applications

[0002] This application claims priority to Japanese Patent Application No. 2024-162649 (filed on September 19, 2024). This application incorporates all contents of the basic application by reference to that basic application. Technical Field

[0003] The implementation involves a semiconductor device. Background Technology

[0004] Examples of semiconductor devices include devices comprising semiconductor chips, packages, and connectors. Semiconductor chips include semiconductor elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Packages cover the semiconductor chip and the connectors. Connectors are connected to the electrodes of the semiconductor chip via conductors and are also partially exposed from the package. Summary of the Invention

[0005] The implementation provides a semiconductor device having a shape that suppresses defects.

[0006] One embodiment of a semiconductor device includes a first lead frame, a semiconductor chip, a first conductor, a second lead frame, and resin. The semiconductor chip is disposed at a position further in a first direction than the first lead frame and includes a first electrode and a second electrode electrically connected to the first lead frame. The first conductor is electrically connected to the second electrode. The second lead frame is arranged with the first lead frame at a position further in a second direction than the first lead frame and includes a first terminal and a plate portion connected to the first terminal. The plate portion is electrically connected to the first conductor. The plate portion has an inclination extending across a first surface in the first direction and a side surface in the second direction. The resin covers a portion of the first lead frame, the semiconductor chip, the first conductor, the plate portion of the second lead frame, and a portion of the first terminal of the second lead frame.

[0007] A semiconductor device of another aspect includes a first lead frame, a semiconductor chip provided at a position closer to a first direction than the first lead frame and including a first electrode and a second electrode electrically connected to the first lead frame, a connector electrically connected to the second electrode, a second lead frame having a first terminal, second terminals arranged in a second direction perpendicular to the first direction, and a plate portion connected to the first terminal and the second terminals and inclined at an end portion of a first surface between the first terminal and the second terminals, and a resin covering a part of the first lead frame, the semiconductor chip, the connector, the plate portion of the second lead frame, and a part of the first terminal of the second lead frame. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 An appearance showing a configuration of a semiconductor device of the first embodiment is shown.

[0009] Figure 2 A configuration of an inside of a semiconductor device of the first embodiment is shown along an xy plane.

[0010] Figure 3 A configuration of an inside of a semiconductor device of the first embodiment is shown along an xy plane.

[0011] Figure 4 A configuration of a cross section of a semiconductor device of the first embodiment is shown.

[0012] Figure 5 A configuration of a cross section of a semiconductor device of the first embodiment is shown.

[0013] Figure 6 A configuration of a cross section of a semiconductor device of the first embodiment is shown.

[0014] Figure 7 A configuration of a part of a semiconductor device of the first embodiment is shown along an xy plane.

[0015] Figure 8 A configuration of a cross section of a semiconductor device of the first embodiment is shown.

[0016] Figure 9 A state during manufacture of a semiconductor device of the first embodiment is shown.

[0017] Figure 10 A state during manufacture of a part of a semiconductor device of the first embodiment is shown.

[0018] Figure 11 A configuration of an inside of a semiconductor device of a modification of the first embodiment is shown along an xy plane.

[0019] Figure 12A cross-sectional configuration of a semiconductor device according to a modification of the first embodiment is shown.

[0020] Figure 13 A cross-sectional configuration of a semiconductor device according to a modification of the first embodiment is shown.

[0021] Figure 14 A cross-sectional configuration of a semiconductor device according to a modification of the first embodiment is shown. DETAILED DESCRIPTION

[0022] Embodiments are described below with reference to the accompanying drawings. In some embodiments or different embodiments, a plurality of constituent elements having substantially the same function and configuration are sometimes further added with a numeral or a letter at the end of a reference sign in order to distinguish from each other.

[0023] The drawings are schematic views, and the relationship between the thickness and the planar dimension, the ratio of the thickness of each layer, and the like can be different from the actual one. Further, the drawings can also include portions having different dimensions, configurations, and / or ratios from each other.

[0024] Hereinafter, embodiments are described using a three-dimensional orthogonal coordinate system. The direction of the x-axis is referred to as the X direction. The direction opposite to the X direction is referred to as the -X direction. The direction of the y-axis is referred to as the Y direction. The direction opposite to the Y direction is referred to as the -Y direction. The direction of the z-axis is referred to as the Z direction, and the upward direction is referred to as the Z direction. The direction opposite to the Z direction is referred to as the -Z direction.

[0025] 1. First Embodiment

[0026] Figure 1 An external appearance of a configuration of a semiconductor device according to the first embodiment is shown. The semiconductor device 1 is configured as a semiconductor module that constitutes a part of another device.

[0027] As shown in FIG. 1, the semiconductor device 1 includes a semiconductor chip 11, a package 12, and lead frames (or external connection terminals) 13, 14, and 15. Figure 1

[0028] The semiconductor chip 11 is a chip including a semiconductor element. Examples of the semiconductor element include an n-type MOSFET and an IGBT (Insulated Gate Bipolar Transistor). The following description is based on the example of the MOSFET.

[0029] ​The package 12 is a structure that covers the inside of the semiconductor device 1, and covers the semiconductor chip 11 and the constituent elements of the part of the lead frame 13. Examples of the material of the package 12 include an epoxy resin. Examples of the shape of the package 12 include a hexahedron, and examples of the hexahedron include a truncated quadrangular pyramid and a cuboid. The following description is based on the example in which the package 12 has the shape of a truncated quadrangular pyramid. That is, the package 12 has an upper surface, a lower surface, and four side surfaces. The upper surface and the lower surface extend along the xy plane and face each other. The upper surface is located at a position closer to the Z direction than the lower surface. The profile of the lower surface along the xy plane follows the profile of the upper surface along the xy plane. In one example, the area of the lower surface along the xy plane is larger than the area of the upper surface along the xy plane. The four side surfaces are connected to one edge of the upper surface and one edge of the lower surface, respectively, and are inclined with respect to the z axis. The side surfaces include a side surface LS and a side surface TS. The side surfaces LS and TS extend along the xz plane. The side surfaces LS and TS face each other. The side surface TS is located at a position closer to the Y direction than the side surface LS.

[0030] The lead frame 13 is an electrically conductive body that electrically connects the semiconductor device 1 and an electrically conductive body outside the semiconductor device 1. The lead frame 13 is electrically connected to the semiconductor chip 11. The lead frame 13 is partially exposed from the package 12 in the side surface LS. The lead frame 13 includes a plurality of first parts (external terminals) 13A that are exposed from the package 12 in the side surface LS. The first parts 13A are connected to each other in the package 12. The first parts 13A are arranged at intervals in the X direction.

[0031] The lead frame 14 is an electrically conductive body that electrically connects the semiconductor device 1 and an electrically conductive body outside the semiconductor device 1. The lead frame 14 is electrically connected to the semiconductor chip 11. The lead frame 14 is partially exposed from the package 12 in the side surface TS. The lead frame 14 includes a plurality of first parts (external terminals) 14A that are exposed from the package 12 in the side surface TS. The first parts 14A are connected to each other in the package 12. The first parts 14A are arranged at intervals in the X direction.

[0032] The lead frame 15 is partially exposed from the package 12 in the side surface TS. The lead frame 15 and the first parts 14A are arranged.

[0033] Figure 2 A configuration of the inside of the semiconductor device of the first embodiment is shown along the xy plane. Figure 2 A configuration when the semiconductor device 1 is viewed from the Z direction is shown.

[0034] As Figure 2The lead frame 13 extends along the xy plane. The lead frame 13 includes a first portion (first plate portion) 13A. In one example, the first portion 13A has a quadrangular shape. The first portion 13A can have a protrusion extending in the X direction and the -X direction. The first portion 13A has a side on the -Y direction side connected to a side on the Y direction side of the second portion 13B. The second portion 13B extends in the Y direction.

[0035] The lead frame 14 extends along the xy plane. The lead frame 14 is located more on the Y direction side than the lead frame 13. The lead frame 14 and the lead frame 13 are arranged with a space therebetween. The lead frame 14 includes a second portion 14B. In one example, the second portion 14B has a quadrangular shape. The second portion 14B has a side on the Y direction side connected to a side on the -Y direction side of the first portion 14A. The first portion 14A extends in the Y direction.

[0036] The lead frame 15 extends along the xy plane. The lead frame 15 is located more on the Y direction side than the lead frame 13. The lead frame 15 is located more on the -X direction side than the lead frame 14. The lead frame 15, the lead frame 13, and the lead frame 14 are arranged with spaces therebetween. The lead frame 15 extends in the Y direction.

[0037] Figure 3 A configuration of the inside of the semiconductor device of the first embodiment is shown along the xy plane. Figure 3 A configuration in a case where the semiconductor device 1 is viewed from the Z direction is shown. Figure 3 A region more on the Z direction side than the region shown in FIG. 1 is shown. As shown in FIG. 2, the semiconductor device 1 includes a semiconductor chip 11, a lead frame 13, a lead frame 14, and a lead frame 15. Figure 2 A region more on the Z direction side than the region shown in FIG. 1 is shown. As shown in FIG. 2, the semiconductor device 1 includes a semiconductor chip 11, a lead frame 13, a lead frame 14, and a lead frame 15. Figure 3 As shown, the semiconductor device 1 includes conductive bodies 17 and 18. The conductive bodies 17 and 18 can also be referred to as connectors 17 and 18, respectively.

[0038] The semiconductor chip 11 extends along the xy plane. In one example, the semiconductor chip 11 has a quadrangular shape. The semiconductor chip 11 overlaps the second portion 13B of the lead frame 13. In one example, the outline of the semiconductor chip 11 is located more on the inner side than the outline of the second portion 13B of the lead frame 13. The semiconductor chip 11 is electrically connected to the second portion 13B of the lead frame 13 at a drain electrode 113 described later.

[0039] The semiconductor chip 11 has a gate electrode 111 and a source electrode 112. The gate electrode 111 is exposed on the upper surface (i.e., the surface on the +Z direction side) of the semiconductor chip 11. The gate electrode 111 extends along the xy plane. In one example, the gate electrode 111 opposes one edge of the semiconductor chip 11. In one example, the gate electrode 111 opposes the upper edge (i.e., the edge on the Y direction side) of the semiconductor chip 11 and opposes the left edge (i.e., the edge on the -X direction side) of the semiconductor chip 11. The gate electrode 111 is connected to the gate of the MOSFET or the IGBT in the semiconductor chip 11.

[0040] The source electrode 112 is exposed on the upper surface of the semiconductor chip 11. The source electrode 112 extends along the xy plane. The source electrode 112 extends over the region in the upper surface of the semiconductor chip 11 other than the region in which the gate electrode 111 is exposed. The source electrode 112 and the gate electrode 111 have a gap. The source electrode 112 can have an arbitrary shape as long as it extends over the region other than the region of the gate electrode 111 in the vicinity of the gate electrode 111. In one example, the source electrode 112 has a quadrangular shape substantially along the shape of the semiconductor chip 11 and has a notch of the quadrangular shape around the gate electrode 111. The notch can also have a shape in which a plurality of quadrangular shapes are connected. The source electrode 112 is connected to one end (or the source) of the MOSFET. The source electrode 112 is the emitter electrode and is connected to the emitter of the IGBT in the case where the semiconductor chip 11 includes the IGBT.

[0041] The conductive body 17 overlaps the gate electrode 111 and the lead frame 15.

[0042] The conductive body 18 overlaps the source electrode 112 and the second portion 14B of the lead frame 14.

[0043] Figure 4 A configuration of a cross section of the semiconductor device of the first embodiment is shown. Figure 4 A cross section along the IV-IV line of Figure 2 and Figure 3 is shown. As shown in Figure 4 , the semiconductor device 1 further includes the bonding layers 21, 22, and 23.

[0044] The semiconductor chip 11 is located at a position closer to the Z direction than the second portion 13B of the lead frame 13. The semiconductor chip 11 includes a drain electrode 113 on the surface on the -Z direction side (the lower surface). The drain electrode 113 extends along the xy plane. The semiconductor chip 11 includes the source electrode 112 on the surface on the Z direction side (the upper surface).

[0045] The bonding layer 21 is conductive and is a layer containing a conductor. The bonding layer 21 extends along the xy-plane. In one example, the bonding layer 21 has a shape along the xy-plane that is also the same as the shape of the drain electrode 113 along the xy-plane. The bonding layer 21 is connected to the second portion 13B and the drain electrode 113. The bonding layer 21 secures the second portion 13B and the drain electrode 113 and electrically connects them. In one example, the bonding layer 21 contains solder.

[0046] The bonding layer 22 is conductive and is a layer containing a conductor. The bonding layer 22 extends along the xy-plane. In one example, the bonding layer 22 has a shape along the xy-plane that is also the same as the shape of the source electrode 112 along the xy-plane. The bonding layer 22 is connected to the source electrode 112 and the conductor 18. The bonding layer 22 secures the source electrode 112 and the conductor 18 and electrically connects them. In one example, the bonding layer 22 contains solder.

[0047] The conductor 18 has a first portion (first plate portion) 18A and a second portion 18B (second plate portion). The first portion 18A and the second portion 18B are connected to each other. The first portion 18A is located further in the Z direction than the semiconductor chip 11. The conductor 18 is in contact with the bonding layer 22 at the first portion 18A. The second portion 18B extends in the Y direction and extends in the -Z direction from the height of the first portion 18A. The end of the second portion 18B on the side opposite to the first portion 18A is located further in the Z direction than the lead frame 14.

[0048] The bonding layer 23 is conductive and is a layer containing a conductor. The bonding layer 23 extends along the xy-plane. In one example, the bonding layer 23 has a shape along the xy-plane that is the same as the shape of the second portion 14B of the lead frame 14 along the xy-plane. The bonding layer 23 is connected to the second portion 18B and the second portion 14B of the lead frame 14. The bonding layer 23 secures the second portion 18B and the second portion 14B and electrically connects them. In one example, the bonding layer 23 contains solder.

[0049] Package 12 covers semiconductor chip 11, bonding layers 21, 22 and 23, and conductor 18. Package 12 covers a portion of the upper surface of lead frame 13. Package 12 covers a portion of the upper surface of lead frame 14.

[0050] For reference Figure 4As described above, the first portion (terminal) 14A of the lead frame 14 is interconnected via the second portion (plate portion) 14B. Therefore, the area of ​​the lead frame 14 is larger, resulting in a larger contact area between the lead frame 14 and the conductor 18 via the bonding layer 23. That is, while it is possible to consider multiple independent first portions 14A being electrically connected to the source electrode 112 via multiple independent conductors, the lead frame 14 and the conductor 18 can be in contact over a larger area compared to that case. This allows a larger current to flow through the source.

[0051] Figure 5 The structure of the semiconductor device according to the first embodiment is shown in cross-section. Figure 5 Show along Figure 2 as well as Figure 3 A cross-section of the VV line. For example... Figure 5 As shown, the semiconductor device 1 also includes bonding layers 25 and 26.

[0052] The semiconductor chip 11 includes a gate electrode 111 on its upper surface.

[0053] The bonding layer 25 is conductive and is a layer containing conductors. The bonding layer 25 is connected to the gate electrode 111 and the conductor 17 (board portion, wiring). The bonding layer 25 fixes the gate electrode 111 and the conductor 17 and electrically connects them. In one example, the bonding layer 25 contains solder.

[0054] Conductor 17 extends in the -Z direction from a height higher than that of semiconductor chip 11 in the Z direction. The end of conductor 17 is located higher than that of lead frame 15 in the Z direction.

[0055] Bonding layer 26 is conductive and is a layer containing a conductor. Bonding layer 26 is connected to conductor 17 and lead frame 15. Bonding layer 26 secures conductor 17 and lead frame 15 and electrically connects them. In one example, bonding layer 26 contains solder.

[0056] Figure 6 The structure of the semiconductor device according to the first embodiment is shown in cross-section. Figure 6 Show along Figure 2 as well as Figure 3 The cross-section of the VI-VI line. For example... Figure 6 As shown, package 12 contains multiple (in) Figure 6Only one protrusion 12A is shown. Protrusion 12A protrudes in a direction away from the center of the package 12 in the xy-plane. In other words, protrusion 12A protrudes in a direction away from the center of the semiconductor device 1, relative to the side surface 12s of the package 12 located at a height corresponding to the height of the first plate portion 18A or the second plate portion 18B of the conductor 18. In this case, protrusion 12A protrudes in the Y-direction relative to the resin 12 located at a position lower than the side surface 12s located at a height corresponding to the height of the first plate portion 18A or the second plate portion 18B of the conductor 18, and located closer to the center of the semiconductor device 1 than the side surface 12s. Protrusion 12A is located in the region including the lower surface of the package 12. Several of the protrusions 12A are located in the region of the end portion including the Y-direction side of the package 12, and are located between adjacent first portions (external terminals) 14A. Several other protrusions 12A are located in the region of the end portion including the Y-direction side, and are located between adjacent first portions 13A. The upper surface of the protrusion 12A is aligned with the upper surfaces of the lead frames 13 and 14.

[0057] The second part 14B of the lead frame 14 has an inclined portion (or tilt) 141. The inclined portion 141 spans the end (or edge) of the second part 14B on the Z-direction side and the end (or edge) of the second part 14B on the Y-direction side. The inclined portion 141 is inclined relative to the xz plane or the xy plane and along the straight line connecting the y-axis and the z-axis. The z-axis coordinate (z-axis coordinate) of the end of the inclined portion 141 on the -Y-direction side is larger than the z-axis coordinate of the end of the inclined portion 141 on the Y-direction side. That is, the z-axis coordinate of each inclined portion 141 gradually decreases as it moves towards the Y-direction.

[0058] Figure 7 The structure of a portion of the semiconductor device of the first embodiment is shown along the xy plane. Figure 7 The lead frame 14 is shown.

[0059] like Figure 7 As shown, each inclined portion 141 is located between adjacent first portions 14A. Each inclined portion 141 occupies the region of the end portion on the Y-direction side of the second portion 14B between adjacent first portions 14A. Each inclined portion 141 occupies the region in the lead frame 14 that includes the region between adjacent first portions 14A and the boundary of the second portion 14B of the lead frame 14. Each inclined portion 141 extends along the Y-direction.

[0060] Each inclined portion 141 occupies a central region between the end (right end) of one first portion 14A located more towards the -X direction (i.e., on the left) and the end (left end) of one first portion 14A located more towards the X direction (i.e., on the right). The inclined portion 141 has a non-inclined portion 142 between itself and the right end of the left first portion 14A, and a non-inclined portion 142 between itself and the left end of the right first portion 14A. The non-inclined portions 142 and the inclined portions 141 are arranged in the X direction. The non-inclined portions 142 extend along the xy plane in the same way as the region in the lead frame 14 excluding the inclined portions 141. The non-inclined portions 142 are provided to prevent the inclined portions 141 from accidentally reaching the first portion 14A due to mold tolerances and / or forming precision during the formation of the inclined portions 141. However, it is also possible to omit one or both non-inclined portions 142, with the inclined portion 141 reaching the first portion 14A on the left and / or the first portion 14A on the right.

[0061] Figure 8 The structure of the semiconductor device according to the first embodiment is shown in cross-section. Figure 8 Show along Figure 7 The cross section of line VII-VII.

[0062] like Figure 8 As shown, the inclined portion 141 extends at least by a length D1 along the Y direction; in other words, it has a dimension D1 along the Y direction. The length D1 is equal to the interval described below, which is the interval between a virtual line (or the coordinate of the lower right side EG2 on the y-axis) extending along the z-axis from the edge (upper right side) or end EG1 of the face (upper surface) on the Z-direction side of the lead frame 14 and the edge (lower right side) or end EG2 of the face (lower surface) on the -Z-direction side of the lead frame 14 along the Y-axis. That is, the inclined portion 141 extends across the coordinates of the upper right side EG1 on the y-axis and the lower right side EG2 on the y-axis. The plate portion 14B containing the inclined portion 141 is covered by resin 12 and the protrusion 12A.

[0063] The right side of the Y-direction side of the lead frame 14 may have an inclined surface due to the limitations of the forming technology of the lead frame 14. Figure 8 An example is shown. In this case, the inclined portion 141 can also extend in the Y direction from the upper right EG1 to a position further than the position on the virtual line extending along the z-axis from the lower right EG2 (or the coordinates of the lower right EG2 on the y-axis).

[0064] The inclined portion 141 extends at least by a length D2 along the Z direction; in other words, it has a dimension D2 along the Z direction. That is, the inclined portion 141 extends in the Z direction across the upper right edge EG1 and along a virtual line extending from the lower right edge EG2 along the z-axis. In the case where the right side of the lead frame 14 has an inclined surface, the inclined portion 141 may also extend in the Z direction from the upper right edge EG1 to a position further than the position along the virtual line extending from the lower right edge EG2 along the z-axis. In one example, the length D2 is substantially the same as the length D1. In this specification and claims, the terms "substantially the same" and "substantially equal" mean that although intended to be identical, they are not exactly the same due to limitations in manufacturing and measurement techniques.

[0065] The lower right EG2 and the connecting surface (or connecting end) EG3 are spaced apart by a distance D3 along the X direction. The connecting surface EG3 is the surface on the -Y direction side of the protrusion 12A of the package 12, and is the boundary between the portion of the package 12 other than the protrusion 12A and the protrusion 12A. The connecting surface EG3 is along the xz plane.

[0066] Part 14B has a thickness (i.e., a dimension in the Z direction) TH1. The thickness TH1 is the average, maximum, or minimum thickness of Part 14B.

[0067] Distance D3 is substantially equal to length D1 or (and) length D2 by 0.5 to 2 times. In one example, distance D3 is substantially equal to a size greater than 0.05 mm and less than 0.20 mm. In one example, length D1 is substantially equal to 0.1 mm. In one example, length D2 is less than half the thickness TH1.

[0068] Figure 9 This illustrates a state during the manufacturing process of the semiconductor device according to the first embodiment. Figure 9 Showing with Figure 6 The areas shown are the same as those in the region. Figure 9 In the state shown, the intermediate structure 1A of the semiconductor device 1 during manufacturing replaces the lead frame 14 and includes a lead frame 14a. The lead frame 14a is a conductor formed into the lead frame 14 in a subsequent process. Figure 9 In the state shown, the lead frame 14a has Figure 10 The structure shown. Figure 10 This shows the state of a portion of the semiconductor device according to the first embodiment during manufacturing. Figure 10 Leader box 14a is shown along the xy plane. (See figure) Figure 10As shown, the lead frame 14a has a quadrilateral shape. The lead frame 14a has an opening 14aW. The opening 14aW has a quadrilateral shape and extends through the lead frame 14a. The opening 14aW is located in the region between the areas that form the first part 14A. The end (lower end) of the lead frame 14a on the -Y direction side is substantially aligned with the lower right side EG2. The lead frame 14a already has a sloping portion 141 at the lower end of the opening 14aW. The first part 14A has not yet been formed.

[0069] return Figure 9 .exist Figure 9 At the start of the process shown, construction 1A does not yet have package 12. Accompanying... Figure 9 The process shown begins with a mold 28 being placed on the upper surface of structure 1A. The mold has an internal space 28W, which has a shape substantially identical to the outer shape of package 12. Thus, the edge EG11 on the -Z direction side of space 28W substantially coincides with the connecting surface EG3 of the formed package 12. Consequently, the distance between edge EG11 and the virtual line extending along the z-axis from the lower right edge EG2 (or, the coordinate of the lower right edge EG2 on the y-axis) is substantially equal to the distance D3.

[0070] Next, the encapsulation (resin) 12 material (i.e., resin) is injected into the space 28W. Thus, the space 28W is filled with material. During injection, a portion of the material flows in the direction indicated by the arrow. That is, it flows from the center of structure 1A in the Y direction, towards the opening 14aW. The flow of material towards the opening 14aW follows the inclined portion 141 of the lead frame 14. The material fills the opening 14aW. After this, the lead frame 14a is formed into the lead frame 14.

[0071] According to the first embodiment, as described below, a semiconductor device that suppresses package defects is provided.

[0072] Consider the following reference semiconductor device for comparison. That is, the reference semiconductor device does not have a tilted portion 141 in the lead frame 14. Therefore, in the reference... Figure 9 In the above-described process of the instruction manual, the gap between the edge EG11 of the space 28W of the mold 28 and the lead frame 14 is relatively narrow. Consequently, the resin flow path between the edge EG11 and the lead frame 14 is narrow, making resin flow difficult. As a result, a sufficient amount of resin does not reach the opening 14aW, leaving a gap on the inner side of the opening 14aW, i.e., the Y-direction side, without being filled with resin. The semiconductor device completed with this gap has a defect in the package 12, resulting in a gap in the package 12. This adversely affects the appearance of the semiconductor device and its durability and / or reliability.

[0073] According to the first embodiment, the lead frame 14 has an inclined portion 141. Therefore, when referring to... Figure 9 In the above-described process, the distance between the edge EG11 of the space 28W of the mold 28 and the lead frame 14 is relatively wide. Therefore, the resin flow of the encapsulation material 12 is less obstructed in the area between the edge EG11 and the lead frame 14, and the resin can reach the inside of the opening 14aW, thus filling the opening 14aW. As a result, defects in the encapsulation 12 are suppressed.

[0074] The description up to this point pertains to an example where the semiconductor chip 11 has a source electrode 112 exposed on its upper surface and a drain electrode 113 exposed on its lower surface. However, the first embodiment is not limited to this example, and the gate electrode 111, source electrode 112, and drain electrode 113 can be arbitrarily configured.

[0075] Alternatively, the lead frame 14 and the conductor 18 can be integrated, and the lead frame 15 and the conductor 17 can be integrated. Figure 11 An example is shown, illustrating the internal structure of a semiconductor device of a variation of the first embodiment along the xy plane. For example... Figure 11 As shown, the modified semiconductor device 1 includes lead frames 14b and 15b.

[0076] Lead frame 15b overlaps with gate electrode 111 on the -Y direction side. In addition to the first portion 14A and the second portion 14B, lead frame 14b also includes a third portion 14C and a fourth portion 14D. The third portion 14C has a shape that runs along the xy plane of the source electrode 112 and overlaps with the source electrode 112. The fourth portion 14D is located between the second portion 14B and the third portion 14C, connecting the second portion 14B and the third portion 14C. That is, the first portion 14A, the second portion 14B, the third portion 14C, and the fourth portion 14D are continuous.

[0077] Figure 12 The structure of a semiconductor device in cross-section is shown as a modified example of the first embodiment. Figure 12 Show along Figure 11 The cross-section of line XII-XII. For example... Figure 12 As shown, the third part 14C is located further in the Z direction than the semiconductor chip 11. The third part 14C is in contact with the bonding layer 22 on its lower surface.

[0078] The fourth part 14D connects to the right end of the third part 14C at its left end. In one example, the fourth part 14D is located further Z-direction than the third part 14C. The right end of the fourth part 14D is located further -Z-direction than the left end of the fourth part 14D. That is, the fourth part 14D has a portion extending along the Z-direction between its left and right ends. The fourth part 14D connects to the left end of the second part 14B at its right end.

[0079] Figure 13 The structure of a semiconductor device in cross-section is shown as a modified example of the first embodiment. Figure 13 Show along Figure 11 The cross-section of line XIII-XIII. For example... Figure 13 As shown, the portion of lead frame 15b including its left end is located further Z-axis than the semiconductor chip 11. The lower surface of lead frame 15b at its left end is in contact with bonding layer 25. The portion of lead frame 15b including its right end and exposed from package 12 is aligned with lead frame 13. The portion of lead frame 15b including its left end and the portion of lead frame 15b including its right end are interconnected through a middle portion. The middle portion extends along the z-axis.

[0080] Figure 14 The structure of a semiconductor device in cross-section is shown as a modified example of the first embodiment. Figure 14 Show along Figure 11 The cross-section of line XIV-XIV. For example... Figure 14 As shown, the second part 14B has an inclined portion 141.

[0081] Several embodiments of the present invention have been described, but these embodiments are given by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included within the scope and spirit of the invention, as well as within the scope of the invention as described in the claims and its equivalents.

Claims

1. A semiconductor device, characterized in that, have: First lead frame; A semiconductor chip is disposed at a position further in a first direction than the first lead frame, and includes a first electrode and a second electrode electrically connected to the first lead frame; The first conductor is electrically connected to the second electrode; The second lead frame is arranged with the first lead frame at a position further in the second direction than the first lead frame, and includes a first terminal and a plate portion connected to the first terminal. The plate portion is electrically connected to the first conductor, and the plate portion has an inclination of a first surface across the first direction and a side surface across the second direction. as well as The resin covers a portion of the first lead frame, the semiconductor chip, the first conductor, the plate portion of the second lead frame, and a portion of the first terminal of the second lead frame.

2. The semiconductor device as claimed in claim 1, characterized in that, The second lead frame also includes a second terminal connected to the plate portion. The second terminal and the first terminal are arranged facing upwards. The tilt is located between the first terminal and the second terminal.

3. The semiconductor device as claimed in claim 2, characterized in that, The inclination extends along the third direction.

4. The semiconductor device as claimed in claim 1, characterized in that, The resin covers the plate portion of the semiconductor chip, the first conductor, and the second lead frame, and has a second surface on one side in the first direction. The first portion of the resin is positioned further along the second direction than the plate portion and is arranged with the plate portion, and has a third surface on one side in the first direction. The second surface is located further in the first direction than the third surface.

5. The semiconductor device as claimed in claim 4, characterized in that, The plate portion has a fourth surface in a direction opposite to the first direction. The distance between the end of the first part on the side opposite to the second direction and the end of the fourth surface on the side of the second direction along the second direction is more than 0.05 mm and less than 0.2 mm.

6. The semiconductor device as claimed in claim 4, characterized in that, The plate portion has a first dimension in the first direction. The second dimension of the inclined section along the first direction is less than half of the first dimension.

7. The semiconductor device as claimed in claim 1, characterized in that, The first conductor and the second lead frame are integrated.

8. A semiconductor device, characterized in that, have: First lead frame; A semiconductor chip is disposed at a position further in a first direction than the first lead frame, and includes a first electrode and a second electrode electrically connected to the first lead frame; Connector, electrically connected to the second electrode; The second lead frame has a first terminal, a second terminal arranged in a second direction perpendicular to the first direction, and a plate portion connected to the first terminal and the second terminal and inclined at the end of a first surface between the first terminal and the second terminal; as well as The resin covers a portion of the first lead frame, the semiconductor chip, the connector, the plate portion of the second lead frame, and a portion of the first terminal of the second lead frame.

9. The semiconductor device as claimed in claim 8, characterized in that, The first lead frame and the second lead frame are arranged in a third direction that intersects the first direction and the second direction.

10. The semiconductor device as claimed in claim 8, characterized in that, The inclination extends along the second direction.

11. The semiconductor device as claimed in claim 8, characterized in that, The resin covers the semiconductor chip, the connector, and the plate portion of the second lead frame, and has a second surface on one side in the first direction. The first portion of the resin is arranged with the plate portion at a position further away from the plate portion in the third direction, and has a third surface on one side in the first direction. The second surface is located further in the first direction than the third surface.

12. The semiconductor device as claimed in claim 11, characterized in that, The plate portion has a fourth surface in a direction opposite to the first direction. The distance between the end of the first part on the side opposite to the third direction and the end of the fourth surface on the third direction along the third direction is more than 0.05 mm and less than 0.2 mm.

13. The semiconductor device as claimed in claim 11, characterized in that, The plate portion has a first dimension in the first direction. The second dimension of the inclined section along the first direction is less than half of the first dimension.

14. The semiconductor device as claimed in claim 8, characterized in that, The first conductor and the second lead frame are integrated.

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