Semiconductor chilling plate based on insulating bracket and manufacturing method thereof
By employing a three-layer structure of insulating support and conductive layer in the semiconductor cooling chip, the traditional substrate is eliminated, achieving the effects of simplified manufacturing, reduced costs, improved efficiency, and expanded application range.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-27
- Publication Date
- 2026-03-27
AI Technical Summary
Traditional semiconductor cooling chips have complex structures, high costs, low heat conduction efficiency, and cannot be adapted to non-planar mounting, which limits their application range.
An insulating support is used as the sole support to construct a three-layer semiconductor cooling chip, including an insulating support, P-type and N-type semiconductor units, and A-side and B-side conductive layers. This eliminates the traditional independent upper and lower heat-conducting substrates, and directly transfers cold or heat through the mounting positions on the insulating support to precisely position and connect the conductive layers.
It simplifies the manufacturing process, reduces material costs, improves heat conduction efficiency, reduces the overall thickness of the device, and expands the application range on curved and non-planar surfaces through flexible materials.
Smart Images

Figure CN121739620A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor refrigeration technology, and in particular to a semiconductor refrigeration chip based on an insulating support and its manufacturing method. Background Technology
[0002] A thermoelectric cooler is a solid-state cooling device based on the Peltier effect, widely used in electronic equipment cooling, temperature control devices, medical devices, and consumer electronics. Traditional thermoelectric coolers typically employ a five-layer sandwich structure (as shown in the attached image). Figure 1 As shown in the figure, from top to bottom, the components are: A-side substrate 80 (ceramic, aluminum or copper plate), A-side conductive layer 40, P / N type semiconductor array 90, B-side conductive layer 50 and B-side substrate 100. The manufacturing process requires the semiconductor units to be welded and fixed onto the conductive strips of the A and B-side substrates, and then completed through multiple processes such as stacking, welding and packaging.
[0003] The main drawbacks of existing technologies are: firstly, they rely on rigid thermally conductive substrates on the A / B surfaces as structural carriers and mounting bases, which not only increases the cost of materials such as ceramics and metals but also makes the manufacturing process complex and time-consuming; secondly, cold or heat must pass through the substrate layer to be transferred to the end recipient (as shown in the attached image). Figure 2 As shown in the figure, the thermal resistance of the substrate itself leads to a decrease in conduction efficiency and impairs cooling / heating performance; thirdly, the multi-layer rigid structure results in a large overall thickness of the device and cannot adapt to non-planar or curved installation scenarios, thus limiting the application range.
[0004] Therefore, designing a semiconductor cooling chip structure and process that is simplified, has a shorter heat conduction path, can be adapted to curved surface mounting, and has a lower manufacturing cost has important practical value. Summary of the Invention
[0005] In view of this, the present invention addresses the deficiencies of the existing technology, and its main objective is to provide a semiconductor refrigeration chip based on an insulating support and its manufacturing method. By building an internal support structure, a semiconductor refrigeration chip with a three-layer composite structure consisting of an insulating support, a semiconductor unit, and a direct conductive layer is constructed, thereby optimizing device performance and expanding application scenarios.
[0006] To achieve the above objectives, the present invention adopts the following technical solution: A semiconductor refrigeration chip based on an insulating support, comprising: An insulating support is provided with multiple mounting positions, which are used to precisely accommodate and position P-type semiconductor units and N-type semiconductor units; Multiple P-type and N-type semiconductor units are arranged and fixed in corresponding mounting positions of the insulating bracket, wherein the shape of the mounting position is adapted to the shape of the semiconductor unit to provide limiting; The conductive layers on side A and side B are electrically connected to the end faces of the corresponding P-type and N-type semiconductor units inside through the openings of the mounting positions, so that multiple P-type and N-type semiconductor units are connected in series to form a thermoelectric cooling circuit.
[0007] As a preferred embodiment: the A-side conductive layer and the B-side conductive layer are each composed of multiple conductive sheets, with the two end faces of two adjacent P-type semiconductor units and N-type semiconductor units connected in series by the conductive sheets; and electrode leads or pads for connecting to an external power supply are provided at the edge of the conductive sheets of the A-side conductive layer or the B-side conductive layer.
[0008] As a preferred embodiment: the A-side conductive layer and the B-side conductive layer are both integral conductive soft films, and the two ends of the plurality of P-type semiconductor units and N-type semiconductor units are electrically connected to the integral conductive soft film, and electrode leads or pads for connecting to an external power supply are provided at the edge of the conductive soft film of the A-side conductive layer or the B-side conductive layer.
[0009] As a preferred embodiment: the A-side conductive layer and the B-side conductive layer are respectively rigid conductive PCB boards, and the two ends of the plurality of P-type semiconductor units and N-type semiconductor units are electrically connected to the rigid conductive PCB boards respectively, and electrode leads or pads for connecting to external power supplies are provided on the edge of the rigid conductive PCB board of the A-side conductive layer or the B-side conductive layer.
[0010] As a preferred embodiment, the conductive layer on side A and the conductive layer on side B are directly attached and connected to the outer surfaces of the two sides of the insulating bracket.
[0011] As a preferred embodiment: the mounting position is a through hole that extends through the thickness of the insulating support, and the P-type semiconductor unit and the N-type semiconductor unit are embedded in the through hole, with their two end faces in electrical contact with the A-side conductive layer and the B-side conductive layer, respectively.
[0012] As a preferred embodiment, the insulating support is made of a rigid insulating material, such as epoxy resin, engineering plastic, or ceramic sheet.
[0013] As a preferred embodiment, the insulating support is made of a flexible insulating material, such as polyimide, flexible silicone, or rubber.
[0014] As a preferred embodiment: the insulating support has multiple mounting positions arrayed and all of them are square holes, and correspondingly, the P-type semiconductor unit and the N-type semiconductor unit are both cubic.
[0015] A method for manufacturing the semiconductor refrigeration chip based on the insulating support includes the following steps: S1. Prepare an insulating bracket by using injection molding or compression molding processes to produce an integrated insulating bracket with the mounting position. S2. Semiconductor unit installation: Using a die bonder or high-precision chip mounting equipment, the P-type semiconductor unit and the N-type semiconductor unit are precisely placed and fixed one by one in the corresponding mounting positions of the insulating bracket according to the preset circuit sequence to form a semiconductor-bracket preform. S3. Coating of connecting material: In the semiconductor-support preform, solder paste or thermally conductive and electrically conductive adhesive is printed or dotted on the end faces of the semiconductor unit exposed from both ends of the mounting position. S4. Conductive layer bonding: The A-side conductive layer and B-side conductive layer with pre-processed circuit patterns are precisely aligned and laminated to both sides of the semiconductor-support preform. S5. Bonding and curing: The stacked assembly is placed in a heating device and a reflow soldering process or a hot-press curing process is performed to melt and solder the solder paste or to cure the thermally and electrically conductive adhesive, thereby forming a strong and reliable connection between the A-side conductive layer and the B-side conductive layer and all semiconductor unit end faces to obtain the cooling chip core. S6. Post-processing: Weld external wires onto the cooling chip core, and optionally perform edge sealing encapsulation and performance testing.
[0016] Compared with the prior art, the present invention has significant advantages and beneficial effects. Specifically, as can be seen from the above technical solution, First, by eliminating the traditional independent upper and lower heat-conducting substrates, the use of expensive materials such as ceramics and metals is directly reduced, and the lamination and welding processes are simplified, thereby effectively reducing material and manufacturing costs.
[0017] Secondly, since the cold or heat generated by the semiconductor unit no longer needs to be conducted through the substrate layer, it can directly act on the terminal receptor through the conductive layer in close contact with it. Therefore, the heat conduction path is significantly shortened, the intermediate thermal resistance is reduced, and the overall efficiency and response speed of cooling or heating are improved.
[0018] Third, the device has been simplified from a traditional five-layer structure to three layers, significantly reducing the overall thickness and facilitating the design of thinner and lighter electronic devices.
[0019] Fourth, by using flexible insulating materials to make the support, the entire cooling chip can have a certain bending ability, thus enabling it to conform to curved or non-planar surfaces for operation. This greatly expands its application scope and practicality in emerging fields such as wearable devices and curved display devices.
[0020] To more clearly illustrate the structural features and effects of the present invention, a detailed description is provided below in conjunction with the accompanying drawings and specific embodiments. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the layered structure of a traditional semiconductor cooling chip; Figure 2 A cross-sectional view of a traditional semiconductor cooling chip in use; Figure 3 This is a schematic diagram of the three-dimensional structure of the semiconductor cooling chip of the present invention; Figure 4 This is an exploded perspective view of the semiconductor cooling chip of the present invention (the conductive layer is a conductive soft film or a rigid conductive PCB board); Figure 5 This is a schematic diagram showing the P and N type semiconductor units of the present invention embedded in an insulating support. Figure 6 This is a schematic diagram showing the contact between the P-type and N-type semiconductor units and the conductive layer (multiple conductive sheets) of the present invention; Figure 7 for Figure 6 A schematic diagram of its horizontal cross-section; Figure 8 for Figure 6 A three-dimensional diagram of the disassembled form; Figure 9 This is a three-dimensional schematic diagram of the conductive soft film of the present invention; Figure 10 This is a three-dimensional schematic diagram of the rigid conductive PCB board of the present invention; Figure 11 This is a cross-sectional schematic diagram of the P and N type semiconductor units, conductive layer, and insulating support of the present invention. Figure 12 This is a cross-sectional view of the semiconductor cooling chip of the present invention in use; Figure 13 This is a schematic diagram of the P-type and N-type semiconductor unit series circuit of the present invention.
[0022] Explanation of reference numerals in the attached diagram: 10. Insulating support; 11. Mounting position; 20. P-type semiconductor unit; 30. N-type semiconductor unit; 40. A-side conductive layer; 50. B-side conductive layer; 60. Electrode; 70. Conductive sheet; 80. A-side substrate; 90. P / N type semiconductor array; 100. B-side substrate. Detailed Implementation
[0023] The present invention is as follows Figures 3 to 13 As shown, a semiconductor cooling chip based on an insulating support 10 and its manufacturing method are disclosed. The semiconductor cooling chip includes an insulating support 10 as a carrier, a plurality of P-type semiconductor units 20 and N-type semiconductor units 30 arranged alternately according to a specific circuit design, and an A-side conductive layer 40 and a B-side conductive layer 50 respectively directly disposed on both sides of the insulating support 10, wherein: The insulating support 10 is the main structural component of the entire device and is made of insulating material. Multiple regularly arranged mounting positions 11 are precisely machined or formed on the insulating support 10. The shape of these mounting positions 11 closely matches the shape of the semiconductor cells, primarily used to precisely accommodate, position, and fix each semiconductor cell, and to provide necessary mechanical restraint and support in the radial direction. Multiple P-type semiconductor cells 20 and N-type semiconductor cells 30 are alternately placed and fixed in these mounting positions 11 by hand or using a chip mounter (such as a die bonder) according to a pre-planned series circuit layout. After all semiconductor cells are installed, the upper and lower functional end faces (electrical contact end faces) of the P-type semiconductor cells 20 and N-type semiconductor cells 30 will be exposed from the openings of their respective mounting positions 11. It should be noted that the shape of the insulating support 10 can be designed as a racetrack ring, square, U-shaped, circular ring, L-shaped, triangular, trapezoidal, or semi-circular shape according to the actual application scenario, and the overall shape of the corresponding semiconductor cooling chip corresponds to the shape of the insulating support 10.
[0024] The A-side conductive layer 40 and B-side conductive layer 50 are directly attached to and connected to the upper and lower outer surfaces of the insulating support 10, and through the opening of the mounting position 11, establish direct electrical and thermal connections with the end faces of the corresponding P-type semiconductor unit 20 and N-type semiconductor unit 30 inside. This connection method allows current to flow sequentially through the A-side conductive layer 40, a P-type semiconductor, the B-side conductive layer 50, and the adjacent N-type semiconductor, thus forming a complete and efficient thermoelectric cooling circuit. Since the independent upper and lower substrates (such as A / B-side ceramic plates) that are necessary for support and heat conduction in traditional structures are completely eliminated, the cold or heat generated by the semiconductor can be directly transferred through the conductive layer in contact with it, greatly shortening the heat conduction path, significantly reducing intermediate thermal resistance, and improving the efficiency and response speed of cooling or heating.
[0025] For specific morphologies of the conductive layer, this invention provides several optional implementation schemes to adapt to different application requirements and production conditions. The first scheme employs multiple independent conductive strips or conductive sheets (i.e., conductive sheets 70 shown in the figure). Each conductive sheet 70 is responsible for connecting a P-type semiconductor to the corresponding end face of an adjacent N-type semiconductor. The entire circuit is connected in series by alternating arrangement and bridging of numerous conductive sheets 70 on the upper and lower sides. Electrode leads 60 or pads for connecting to an external power supply are led out from specific conductive sheets 70 at the edge of the A-side conductive layer 40 or the B-side conductive layer 50.
[0026] The second approach uses a one-piece molded conductive film, such as a flexible PCBA (Printed Circuit Board Assembly). This conductive film has pre-fabricated precision circuit patterns that perfectly correspond to the positions of all semiconductor units. During installation, the entire assembly can be bonded together in one go to complete all electrical connections. This flexible design also gives the cooling chip the characteristic of being bendable. Electrode leads or pads for connecting to an external power source are provided on the edge of the conductive film of the A-side conductive layer 40 or the B-side conductive layer 50.
[0027] The third approach uses a rigid printed circuit board as the conductive layer. Its principle is similar to that of a flexible conductive film, providing better rigidity and dimensional stability for the device. This is suitable for conventional applications requiring high structural strength and flatness. Electrode leads or pads for connecting to an external power supply are provided on the rigid conductive PCB board above the A-side conductive layer 40 or the B-side conductive layer 50.
[0028] Regarding the specific structure of the mounting position 11, in a preferred embodiment, it is a through-hole that penetrates the entire thickness of the insulating support 10. The semiconductor unit is embedded in these through-holes, with its upper and lower end faces in direct contact with the A-side conductive layer 40 and the B-side conductive layer 50, respectively, to achieve reliable electrical conduction and efficient heat transfer.
[0029] The material of the insulating bracket 10 can be selected according to the application scenario of the cooling chip. When rigid insulating materials such as epoxy resin, engineering plastics, or thin ceramic sheets are selected, the resulting cooling chip has a robust structure and stable shape, suitable for most traditional planar heat dissipation and temperature control scenarios. When flexible insulating materials such as polyimide, flexible silicone, or specific rubbers are selected, the resulting cooling chip can be bent to a certain extent, thus allowing it to fit tightly onto curved, cylindrical, or other irregular surfaces. This greatly expands its application range, meeting the urgent needs of emerging fields such as wearable devices and curved display devices for curved surface applications, and achieving the goal of broadening application scenarios.
[0030] The present invention also provides in detail a method for manufacturing the above-mentioned semiconductor refrigeration chip.
[0031] S1. Prepare the insulating bracket 10 by using mold injection molding or compression molding process to produce an integrated insulating bracket 10 with the array-type mounting positions 11. S2. Semiconductor unit installation: Using a die bonder or high-precision chip mounter, the P-type semiconductor unit 20 and N-type semiconductor unit 30 are precisely placed and fixed one by one in the corresponding mounting positions 11 of the insulating bracket 10 according to a preset circuit sequence to form a semiconductor-bracket preform; a visual positioning system can be used to ensure the positional accuracy of the semiconductor unit in the mounting position 11. S3. Coating of connecting material: In the semiconductor-support preform, solder paste or thermally conductive and electrically conductive adhesive is printed or dotted on the end faces of the semiconductor unit exposed from both ends of the mounting position 11. S4. Conductive layer bonding: The A-side conductive layer 40 and B-side conductive layer 50 (which can be in the form of conductive strips, conductive sheets 70 or flexible PCBA) with pre-processed circuit patterns are precisely aligned and laminated to both sides of the semiconductor-support preform. S5. Bonding and curing: The stacked assembly is placed in a heating device and a reflow soldering process or a hot-press curing process is performed to melt and solder the solder paste or to cure the thermally and electrically conductive adhesive, thereby forming a strong and reliable connection between the A-side conductive layer 40 and the B-side conductive layer 50 and all semiconductor unit end faces to obtain the cooling chip core. S6. Post-processing: Weld external wires onto the cooling chip core, and optionally perform edge sealing encapsulation and performance testing.
[0032] In summary, this invention creatively constructs a semiconductor cooling chip with only three layers, eliminating the need for a separate thermally conductive substrate, by employing an insulating bracket with built-in precision mounting positions as the sole support to carry the semiconductor unit and directly bonding the conductive layers on surfaces A and B to it. This solution not only simplifies device construction, saves materials, reduces manufacturing costs, and achieves significant device thinning, but more importantly, it improves thermal conductivity by eliminating the substrate and endows the device with bendability through the selection of flexible materials, thereby broadening its application scenarios. The corresponding manufacturing method has a clear process flow and flexible options, making it suitable for mass production.
[0033] The key design feature of this invention is that it fundamentally solves the limitations of traditional semiconductor cooling chips in terms of structure, performance, and application.
[0034] First, in terms of structure and economy, by completely eliminating the independent upper and lower ceramic or metal heat-conducting substrates that are essential supports in traditional designs, not only is the cost of the corresponding substrate materials directly saved, but the manufacturing process is also simplified. The multiple alignment, stacking and welding processes of soldering semiconductor units to the upper and lower substrates are reduced, thereby significantly reducing the overall manufacturing cost and improving production efficiency.
[0035] Secondly, in terms of thermal performance, this design allows the cooling or heating generated by the semiconductor unit to be directly transferred through the conductive layer in close contact with it, eliminating the additional thermal resistance introduced by traditional substrates, effectively shortening the heat flow path, and significantly improving the cooling or heating response speed and final energy efficiency. Furthermore, in terms of physical morphology, the device is simplified from a traditional five-layer structure to a three-layer structure consisting of an insulating support, a semiconductor unit, and a conductive layer, resulting in a significant reduction in overall thickness, which is beneficial for integration into modern compact electronic devices with strict space requirements.
[0036] Finally, in terms of application adaptability, by using flexible insulating materials such as polyimide and flexible silicone to make the support, the entire cooling chip can obtain controllable bending ability, so that it can closely fit various curved, cylindrical or irregular surfaces to work. This greatly expands its practical potential and market applicability in emerging and diversified scenarios such as wearable devices, heat dissipation of curved displays, and temperature control of irregular contact surfaces of medical devices.
[0037] The above description is merely a preferred embodiment of the present invention and does not constitute any limitation on the technical scope of the present invention. Therefore, any minor modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention shall still fall within the scope of the technical solution of the present invention.
Claims
1. An insulated support based semiconductor cold plate, characterized by, The application relates to a semiconductor unit array and a preparation method thereof. The application relates to a semiconductor unit array and a preparation method thereof. The A-face conductive layer and the B-face conductive layer are respectively a plurality of conductive sheets, two end faces of adjacent two P-type semiconductor units and N-type semiconductor units are correspondingly contacted and connected in series by the conductive sheets, and electrode leads or pads for connecting external power sources are arranged at edges of the conductive sheets of the A-face conductive layer or the B-face conductive layer. The A-face conductive layer and the B-face conductive layer are respectively a plurality of conductive sheets, two end faces of adjacent two P-type semiconductor units and N-type semiconductor units are correspondingly contacted and connected in series by the conductive sheets, and electrode leads or pads for connecting external power sources are arranged at edges of the conductive sheets of the A-face conductive layer or the B-face conductive layer.
2. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively a plurality of conductive sheets, two end faces of adjacent two P-type semiconductor units and N-type semiconductor units are correspondingly contacted and connected in series by the conductive sheets, and electrode leads or pads for connecting external power sources are arranged at edges of the conductive sheets of the A-face conductive layer or the B-face conductive layer.
3. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
4. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
5. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
6. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
7. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
8. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
9. The insulated support based semiconductor refrigeration sheet of claim 1, wherein: The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support.
10. A method of manufacturing the insulating support-based semiconductor refrigeration sheet according to any one of claims 1 to 9, characterized by, The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support. The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support. The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support. The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support. The A-face conductive layer and the B-face conductive layer are respectively directly attached to and connected to two side outer surfaces of the insulating support. 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