Wafer detection device

By using a signal detection mechanism and processing module to perform various anomaly detections on the wafers on the wafer support, the problem of limited detection types in existing technologies is solved, achieving efficient and accurate wafer anomaly detection, applicable to both new and old equipment.

CN121740133APending Publication Date: 2026-03-27ACM RES (SHANGHAI) INC +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-26
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing wafer inspection agencies can only detect single types of wafer anomalies and cannot detect multiple anomalies simultaneously, resulting in low inspection efficiency and limited inspection types.

Method used

The system employs a signal detection mechanism and a signal processing module. Multiple signal detectors are used to detect the wafers on the wafer support, acquire multiple detection signals, and compare and analyze them to determine whether the wafers are abnormal, including broken wafers, stacked wafers, tilted wafers, missing wafers, and warped wafers. An alarm is triggered when an abnormality is detected.

Benefits of technology

It enables timely and accurate detection of abnormal wafer orientation, avoiding interference and breakage of wafers during the wafer transfer process. It has good compatibility, is suitable for both new and old machines, and has a simple structure, low cost, and does not affect production efficiency.

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Abstract

The invention discloses a wafer detection device which comprises a signal detection mechanism and a signal processing module. The signal detection mechanism is used for detecting the wafer on the wafer bracket based on a plurality of signal detectors so as to obtain a plurality of detection signals; and the signal processing module is used for respectively judging whether each wafer on the wafer bracket is abnormal or not based on the plurality of detection signals, and if a certain wafer on the wafer bracket is judged to be abnormal, an alarm is set to be given to a clamping groove position corresponding to the abnormal wafer on the wafer bracket. The method is good in compatibility with an existing machine table, can be applied to a new machine table, and can also be applied to transformation and upgrading of an existing machine table on site; the device is simple in structure, low in use cost and small in occupied space, and the production efficiency of equipment is not affected; the detection of abnormal wafers such as wafer lamination, inclined wafers, missing wafers, warped wafers and broken wafers in the wafer conveying process of the machine table can be realized, so that the wafers are prevented from being interfered and broken in the wafer conveying process.
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Description

Technical Field

[0001] This invention relates to the field of integrated circuit manufacturing technology, and in particular to a wafer inspection device. Background Technology

[0002] During wafer manufacturing, processes such as thinning and etching accumulate internal stress, leading to wafer deformation. During repeated wafer transfers, wafer cleaning machines may experience issues like missing, stacked, misaligned, and damaged wafers due to warping and deformation. Therefore, an additional wafer inspection mechanism is needed to promptly and effectively detect and alert on non-compliant wafers.

[0003] However, existing wafer inspection institutions can often only detect single wafer anomalies such as wafer quantity or skewed insertion, and cannot detect multiple wafer anomalies at the same time. Therefore, they suffer from low inspection efficiency and limited inspection types. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a wafer inspection device to solve the problem that existing wafer inspection mechanisms can only detect a single type of wafer anomaly and cannot detect multiple wafer anomalies at the same time, resulting in low inspection efficiency and limited inspection types.

[0005] To achieve the above and other related objectives, the first aspect of this application provides a wafer inspection apparatus, including a signal detection mechanism and a signal processing module;

[0006] The signal detection mechanism is used to detect wafers on a wafer carrier based on multiple signal detectors in order to obtain multiple detection signals;

[0007] The signal processing module is used to determine whether each wafer on the wafer carrier is abnormal based on multiple detection signals. If a wafer on the wafer carrier is determined to be abnormal, an alarm is set to be triggered at the slot position corresponding to the abnormal wafer on the wafer carrier.

[0008] In one embodiment of this application, the signal detection mechanism includes a moving component, a transmission bracket, and a plurality of signal detectors fixed on the transmission bracket. The moving part of the moving component is linked to the transmission bracket. When the moving component moves the moving part, it causes the plurality of signal detectors on the transmission bracket to move axially along the wafer normally placed on the wafer support.

[0009] In one embodiment of this application, the signal detection mechanism includes a moving component, a fixed bracket, and multiple signal detectors fixed on the fixed bracket. The moving part of the moving component is linked to the wafer support. When the moving component moves the moving part, it causes the wafer on the wafer support and the multiple signal detectors to move relative to each other along the axis of the wafer normally placed on the wafer support.

[0010] In one embodiment of this application, the moving component is a servo component, and the moving part is the controlled body in the servo component.

[0011] In one embodiment of this application, all signal detectors are first-type sensors, and multiple signal detectors are arranged sequentially along the circumferential direction of the wafer normally placed on the wafer carrier. Each slot on the wafer carrier corresponds to a reference grid in the detection signal.

[0012] The signal processing module is used to determine whether a single wafer on the wafer scaffold is abnormal based on multiple detection signals, including:

[0013] If all detection signals are at the same reference grid position, then the wafer corresponding to the current reference grid position is determined to be normal.

[0014] For the same reference grid position of the detection signal, if some detection signals are second level signals and the current part of the detection signals are normal level signals at the previous reference grid position and the next reference grid position of the current reference grid, and the other detection signals are normal level signals, then the wafer corresponding to the current reference grid position is determined to be a broken wafer.

[0015] If all detection signals are second-level signals at the same reference grid position, and all detection signals are normal-level signals at the previous and next reference grid positions of the current reference grid, then the wafer corresponding to the current reference grid position is determined to be broken or the slot corresponding to the current reference grid position is determined to be abnormally missing.

[0016] For the same reference grid position of the detection signals, if all detection signals are first level signals and the signal width of all current first level signals is greater than the first preset width threshold, or if all detection signals include multiple first level signals, then the wafer corresponding to the current reference grid position is determined to be a stacked or warped wafer.

[0017] For the same reference grid position of the detection signal, if some detection signals are normal level signals and other detection signals are second level signals, and other detection signals include multiple first level signals at the previous reference grid position or the next reference grid position of the current reference grid, then the wafer corresponding to the current reference grid position is determined to be a skewed wafer.

[0018] Among them, the normal level signal is the detection signal, which is the first level signal, and the signal width of the current first level signal is less than or equal to the first preset width threshold.

[0019] In one embodiment of this application, the first type of sensor is defined as a diffuse reflection sensor.

[0020] In one embodiment of this application, the multiple signal detectors include a first sensor and a second sensor. The first sensor is a second type of sensor and is disposed within a first preset height range on the wafer support where the wafer is normally placed. The second sensor is a third type of sensor and its signal detection path is vertically downward and disposed close to the center of the wafer on the wafer support. The multiple signal detectors are arranged sequentially along the circumferential direction of the wafer on the wafer support where the wafer is normally placed. Each slot on the wafer support corresponds to a reference grid in the detection signal.

[0021] The signal processing module is used to determine whether a single wafer on the wafer scaffold is abnormal based on multiple detection signals, including:

[0022] For the same reference grid position of the detection signal, if the third detection signal is a second level signal, and the third detection signal is a normal level signal at the previous reference grid position and the next reference grid position of the current reference grid, and the fourth detection signal is a normal level signal, then the wafer corresponding to the current reference grid position is determined to be a broken wafer.

[0023] Wherein, the normal level signal is the detection signal, which is the first level signal, and the signal width of the first level signal is less than a first preset width threshold; the third detection signal is acquired by the first sensor, and the fourth detection signal is acquired by the second sensor. In one embodiment of this application, the signal processing module for determining whether a single wafer on the wafer carrier is abnormal based on multiple detection signals further includes:

[0024] If both the third and fourth detection signals are normal level signals at the same reference grid position, then the wafer corresponding to the current reference grid position is determined to be normal.

[0025] For the same reference grid position of the detection signal, if the third detection signal and the fourth detection signal are both second level signals, and the third detection signal and the fourth detection signal are both normal level signals at the previous reference grid position and the next reference grid position of the current reference grid, then the wafer corresponding to the current reference grid position is determined to be a broken wafer or the slot corresponding to the current reference grid position is determined to be abnormally missing wafer.

[0026] For the same reference grid position of the detection signal, if the fourth detection signal is a first level signal and the signal width of the current first level signal is greater than the second preset width threshold, then the wafer corresponding to the current reference grid position is determined to be a stacked wafer.

[0027] For the same reference grid position of the detection signal, if the third detection signal and the fourth detection signal are both first level signals, and the signal width of all the current first level signals is less than the second preset width threshold and greater than the first preset width threshold, then the wafer corresponding to the current reference grid position is determined to be a warped wafer.

[0028] For the same reference grid position of the detection signal, if the third detection signal is a first level signal and the signal width of the current first level signal is greater than the first preset width threshold, and the fourth detection signal is a normal level signal, then the wafer corresponding to the current reference grid position is determined to be a skewed wafer.

[0029] In one embodiment of this application, the plurality of signal detectors further includes a third sensor, which is a through-beam sensor, and the third sensor is disposed within a second preset height range on the wafer holder where the wafer is normally placed.

[0030] The signal processing module, which determines whether a single wafer on a wafer scaffold is abnormal based on multiple detection signals, also includes:

[0031] If both the fifth and fourth detection signals are normal level signals at the same reference grid position, then the wafer corresponding to the current reference grid position is determined to be normal.

[0032] For the same reference grid position of the detection signal, if the fifth detection signal and the fourth detection signal are both second level signals, and the fifth detection signal and the fourth detection signal are both normal level signals at the reference grid position before and after the current reference grid position, then the wafer corresponding to the current reference grid position is determined to be broken or the slot corresponding to the current reference grid position is determined to be abnormally missing.

[0033] For the same reference grid position of the detection signal, if the fourth detection signal is a first level signal and the signal width of the current first level signal is greater than the second preset width threshold, then the wafer corresponding to the current reference grid position is determined to be a stacked wafer.

[0034] For the same reference grid position of the detection signal, if the fifth detection signal and the fourth detection signal are both first level signals, and the signal width of all the current first level signals is less than the second preset width threshold and greater than the first preset width threshold, then the wafer corresponding to the current reference grid position is determined to be a warped wafer.

[0035] For the same reference grid position of the detection signal, if the fifth detection signal is a first level signal and the signal width of the current first level signal is greater than the first preset width threshold, and the fourth detection signal is a normal level signal, then the wafer corresponding to the current reference grid position is determined to be a skewed wafer.

[0036] The fifth detection signal is acquired by the third sensor.

[0037] In one embodiment of this application, the second type of sensor is defined as a through-beam sensor or a retroreflective sensor, and the third type of sensor is a distance sensor or a retroreflective sensor.

[0038] In one embodiment of this application, the signal processing module stores wafer placement information of the wafer placement status in each slot on the wafer support, and each slot on the wafer support corresponds to a reference grid in the detection signal.

[0039] Before the signal processing module determines whether each wafer on the wafer carrier is abnormal based on multiple detection signals, it also compares and analyzes the wafer placement information with all detection signals at each reference grid position to identify the wafers at the reference grid positions where the wafer placement information does not correspond to all detection signals as abnormal wafers.

[0040] In one embodiment of this application, each slot on the wafer support corresponds to a reference grid in the detection signal. The reference grid includes a search area and two defective areas, with the two defective areas located on both sides of the search area.

[0041] Before the signal processing module determines whether each wafer on the wafer carrier is abnormal based on multiple detection signals, it also determines whether each first level signal in each detection signal is located in the search area of ​​the reference grid. If all first level signals at the same reference grid position are located in the search area of ​​the reference grid, the wafer at the corresponding reference grid position is determined to be placed normally; otherwise, the wafer at the current reference grid position is determined to be abnormal.

[0042] Compared with the prior art, one or more embodiments of the above solutions may have the following advantages or beneficial effects:

[0043] The wafer inspection device provided in this invention uses a signal detection mechanism that employs multiple signal detectors to detect wafers on a wafer carrier, acquiring multiple detection signals. By comparing and analyzing these multiple signals, abnormal wafer orientations, including wafer stacking, tilting, missing wafers, warping, and breakage, can be detected promptly and accurately, thereby minimizing interference and breakage during wafer transfer. Furthermore, the type and position of the signal detectors can be adjusted based on actual conditions. For example, multiple diffuse reflection sensors can be arranged along the wafer circumference, and the signal detectors can be moved relative to the wafer under test to acquire multiple detection signals. The abnormality of each wafer can then be determined by comparing these multiple signals. Alternatively, through-beam and retroreflection sensors can be arranged along the wafer circumference, and the signal detectors can be moved relative to the wafer under test to acquire multiple detection signals. The abnormality of each wafer can then be determined by comparing these multiple detection signals.

[0044] The device of this invention has good compatibility with existing machines, and can be applied to both new machines and the upgrading of existing machines on site. The device of this invention has a simple structure, low operating cost, small space occupation, and does not affect the production efficiency of the equipment. It can detect abnormal wafers such as wafer stacking, skewed wafers, missing wafers, warped wafers, and broken wafers during the wafer transfer process, thereby protecting the wafers from interference and breakage during the wafer transfer process.

[0045] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the description, claims, and drawings. Attached Figure Description

[0046] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0047] Figure 1a The diagram shown is a three-dimensional structural schematic of the wafer inspection device described in the embodiments of this application.

[0048] Figure 1b The diagram shown is a planar structural schematic of the wafer inspection device described in an embodiment of this application.

[0049] Figure 2a The diagram shows a three-dimensional structure of the signal detector and the wafer in the first signal detector deployment method of the wafer inspection device described in this application embodiment.

[0050] Figure 2b The diagram shows a planar structure of the signal detector and the wafer in the first signal detector deployment method of the wafer inspection device described in this application embodiment.

[0051] Figure 3a This is a three-dimensional structural diagram of the signal detector and the wafer in the second signal detector deployment mode of the wafer inspection device described in this application embodiment.

[0052] Figure 3b The diagram shows a planar structure of the signal detector and the wafer under the second signal detector deployment method in the wafer inspection device described in this application embodiment.

[0053] Figure 4 The diagram shows the detection signal when the wafer inspection device described in this application detects a normal wafer.

[0054] Figure 5 The diagram shows the detection signal when the wafer inspection device described in this application detects a broken wafer.

[0055] Figure 6 The diagram shows the detection signal when the wafer inspection device described in this application detects an abnormal missing wafer.

[0056] Figure 7 This diagram illustrates the detection signal when a stacked or warped wafer is detected under the first signal detector deployment method of the wafer inspection device described in this application embodiment.

[0057] Figure 8 This diagram illustrates the detection signal when a slanted wafer is detected under the first signal detector deployment method of the wafer inspection device described in this application embodiment.

[0058] Figure 9 This diagram illustrates the detection signal when stacked wafers are detected under the second signal detector deployment method of the wafer inspection device described in this application embodiment.

[0059] Figure 10 This diagram illustrates the detection signal when a warped wafer is detected under the second signal detector deployment method of the wafer inspection device described in this application embodiment.

[0060] Figure 11 This diagram illustrates the detection signal when a slanted wafer is detected under the second signal detector deployment method of the wafer inspection device described in this application embodiment.

[0061] Figure 12 The diagram shown is a schematic of normal wafer placement on a wafer support in the wafer inspection device described in this application embodiment.

[0062] Figure 13a and Figure 13b This is a schematic diagram of a wafer support appearing in the wafer inspection device described in this application embodiment.

[0063] Figure 14 This diagram illustrates a scenario where an abnormal missing wafer occurs on the wafer support in the wafer inspection device described in this application embodiment.

[0064] Figure 15a This diagram illustrates a wafer inspection device according to an embodiment of this application when wafers are stacked on a wafer support.

[0065] Figure 15b The image shown is a top view of two stacked wafers on a wafer support in the wafer inspection apparatus described in this application embodiment.

[0066] Figure 16 This diagram illustrates a warped wafer on a wafer support in the wafer inspection apparatus described in this application embodiment.

[0067] Figure 17This diagram shows a wafer inspection device according to an embodiment of this application when a slanted insert appears on the wafer support.

[0068] Figure 18 The diagram shown is a schematic representation of the reference grid in the wafer inspection device described in this application embodiment.

[0069] Component designation explanation:

[0070] 100 wafers

[0071] 110 mobile components

[0072] 111 Mobile Department

[0073] 120 transmission bracket

[0074] 130 wafer support

[0075] 140 signal detector

[0076] 01 / 02 Diffuse Reflection Sensor

[0077] 03 First Sensor

[0078] 04 Second Sensor

[0079] 05 Third Sensor

[0080] 312 card slot

[0081] 700 benchmark

[0082] 710 Search Area

[0083] 720 bad zone

[0084] S1 First Detection Signal

[0085] S2 Second Detection Signal

[0086] S3 Third Detection Signal

[0087] S4 Fourth Detection Signal Detailed Implementation

[0088] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and examples, so that the process of how the present invention uses technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly. It should be noted that, as long as there is no conflict, the various embodiments and features in the various embodiments of the present invention can be combined with each other, and the resulting technical solutions are all within the protection scope of the present invention.

[0089] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the drawings only show components related to this application and are not drawn according to the actual number, shape, and size of the components in the actual implementation. In the actual implementation, the form, quantity, and proportion of each component can be arbitrarily changed.

[0090] The following embodiments of this application provide a wafer inspection device to solve the problem that existing wafer inspection institutions can only detect a single type of wafer anomaly and cannot detect multiple wafer anomalies at the same time, resulting in low inspection efficiency and limited inspection types.

[0091] The principle and implementation method of a wafer inspection device according to this embodiment will be described in detail below with reference to the accompanying drawings, so that those skilled in the art can understand the wafer inspection device of this embodiment without creative effort.

[0092] refer to Figure 1a and Figure 1b As shown, this embodiment provides a wafer inspection device, including a signal detection mechanism and a signal processing module.

[0093] The signal detection mechanism primarily uses multiple signal detectors 140 to detect the wafers 100 on the wafer carrier 130. Each signal detector 140 can acquire one detection signal, thus acquiring multiple detection signals. The signal processing module is used to compare and analyze the detected multiple detection signals to determine whether each wafer 100 on the wafer carrier 130 is an abnormal wafer. If an abnormality is determined for a wafer on the wafer carrier 130, an alarm is set to be triggered at the corresponding slot 312 position on the wafer carrier 130. Wafer abnormalities include broken wafers, missing wafers, stacked wafers, warped wafers, and obliquely inserted wafers.

[0094] The wafer inspection device of this invention includes a signal detection mechanism that uses multiple signal detectors 140 to detect the wafer 100 on the wafer carrier 130, acquiring multiple detection signals. By comparing and analyzing these multiple detection signals, abnormal wafer orientations, including wafer stacking, tilting, missing wafers, warping, and breakage, can be detected in a timely and accurate manner, thereby minimizing interference and breakage of the wafer 100 during wafer transfer. The type and position of the signal detectors 140 can be adjusted based on actual conditions.

[0095] refer to Figure 1a and Figure 1bAs shown, in one embodiment, the signal detection mechanism includes a moving component 110, a transmission bracket 120, and multiple signal detectors 140, wherein all signal detectors 140 are fixedly mounted on the transmission bracket 120. This embodiment also provides that the moving part 111 of the moving component 110 is linked to the transmission bracket 120. Specifically, the linkage can be achieved by directly fixing the transmission bracket 120 to the moving part 111 of the moving component 110, or by using other linkage components. No fixed limitation is imposed here. When the moving part 111 of the moving component 110 is linked to the transmission bracket 120, the moving component 110 can drive the multiple signal detectors 140 on the transmission bracket 120 to move via the moving part 111. Meanwhile, in order to enable the signal detector 140 to detect the wafer 100 on the wafer carrier 130, the moving component 110 and the moving part 111 are designed to allow multiple signal detectors 140 to move axially along the wafer 100 normally placed on the wafer carrier 130. The wafer 100 normally placed on the wafer carrier 130 is the wafer 100 that is correctly and vertically placed in the slot 312 of the wafer carrier 130, and generally the axis of the wafer 100 normally placed on the wafer carrier 130 is parallel to the horizontal plane.

[0096] In one embodiment, the signal detection mechanism may further include a moving component 110, a fixed bracket, and multiple signal detectors 140, wherein the multiple signal detectors 140 are fixedly mounted on the fixed bracket, which is fixed to the machine structure or the ground. This embodiment also includes a moving part 111 of the moving component 110 linked with a wafer support 130 (not shown in the figure). Specifically, the linkage can be achieved by directly fixing the wafer support 130 to the moving part 111 of the moving component 110, or by using other linkage components. No fixed limitation is imposed here. When the moving part 111 of the moving component 110 is linked with the wafer support 130, the moving component 110 can drive the wafer support 130 and the multiple signal detectors 140 fixed on the fixed bracket to move relative to each other via the moving part 111. Meanwhile, in order to enable the signal detector 140 to detect the wafer 100 on the wafer holder 130, the moving component 110 and the moving part 111 are designed to achieve relative movement between the wafer 100 on the wafer holder 130 and the multiple signal detectors 140 along the axis of the normally placed wafer 100 on the wafer holder 130. The definition of the normally placed wafer on the wafer holder 130 is the same as above, and will not be repeated here.

[0097] In one embodiment, the aforementioned moving component 110 may be configured as a servo component, and the moving part 111 in the moving component 110 is the controlled body in the servo component. The servo component is an existing device, and its specific structure will not be described in detail in this embodiment.

[0098] In one embodiment, all signal detectors 140 can be configured as a first type of sensor, meaning that multiple signal detectors are set to the same type of sensor. For example, the first type of sensor can be configured as a diffuse reflection sensor or other type of sensor that can achieve the detection function of this embodiment; no fixed limitation is imposed here. (See reference...) Figure 2a and Figure 2b As shown, multiple signal detectors 140 can be directly configured to be arranged sequentially along the circumference of the wafer 100 normally placed on the wafer support 130. Preferably, multiple signal detectors 140 can be symmetrically arranged along the vertical direction passing through the center of the wafer 100 to improve the detection accuracy of the wafer inspection device. When there are two signal detectors 140, the angles formed by the two signal detectors 140 to the center of the wafer 100 should be greater than or equal to 90 degrees to avoid the two signal detectors being too close together and affecting the detection accuracy of the wafer inspection device. When the first type of sensor is a diffuse reflection sensor, the wafer 100 normally placed on the wafer support 130 should also be located within the illumination working range of the diffuse reflection sensor (e.g., ...). Figure 2b The trapezoidal portion is used to ensure the diffuse reflection sensor functions properly. When the first type of sensor is another type, the position of the first type of sensor and the position of the wafer 100 on the wafer support 130 should be adjusted accordingly, and it is not fixed here. For ease of explanation, the following description uses a diffuse reflection sensor as an example. When multiple signal detectors 140 move relative to the wafer 100 on the wafer support 130 along the axis where the wafer 100 is normally placed on the wafer support 130, the multiple signal detectors 140 can sequentially detect the wafers 100 on the wafer support 130, and each signal detector 140 can acquire a detection signal for all wafers 100 on the wafer support 130.

[0099] Since multiple slots 312 are arranged sequentially on the wafer support 130, and the signal detector 140 is normally open during the detection of the wafer 100 on the wafer support 130, the detection signal detected by the signal detector 140 can be divided into multiple reference grids 700 according to the distribution of the slots 312 based on the width of the slots 312. Each reference grid 700 corresponds to a slot 312 on the wafer support 130, and there is a one-to-one correspondence between the slots 312 on the wafer support 130 and the reference grids 700 in the detection signal. For example... Figures 4-11Within the range of 0-5mm, the reference grid 700-c01 corresponds to the first slot 312 along the direction in which the wafer 100 is placed on the upper edge of the wafer support 130; within the range of 5-10mm, the reference grid 700-c02 corresponds to the second slot 312 along the direction in which the wafer 100 is placed on the upper edge of the wafer support 130; and so on. The width of the reference grid 700 can be other reasonable values ​​based on the actual situation, and is not fixed here.

[0100] Under this type and position setting of the signal detector 140, the signal processing module determines whether a single wafer 100 on the wafer carrier 130 is abnormal based on multiple detection signals, specifically including the following situations. For ease of description, the level signal when the diffuse reflection sensor detects a normally placed wafer 100 on the wafer carrier 130 is set as the first level signal, and the width of the first level signal is 1mm. The level signal when the diffuse reflection sensor does not detect a wafer 100 on the wafer carrier 130 is set as the second level signal. The first level signal and the second level signal are different; the following explanation uses the example where the first level signal is high and the second level signal is low. Since the wafer 100 may be slightly tilted when placed on the wafer carrier 130, the width of the first level signal of a normal wafer 100 detected by the diffuse reflection sensor may be slightly greater than or slightly less than 1mm. Based on this, this embodiment sets the normal level signal as the detection signal and the first level signal as the signal where the signal width of the first level signal is less than or equal to a first preset width threshold. The first preset width threshold can be set to a value slightly greater than 1mm based on actual conditions, and its value is not fixed here.

[0101] For locations with the same detection signal at reference grid 700, if all detection signals are at normal level, then the wafer 100 corresponding to the current reference grid 700 position is determined to be normal. (Reference) Figure 4 As shown, taking multiple signal detectors 140 as diffuse reflection sensors 01 and 02 as examples, for the reference grid 700-c02 position where the detection signals are the same, since the first detection signal S1 acquired by diffuse reflection sensor 01 is a normal signal at the reference grid 700-c02 position, and the second detection signal S2 acquired by diffuse reflection sensor 02 is also a normal signal at the reference grid 700-c02 position, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c02 position on the wafer carrier 130 is normal. A schematic diagram of a normal wafer 100 on the wafer carrier 130 is shown below. Figure 12 As shown.

[0102] For locations with the same detection signal at reference grid 700, if some detection signals are at the second level and these signals are at normal level at the previous and next reference grid 700 positions, while other detection signals are at normal level, then the wafer 100 corresponding to the current reference grid 700 position is determined to be a broken wafer. (Reference) Figure 5 As shown, taking multiple signal detectors 140 as diffuse reflection sensors 01 and 02 as an example, for the reference grid 700-c05 where the detection signals are the same, since the first detection signal S1 acquired by diffuse reflection sensor 01 is a second-level signal at the reference grid 700-c05, and the reference grids 700-c04 and 700-c06 are both normal-level signals; and the second detection signal S2 acquired by diffuse reflection sensor 02 is a normal signal at the reference grid 700-c05, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c05 on the wafer support 130 is a broken wafer. In this example, the diagram showing the broken wafer on the wafer support 130 is as follows. Figure 13a As shown.

[0103] For locations with the same detection signal at reference grid 700, if all detection signals are at the second level, and all detection signals are at the normal level at both the previous and next reference grid 700 positions, then the wafer 100 corresponding to the current reference grid 700 position is determined to be broken, or the slot 312 corresponding to the current reference grid 700 position is determined to be abnormally missing. (Reference) Figure 6 As shown, taking multiple signal detectors 140 as diffuse reflection sensors 01 and 02 as an example, for the reference grid 700-c05 where the detection signals are the same, since the first detection signal S1 acquired by diffuse reflection sensor 01 at the reference grid 700-c05 and the second detection signal S2 acquired by diffuse reflection sensor 02 at the reference grid 700-c05 are both second-level signals, and the first detection signal S1 and the second detection signal S2 at the reference grid 700-c04 and reference grid 700-c06 are both normal-level signals; therefore, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c05 on the wafer support 130 is broken or abnormally missing. In this example, a schematic diagram of a broken wafer appearing on the wafer support 130 is shown below. Figure 13b As shown in the diagram, an abnormal missing wafer appears on the wafer support 130. Figure 14 As shown.

[0104] For the same reference grid position 700, if all detected signals are first-level signals and the signal width of all current first-level signals is greater than a first preset width threshold, or if all detected signals include multiple first-level signals, then the wafer 100 corresponding to the current reference grid position 700 is determined to be a stacked or warped wafer. (Reference) Figure 7 As shown, taking multiple signal detectors 140 as diffuse reflection sensors 01 and 02 as examples, for the same reference grid 700-c05 position, since the first detection signal S1 acquired by diffuse reflection sensor 01 at the reference grid 700-c05 position and the second detection signal S2 acquired by diffuse reflection sensor 02 at the reference grid 700-c05 position are both first level signals, but the signal widths of the first level signals S1 and S2 at the reference grid 700-c05 position are both greater than the first preset width threshold; therefore, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c05 position on the wafer carrier 130 is a stacked or warped wafer. A schematic diagram of stacked wafers on the wafer carrier 130 is shown below. Figure 15a As shown in the diagram, a warped wafer appears on the wafer support 130. Figure 16 As shown.

[0105] For locations with the same detection signal at reference grid 700, if some detection signals are normal level signals, while others are second level signals, and these other detection signals include multiple first level signals at the previous or next reference grid 700 position, then the wafer 100 corresponding to the current reference grid 700 position is determined to be a skewed wafer. (Reference) Figure 8 As shown, taking multiple signal detectors 140 as diffuse reflection sensors 01 and 02 as examples, for the reference grid 700-c05 where the detection signals are the same, since the first detection signal S1 acquired by diffuse reflection sensor 01 is a normal level signal at the reference grid 700-c05, and the second detection signal S2 acquired by diffuse reflection sensor 02 is a second level signal at the reference grid 700-c05, and the second detection signal S2 at the reference grid 700-c04 includes two first level signals, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c05 on the wafer support 130 is an angled insert, which is angled into the reference grid 700-c04. A schematic diagram of the angled insert on the wafer support 130 is shown below. Figure 17 As shown.

[0106] Multiple signal detectors 140 are configured as diffuse reflection sensors. These detectors 140 can also be divided into multiple groups, with each group of sensors arranged sequentially along the axial direction of the normally placed wafers 100 on the wafer support 130, and also sequentially along the circumferential direction of the normally placed wafers 100 on the wafer support 130. The wafers 100 placed on the wafer support 130 are within the illumination range of the diffuse reflection sensors. In this case, the transmission support 120 or fixed support can be designed to include multiple support branches. Each group of signal detectors is positioned on different branches of the transmission support 120 or fixed support to achieve sequential arrangement along the axial direction of the normally placed wafers 100 on the wafer support 130. Each group of signal detectors detects a portion of the wafers 100 on the wafer support 130 and determines wafer anomalies based on the detection signals obtained by each group. The specific wafer anomaly determination process is the same as described above and will not be elaborated further here. This configuration can shorten the path length of the moving part 111 of the moving component 110, and improve the signal detection accuracy by using multiple sets of signal detectors.

[0107] In one embodiment, the plurality of signal detectors 140 may further be configured to include a first sensor 03 and a second sensor 04, wherein the first sensor 03 is designated as a second type of sensor, and the second sensor 04 as a third type of sensor, that is, the plurality of signal detectors 140 include multiple sensor types. For example, the second type of sensor 03 may be designated as a through-beam sensor or a retroreflective sensor, and the third type of sensor 04 may be designated as a distance sensor or a retroreflective sensor. The second type of sensor and the third type of sensor may also be designated as other types of sensors capable of realizing the detection function of this embodiment, and no fixed limitation is imposed here. Reference Figure 3a and Figure 3bAs shown, the first sensor 03 is disposed within a first preset height range on the wafer support 130 where the wafer 100 is normally placed. The first preset height range can be set to be greater than 2 / 3 of the height of the wafer 100 normally placed on the wafer support 130. More preferably, the first preset height range can be set to be within the range of 3 / 4 to 4 / 5 of the height of the wafer 100 normally placed on the wafer support 130. The signal detection path of the second sensor 04 is vertically downward and positioned close to the center of the normally placed wafer 100 on the wafer support 130. Typically, a slot is located on the central axis of the wafer support 130. Since the second sensor 04 is configured as a third-type sensor, a signal reflection element is likely required on its signal detection path to reflect the detected signal (e.g., a reflector is needed on the signal detection path of a retroreflective sensor). Therefore, directly positioning the signal detection path of the second sensor 04 vertically downward at the center of the normally placed wafer 100 on the wafer support 130 may affect its detection function. Conversely, positioning the signal detection path of the second sensor 04 vertically downward and close to the edge of the normally placed wafer 100 on the wafer support 130 will improve its detection performance. Figure 15b When wafers 100 are stacked as shown, a continuous long signal cannot be generated, resulting in two relatively close short signals. If further influenced by other factors, these signals may be misinterpreted as two normal signals, which is detrimental to the determination of the stacking situation in this embodiment. For ease of explanation, the following description uses a through-beam sensor (type 2) and a retroreflective sensor (type 3) as examples. In this case, a reflector is positioned near the central axis of the wafer support 130, located on the signal detection path of the retroreflective sensor. Multiple signal detectors 140 are sequentially arranged along the circumference of the wafers 100 normally placed on the wafer support 130. When multiple signal detectors 140 move relative to the wafers 100 on the wafer support 130 along the axis of the wafers 100 normally placed on the wafer support 130, the first sensor 03 and the second sensor 04 can sequentially detect the wafers 100 on the wafer support 130. The first sensor 03 can acquire a third detection signal S3 for all wafers 100 on the wafer support 130, and the second sensor 04 can acquire a fourth detection signal S4 for all wafers 100 on the wafer support 130.

[0108] Since multiple slots 312 are arranged sequentially on the wafer support 130, and the signal detector 140 is normally open during the detection of the wafer 100 on the wafer support 130, the detection signal detected by the signal detector 140 can be divided into multiple reference grids 700 according to the distribution of the slots 312 based on the width of the slots 312. Each reference grid 700 corresponds to a slot 312 on the wafer support 130, and there is a one-to-one correspondence between the slots 312 on the wafer support 130 and the reference grids 700 in the detection signal. For example... Figures 4-11Within the range of 0-5mm, the reference grid 700-c01 corresponds to the first slot 312 along the direction in which the wafer 100 is placed on the upper edge of the wafer support 130; within the range of 5-10mm, the reference grid 700-c02 corresponds to the second slot 312 along the direction in which the wafer 100 is placed on the upper edge of the wafer support 130; and so on. The width of the reference grid 700 can be other reasonable values ​​based on the actual situation, and is not fixed here.

[0109] Under this type and position setting of the signal detector 140, the signal processing module determines whether a single wafer 100 on the wafer carrier 130 is abnormal based on multiple detection signals, specifically including the following situations. For ease of description, the level signal when the through-beam sensor and retroreflection sensor detect a normally placed wafer 100 on the wafer carrier 130 is set as the first level signal, and the width of the first level signal is 1mm. The level signal when the through-beam sensor and retroreflection sensor do not detect a wafer 100 on the wafer carrier 130 is set as the second level signal. The first level signal and the second level signal are different; the following explanation uses the example where the first level signal is high and the second level signal is low. Since the wafer 100 may be slightly tilted when placed on the wafer carrier 130, the width of the first level signal of a normal wafer 100 detected by the diffuse reflection sensor may be slightly greater than or slightly less than 1mm. Based on this, this embodiment sets the normal level signal as the detection signal as the first level signal, and the signal width of the first level signal is always less than or equal to a first preset width threshold. The first preset width threshold can be set to a value slightly greater than 1mm based on the actual situation; its value is not fixed here.

[0110] For positions with the same detection signal at reference grid 700, if both the third detection signal S3 and the fourth detection signal S4 are at normal level, then the wafer 100 corresponding to the current reference grid 700 position is determined to be normal. (Reference) Figure 4 As shown, for the reference grid 700-c02 position with the same detection signal, since the third detection signal S3 acquired by the first sensor 03 is a normal signal at the reference grid 700-c02 position, and the fourth detection signal S4 acquired by the second sensor 04 is a normal signal at the reference grid 700-c02 position, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c02 position on the wafer support 130 is normal. A schematic diagram of the normal wafer 100 on the wafer support 130 is shown below. Figure 12 As shown.

[0111] For the same reference grid position 700, if the third detection signal S3 is a second-level signal and the third detection signal S3 is a normal-level signal at both the previous and subsequent reference grid positions 700, and the fourth detection signal S4 is a normal-level signal, then the wafer 100 corresponding to the current reference grid position 700 is determined to be a broken wafer. (Reference) Figure 5 As shown, for the reference grid 700-c05 position with the same detection signal, since the third detection signal S3 acquired by the first sensor 03 is a second-level signal at the reference grid 700-c05 position, and the reference grids 700-c04 and 700-c06 positions are both normal-level signals; and the fourth detection signal S4 acquired by the second sensor 04 is a normal signal at the reference grid 700-c05 position, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c05 position on the wafer support 130 is a broken wafer. A schematic diagram of a broken wafer appearing on the wafer support 130 is shown below. Figure 13a As shown.

[0112] For locations with the same detection signal at reference grid 700, if both the third detection signal S3 and the fourth detection signal S4 are second-level signals, and both are normal-level signals at the positions preceding and following the current reference grid 700, then the wafer 100 corresponding to the current reference grid 700 is determined to be broken, or the slot 312 corresponding to the current reference grid 700 is determined to be abnormally missing. (Reference) Figure 6 As shown, for the reference grid 700-c05 position with the same detection signal, since the third detection signal S3 acquired by the first sensor 03 at the reference grid 700-c05 position and the fourth detection signal S4 acquired by the second sensor 04 at the reference grid 700-c05 position are both second-level signals, and the third detection signal S3 and the fourth detection signal S4 at the reference grid 700-c04 and reference grid 700-c06 positions are both normal-level signals; therefore, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid 700-c05 position on the wafer support 130 is broken or abnormally missing. A schematic diagram of a broken wafer on the wafer support 130 is shown below. Figure 13b As shown in the diagram, an abnormal missing wafer appears on the wafer support 130. Figure 14 As shown.

[0113] For the same reference grid position 700, if the fourth detection signal S4 is a first-level signal and the signal width of the current first-level signal is greater than a second preset width threshold, then the wafer 100 corresponding to the current reference grid position 700 is determined to be a stacked wafer. The second preset width threshold needs to be set to be greater than twice the thickness of the wafer 100. In this case, the level of the third detection information S3 does not need to be considered. (Reference) Figure 9 As shown, for the same reference grid position 700-c05, since the fourth detection signal S4 acquired by the second sensor 04 is a first-level signal at the reference grid position 700-c05, and the signal width of the first-level signal S4 at the reference grid position 700-c05 is greater than 2mm, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid position 700-c05 on the wafer support 130 is a stacked wafer. A schematic diagram of the stacked wafers on the wafer support 130 is shown below. Figure 15a As shown.

[0114] For the same reference grid position 700, if both the third detection signal S3 and the fourth detection signal S4 are first-level signals, and the signal width of all current first-level signals is less than the second preset width threshold and greater than the first preset width threshold, then the wafer 100 corresponding to the current reference grid position 700 is determined to be a warped wafer. (Reference) Figure 10 As shown, for the same reference grid position 700-c05, since the third detection signal S3 acquired by the first sensor 03 and the fourth detection signal S4 acquired by the second sensor 04 are both first-level signals at the reference grid position 700-c05, and the signal widths of the first-level signals S3 and S4 at the reference grid position 700-c05 are both less than 2mm but greater than 1mm (assuming the first preset width threshold is set to 1mm), it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid position 700-c05 on the wafer support 130 is a warped wafer. A schematic diagram of a warped wafer appearing on the wafer support 130 is shown below. Figure 16 As shown.

[0115] For the same reference grid position 700, if the third detection signal S3 is a first-level signal and the signal width of the current first-level signal is greater than a first preset width threshold, and the fourth detection signal S4 is a normal-level signal, then the wafer 100 corresponding to the current reference grid position 700 is determined to be a slanted wafer. (Reference) Figure 11As shown, for the same reference grid position 700-c05, since the third detection signal S3 acquired by the first sensor 03 is a first-level signal at the reference grid position 700-c05, and the signal width of the first-level signal S3 at the reference grid position 700-c05 is greater than 1mm (assuming the first preset width threshold is set to 1mm); and the fourth detection signal S4 acquired by the second sensor 04 is a normal-level signal at the reference grid position 700-c05, it can be determined that the wafer 100 in the slot 312 corresponding to the reference grid position 700-c05 on the wafer support 130 is an angled insert. A schematic diagram of the angled insert on the wafer support 130 is shown below. Figure 17 As shown.

[0116] In this embodiment, the multiple signal detectors 140 may also include a third sensor 05, which is also a second type of sensor. The third sensor 05 is disposed within a second preset height range on the wafer support 130 where the wafer 100 is normally placed. The second preset height range can be set to be less than 1 / 3 of the height of the wafer 100 normally placed on the wafer support 130. More preferably, the second preset height range can be set to be between 1 / 5 and 1 / 4 of the height of the wafer 100 normally placed on the wafer support 130. It should be noted that the second preset height range should avoid the contact position between the wafer 100 and the slot 312 on the wafer support 130. For ease of explanation, the third sensor 05 is described below as a through-beam sensor. Since the wafer 100 is not completely vertically fixed when placed on the wafer support 130, meaning it is tilted relative to the vertical plane, the signal width of the first level signal detected by the first sensor 03, which is located within the first preset height range of the wafer 100 normally placed on the wafer support 130, may differ from the actual width of the wafer 100. This could affect the judgment result during the wafer anomaly detection process. Because the second preset height range of the wafer 100 normally placed on the wafer support 130, where the third sensor 05 is located, is closer to the lower end of the wafer 100, the tilt of the lower end of the wafer 100 is less different from the vertical direction compared to the upper end of the wafer 100 in the slot 312. Therefore, using the fifth detection signal detected by the third sensor 05 instead of the third detection signal S3 detected by the first sensor 03 in the above process to determine wafer normality, anomaly, missing wafers, stacked wafers, warped wafers, and oblique insertion will result in more accurate detection. Specifically, the fifth detection signal detected by the third sensor 05 is used instead of the third detection signal S3 detected by the first sensor 03 in the above process to determine whether the wafer is normal, abnormally missing, stacked, warped, or obliquely inserted. This is the same as the process of determining whether the wafer is normal, abnormally missing, stacked, warped, or obliquely inserted based on the third detection signal S3 detected by the first sensor 03 and the fourth detection signal S4 detected by the second sensor 04, and will not be elaborated on here.

[0117] It should be noted that the above-mentioned broken wafers, abnormal missing wafers, stacked wafers, warped wafers, and oblique inserts are all wafer abnormalities. After the abnormal wafer on the wafer support 130 is identified, the signal processing module also needs to issue an alarm signal for the slot 312 on the wafer support 130 where the abnormal wafer is located, so as to realize the alarm for the abnormal wafer.

[0118] In one embodiment, the information processing module also stores wafer placement information, which includes information on the placement of wafers 100 in each slot 312 on the wafer support 130. Since multiple slots 312 are arranged sequentially on the wafer support 130, and the signal detector 140 is normally open during the detection of wafers 100 on the wafer support 130, the detection signal detected by the signal detector 140 can be divided into multiple reference grids 700 based on the width of the slots 312. Each reference grid 700 corresponds to one slot 312 on the wafer support 130, and there is a one-to-one correspondence between the slots 312 on the wafer support 130 and the reference grids 700 in the detection signal. For example... Figures 4-11 Within the range of 0-5mm, the reference grid 700-c01 corresponds to the first slot 312 along the direction in which the wafer 100 is placed on the upper edge of the wafer support 130; within the range of 5-10mm, the reference grid 700-c02 corresponds to the second slot 312 along the direction in which the wafer 100 is placed on the upper edge of the wafer support 130; and so on. The width of the reference grid 700 can be other reasonable values ​​based on the actual situation, and is not fixed here.

[0119] Based on this, before the information processing module determines whether each wafer 100 on the wafer holder 130 is abnormal based on multiple detection signals, it can first compare and analyze the wafer placement information with all detection signals at each reference grid 700 position to make a preliminary judgment on the actual placement of the wafer 100 on the wafer holder 130 based on all detection information. Furthermore, the wafer placement information in the slot 312 specifically indicates either a wafer 100 is placed there or no wafer 100 is placed there. For a specific slot 312 on the wafer carrier 130, if the wafer placement information for that slot 312 in the wafer placement information matches the final level signal result of all detection signals at the reference grid 700 position corresponding to that slot 312, then the wafer placement in that slot 312 on the wafer carrier 130 is normal (i.e., the actual wafer placement in that slot 312 matches the wafer placement information, meaning either a wafer 100 is placed in that slot 312 or no wafer 100 is placed in that slot 312). If the wafer placement information for that slot 312 in the wafer placement information does not match the final level signal result of all detection signals at the reference grid 700 position corresponding to that slot 312 on the wafer carrier 130, then the wafer corresponding to that slot 312 on the wafer carrier 130 is abnormal. In this case, the signal processing module can be set to alarm for the slot 312 position corresponding to the abnormal wafer on the wafer carrier 130.

[0120] Furthermore, the final level signal result determination method for all detection signals at the reference grid 700 position corresponding to the card slot 312 is as follows: For the reference grid position corresponding to the card slot 312, if a first level signal exists among all detection signals, it is determined that the final level signal result for all detection signals at the reference grid 700 position indicates that a wafer 100 is placed in the corresponding card slot 312; if no first level signal appears among all detection signals, it is determined that the final level signal result for all detection signals at the reference grid 700 position indicates that a wafer 100 is not placed in the corresponding card slot 312. At this time, the wafer placement information of the card slot 312 in the wafer placement information is consistent with the final level signal result for all detection signals at the reference grid 700 position corresponding to the card slot 312, that is, both the wafer placement information and the final level signal result indicate that a wafer 100 is placed in the card slot 312 or that a wafer 100 is not placed in the card slot 312.

[0121] The above determination method can theoretically filter out all abnormal wafer missing situations in the slots 312 of the wafer support 130, but there may also be situations where signal abnormalities cause missed judgments. Therefore, in the process of determining whether a single wafer 100 on the wafer support 130 is abnormal based on multiple detection signals, the signal processing module determines whether there is an abnormal wafer missing situation in the slot 312 corresponding to the reference grid 700 position based on multiple detection signals, thereby achieving further optimization of the judgment of abnormal wafer missing situations on the wafer support 130.

[0122] In one embodiment, since multiple slots 312 are sequentially arranged on the wafer support 130, and the signal detector 140 is normally open during the detection of wafers on the wafer support 130, the detection signal detected by the signal detector 140 can be divided into multiple reference grids 700 according to the distribution of the slots 312 based on the width of the slots 312. Each reference grid 700 corresponds to a slot 312 on the wafer support 130, and there is a one-to-one correspondence between the slots 312 on the wafer support 130 and the reference grids 700 in the detection signal. For example... Figures 4-11 Within the range of 0-5mm, the reference grid 700-c01 corresponding to the first slot 312 in the sequential placement direction is set along the upper edge of the wafer 100 on the wafer support 130; within the range of 5-10mm, the reference grid 700-c02 corresponding to the second slot 312 in the sequential placement direction is set along the upper edge of the wafer 100 on the wafer support 130; and so on. The width of the reference grid 700 can be other reasonable values ​​based on the actual situation, and is not fixed here.

[0123] During repeated wafer transfer, the wafer cleaning machine uses a robotic arm to grip the wafers 100 on the wafer holder 130. If the spacing between the wafers 100 on the wafer holder 130 is too small, damage to the wafers is likely to occur during the robotic arm's gripping process. Therefore, a suitable distance should be maintained between the wafers 100 in the wafer holder 130. To achieve this requirement, this embodiment also sets a region for the reference grid 700. For example... Figure 18 As shown, the baseline grid 700 includes a search area 710 and two defective areas 720, with the two defective areas 720 located on either side of the search area 710. The size of the search area 710 and the defective areas 720 can be set based on actual conditions, and under appropriate circumstances, the area of ​​the two defective areas 720 can also be set to zero.

[0124] Based on this, before the signal processing module determines whether each wafer 100 on the wafer holder 130 is abnormal based on multiple detection signals, it can also determine whether each first level signal in each detection signal is located in the search area 710 of the reference grid 700. If all first level signals at the same reference grid 700 position are located in the search area 710 of the reference grid 700, it means that the current wafer 100 is properly placed in the slot 312 of the wafer holder 130, the wafer 100 has not tilted significantly, and it does not affect the distance between adjacent wafers 100. Furthermore, it does not affect the robot's gripping of the wafer 100 and the adjacent wafers 100. At this time, it can be determined that the wafer 100 corresponding to the reference grid 700 position is normally placed. If a first-level signal is partially or entirely located in the defective area 720 of the same reference grid 700, it indicates that the wafer 100 is not properly placed in the slot 312 of the wafer carrier 130. The wafer 100 is placed at a significant tilt, affecting the distance between adjacent wafers 100, and further affecting the robot's gripping of the wafer 100 and adjacent wafers 100. This indicates an abnormality in the wafer 100 corresponding to the reference grid position. At this time, the signal processing module can be set to alarm the slot 312 position corresponding to the abnormal wafer 100 on the wafer carrier 130.

[0125] It should be noted that the above-mentioned process of determining whether a wafer is abnormal based on wafer placement information and the process of determining whether a wafer is abnormal based on the reference grid search area 710 do not affect each other. Therefore, there is no set execution order between the two processes; they can be executed sequentially.

[0126] The wafer inspection device provided in this invention uses a signal detection mechanism to detect wafers on a wafer carrier using multiple signal detectors to acquire multiple detection signals. By comparing and analyzing these multiple detection signals, abnormal wafer orientations, including wafer stacking, tilting, missing wafers, warping, and breakage, can be detected in a timely and accurate manner, thereby minimizing interference and breakage during wafer transfer. Furthermore, the type and position of the signal detectors can be adjusted based on actual conditions. For example, multiple diffuse reflection sensors can be arranged along the circumference of the wafer, and the signal detectors can be moved relative to the wafer under test to acquire multiple detection signals. The abnormality of each wafer can then be determined by comparing these multiple detection signals. Alternatively, through-beam and retroreflection sensors can be arranged along the circumference of the wafer, and the signal detectors can be moved relative to the wafer under test to acquire multiple detection signals. The abnormality of each wafer can then be determined by comparing these multiple detection signals. The device of this invention has good compatibility with existing machines, and can be applied to both new machines and the upgrading of existing machines on site. The device of this invention has a simple structure, low operating cost, small space occupation, and does not affect the production efficiency of the equipment. It can detect abnormal wafers such as wafer stacking, skewed wafers, missing wafers, warped wafers, and broken wafers during the wafer transfer process, thereby protecting the wafers from interference and breakage during the wafer transfer process.

[0127] While the embodiments disclosed in this invention are as described above, the content is merely for the purpose of facilitating understanding of the invention and is not intended to limit the invention. Any person skilled in the art to which this invention pertains may make any modifications and changes in form and detail of the implementation without departing from the spirit and scope disclosed herein; however, the scope of protection of this invention shall still be determined by the scope defined in the appended claims.

Claims

1. A wafer inspection device, characterized in that, Includes a signal detection mechanism and a signal processing module; The signal detection mechanism is used to detect the wafer on the wafer carrier based on multiple signal detectors to obtain multiple detection signals; The signal processing module is used to determine whether each wafer on the wafer support is abnormal based on the multiple detection signals. If a wafer on the wafer support is determined to be abnormal, an alarm is set to be triggered at the slot position corresponding to the abnormal wafer on the wafer support.

2. The wafer inspection apparatus according to claim 1, characterized in that, The signal detection mechanism includes a moving component, a transmission bracket, and a plurality of signal detectors fixed on the transmission bracket. The moving part of the moving component is linked to the transmission bracket. When the moving component moves the moving part, it causes the plurality of signal detectors on the transmission bracket to move axially along the wafer normally placed on the wafer support.

3. The wafer inspection apparatus according to claim 1, characterized in that, The signal detection mechanism includes a moving component, a fixed bracket, and a plurality of signal detectors fixed on the fixed bracket. The moving part of the moving component is linked to the wafer support. When the moving component moves the moving part, it causes the wafer on the wafer support and the plurality of signal detectors to move relative to each other along the axis of the wafer normally placed on the wafer support.

4. The wafer inspection apparatus according to claim 2 or 3, characterized in that, The moving component is a servo component, and the moving part is the controlled body in the servo component.

5. The wafer inspection apparatus according to claim 2 or 3, characterized in that, All of the signal detectors are first-class sensors. The plurality of signal detectors are arranged sequentially along the circumferential direction of the wafer normally placed on the wafer holder. Each slot on the wafer holder corresponds to a reference grid in the detection signal. The signal processing module is used to determine whether a single wafer on the wafer scaffold is abnormal based on the multiple detection signals, including: If all the detection signals are at the same reference grid position, then the wafer corresponding to the current reference grid position is determined to be normal. For the same reference grid position of the detection signals, if some of the detection signals are second level signals and the current part of the detection signals are normal level signals at the previous reference grid position and the next reference grid position of the current reference grid, and the other detection signals are normal level signals, then the wafer corresponding to the current reference grid position is determined to be a broken wafer. For the same reference grid position of the detection signal, if all the detection signals are second level signals, and all the detection signals are normal level signals at the previous reference grid position and the next reference grid position of the current reference grid, then it is determined that the wafer corresponding to the current reference grid position is a broken wafer or that the slot corresponding to the current reference grid position is abnormally missing wafer. For the same reference grid position of the detection signals, if all the detection signals are first level signals and the signal width of all the first level signals is greater than a first preset width threshold, or if all the detection signals include multiple first level signals, then the wafer corresponding to the current reference grid position is determined to be a stacked or warped wafer. For the same reference grid position of the detection signals, if some of the detection signals are normal level signals, and the other detection signals are all second level signals, and the other detection signals include multiple first level signals at the previous or next reference grid position of the current reference grid, then the wafer corresponding to the current reference grid position is determined to be a skewed wafer. Wherein, the normal level signal is the detection signal, which is the first level signal, and the signal width of the current first level signal is less than or equal to the first preset width threshold.

6. The wafer inspection apparatus according to claim 5, characterized in that, The first type of sensor is defined as a diffuse reflection sensor.

7. The wafer inspection apparatus according to claim 2 or 3, characterized in that, The plurality of signal detectors include a first sensor and a second sensor. The first sensor is a second type of sensor and is set within a first preset height range on the wafer holder where the wafer is normally placed. The second sensor is a third type of sensor and its signal detection path is vertically downward and set close to the center of the wafer on the wafer holder. The plurality of signal detectors are arranged sequentially along the circumferential direction of the wafer on the wafer holder where the wafer is normally placed. Each slot on the wafer holder corresponds to a reference grid in the detection signal. The signal processing module is used to determine whether a single wafer on the wafer scaffold is abnormal based on the multiple detection signals, including: For the same reference grid position of the detection signal, if the third detection signal is a second level signal, and the third detection signal is a normal level signal at both the previous and next reference grid positions of the current reference grid, and the fourth detection signal is a normal level signal, then the wafer corresponding to the current reference grid position is determined to be a broken wafer. Wherein, the normal level signal is the detection signal, which is the first level signal, and the signal width of the first level signal is less than the first preset width threshold; the third detection signal is acquired by the first sensor, and the fourth detection signal is acquired by the second sensor.

8. The wafer inspection apparatus according to claim 7, characterized in that, The signal processing module for determining whether a single wafer on the wafer scaffold is abnormal based on the multiple detection signals also includes: If both the third and fourth detection signals are normal level signals at the same reference grid position of the detection signal, then the wafer corresponding to the current reference grid position is determined to be normal. For the same reference grid position of the detection signal, if the third detection signal and the fourth detection signal are both second level signals, and the third detection signal and the fourth detection signal are both normal level signals at the previous reference grid position and the next reference grid position of the current reference grid, then it is determined that the wafer corresponding to the current reference grid position is a broken wafer or that the slot corresponding to the current reference grid position is abnormally missing wafer. For the same reference grid position of the detection signal, if the fourth detection signal is a first level signal and the current signal width of the first level signal is greater than the second preset width threshold, then it is determined that the wafer corresponding to the current reference grid position is a stacked wafer. For the same reference grid position of the detection signal, if the third detection signal and the fourth detection signal are both first level signals, and the signal width of all the first level signals is less than the second preset width threshold and greater than the first preset width threshold, then the wafer corresponding to the current reference grid position is determined to be a warped wafer. For the same reference grid position of the detection signal, if the third detection signal is a first level signal and the current signal width of the first level signal is greater than the first preset width threshold, and the fourth detection signal is a normal level signal, then it is determined that the wafer corresponding to the current reference grid position is a skewed wafer.

9. The wafer inspection apparatus according to claim 7, characterized in that, The plurality of signal detectors also includes a third sensor, which is the second type of sensor, and the third sensor is set within a second preset height range on the wafer holder where the wafer is normally placed. The signal processing module's determination of whether a single wafer on the wafer scaffold is abnormal based on the multiple detection signals also includes: If both the fifth and fourth detection signals are normal level signals at the same reference grid position of the detection signals, then the wafer corresponding to the current reference grid position is determined to be normal. For the same reference grid position of the detection signal, if the fifth detection signal and the fourth detection signal are both second level signals, and the fifth detection signal and the fourth detection signal are both normal level signals at the previous reference grid position and the next reference grid position of the current reference grid, then it is determined that the wafer corresponding to the current reference grid position is a broken wafer or that the slot corresponding to the current reference grid position is abnormally missing wafer. For the same reference grid position of the detection signal, if the fourth detection signal is a first level signal and the current signal width of the first level signal is greater than the second preset width threshold, then it is determined that the wafer corresponding to the current reference grid position is a stacked wafer. For the same reference grid position of the detection signal, if the fifth detection signal and the fourth detection signal are both first level signals, and the signal width of all the first level signals is less than the second preset width threshold and greater than the first preset width threshold, then the wafer corresponding to the current reference grid position is determined to be a warped wafer. For the same reference grid position of the detection signal, if the fifth detection signal is a first level signal and the current signal width of the first level signal is greater than the first preset width threshold, and the fourth detection signal is a normal level signal, then it is determined that the wafer corresponding to the current reference grid position is a skewed wafer. The fifth detection signal is acquired by the third sensor.

10. The wafer inspection apparatus according to claim 9, characterized in that, The second type of sensor is defined as a through-beam sensor or a retroreflective sensor, and the third type of sensor is defined as a distance sensor or a retroreflective sensor.

11. The wafer inspection apparatus according to claim 1, characterized in that, The signal processing module stores wafer placement information, which shows the placement of wafers in each slot on the wafer support. Each slot on the wafer support corresponds to a reference grid in the detection signal. Before the signal processing module determines whether each wafer on the wafer holder is abnormal based on the multiple detection signals, it is also used to compare and analyze the wafer placement information with all the detection signals at each reference grid position, so as to determine the wafer corresponding to the reference grid position where the wafer placement information does not correspond to all the detection signals as an abnormal wafer.

12. The wafer inspection apparatus according to claim 1, characterized in that, Each slot on the wafer carrier corresponds to a reference grid in the detection signal. The reference grid includes a search area and two defective areas, with the two defective areas located on both sides of the search area. Before the signal processing module determines whether each wafer on the wafer holder is abnormal based on the multiple detection signals, it is also used to determine whether each first level signal in each detection signal is located in the search area of ​​the reference grid. If all first level signals at the same reference grid position are located in the search area of ​​the reference grid, it is determined that the wafer corresponding to the reference grid position is placed normally; otherwise, it is determined that the wafer corresponding to the current reference grid position is abnormal.