Infrared imaging system with high imaging quality and high working efficiency
By separating the power supply module and implementing an independent control strategy, the infrared imaging system solves the problems of low imaging quality and low working efficiency, achieving high reliability, fast response, and high imaging quality, while enhancing anti-interference capabilities, making it suitable for infrared imaging applications in space environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-14
- Publication Date
- 2026-03-27
AI Technical Summary
Existing infrared imaging systems suffer from severe limitations in imaging quality, stability, and efficiency in space environments. They suffer from problems such as high dark current, high power consumption, easy image saturation, signal interference, single-event effects, image non-uniformity, and insufficient anti-interference capabilities, making it difficult to meet the requirements for high imaging quality and high efficiency.
Employing a separate power supply module and independent control strategy, the infrared imaging focal plane is divided into an imaging control and drive and video processing section, an infrared detector and power supply bias section. The infrared control unit independently controls its power-on and power-off, and power isolation is achieved by combining opto-isolators and EMI filters. The power supply and signal processing of the infrared detector are optimized. Differential analog-to-digital conversion and multi-sampling averaging technology are used to achieve image non-uniformity correction and field of view expansion.
It improves the reliability and response speed of the infrared imaging system, optimizes power consumption and lifespan, significantly improves image signal quality and integrity, enhances electromagnetic compatibility and anti-interference capabilities, and ensures the functional safety and stability of the system.
Smart Images

Figure CN121740247A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of infrared imaging system technology, and particularly relates to an infrared imaging system with high imaging quality and high working efficiency. Background Technology
[0002] Infrared imaging technology has significant applications in fields such as space exploration, military reconnaissance, and environmental monitoring. However, existing infrared imaging systems still face numerous technical bottlenecks in practical applications, especially in space environments, where the imaging quality, stability, and efficiency of infrared imaging systems are severely limited.
[0003] First, infrared detectors inherently suffer from high dark current, high power consumption at room temperature, and susceptibility to image saturation, typically requiring operation at low temperatures to improve performance. Currently used H-bridge-based cryostat drive circuits experience significant interference during operation, easily interfering with the weak analog video signal output by the infrared detector, resulting in abnormal stripes in the image and affecting image quality. Furthermore, if the cryostat stops and restarts during imaging, it takes nearly two hours to return to the expected operating temperature, and the infrared detector must be recalibrated using a blackbody, severely impacting the real-time response capability of the infrared imaging system. Even with the cryostat continuously operating, if the infrared detector is powered off and then powered on again, it still takes approximately 20 minutes to return to thermal equilibrium. Although recalibration is not required at this time, it still limits the rapid startup and task switching capabilities of the infrared imaging system.
[0004] Regarding the reliability of infrared imaging systems, issues such as single-event upsets exist in the space environment. When a single-event upset occurs in a non-refreshable part of the FPGA, the FPGA program needs to be reloaded, further affecting the continuous operation capability of the infrared imaging system. Especially when the focal plane controller simultaneously controls the cooler, each focal plane program update or reload causes the cooler to pause operation, leading to recalibration and long waiting times, severely weakening the real-time performance of the infrared imaging system's on-orbit mission execution.
[0005] In terms of signal processing, the output signal level of existing infrared detectors is correlated with the amplitude of the input signal, making it difficult to achieve correlated double sampling and resulting in insufficient noise suppression capabilities. Simultaneously, clock jitter between the infrared detector and the analog-to-digital converter leads to sampling deviations, further degrading image quality. Furthermore, infrared images have poor uniformity before non-uniform correction; increasing the image compression ratio to improve transmission efficiency will cause loss of image details. To expand the field of view, some infrared imaging systems employ odd-even pixel interleaving, but the resulting camera timing deviations affect the overall image interpretation.
[0006] In terms of signal transmission, existing infrared imaging systems mostly use single-ended clock and single-ended signal transmission methods, which are susceptible to external interference when transmitting at high frequencies and over long distances, reducing the image signal-to-noise ratio and the stability of the infrared imaging system.
[0007] Existing technologies, such as patents like "An Infrared Imaging System and Electronic Device Based on FPGA" and "Infrared System, Infrared Imaging Device and Electronic Device Based on FPGA," have proposed infrared image processing schemes based on FPGA, but none of them address key issues such as cryogenic cooling control of infrared detectors, image non-uniformity correction, signal integrity improvement, noise suppression, and reliability design in aerospace environments. These technologies are insufficient to meet the requirements of infrared systems with high imaging quality and high operating efficiency in space applications. Summary of the Invention
[0008] In view of this, the present invention aims to provide an infrared imaging system that can achieve high imaging quality, high working efficiency, strong anti-interference capability and fast response characteristics in a space environment, so as to overcome the shortcomings of the prior art.
[0009] To achieve the above objectives, the technical solution created by this invention is implemented as follows: An infrared imaging system with high imaging quality and high operating efficiency includes a first power supply module, a second power supply module, a third power supply module, an infrared imaging focal plane, an infrared control unit, a first opto-isolator, a second opto-isolator, a focusing assembly, a blackbody assembly, and a cooling assembly; wherein, The first power supply module includes a first EMI filter and surge suppressor and a first DC-DC converter. The first primary power supply bus input from the outside passes through the first EMI filter and surge suppressor and the first DC-DC converter in sequence to supply power to the infrared imaging focal plane. The infrared imaging focal plane includes physically separate imaging control and drive and video processing parts, infrared detectors and power supply bias parts. The power supply for the imaging control and drive and video processing parts, infrared detectors and power supply bias parts is provided by the first power supply module and is independently controlled by the infrared control unit. The second power supply module includes a second EMI filter and surge suppressor, a second DC-DC converter, a third EMI filter and surge suppressor, and a third DC-DC converter. The externally input second primary power supply bus is divided into two paths. One path passes through the second EMI filter and surge suppressor and the second DC-DC converter in sequence to supply power to the control terminals of the infrared control unit, focusing assembly, and first opto-isolator. The other path passes through the third EMI filter and surge suppressor and the third DC-DC converter in sequence to supply power to the receiving part of the first opto-isolator and the blackbody assembly. The third power supply module includes a fourth EMI filter and surge suppressor, a fourth DC-DC converter, a fifth EMI filter and surge suppressor, and a fifth DC-DC converter. The externally input third primary power supply bus is divided into two paths. One path passes through the fourth EMI filter and surge suppressor and the fourth DC-DC converter in sequence to supply power to the control part of the cooling component and the control terminal of the second opto-isolator. The other path passes through the fifth EMI filter and surge suppressor and the fifth DC-DC converter in sequence to supply power to the drive part of the cooling component and the receiving part of the second opto-isolator. The infrared control unit generates focusing drive signals, blackbody heating control signals, imaging control and drive and video processing section power supply control signals, infrared detector and power supply bias section power supply control signals, and blackbody power supply control signals. The focusing drive signal drives the focusing assembly. The blackbody temperature control signal controls the temperature of the blackbody assembly after passing through the first opto-isolator. The imaging control and drive and video processing section power supply control signals and the infrared detector and power supply bias section power supply control signals control the first DC-DC converter, enabling power-on / off control of the imaging control and drive and video processing section, and the infrared detector and power supply bias section. The blackbody power supply control signal controls the third DC-DC converter, enabling power-on / off control of the blackbody assembly. The infrared control unit also communicates with the infrared imaging focal plane and the cooling component via a 422 bus to obtain focal plane information and cooling information, and controls the infrared imaging focal plane and the cooling component respectively.
[0010] Furthermore, the cooling component includes an infrared cooling control unit, an infrared cooling driver, and an infrared cooling unit. The infrared cooling drive signal generated by the infrared cooling control unit is sent to the infrared cooling driver after passing through the second opto-isolator to drive the infrared cooling unit. The infrared cooling control unit communicates with the infrared control unit via a 422 bus. The infrared cooling control unit, the infrared cooling driver, the infrared cooling unit, and the second opto-isolator all operate in a continuously powered-on state.
[0011] Furthermore, the focusing assembly includes a focusing motor driver and a focusing motor. The focusing drive signal generated by the infrared control unit is sent to the focusing motor driver to drive the focusing motor. The focusing motor driver and the focusing motor are powered on only by the second DC-DC converter during focusing.
[0012] Furthermore, the blackbody assembly includes a blackbody heating driver and a blackbody. The blackbody temperature control signal generated by the infrared control unit is sent to the blackbody heating driver after passing through the first opto-isolator to control the temperature of the blackbody. The blackbody heating driver and the blackbody are only powered on by the third DC-DC converter controlled by the infrared control unit during calibration.
[0013] Furthermore, the infrared detector and power supply bias section includes an infrared detector and a power supply bias circuit. The infrared detector is used to convert the infrared radiation signal of the target scene into an analog electrical signal; the power supply bias circuit is used to provide a stable bias voltage for the infrared detector.
[0014] Furthermore, the power supply control strategy of the infrared control unit for the imaging control and drive and video processing section and the infrared detector and power supply bias section is as follows: when the infrared cooler cools the infrared detector to the expected operating temperature, the infrared control unit controls the first DC-DC converter to supply power to the infrared detector and power supply bias section; when the infrared imaging system starts the camera task, the infrared control unit controls the first DC-DC converter to supply power to the imaging control and drive and video processing section; when the camera task ends, the infrared control unit controls the first DC-DC converter to cut off the power supply to the imaging control and drive and video processing section, and only maintains the power supply to the infrared detector and power supply bias section.
[0015] Furthermore, the power supply design of the power supply bias circuit is as follows: for loads with a pull-in current greater than the threshold current, the power supply bias circuit uses a low-dropout regulator to supply power to the load; for loads with a pull-in current and / or sink current less than the threshold current, the power supply bias circuit uses a power supply method consisting of a reference voltage source, a low-pass filter, and an operational amplifier follower connected in series to supply power to the load.
[0016] 8. The infrared imaging system with high imaging quality and high working efficiency according to claim 6, characterized in that the imaging control and driving and video processing part includes a controller, a driver and a video processor; wherein, the controller is used to provide driving control signals to the infrared detector; the driver is used to convert the driving control signals output by the controller into driving control signals that can be received by the infrared detector; and the video processor is used to receive the analog video signals returned by the infrared detector and convert them into digital image data for output.
[0017] Furthermore, the infrared detector and power supply bias section operate in a continuously powered-on state; The infrared control unit operates in a continuously powered-on state and its program is periodically reloaded. The infrared control unit determines whether the infrared detector and the power supply bias section are powered on by detecting whether the infrared detector and the power supply bias section return telemetry voltage to the infrared control unit. The infrared control unit determines whether the controller is powered on by detecting the signal status after the controller's loading configuration is completed; The power-on status of the controller is obtained by acquiring the power-on status of the 422 bus to determine whether the driver and video processor are powered on.
[0018] Furthermore, the video processor includes a follower, a differential operational amplifier, and a differential analog-to-digital converter (ADC). The analog video signal returned by the infrared detector first undergoes impedance transformation via the follower, then is converted into a differential signal by the differential operational amplifier before being sent to the differential ADC for analog-to-digital conversion. The output amplitude of the analog video signal is A, the range of the differential ADC is B, and the top reference voltage is V. refp The common-mode level of the input signal is V. incm The gain G of the differential operational amplifier satisfies G=B / A, and B=2 (V refp -V incm The common-mode level of the differential operational amplifier output signal and the common-mode level V of the differential analog-to-digital converter input signal. incm same.
[0019] Furthermore, the controller provides a clock frequency of f for the differential analog-to-digital converter. sample The input clock, the controller provides a clock frequency of f to the infrared detector. sensor The input clock, and satisfying f sample =n×f sensor Where n is a positive integer greater than 3; When the distance between the differential analog-to-digital converter and the controller does not exceed the threshold distance, the input clock of the differential analog-to-digital converter adopts a single-ended form; When the distance between the differential analog-to-digital converter and the controller exceeds the threshold distance, the input clock of the differential analog-to-digital converter adopts a differential form; When the distance between the infrared detector and the controller exceeds the threshold distance and the clock frequency f sensor When the frequency does not exceed 5MHz, the infrared detector outputs an analog video signal in a single-ended manner; When the distance between the infrared detector and the controller exceeds the threshold distance and the clock frequency f sensor When the frequency exceeds 5MHz, the infrared detector outputs analog video signals in a differential manner.
[0020] Furthermore, the sampling and processing steps of the video processor for the analog video signal are as follows: (1) Adjust the sampling clock phase fed into the video processor, count the number of valid sampling edges of the sampling clock entering the flat region of the analog video signal, and select the phase with the most valid sampling edges as the optimal sampling phase, wherein the number of valid sampling edges m under the optimal sampling phase satisfies 1 <m<n; (2) Under the optimal sampling phase, the analog video signal output by the infrared detector is sampled n times. Based on the delay coefficient r of the analog-to-digital converter in the video processor and the relative position p of the first valid sampling edge among the m sampling edges, m adjacent sample values are selected. The relative position of the first sample value among the m sample values is r+p. The average of the m sample values is accumulated to obtain the multi-sample average value DN of each pixel. sample ; (3) During the blanking phase of each row of image data, calculate the multi-sample average value DN of the signal during the blanking phase of each row according to the method in steps (1)-(2). blank The final output DN value for each pixel final =DN sample -DN blank .
[0021] Furthermore, the infrared detector uses an interlaced stitching method to expand the field of view. The pixel size of each pixel is j. The spacing between all odd-numbered rows of pixels and between all even-numbered rows of pixels is 2j. The spacing between the photosensitive pixels in the odd-numbered channels and the corresponding photosensitive pixels in the even-numbered channels is 5u+v. The number of rows that the photosensitive pixels in the even-numbered channels lag behind the photosensitive pixels in the odd-numbered channels is z=(5u+v) / j. Where u represents the basic offset unit of the pixel in the direction of pixel exposure timing, and v represents the additional offset between pixels in the odd-numbered channels and pixels in the even-numbered channels.
[0022] Furthermore, the video processor also includes a calibration selection switch, a ping-pong structure buffer, and a z+1 structure buffer; among which, The image data input from the even-numbered channels is averaged after multiple sampling, the mean value of the line blanking period is deducted, and non-uniform correction is applied. Then, it is sent together with the image data before correction from the even-numbered channels to the correction selection switch for selection and output. The image data output from the correction selection switch is buffered by a ping-pong structure buffer and then output. The image data output from the ping-pong structure buffer is delayed by 1 line time relative to the image data input from the even-numbered channels. The image data input from the odd-numbered channels is averaged after multiple sampling, the mean of the line blanking period is deducted, and non-uniform correction is applied. Then, it is sent together with the image data before correction of the odd-numbered channels to the correction selection switch for selection output. The image data output from the correction selection switch is buffered by a z+1 structure buffer before being output. The image data output from the z+1 structure buffer is delayed by z+1 line time relative to the image data input from the odd-numbered channels.
[0023] Furthermore, the fifth DC-DC converter obtains the constant cycle time of the infrared refrigerator and determines the interval between the peak current and the valley current of the infrared refrigerator. According to the synchronous trigger signal sent by the infrared cooling control unit, the fifth DC-DC converter increases the output voltage duty cycle before the peak current of the infrared refrigerator arrives and decreases the output voltage duty cycle before the valley current of the infrared refrigerator arrives.
[0024] Compared with the prior art, the present invention can achieve the following beneficial effects: 1. Improved the reliability and response speed of the infrared imaging system during on-orbit operation. By splitting the infrared imaging focal plane into two parts—imaging control and drive and video processing—and the infrared detector and power supply bias—and having the infrared control unit independently control their power-on and power-off, refined power management is achieved. This strategy allows the controller to operate only when performing a task, significantly shortening its continuous online time and effectively reducing the risk of functional interruption due to single-event effects. Even if the controller needs to be reloaded due to program updates or single-event upsets, there is no need to interrupt the operation of the infrared cooler. The infrared detector can always maintain a low-temperature thermal equilibrium state, thus enabling immediate recovery of imaging capability after reloading. This avoids the nearly two-hour waiting time for recooling and calibration, significantly improving the rapid response capability of on-orbit missions, especially emergency observation missions.
[0025] 2. Optimized the power consumption and lifespan of the infrared detector. By adopting a strategy of cooling first and then powering on, power is only supplied to the infrared detector after it has reached the predetermined low temperature. This avoids the large dark current and high power consumption generated by the infrared detector operating at high temperatures. It reduces the load on the infrared cooler and also reduces the heat generated by the infrared detector itself, which is conducive to the thermal balance of the infrared imaging system and extends the life of the infrared detector.
[0026] 3. Significantly improved the quality and integrity of image signals. The controller provides a low-jitter clock for the infrared detector and differential analog-to-digital converter (DAC), and shortens the clock path to the analog video signal, reducing sampling deviation and signal integrity loss. Multiple sampling and averaging of the analog video signal, followed by subtraction of the average signal during the line blanking period, effectively suppresses fixed-pattern noise and interline deviation. A high-input-impedance follower and differential operational amplifier protect the output of the infrared detector, and precisely matched gain settings ensure that the analog video signal enters the DAC with optimal amplitude, fully utilizing its quantization dynamic range and avoiding signal saturation or loss. Non-uniformity correction is performed in the digital domain before image compression, which helps improve lossless compression efficiency. By performing line buffering and delayed stitching on odd and even channel image data respectively, image misalignment caused by interlaced exposure is eliminated, outputting continuous, synchronous, high-quality images for direct target interpretation from the ground.
[0027] 4. Enhanced electromagnetic compatibility and anti-interference capability of the infrared imaging system. Three independent primary buses are used to power the imaging control and drive and video processing sections, the infrared detector and power supply bias section, the infrared control unit, the blackbody assembly, and the cooling assembly, respectively, thus achieving power isolation at the source. Independent power modules, EMI filters, and surge suppressors are used for interference sources (such as the cooling unit driver and the blackbody heater driver), and opto-isolators completely isolate them from sensitive digital control circuits. The DC-DC power module adjusts the output duty cycle according to the cooling unit's duty cycle, actively compensating for peak current demands, smoothing voltage fluctuations on the primary bus, and fundamentally reducing conducted interference to sensitive circuits such as the imaging focal plane.
[0028] 5. Achieved higher system functional security and stability. The infrared control unit employs a periodic reload strategy to avoid single-event cumulative effects. Components that are not continuously operating, such as the focusing motor and blackbody, are normally powered off and only powered on during use. This silent design ensures that even in the event of a single-event event, it will not cause focusing malfunctions or unintended blackbody heating, eliminating mission failures or safety risks due to misoperation. Attached Figure Description
[0029] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments and descriptions of the invention are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1 A schematic diagram of the structure of the infrared imaging system with high imaging quality and high working efficiency described in the embodiment of the present invention; Figure 2A schematic diagram of the power supply bias circuit for a load with a corresponding pull-up current and / or sink current less than the threshold current, as described in the embodiment of the present invention. Figure 3 A schematic diagram of the pixel distribution of odd-numbered channels and even-numbered channels as described in the embodiments of the present invention; Figure 4 This is a schematic diagram of the image data processing flow of the video processor described in an embodiment of the present invention. Detailed Implementation
[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not constitute a limitation thereof.
[0031] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.
[0032] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.
[0033] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "assembly," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0034] The invention will now be described in detail with reference to the accompanying drawings and embodiments.
[0035] like Figure 1As shown, the present invention provides an infrared imaging system with high imaging quality and high working efficiency, including a first power supply module, a second power supply module, a third power supply module, an infrared imaging focal plane, an infrared control unit, a first opto-isolator, a second opto-isolator, a focusing component, a blackbody component, and a cooling component.
[0036] The first power supply module includes a first EMI filter and surge suppressor and a first DC-DC converter. The first primary power supply bus input from the outside passes through the first EMI filter and surge suppressor and the first DC-DC converter in sequence to supply power to the infrared imaging focal plane.
[0037] The infrared imaging focal plane includes physically separate imaging control and drive and video processing sections, infrared detectors and power supply bias sections. The power supply for the imaging control and drive and video processing sections, infrared detectors and power supply bias sections is provided by the first power supply module and is independently controlled by the infrared control unit.
[0038] The second power supply module includes a second EMI filter and surge suppressor, a second DC-DC converter, a third EMI filter and surge suppressor, and a third DC-DC converter. The externally input second primary power supply bus is divided into two paths. One path passes through the second EMI filter and surge suppressor and the second DC-DC converter in sequence to supply power to the control terminals of the infrared control unit, focusing assembly, and first opto-isolator. The other path passes through the third EMI filter and surge suppressor and the third DC-DC converter in sequence to supply power to the receiving section of the first opto-isolator and the blackbody assembly.
[0039] The third power supply module includes a fourth EMI filter and surge suppressor, a fourth DC-DC converter, a fifth EMI filter and surge suppressor, and a fifth DC-DC converter. The externally input third primary power supply bus is divided into two paths. One path passes through the fourth EMI filter and surge suppressor and the fourth DC-DC converter in sequence to supply power to the control part of the cooling component and the control terminal of the second opto-isolator. The other path passes through the fifth EMI filter and surge suppressor and the fifth DC-DC converter in sequence to supply power to the drive part of the cooling component and the receiving part of the second opto-isolator.
[0040] The infrared control unit generates focusing drive signals, blackbody heating control signals, imaging control and drive and video processing section power supply control signals, infrared detector and power supply bias section power supply control signals, and blackbody power supply control signals. The focusing drive signal drives the focusing assembly. The blackbody temperature control signal controls the temperature of the blackbody assembly after passing through the first opto-isolator. The imaging control and drive and video processing section power supply control signals and the infrared detector and power supply bias section power supply control signals control the first DC-DC converter, enabling power-on / off control of the imaging control and drive and video processing section, and the infrared detector and power supply bias section. The blackbody power supply control signal controls the third DC-DC converter, enabling power-on / off control of the blackbody assembly.
[0041] The infrared control unit also communicates with the infrared imaging focal plane and the cooling component via a 422 bus to obtain focal plane information and cooling information, and controls the infrared imaging focal plane and the cooling component respectively.
[0042] The cooling assembly includes an infrared cooling control unit, an infrared cooling driver, and an infrared cooling unit. The infrared cooling drive signal generated by the infrared cooling control unit is sent to the infrared cooling driver after passing through the second opto-isolator to drive the infrared cooling unit. The infrared cooling control unit communicates with the infrared control unit via a 422 bus. The infrared cooling control unit, the infrared cooling driver, the infrared cooling unit, and the second opto-isolator all operate in a continuously powered-on state.
[0043] The focusing assembly includes a focusing motor driver and a focusing motor. The focusing drive signal generated by the infrared control unit is sent to the focusing motor driver to drive the focusing motor. The focusing motor driver and the focusing motor are powered on only by the second DC-DC converter during focusing.
[0044] The blackbody assembly includes a blackbody heating driver and a blackbody. The blackbody temperature control signal generated by the infrared control unit is sent to the blackbody heating driver after passing through the first opto-isolator to control the temperature of the blackbody. The blackbody heating driver and the blackbody are only powered on by the third DC-DC converter controlled by the infrared control unit during calibration.
[0045] The infrared detector and power supply bias section includes an infrared detector and a power supply bias circuit. The infrared detector is used to convert the infrared radiation signal of the target scene into an analog electrical signal; the power supply bias circuit is used to provide a stable bias voltage for the infrared detector.
[0046] The power supply control strategy of the infrared control unit for the imaging control and drive and video processing section and the infrared detector and power supply bias section is as follows: when the infrared cooler cools the infrared detector to the expected operating temperature, the infrared control unit controls the first DC-DC converter to supply power to the infrared detector and power supply bias section; when the infrared imaging system starts the camera task, the infrared control unit controls the first DC-DC converter to supply power to the imaging control and drive and video processing section; when the camera task ends, the infrared control unit controls the first DC-DC converter to cut off the power supply to the imaging control and drive and video processing section, and only maintains the power supply to the infrared detector and power supply bias section.
[0047] The power supply design of the power supply bias circuit is as follows: For loads with a source current greater than the threshold current, the power supply bias circuit uses a low-dropout regulator to supply power to the load; for loads with a source current and / or sink current less than the threshold current, the power supply bias circuit uses a power supply method consisting of a reference voltage source, a low-pass filter, and a high-current operational amplifier follower connected in series to supply power to the load. Figure 2 As shown.
[0048] The imaging control and drive and video processing section includes a controller, a driver, and a video processor. The controller provides drive control signals to the infrared detector. The driver converts the drive control signals output by the controller into drive control signals that the infrared detector can receive. The video processor receives the analog video signals returned by the infrared detector and converts them into digital image data for output.
[0049] The infrared detector and power supply bias section operate in a continuously powered-on state; the infrared control unit operates in a continuously powered-on state and periodically reloads its program; the infrared control unit determines whether the infrared detector and power supply bias section are powered on by detecting whether the infrared detector and power supply bias section return telemetry voltage to the infrared control unit; the infrared control unit determines whether the controller is powered on by detecting the load configuration completion signal status of the controller; and it determines whether the driver and video processor are powered on by obtaining the power-on status inside the controller through the 422 bus.
[0050] The video processor includes a follower, a differential operational amplifier, and a differential analog-to-digital converter (ADC). The analog video signal returned from the infrared detector first undergoes impedance transformation via the follower, then is converted into a differential signal by the differential operational amplifier before being sent to the differential ADC for analog-to-digital conversion. The output amplitude of the analog video signal is A, the range of the differential ADC is B, and the top reference voltage is V. refp The common-mode level of the input signal is V. incm The gain G of the differential operational amplifier satisfies G=B / A, and B=2 (V refp -V incmThe common-mode level of the differential operational amplifier output signal and the common-mode level V of the differential analog-to-digital converter input signal. incm same.
[0051] High input impedance follower enables attenuation-free transmission of high-impedance analog video signals, solving the amplitude loss problem caused by load mismatch; differential operational amplifier converts analog video signals into differential form, which not only improves the ability to resist electromagnetic interference (avoiding noise coupling in long-distance transmission), but also adapts to the input requirements of differential analog-to-digital converters, ensuring maximum signal fidelity in link transmission.
[0052] Using the formulas G=B / A and B=2 (V) refp -V incm The design ensures that the output amplitude of the differential operational amplifier perfectly matches the range of the differential analog-to-digital converter (ADC), while the common-mode level matches the input common-mode level V of the ADC. incm Consistent with this design, this approach maximizes the dynamic range of the differential analog-to-digital converter, avoiding signal saturation or wasted range, and optimizes the quantization accuracy of the analog-to-digital conversion, providing high-fidelity raw data for subsequent digital image processing.
[0053] The controller provides a clock frequency of f for the differential analog-to-digital converter. sample The input clock, the controller provides a clock frequency of f to the infrared detector. sensor The input clock, and satisfying f sample =n×f sensor Where n is a positive integer greater than 3. Within one pixel clock cycle of an infrared detector, the analog video signal output by the infrared detector is sampled n times, resulting in n sampled values. Averaging the multiple sampled values of the same pixel signal effectively enhances the useful signal while partially canceling out random noise, thus significantly reducing the random noise level of the final output image.
[0054] When the distance between the differential analog-to-digital converter and the controller does not exceed the threshold distance, i.e., the differential analog-to-digital converter is positioned close to the controller, the input clock of the differential analog-to-digital converter adopts a single-ended form.
[0055] When the distance between the differential analog-to-digital converter and the controller exceeds the threshold distance, that is, when the differential analog-to-digital converter is far from the controller, the input clock of the differential analog-to-digital converter adopts a differential form.
[0056] When the distance between the infrared detector and the controller exceeds the threshold distance and the clock frequency f sensorWhen the frequency does not exceed 5MHz, the infrared detector outputs analog video signals in a single-ended manner.
[0057] When the distance between the infrared detector and the controller exceeds the threshold distance and the clock frequency f sensor When the frequency exceeds 5MHz, the infrared detector outputs analog video signals in a differential manner.
[0058] The clock transmission method can be selected as needed (low-frequency single-ended, high-frequency differential). While meeting the high interference immunity requirements of high-frequency scenarios, it simplifies circuit design in low-frequency scenarios, effectively reducing system power consumption and hardware costs. It is especially suitable for energy- and space-constrained application scenarios such as spaceborne and airborne applications.
[0059] The sampling and processing steps of the video processor for analog video signals are as follows: (1) Adjust the sampling clock phase fed into the video processor, count the number of valid sampling edges of the sampling clock entering the flat region of the analog video signal, and select the phase with the most valid sampling edges as the optimal sampling phase, wherein the number of valid sampling edges m under the optimal sampling phase satisfies 1 <m<n。
[0060] By adjusting the sampling clock phase in step (1), the optimal phase with the most effective sampling edges entering the flat area of the analog video signal is selected, ensuring that the sampling time is in the most stable range of the signal, avoiding errors caused by sampling at signal transition edges, making the sampling value of each pixel more accurate and more consistent, and laying a precise signal foundation for subsequent processing.
[0061] (2) Under the optimal sampling phase, the analog video signal output by the infrared detector is sampled n times. Based on the delay coefficient r of the analog-to-digital converter in the video processor and the relative position p of the first valid sampling edge among the m sampling edges, m adjacent sample values are selected. The relative position of the first sample value among the m sample values is r+p. The average of the m sample values is accumulated to obtain the multi-sample average value DN of each pixel. sample .
[0062] Step (2) involves averaging the m adjacent valid sample values. By utilizing the randomness of noise and the statistical averaging characteristics, the influence of random noise such as thermal noise and quantization noise is significantly reduced, thus improving the output DN. sample The signal-to-noise ratio is significantly improved, and the readability of image details (such as small targets and edge textures) is greatly enhanced.
[0063] (3) During the blanking phase of each row of image data, calculate the multi-sample average value DN of the signal during the blanking phase of each row according to the method in steps (1)-(2). blank The final output DN value for each pixel final =DN sample -DN blank .
[0064] Step (3) eliminates the row-level non-uniformity problem that easily exists in infrared detectors by calculating the signal averaging and difference during the blanking stage. The DN during the blanking stage... blank It characterizes the basic response deviation of each row. By performing difference calculations, the fixed response differences between rows can be completely canceled out, avoiding striped uneven brightness in the image and greatly improving the uniformity of the entire image. It is especially suitable for infrared imaging scenarios with strict uniformity requirements (such as target detection and precise temperature measurement). Infrared detectors use an interlaced splicing method to expand the field of view, such as... Figure 3 As shown, the pixel size of each pixel is j, the spacing between all odd-numbered rows of pixels and between all even-numbered rows of pixels is 2j, the spacing between the photosensitive pixels in the odd-numbered channels and the corresponding photosensitive pixels in the even-numbered channels is 5u+v, the photosensitive pixels in the odd-numbered channels are exposed before the photosensitive pixels in the even-numbered channels, and the number of rows z = (5u+v) / j that the photosensitive pixels in the even-numbered channels lag behind the photosensitive pixels in the odd-numbered channels; where u represents the basic offset unit of the pixel in the direction of pixel exposure, and v represents the additional offset between pixels in the odd-numbered channels and pixels in the even-numbered channels.
[0065] By employing staggered stitching, the field of view is effectively expanded. Simultaneously, time-difference correction eliminates the timing discrepancies between odd and even channels, resolving image misalignment and edge splitting issues. This ensures the detail integrity and interpretation accuracy of the expanded image, making target edges and textures clearly discernible. After time-difference correction, the odd and even channel images are synchronized, with no obvious stitching marks in the stitched area, significantly improving image uniformity. Combined with multi-sampling noise reduction and non-uniformity correction techniques, the final infrared image exhibits superior signal-to-noise ratio and grayscale levels, meeting the requirements of high-precision target recognition and temperature measurement applications.
[0066] The video processor also includes a correction selection switch, a ping-pong structure buffer, and a z+1 structure buffer. The video processor's image data processing flow is as follows: Figure 4 As shown: The image data input from the even-numbered channels is averaged after multiple sampling, the mean value of the line blanking period is deducted, and non-uniform correction is applied. Then, it is sent together with the image data before correction from the even-numbered channels to the correction selection switch for selection and output. The image data output from the correction selection switch is buffered by a ping-pong structure buffer and then output. The image data output from the ping-pong structure buffer is delayed by 1 line time relative to the image data input from the even-numbered channels. The image data input from the odd-numbered channels is averaged after multiple sampling, the mean of the line blanking period is deducted, and non-uniform correction is applied. Then, it is sent together with the image data before correction of the odd-numbered channels to the correction selection switch for selection output. The image data output from the correction selection switch is buffered by a z+1 structure buffer before being output. The image data output from the z+1 structure buffer is delayed by z+1 line time relative to the image data input from the odd-numbered channels.
[0067] Because the photosensitive pixels in odd-numbered channels are exposed before those in even-numbered channels, there is a line difference z in the imaging time of the same scene on the odd-numbered pixels. By applying a longer Z+1 line buffer delay to the odd-numbered channel data that is exposed first, and a shorter 1-line buffer delay to the even-numbered channel data that is exposed later, the time difference z between the odd and even channels is precisely canceled out. This solves the problems of image misalignment and edge splitting caused by staggered stitching, ensures the stitching integrity of the image after the field of view is expanded, and prevents discontinuity interference during target recognition.
[0068] The calibration selection switch supports switching between calibrated and uncalibrated data. When a set of calibration coefficients fails due to single-event upset or calibration error, it can quickly switch to the backup mode (or the original data) to avoid large-area distortion of the image due to calibration interruption and ensure continuous and stable imaging in on-orbit missions and complex electromagnetic environments.
[0069] In summary, the video processor's image data processing flow solves the time synchronization problem of odd and even channels through a differentiated row caching strategy, ensures the continuity of the data stream through ping-pong caching, and provides on-orbit maintenance flexibility through a calibration selection switch. These three elements work together to ensure that the infrared imaging system can output geometrically accurate, continuously stable, and long-term maintainable high-quality infrared images.
[0070] The fifth DC-DC converter obtains the constant cycle time of the infrared refrigerator and determines the interval between the peak and valley currents of the infrared refrigerator. Based on the synchronization trigger signal sent by the infrared cooling control unit, the fifth DC-DC converter increases the output voltage duty cycle before the peak current of the infrared refrigerator arrives and decreases the output voltage duty cycle before the valley current arrives. Through active suppression of infrared refrigerator interference, the supplied current matches the demand current, reducing voltage fluctuations on the bus and thus reducing electromagnetic interference to the surrounding environment.
[0071] Example: (1) The first EMI filter and surge suppressor, the first DC-DC converter, the second EMI filter and surge suppressor, the second DC-DC converter, the third EMI filter and surge suppressor, the third DC-DC converter, the fourth EMI filter and surge suppressor, the fourth DC-DC converter, the fifth EMI filter and surge suppressor, and the fifth DC-DC converter are all self-made EMI filters, surge suppressors, and DC-DC modules from Institute 510; (2) The controller is an FPGA (K7-325T) from Fudan Microelectronics, the driver is a power chip and driver from Beijing Shengyu, and the video processor is a video processor from STMicroelectronics. (3) The infrared detector is selected from the 11th Research Institute of China Electronics Technology Group Corporation, and the power supply bias circuit is selected from the LDO of Hangxinyuan Company and the operational amplifier of American AD Company; (4) The infrared refrigerator is selected from the 510th Research Institute; (5) The focusing motor is selected from the 21st Research Institute of Shanghai; (6) The focusing motor driver, opto-isolator, blackbody heating driver and infrared refrigerator driver are mainly selected from the products of Beijing Shengyu Company; (7) The blackbody is selected from the products of Anhui Institute of Optics and Fine Mechanics; (8) The infrared cooling control unit is selected from the anti-fuse FPGA of Actel Company; (9) The infrared control unit is selected from the DSP chip of National University of Defense Technology and the FPGA of Shanghai Fudan Microelectronics Company.
[0072] The beneficial effects of this invention are: 1. The infrared imaging focal plane is split into two independent parts, and the power-on and power-off of these two parts are independently controlled by the infrared control unit, and corresponding power-on and power-off strategies are designed. In this way, the controller is in a short-term working state, and there is no need to worry about the single-particle flip state that may occur during continuous operation.
[0073] 2. Compared with the infrared focal plane control infrared cooling machine scheme, when the infrared focal plane updates the image or a single particle flip occurs in the non-refreshable part of the controller, the imaging can be performed immediately after reloading the program without recalibration or waiting for the infrared detector to reach thermal equilibrium again, which can provide the ability to respond quickly in special periods.
[0074] 3. Before each restart of the infrared cooler, the infrared detector and power supply bias section are in a powered-off state. The infrared detector is only powered on after it reaches the expected temperature. This reduces the cooling capacity of the infrared cooler and avoids the infrared detector from having a large current at high temperatures when it is not at low temperatures, which would increase the heat and power consumption of the infrared detector.
[0075] 4. The high-impedance analog video signal output by the infrared detector is impedance transformed using a follower and driven by a differential operational amplifier to avoid damage to the infrared detector caused by excessively low impedance at the receiving end; using differential driving can increase the effective quantization bits of the differential analog-to-digital converter; setting a matching gain for the differential analog-to-digital converter ensures the maximum dynamic range and avoids the received signal amplitude being too low or entering saturation too early.
[0076] 5. The infrared control unit adopts a scheme of periodically reloading to avoid single-event accumulation; the focusing motor driver and focusing motor are only powered on when focusing is needed, and are normally in a de-energized state, so that even if a single-event event occurs, it will not cause the focusing motor to malfunction; the blackbody heating driver and blackbody are only powered on when calibration is needed, and are normally in a de-energized state, so that even if a single-event event occurs, it will not cause the blackbody to be malfunctioning.
[0077] 6. The infrared imaging system uses three independent primary buses for power supply, corresponding to the power supply of the focal plane, the power supply of the control and focusing and blackbody parts, and the power supply of the cooling unit, respectively. This can avoid interference with the sensitive information of the focal plane and improve the signal-to-noise ratio of the output image.
[0078] 7. The controller provides low-jitter clocks for the differential analog-to-digital converter and the infrared detector, which can reduce sampling jitter during the analog-to-digital conversion process and improve the signal-to-noise ratio of the output image; the average of multiple sampling of the analog video signal can reduce the noise of the output image, and subtracting the average signal of each line blanking period can reduce the line response deviation.
[0079] 8. Performing non-uniform correction on-orbit before image compression can improve the compression ratio of lossless images, thereby improving transmission efficiency; delaying and stitching the odd and odd pixels output by the infrared detector can avoid misalignment of the output image, and the target can be detected, identified and interpreted immediately after the image is downloaded.
[0080] 9. Based on the feedforward control of the infrared refrigerator drive signal, the DC-DC converter can predict the moment when the current will start to increase or decrease sharply according to the information fed back by the infrared refrigerator, thereby increasing or decreasing the duty cycle of the output in advance, thus reducing the voltage fluctuation on the input primary bus and reducing the interference to the focal plane imaging circuit.
[0081] It should be understood that the various forms of processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this invention disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this invention can be achieved, and this is not limited herein.
[0082] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. An infrared imaging system with high imaging quality and high working efficiency, characterized in that, It includes a first power supply module, a second power supply module, a third power supply module, an infrared imaging focal plane, an infrared control unit, a first opto-isolator, a second opto-isolator, a focusing assembly, a blackbody assembly, and a cooling assembly; among which, The first power supply module includes a first EMI filter and surge suppressor and a first DC-DC converter. The first primary power supply bus input from the outside passes through the first EMI filter and surge suppressor and the first DC-DC converter in sequence to supply power to the infrared imaging focal plane. The infrared imaging focal plane includes physically separate imaging control and drive and video processing parts, infrared detectors and power supply bias parts. The power supply for the imaging control and drive and video processing parts, infrared detectors and power supply bias parts is provided by the first power supply module and is independently controlled by the infrared control unit. The second power supply module includes a second EMI filter and surge suppressor, a second DC-DC converter, a third EMI filter and surge suppressor, and a third DC-DC converter. The externally input second primary power supply bus is divided into two paths. One path passes through the second EMI filter and surge suppressor and the second DC-DC converter in sequence to supply power to the control terminals of the infrared control unit, focusing assembly, and first opto-isolator. The other path passes through the third EMI filter and surge suppressor and the third DC-DC converter in sequence to supply power to the receiving part of the first opto-isolator and the blackbody assembly. The third power supply module includes a fourth EMI filter and surge suppressor, a fourth DC-DC converter, a fifth EMI filter and surge suppressor, and a fifth DC-DC converter. The externally input third primary power supply bus is divided into two paths. One path passes through the fourth EMI filter and surge suppressor and the fourth DC-DC converter in sequence to supply power to the control part of the cooling component and the control terminal of the second opto-isolator. The other path passes through the fifth EMI filter and surge suppressor and the fifth DC-DC converter in sequence to supply power to the drive part of the cooling component and the receiving part of the second opto-isolator. The infrared control unit generates focusing drive signals, blackbody heating control signals, imaging control and drive and video processing section power supply control signals, infrared detector and power supply bias section power supply control signals, and blackbody power supply control signals. The focusing drive signal drives the focusing assembly. The blackbody temperature control signal controls the temperature of the blackbody assembly after passing through the first opto-isolator. The imaging control and drive and video processing section power supply control signals and the infrared detector and power supply bias section power supply control signals control the first DC-DC converter, enabling power-on / off control of the imaging control and drive and video processing section, and the infrared detector and power supply bias section. The blackbody power supply control signal controls the third DC-DC converter, enabling power-on / off control of the blackbody assembly. The infrared control unit also communicates with the infrared imaging focal plane and the cooling component via a 422 bus to obtain focal plane information and cooling information, and controls the infrared imaging focal plane and the cooling component respectively.
2. The infrared imaging system with high imaging quality and high working efficiency according to claim 1, characterized in that, The cooling assembly includes an infrared cooling control unit, an infrared cooling driver, and an infrared cooling unit. The infrared cooling drive signal generated by the infrared cooling control unit is sent to the infrared cooling driver after passing through the second opto-isolator to drive the infrared cooling unit. The infrared cooling control unit communicates with the infrared control unit via a 422 bus. The infrared cooling control unit, the infrared cooling driver, the infrared cooling unit, and the second opto-isolator all operate in a continuously powered-on state.
3. The infrared imaging system with high imaging quality and high working efficiency according to claim 1, characterized in that, The focusing assembly includes a focusing motor driver and a focusing motor. The focusing drive signal generated by the infrared control unit is sent to the focusing motor driver to drive the focusing motor. The focusing motor driver and the focusing motor are powered on only by the second DC-DC converter during focusing.
4. The infrared imaging system with high imaging quality and high working efficiency according to claim 3, characterized in that, The blackbody assembly includes a blackbody heating driver and a blackbody. The blackbody temperature control signal generated by the infrared control unit is sent to the blackbody heating driver after passing through the first opto-isolator to control the temperature of the blackbody. The blackbody heating driver and the blackbody are only powered on by the third DC-DC converter controlled by the infrared control unit during calibration.
5. The infrared imaging system with high imaging quality and high working efficiency according to claim 2, characterized in that, The infrared detector and power supply bias section includes an infrared detector and a power supply bias circuit. The infrared detector is used to convert the infrared radiation signal of the target scene into an analog electrical signal; the power supply bias circuit is used to provide a stable bias voltage for the infrared detector.
6. The infrared imaging system with high imaging quality and high working efficiency according to claim 5, characterized in that, The power supply control strategy of the infrared control unit for the imaging control and drive and video processing section and the infrared detector and power supply bias section is as follows: when the infrared cooler cools the infrared detector to the expected operating temperature, the infrared control unit controls the first DC-DC converter to supply power to the infrared detector and power supply bias section; when the infrared imaging system starts the camera task, the infrared control unit controls the first DC-DC converter to supply power to the imaging control and drive and video processing section; when the camera task ends, the infrared control unit controls the first DC-DC converter to cut off the power supply to the imaging control and drive and video processing section, and only maintains the power supply to the infrared detector and power supply bias section.
7. The infrared imaging system with high imaging quality and high working efficiency according to claim 5, characterized in that, The power supply design of the power supply bias circuit is as follows: for loads with a sourcing current greater than the threshold current, the power supply bias circuit uses a low-dropout regulator to supply power to the load; for loads with a sourcing current and / or sink current less than the threshold current, the power supply bias circuit uses a power supply method consisting of a reference voltage source, a low-pass filter, and an operational amplifier follower connected in series to supply power to the load.
8. The infrared imaging system with high imaging quality and high working efficiency according to claim 6, characterized in that, The imaging control and drive and video processing section includes a controller, a driver, and a video processor. The controller provides drive control signals to the infrared detector. The driver converts the drive control signals output by the controller into drive control signals that the infrared detector can receive. The video processor receives the analog video signals returned by the infrared detector and converts them into digital image data for output.
9. The infrared imaging system with high imaging quality and high working efficiency according to claim 8, characterized in that, The infrared detector and power supply bias section operate in a continuously powered-on state. The infrared control unit operates in a continuously powered-on state and its program is periodically reloaded. The infrared control unit determines whether the infrared detector and the power supply bias section are powered on by detecting whether the infrared detector and the power supply bias section return telemetry voltage to the infrared control unit. The infrared control unit determines whether the controller is powered on by detecting the signal status after the controller's loading configuration is completed; The power-on status of the controller is obtained by acquiring the power-on status of the 422 bus to determine whether the driver and video processor are powered on.
10. The infrared imaging system with high imaging quality and high working efficiency according to claim 8, characterized in that, The video processor includes a follower, a differential operational amplifier, and a differential analog-to-digital converter (ADC). The analog video signal returned from the infrared detector first undergoes impedance transformation via the follower, then is converted into a differential signal by the differential operational amplifier before being sent to the differential ADC for analog-to-digital conversion. The output amplitude of the analog video signal is A, the range of the differential ADC is B, and the top reference voltage is V. refp The common-mode level of the input signal is V. incm The gain G of the differential operational amplifier satisfies G=B / A, and B=2 (V refp -V incm The common-mode level of the differential operational amplifier output signal and the common-mode level V of the differential analog-to-digital converter input signal. incm same.
11. The infrared imaging system with high imaging quality and high working efficiency according to claim 10, characterized in that, The controller provides a clock frequency of f for the differential analog-to-digital converter. sample The input clock, the controller provides a clock frequency of f to the infrared detector. sensor The input clock, and satisfying f sample =n×f sensor Where n is a positive integer greater than 3; When the distance between the differential analog-to-digital converter and the controller does not exceed the threshold distance, the input clock of the differential analog-to-digital converter adopts a single-ended form; When the distance between the differential analog-to-digital converter and the controller exceeds the threshold distance, the input clock of the differential analog-to-digital converter adopts a differential form; When the distance between the infrared detector and the controller exceeds the threshold distance and the clock frequency f sensor When the frequency does not exceed 5MHz, the infrared detector outputs an analog video signal in a single-ended manner; When the distance between the infrared detector and the controller exceeds the threshold distance and the clock frequency f sensor When the frequency exceeds 5MHz, the infrared detector outputs analog video signals in a differential manner.
12. The infrared imaging system with high imaging quality and high working efficiency according to claim 10, characterized in that, The sampling and processing steps of the video processor for analog video signals are as follows: (1) Adjust the sampling clock phase fed into the video processor, count the number of valid sampling edges of the sampling clock entering the flat region of the analog video signal, and select the phase with the most valid sampling edges as the optimal sampling phase, wherein the number of valid sampling edges m under the optimal sampling phase satisfies 1 <m<n; (2) Under the optimal sampling phase, the analog video signal output by the infrared detector is sampled n times. Based on the delay coefficient r of the analog-to-digital converter in the video processor and the relative position p of the first valid sampling edge among the m sampling edges, m adjacent sample values are selected. The relative position of the first sample value among the m sample values is r+p. The average of the m sample values is accumulated to obtain the multi-sample average value DN of each pixel. sample ; (3) During the blanking phase of each row of image data, calculate the multi-sample average value DN of the signal during the blanking phase of each row according to the method in steps (1)-(2). blank The final output DN value for each pixel final =DN sample -DN blank .
13. The infrared imaging system with high imaging quality and high working efficiency according to claim 12, characterized in that, The infrared detector uses an interlaced stitching method to expand the field of view. The pixel size of each pixel is j. The spacing between all odd-numbered rows of pixels and between even-numbered rows of pixels is 2j. The spacing between the photosensitive pixels in the odd-numbered channels and the corresponding photosensitive pixels in the even-numbered channels is 5u+v. The number of rows that the photosensitive pixels in the even-numbered channels lag behind the photosensitive pixels in the odd-numbered channels is z=(5u+v) / j. Where u represents the basic offset unit of the pixel in the direction of pixel exposure timing (i.e., the default TDI direction), and v represents the additional offset between pixels in the odd-numbered channels and pixels in the even-numbered channels.
14. The infrared imaging system with high imaging quality and high working efficiency according to claim 12, characterized in that, The video processor also includes a calibration selection switch, a ping-pong structure buffer, and a z+1 structure buffer; among which, The image data input from the even-numbered channels is averaged after multiple sampling, the mean value of the line blanking period is deducted, and non-uniform correction is applied. Then, it is sent together with the image data before correction from the even-numbered channels to the correction selection switch for selection and output. The image data output from the correction selection switch is buffered by a ping-pong structure buffer and then output. The image data output from the ping-pong structure buffer is delayed by 1 line time relative to the image data input from the even-numbered channels. The image data input from the odd-numbered channels is averaged after multiple sampling, the mean of the line blanking period is deducted, and non-uniform correction is applied. Then, it is sent together with the image data before correction of the odd-numbered channels to the correction selection switch for selection output. The image data output from the correction selection switch is buffered by a z+1 structure buffer before being output. The image data output from the z+1 structure buffer is delayed by z+1 line time relative to the image data input from the odd-numbered channels.
15. The infrared imaging system with high imaging quality and high working efficiency according to claim 2, characterized in that, The fifth DC-DC converter obtains the constant cycle time of the infrared refrigerator and determines the interval between the peak current and the valley current of the infrared refrigerator. The fifth DC-DC converter increases the output voltage duty cycle before the peak current of the infrared refrigerator arrives, and decreases the output voltage duty cycle before the valley current of the infrared refrigerator arrives, based on the synchronous trigger signal sent by the infrared cooling control unit.