Stabilized power supply device

Abstract

The invention provides a stabilized power supply device which reduces response delay of a feedback signal in a current stabilization circuit, shortens build-up time of an output voltage, and reduces undershoot of the output voltage. This stabilized power supply device is provided with a switching power supply device (20) and a current stabilization circuit (10) connected to the preceding stage or the following stage of the switching power supply device, and converts a DC input voltage supplied from a DC power supply and outputs a stabilized DC voltage, said current stabilization circuit being provided with: a current control transistor (M1) for controlling the current of the switching power supply device (20); a plurality of terminals connected in series between the input terminal and the output terminal; a low pass filter (LPF) connected to the output terminal; an operational amplifier circuit (AMP) that controls the current control transistor on the basis of the potential difference between a predetermined voltage and a feedback voltage (FB) that is output and fed back via the low-pass filter; and amplitude limiting circuits (D1, D2) that limit the amplitude range of the feedback voltage.

Description

Technical Field

[0001] This invention relates to a stabilized power supply device for supplying a stable DC voltage to a load, and for example to an effective technique for improving the transient characteristics of a DC power supply. Background Technology

[0002] In systems like dashcams that supply DC voltage from a battery to a load via a relatively long power cable, a switching power supply (DC-DC converter) is installed on the device side to prevent voltage drop and ensure good efficiency. However, in systems where current is supplied from the battery to the switching power supply via a long power cable, radiated noise is emitted from the power cable during switching operations, posing a potential problem of adversely affecting other electronic devices such as television receivers. This radiated noise is caused by the drastic fluctuations in current flowing through the power cable due to the switching operations in the DC-DC converter.

[0003] Therefore, the applicant has filed and previously applied for a DC power supply device (see reference). Figure 8 According to the related invention, the DC power supply device is connected to a current stabilization circuit in the front stage of the switching power supply device. The current stabilization circuit includes: a low-resistance element and a current control transistor connected in series between the current input terminal and the current output terminal; a low-pass filter connected to the current output terminal; and an operational amplifier that controls the current control transistor to make a constant current flow through the transistor when the load changes drastically.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2023-156011 Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] In the DC power supply device described in Patent Document 1, the response delay of the feedback signal (voltage) in the current stabilization circuit is relatively large, resulting in a longer output voltage setting time and a larger output voltage undershoot, indicating room for improvement. Furthermore, the current control transistor constituting the current stabilization circuit uses a bipolar transistor, and the current sensing resistor is connected in series with this transistor, resulting in significant power loss. Moreover, since the current control transistor is driven by an amplifier that uses the voltage converted from the current sensing resistor and the output feedback signal as inputs, the loop stability is poor and prone to oscillation. Additionally, it is known that when the input voltage decreases, the output voltage easily falls below the minimum operating voltage of the load, again indicating room for improvement.

[0009] The present invention was made with regard to the above-mentioned problems, and its object is to provide a power supply stabilization device that can reduce the response delay of the feedback signal in the current stabilization circuit, shorten the settling time of the output voltage, and reduce the undershoot of the output voltage.

[0010] Another objective of the present invention is to reduce power loss in the current stabilization circuit of a power supply device equipped with a current stabilization circuit, thereby reducing costs and improving loop stability.

[0011] Methods for solving problems

[0012] To achieve the above objectives, the present invention provides a power stabilization device comprising a switching power supply device and a current stabilization circuit connected to the front or rear stage of the switching power supply device, which converts a DC input voltage supplied from a DC power source to output a stable DC voltage. The current stabilization circuit comprises: a current control transistor connected in series between an input terminal and an output terminal; a low-pass filter connected to the output terminal; an operational amplifier circuit that controls the current control transistor based on the potential difference between a feedback voltage fed back from the low-pass filter and a predetermined voltage; and an amplitude limiting circuit that limits the amplitude range of the feedback voltage.

[0013] According to the stabilized power supply device with the structure described above, the current stabilization circuit includes an amplitude limiting circuit that limits the amplitude range of the feedback voltage fed back to the input terminal of the operational amplifier circuit (operational amplifier) ​​via a low-pass filter. Therefore, it can reduce the response delay of the feedback signal, shorten the settling time of the output voltage, and reduce output voltage overshoot. Furthermore, since the power supply device is composed of a switching power supply device and a current stabilization circuit, the current stabilization circuit can absorb and reduce noise generated in the switching power supply device.

[0014] Invention Effects

[0015] The power supply stabilization device according to the present invention has the following effects: it can reduce the response delay of the feedback signal in the current stabilization circuit, shorten the settling time of the output voltage, and reduce the undershoot of the output voltage. Attached Figure Description

[0016] Figure 1 This is a structural block diagram illustrating one embodiment of the stabilized power supply device of the present invention.

[0017] Figure 2 It indicates composition Figure 1 The circuit structure diagram of the first embodiment of the current stabilization circuit of the power supply stabilization device.

[0018] Figure 3 This is a circuit structure diagram illustrating a specific example of a constant voltage source constituting the stabilized power supply device of the embodiment.

[0019] Figure 4 The graphs showing the frequency characteristics of the gain and phase of the existing current stabilization circuit and the current stabilization circuit of the embodiment are shown below. (A) is the frequency characteristic graph of the existing current stabilization circuit, and (B) is the frequency characteristic graph of the current stabilization circuit of the embodiment.

[0020] Figure 5 The waveforms in the current stabilization circuit are shown to differ between the case where a diode for amplitude limiting of the feedback signal is not set and the case where a diode is set. (A) is the waveform diagram without a diode, and (B) is the waveform diagram with a diode set.

[0021] Figure 6 This is a circuit structure diagram representing a second embodiment of the current stabilization circuit.

[0022] Figure 7 (A) is a circuit diagram showing the amplitude limiting circuit of the FB voltage constituting the current stabilization circuit of the third embodiment, and (B)-(D) are circuit diagrams showing modified examples of the amplitude limiting circuit.

[0023] Figure 8 This is a circuit diagram showing an example of an existing current stabilization circuit. Detailed Implementation

[0024] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

[0025] Figure 1 This shows a schematic structure of the stabilized power supply device of the present invention.

[0026] Figure 1 The stabilizing power supply device consists of a current stabilizing circuit 10 and a switching power supply device, namely a DC-DC converter 20, connected to the subsequent stage of the current stabilizing circuit 10. A voltage from a DC power supply 30, such as a battery, is input to the input terminal IN1 of the current stabilizing circuit 10. The output terminal OUT1 of the current stabilizing circuit 10 is connected to the input terminal IN2 of the DC-DC converter 20, and the output terminal OUT2 of the DC-DC converter 20 is connected to the load RL.

[0027] In the case where the stabilizing power supply device of this embodiment is used as a power supply device to supply power voltage to vehicle-mounted electronic devices, it can also be configured such that the current stabilizing circuit 10 and the DC power supply 30 are connected by a cable.

[0028] In addition, although there are no particular restrictions, when the current stabilization circuit 10 and the DC-DC converter 20 are mounted on a substrate such as a printed wiring substrate, the current stabilization circuit 10 and the DC-DC converter 20 can also be configured to be connected by power lines formed by printed wiring patterns formed on the substrate.

[0029] (First Embodiment)

[0030] Figure 2 This describes a first embodiment of the current stabilization circuit 10 that constitutes the stabilization power supply device of this embodiment.

[0031] like Figure 2 As shown, the current stabilization circuit 10 of this embodiment includes: a current control transistor M1, which is composed of a P-channel MOS transistor disposed between the input terminal IN1 and the output terminal OUT1; an operational amplifier (operational amplifier circuit) AMP, which controls the transistor M1; and a constant voltage source CVS1, which is connected between the input terminal IN1 and the inverting input terminal (-) of the operational amplifier AMP, generating a voltage Vref1 applied to the inverting input terminal. The constant voltage source CVS1 generates a voltage Vref1 that keeps the current control transistor M1 operating under the constant pressure of the operational amplifier AMP.

[0032] In addition, in the current stabilization circuit 10 of this embodiment, a capacitor C4 for loop stabilization is connected between the inverting input terminal (-) and the output terminal OUT1 of the operational amplifier AMP.

[0033] Furthermore, the current stabilization circuit 10 includes: a noise reduction capacitor C1 connected between the input terminal IN1 and the ground point; and a low-pass filter LPF disposed between the output terminal OUT1 and the non-inverting input terminal (+) of the operational amplifier AMP. Additionally, a smoothing capacitor C3 is connected between the output terminal OUT1 and the ground point to stabilize the voltage at the output terminal OUT1. The smoothing capacitor C3 may also be disposed outside the current stabilization circuit 10, or between the input terminal IN2 of the subsequent DC-DC converter 20 and the ground point.

[0034] The aforementioned low-pass filter LPF consists of a resistor R2 connected between the output terminal OUT1 of the current stabilization circuit 10 and the non-inverting input terminal (+) of the operational amplifier AMP, and a capacitor C2 connected between the non-inverting input terminal (+) of the operational amplifier AMP and ground. Its time constant is set such that it removes high-frequency components in the voltage fluctuation of the current output terminal OUT1 that correspond to the switching frequency of the subsequent DC-DC converter 20, while allowing low-frequency components corresponding to the servo band (servo control frequency) of the DC-DC converter 20 to pass through. Therefore, the low-pass filter LPF operates in such a way that it only transmits voltage fluctuations at the output terminal OUT1 associated with the servo control of the subsequent DC-DC converter 20 to the operational amplifier AMP, and does not transmit voltage fluctuations at the current output terminal OUT1 associated with the switching control to the operational amplifier AMP.

[0035] Furthermore, in the current stabilization circuit 10 of this embodiment, diode D1, which is forward-biased from the output terminal OUT1 toward the non-inverting input terminal (+) of the operational amplifier AMP, and diode D2, which is forward-biased from the non-inverting input terminal (+) of the operational amplifier AMP toward the output terminal OUT1, are connected in parallel with resistor R2, which constitutes the low-pass filter LPF. Diodes D1 and D2 can be constructed using general PN junction diodes, but as described later, they can also be constructed using MOS transistors. According to the above structure, the amplitude range of the feedback signal (voltage) FB fed back from the output terminal OUT1 to the non-inverting input terminal (+) of the operational amplifier AMP can be limited by the forward voltage of diodes D1 and D2.

[0036] Additionally, the constant voltage source CVS1 that generates the voltage Vref1 applied to the input terminal of the operational amplifier AMP can also be located on the non-inverting input terminal (+) side of the operational amplifier AMP (see reference). Figure 8 However, as in this embodiment, by placing the voltage source on the inverting input terminal (-) side of the operational amplifier AMP, compared to placing it on the non-inverting input terminal (+) side, a simpler circuit can be constructed, which has the advantage of reducing the occupied area. Specifically, as... Figure 3 As shown, the constant voltage source CVS1 located on the inverting input terminal (-) side can be composed of a resistor R3 connected in series between the input terminal IN1 and the ground point and a constant current source CCS.

[0037] Next, an explanation and Figure 8 The differences between the existing current stabilization circuits shown and this embodiment ( Figure 2 Advantages of the current stabilization circuit 10.

[0038] First, in the existing current stabilization circuit ( Figure 8In the previous embodiment, a bipolar transistor (BPT) was used as the current control transistor Q1, and a resistor R1 of approximately 10Ω was connected between the input terminal IN and the current control transistor Q1 to suppress noise. In contrast, in the current stabilization circuit 10 of this embodiment, a MOS transistor was used as the current control transistor, and no resistor was provided between the input terminal IN1 and the current control transistor M1. By eliminating the resistor connected in series with M1, the number of components can be reduced, thereby lowering the cost, and the power loss in the resistor (R1) can be eliminated, thereby improving power efficiency.

[0039] As a second difference, in this embodiment ( Figure 3 In the current stabilization circuit 10, a capacitor C4 is connected between the inverting input terminal (-) and the output terminal OUT1 of the operational amplifier AMP, which controls the current control transistor M1. In contrast, in conventional current stabilization circuits... Figure 8 Such a capacitor is not provided in the system.

[0040] Figure 4 This shows the frequency response of the operational amplifier's gain and phase when the load of the current stabilization circuit is set to 5A, without capacitor C4, and with capacitor C4 (1μF). Additionally, Figure 4 (A) is a diagram showing the case without capacitor C4, and (B) is a diagram showing the case with capacitor C4. Additionally, in Figure 4 In the diagram, the solid line represents the frequency response of the gain, and the dashed line represents the frequency response of the phase. (Comparison) Figure 4 As can be seen from (A) and (B), the first pole P1 of the gain characteristic of (B) with capacitor C4 is shifted to the low frequency region, thus the stability of the loop is improved and the circuit is less prone to oscillation.

[0041] As a third difference, in this embodiment ( Figure 3 In the current stabilization circuit 10, diodes D1 and D2, which limit the amplitude range of the feedback signal FB, are connected in parallel with resistor R2, which constitutes the low-pass filter LPF. In contrast, in existing current stabilization circuits... Figure 8 Such a diode is not provided in the ( ).

[0042] Figure 5 This represents the waveform of the output voltage when the input voltage rises from 7V to 36V at time t1 and then drops back to 7V at time t2. Additionally, Figure 5 Diagram (A) shows the case without diodes D1 and D2, and diagram (B) shows the case with diodes D1 and D2. Additionally, in... Figure 5In the diagram, (b) shows a magnified view of the waveform in (a) within the voltage range of 35V to 36V, and (c) shows a magnified view of the waveform in (a) within a range of 0.9 ± 0.02 s around time t2. Additionally, the solid line represents the input voltage waveform, and the dashed line represents the output voltage waveform.

[0043] according to Figure 5 It can be seen that, compared with the case where diodes D1 and D2 are not set, the undershoot US is smaller and the setup time ST is shorter when diodes D1 and D2 are set.

[0044] (Second Embodiment)

[0045] Figure 6 This illustrates a second embodiment of the current stabilization circuit 10 that constitutes the stabilization power supply device of the present invention.

[0046] The current stabilization circuit 10 in this embodiment has the following function: It is used in the vehicle system... Figure 1 In the case of the stabilized power supply device shown, the risk of load disconnection is reduced due to the voltage drop from the battery input to the input terminal IN1 caused by the engine starting up, etc., resulting in the voltage at the output terminal OUT1 being lower than the minimum operating voltage of the load.

[0047] Specifically, the current stabilization circuit 10 of this embodiment includes: a comparator (voltage comparator) CMP, which compares the voltage at the input terminal IN1 with the voltage Vref2 from the constant voltage source CVS2, and detects when the voltage at the input terminal IN1 is below Vref2; and a P-channel MOS transistor M3, which is connected between the input terminal IN1 and the inverting input terminal (-) of the operational amplifier AMP. Furthermore, the transistor M3 operates as a switching element that is turned on and off by the output of the comparator CMP.

[0048] In addition, this embodiment ( Figure 6 The current stabilization circuit 10 includes an inverter INV that inverts the output of the comparator CMP, and an N-channel MOS transistor M4 connected between the gate terminal of the current control transistor M1 and ground. Furthermore, the transistor M4 operates as a switching element that is turned on and off by the output of the inverter INV. Alternatively, the transistor M4 can also be a MOS transistor constituting the output stage of the operational amplifier AMP. That is, it can be configured such that the output of the operational amplifier AMP changes to a low level "L" when the voltage at the input terminal IN1 decreases, via the output of the comparator CMP (including the inverter INV).

[0049] In the current stabilization circuit 10 of this embodiment having the above structure, under normal operating conditions, both MOS transistors M3 and M4 are turned off, unlike the first embodiment described above. Figure 6 The current stabilization circuit operates similarly. On the other hand, when the comparator CMP detects that the voltage at the input terminal IN1 is below Vref2, the output of the comparator CMP changes from a high level "H" to a low level "L", and both MOS transistors M3 and M4 become turned on.

[0050] As a result, the gate voltage of the current control transistor M1 drops to ground potential, M1 becomes fully conductive, and the voltage at the output terminal OUT1 is equal to the voltage at the input terminal IN1. Consequently, the risk of the load disconnecting due to the output terminal OUT1 voltage falling below the minimum operating voltage of the load can be mitigated.

[0051] Furthermore, even in the current stabilization circuit 10 of this embodiment, the constant voltage source CVS1 can be placed on the non-inverting input terminal (+) side instead of the inverting input terminal (-) side of the operational amplifier AMP. In this case, the MOS transistor M3 is not required. Additionally, when the constant voltage source CVS1 is placed on the non-inverting input terminal (+) side of the operational amplifier AMP, by adjusting the voltage input to the inverting input terminal (-) and non-inverting input terminal (+) of the comparator CMP, the voltage is equal to the voltage input to the inverting input terminal (-) and non-inverting input terminal (+) of the comparator CMP. Figure 5 The circuit is the opposite, and the inverter INV can also be omitted.

[0052] (Third Embodiment)

[0053] exist Figure 7 (A) shows a third embodiment of the current stabilization circuit 10. Additionally, Figure 7 (B)-(D) show its variant examples.

[0054] like Figure 7 As shown in (A), the current stabilization circuit 10 of the third embodiment is connected in parallel with the resistor R2 that constitutes the low-pass filter LPF, and the diodes D1 and D2 used to limit the amplitude of the feedback signal FB are MOS transistors connected in a so-called diode manner.

[0055] Specifically, the drain-source channel of the N-channel MOS transistor M2, connected to the output terminal OUT via its gate and drain terminals, functions as a diode D1 whose direction towards the non-inverting input terminal of the operational amplifier AMP is forward-biased, controlled by the gate voltage. Furthermore, a body diode Ds present in the MOS transistor M2 functions as a diode D2, which is reverse-biased from diode D1. This structure reduces the number of components constituting the current stabilization circuit 10 and decreases the mounting area.

[0056] exist Figure 7In the variations shown in (B) to (D), the variation in (B) is configured such that the function of diode D2 is realized through the channel between the drain and source of the N-channel MOS transistor M2, which is connected to the non-inverting input terminal of the operational amplifier AMP via the gate terminal and the drain terminal, and the function of diode D1 is realized through the body diode Ds of the MOS transistor M2.

[0057] Figure 7 In a modified example of (C), the body diode Ds of the P-channel MOS transistor M2, which is connected to the output terminal OUT via the gate and drain terminals, functions as a diode D1 that is forward-biased toward the non-inverting input terminal of the operational amplifier AMP, and the channel between the drain and source of the MOS transistor M2 functions as a diode D2 that is reverse-biased from D1.

[0058] in addition, Figure 7 A modified example of (D) is configured such that the function of diode D1 is realized through the drain-source channel of P-channel MOS transistor M2, which is connected to the non-inverting input terminal of operational amplifier AMP via the gate terminal and the drain terminal, and the function of diode D2 is realized through the body diode Ds of MOS transistor M2.

[0059] The invention made by the inventors has been specifically described above based on the embodiments, but the invention is not limited to the above embodiments. For example, in the above embodiments, a MOS transistor is shown as the current control transistor constituting the current stabilization circuit 10, but a bipolar transistor may be used instead of a MOS transistor.

[0060] Furthermore, in the stabilization power supply device of the above embodiment, the case where the current stabilization circuit 10 is provided in the front stage of the DC-DC converter 20, which is a switching power supply device, has been described. However, the current stabilization circuit 10 may also be provided in the rear stage of the DC-DC converter 20.

[0061] Moreover, regarding the third embodiment, as Figure 7 As shown in (A)-(D), instead of diodes D1 and D2 in a single MOS transistor M2 to limit the amplitude of the FB voltage, a MOS transistor with two diodes connected in opposite directions can be used.

[0062] Explanation of reference numerals in the attached figures

[0063] 10… Current stabilization circuit, 20… DC-DC converter (switching power supply device), 30… Battery, AMP… Operational amplifier, LPF… Low-pass filter, CVS1, CVS2… Constant voltage source, M1… Transistor for current control, D1, D2… Diodes for amplitude limiting of feedback signal, CMP… Comparator.

Claims

1. A stabilizing power supply device, comprising a switching power supply device and a current stabilizing circuit connected to the front or rear stage of the switching power supply device, for converting a DC input voltage supplied from a DC power source to output a stable DC voltage, characterized in that, The current stabilization circuit has the following characteristics: A current-controlled transistor is connected in series between the input and output terminals; A low-pass filter is connected to the output terminal; An operational amplifier circuit controls the current control transistor based on the potential difference between the feedback voltage of the output fed back from the low-pass filter and a predetermined voltage; and An amplitude limiting circuit limits the amplitude range of the feedback voltage.

2. The power stabilization device according to claim 1, characterized in that, The low-pass filter includes: a resistive element disposed between the output terminal and an input terminal of the operational amplifier circuit; and a capacitor element connected between a terminal opposite to the input terminal of the operational amplifier circuit of the resistive element and a constant potential point. The amplitude limiting circuit consists of a first rectifier element and a second rectifier element connected in parallel with the resistive element. The first rectifier element and the second rectifier element each have a positive voltage and are connected in a manner where the rectification directions are opposite to each other.

3. The power stabilization device according to claim 2, characterized in that, The first rectifier element is a diode-connected MOS transistor, and the second rectifier element is the body diode of the MOS transistor.

4. The power stabilization device according to claim 2, characterized in that, The current control transistor is connected between the input terminal and the output terminal without a resistor.

5. The stabilizing power supply device according to claim 4, characterized in that, A capacitor is connected between the inverting input terminal and the output terminal of the operational amplifier circuit.

6. The stabilizing power supply device according to any one of claims 1 to 5, characterized in that, The stabilized power supply device has the following features: A switching element is connected between the control terminal of the current-controlling transistor and the ground point; and The voltage comparison circuit compares the input terminal with a specified threshold voltage. When the voltage comparison circuit detects that the voltage at the input terminal is lower than the threshold voltage, the switching element is turned on and the current control transistor is turned on according to the output signal of the voltage comparison circuit.

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