Switch transconductance type low flicker noise down-conversion mixer circuit

Abstract

The invention discloses a switch transconductance type low-flicker noise down-conversion mixer circuit which comprises a switch stage, a transconductance stage and a radio frequency input matching network. The switch stage consists of a PMOS (P-channel Metal Oxide Semiconductor) tube and an NMOS (N-channel Metal Oxide Semiconductor) tube which are complementary, and periodically switches a conducting state under the driving of a differential local oscillator signal The transconductance stage adopts a cross coupling differential structure, and a transient coupling network is formed through a coupling capacitor and a bias resistor, so that drain-source direct current of a transconductance transistor is zero, and flicker noise is inhibited from the source; residual noise is symmetrically modulated to odd harmonics of the local frequency under the turning effect of the switch, and is far away from the intermediate frequency output frequency band; and the radio frequency input matching network realizes 50-ohm impedance matching and bandwidth optimization. While low power consumption is maintained, the flicker noise of the intermediate frequency output end is remarkably reduced, the flicker noise inflection point frequency can be reduced to below 10 Hz, and the method is suitable for a direct frequency conversion receiver architecture.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of radio frequency integrated circuits, and particularly relates to a low-flicker-noise down-conversion mixer based on a switching transconductance structure applied to a wireless communication system, and particularly suitable for a direct conversion receiver architecture. BACKGROUND

[0002] With the continuous reduction of the channel length of advanced CMOS process, the flicker noise corner frequency of the transistor rises, often exceeding 1-5 MHz, seriously affecting the performance of the direct conversion architecture in the low intermediate frequency, zero intermediate frequency receiving system (such as Bluetooth, ZigBee, WiFi-7). Although the traditional Gilbert active mixer has high conversion gain, it has defects such as high flicker noise, IM2 distortion and thermal noise offset; while the passive mixer has low flicker noise, but has problems such as poor conversion insertion loss and isolation.

[0003] To improve the noise performance of the active mixer, the prior art has proposed various schemes. For example, IEEE Microwave and Wireless Components Letters, vol. 32, no. 5, pp. 418-421, May 2022, "High-Gain, Low-Power, and Low-Noise CMOS Mixer Using Current-Reused Bleeding Amplification" reports a high-gain low-noise CMOS mixer based on current reuse bleeding amplifier. The structure improves the bleeding branch to an active branch with amplification function on the basis of the traditional current bleeding mixer, realizes the secondary amplification of the signal through current reuse, so as to obtain higher conversion gain and lower noise figure under the same power consumption. However, the above structure still retains the current mode architecture of the traditional Gilbert mixer, and the flicker noise of the local oscillator switching transistor is still coupled to the transconductance stage through the parasitic capacitor and is reflected at the intermediate frequency end, which is difficult to fundamentally suppress the flicker noise.

[0004] Therefore, a new architecture is needed to balance low noise, high gain and low power consumption. For this purpose, the present application proposes a switching transconductance type low flicker noise down-conversion mixer circuit, which can realize symmetric modulation and full frequency up-conversion of flicker noise, and effectively suppress low frequency noise at the intermediate frequency end. SUMMARY

[0005] Based on the above technical problems, the present application discloses a switching transconductance type low flicker noise down-conversion mixer circuit, which includes a switching stage for signal switching, a transconductance stage for signal transconductance conversion and noise suppression, and a radio frequency input matching network for radio frequency signal matching transmission, to establish a signal transmission path; The switch stage is configured with a complementary MOS structure and a local oscillator signal coupling element, receives a differential local oscillator signal and periodically switches on / off to provide dynamic bias for the transconductance stage; The transconductance stage adopts a cross-coupled differential topology and a transient coupling network to make the drain-source direct current of the transconductance transistor approach zero, thereby suppressing flicker noise from the source and modulating residual noise to a frequency band far from the intermediate frequency through switch flipping; The radio frequency input matching network integrates impedance matching elements and bias circuits to achieve radio frequency end impedance matching and bandwidth optimization; The circuit further comprises a differential local oscillator signal port LO+, LO-, a differential radio frequency input port RFin+, RFin-, a differential intermediate frequency output port IF+, IF-, and bias voltage ports VB1, VB2, VBRF, which are sequentially interconnected in signal flow direction to form a complete down-conversion link.

[0006] Preferably, the switch stage comprises PMOS transistors M5, M6, NMOS transistors M7, M8, coupling capacitors C3, C4, and bias resistors R1, R2; The PMOS transistors M5, M6 and the NMOS transistors M7, M8 form a complementary switch pair, wherein the drains of the transistors M3, M5 are commonly connected to form a first switch output node X1, and the drains of the transistors M4, M6 are commonly connected to form a second switch output node X2; The complementary switch pair is alternately turned on under the driving of the differential local oscillator signal LO+, LO-, so that the potentials of the first switch output node X1 and the second switch output node X2 are periodically switched between the power supply voltage VDD and the ground potential, thereby providing dynamic operating voltage for the transconductance stage.

[0007] Preferably, one end of the coupling capacitor C3 is connected to the differential local oscillator signal LO+, and the other end is simultaneously connected to the gates of the transistors M3, M5, for coupling the LO+ signal to the corresponding switch transistor gate; one end of the coupling capacitor C4 is connected to the differential local oscillator signal LO-, and the other end is simultaneously connected to the gates of the transistors M4, M6, for realizing coupling input of the LO- signal; One end of the bias resistor R1 is connected to the bias voltage VB1, and the other end is simultaneously connected to the gates of the transistors M3, M4; one end of the bias resistor R2 is connected to the bias voltage VB2, and the other end is simultaneously connected to the gates of the transistors M5, M6; the R1, R2 provide stable direct current bias for the switch transistors to ensure their reliable on / off under the driving of the local oscillator signal.

[0008] Preferably, the transconductance stage comprises differential transistors M1, M2, cross-coupled capacitors C1, C2, load resistors R3, R4, and a bias resistor Rbx; The gate of transistor M1 serves as the RF signal input terminal, receiving the differential RF input signal RFin+; the gate of transistor M2 receives the differential RF input signal RFin-; the source of transistor M1 is connected to the first switch output node X1, and the drain is connected to the second switch output node X2; the source of transistor M2 is connected to the second switch output node X2, and the drain is connected to the first switch output node X1, forming a source-drain cross-connection structure, which, together with the dynamic switching of the switch stage, realizes the transconductance sign inversion.

[0009] Preferably, one end of capacitor C1 is connected to the drain of transistor M1, and the other end is connected to the source of transistor M2. The connection node between capacitor C1 and the source of transistor M2 forms a differential intermediate frequency output port IF+. One end of capacitor C2 is connected to the drain of transistor M2, and the other end is connected to the source of transistor M1. The connection node between capacitor C2 and the source of transistor M1 forms a differential intermediate frequency output port IF-. Resistor R3 is connected in parallel with capacitor C1, and resistor R4 is connected in parallel with capacitor C2. Resistors R3 and R4, together with capacitors C1 and C2, form a cross-coupled load network to stabilize the intermediate frequency signal output. The two ends of the bias resistor Rbx are connected to the differential intermediate frequency output ports IF+ and IF- respectively, and are connected in parallel with capacitors C1 and C2 to set the drain-source DC operating point of transistors M1 and M2, ensuring that the drain-source DC current of the transconductance transistors approaches zero and suppressing flicker noise.

[0010] Preferably, the RF input matching network includes an input resistor Rin, a coupling capacitor Cin, a matching inductor Lin, and a bias voltage VBRF; The RF input matching network is connected between the RF signal source and the transconductance stage gate. The differential RF input signal RFin+ is coupled to the gate of transistor M1 through coupling capacitor Cin and matching inductor Lin in sequence, and the differential RF input signal RFin- is coupled to the gate of transistor M2 through another coupling capacitor Cin and matching inductor Lin in sequence. The DC signal is isolated by coupling capacitor Cin and the parasitic capacitance of the transconductance stage gate is compensated by matching inductor Lin, so as to achieve efficient coupling of RF signal to transconductance stage.

[0011] Preferably, one end of the resistor Rin is connected to the bias voltage VBRF, and the other end is connected to the connection node between Lin and the transconductance gate. By adjusting the resistance value of Rin, combined with the inductance value of Lin and the capacitance value of Cin, an impedance matching network is constructed to match the equivalent impedance of the RF input port to the standard impedance. At the same time, the operating bandwidth of the circuit is extended by parameter optimization to ensure low-loss transmission of RF signals in the target frequency band.

[0012] Compared with the prior art, the technical solution of this application has the following technical effects: This invention proposes a mixer with a switched transconductance method, using capacitive AC local oscillator large-signal coupling to allow the main circuit to operate in a zero-bias current state, thus fundamentally avoiding flicker noise. Under AC local oscillator large-signal excitation, the main circuit transistors still provide small-signal transconductance, and the mixer's gain performance is achieved through a cross-load resistor network. Since the circuit power consumption is contributed solely by the local oscillator buffer amplifier, it exhibits low power consumption characteristics. Simulation results show that this structure achieves a voltage gain of 9.5 dB and a double-sideband noise figure of 1.87 dB at a 6 GHz operating frequency, while reducing the flicker noise inflection point frequency to below 10 Hz, significantly improving the mixer's low-noise performance and signal purity.

[0013] This invention effectively improves linearity and intermodulation distortion suppression performance through a differentially symmetrical transconductance stage and a dynamic source-drain switching mechanism. The transconductance alternates between positive and negative symmetrical waveforms within two local oscillator half-cycles, causing even-order nonlinear terms to cancel each other out on average, thus ensuring the circuit's second-order intermodulation suppression capability. Furthermore, simulation verification shows that the third-order input intermodulation point (IIP3) of the mixer of this invention reaches... .

[0014] This invention achieves zero quiescent current consumption and high signal isolation characteristics through a symmetrical differential load network and a DC-bias-free transconductance path design. This structure relies solely on transient current for signal transmission, significantly reducing power consumption; the total circuit power is only 9.7 mW, achieving optimal energy efficiency while maintaining high-gain output. The symmetry of the differential load further enhances the isolation between ports and reduces local oscillator leakage, enabling the mixer to maintain high signal integrity even under multi-signal input conditions.

[0015] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the preferred embodiments of this application are described in detail below with reference to the accompanying drawings.

[0016] The above and other objects, advantages and features of this application will become more apparent to those skilled in the art from the following detailed description of specific embodiments in conjunction with the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In all drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0018] Based on the description of the figures and their corresponding technical content in the document, the titles of the figures are as follows: Figure 1 This is the overall circuit schematic diagram of the low flicker noise downconversion active mixer of the present invention; Figure 2 This is a schematic diagram illustrating the working principle of the present invention under different local oscillator phases; Figure 3 This is a schematic diagram of the voltage gain of the present invention; Figure 4 This is a schematic diagram of the double-sideband noise figure of the present invention; Figure 5 This is a schematic diagram of the simulation results of the 1dB input reference compression point of the present invention; Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. In the following description, specific details such as specific configurations and components are provided merely to help fully understand the embodiments of this application. Therefore, those skilled in the art should understand that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this application. In addition, for clarity and brevity, descriptions of known functions and structures are omitted in the embodiments.

[0020] It should be understood that the phrase "an embodiment" or "this embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "an embodiment" or "this embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0021] Furthermore, reference numerals and / or letters may be repeated in different examples within this application. Such repetition is for the purpose of simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or settings discussed.

[0022] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, B exists alone, and A and B exist simultaneously. The term " / and" in this article describes another type of relationship between related objects, indicating that two relationships can exist. For example, A / and B can mean: A exists alone, and A and B exist alone. In addition, the character " / " in this article generally indicates that the related objects before and after it are in an "or" relationship.

[0023] In this article, the term "at least one" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, "at least one of A and B" can mean: A exists alone, A and B exist simultaneously, or B exists alone.

[0024] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion.

[0025] Example 1 This embodiment mainly describes the working principle of transconductance switching and source-drain switching of a switching transconductance type low flicker noise downconverter mixer circuit according to this application, such as... Figure 1 As shown, the mixer of the present invention mainly consists of three parts: a transconductance stage, a switching stage, and an RF input matching network; the transconductance stage consists of a pair of differential transistors. The structure consists of capacitors connected in parallel between the source and drain. and high-impedance bias resistor R bx It is used to form transient current paths; the switching stage consists of four local oscillator driven transistors. The structure is used to alternately conduct during the positive and negative half-cycles of the local oscillator signal (LO), thereby achieving dynamic switching of the transconductance port; the RF input matching network consists of resistor R. in Inductor L in and capacitor C in Composed of components used to convert differential radio frequency (RF) signals. in+ RF in- It is effectively coupled to the transconductance gate, achieving input impedance matching and bandwidth optimization.

[0026] As shown on the left side of Figure 2, when High level When it is low, the transistor Conductive, Cut-off. At this time, the radio frequency input signal RF in+ With RFin- Transconductance transistor Converted into transient current, flowing through To the ground. Due to The charging and discharging action, The drain potential is through From low to high, the source potential rises through... The current decreases from high to low, causing the transconductance current to flow from the drain to the source, thus achieving positive transconductance. .

[0027] As shown on the right side of Figure 2, when the LO signal is inverted, i.e. Low level When it is high level, Conductive, Cut off. At this point, the current path reverses. The source-drain relationship is reversed: the current is changed from... The source flows to the drain, via Returning to the power node VDD. This process causes the transconductance to alternate between two LO half-cycles. and Symmetrical changes.

[0028] The flicker noise model of a transistor can be represented by the following formula:

[0029] in, Flicker noise coefficient, typical value: NMOS: , , : Drain DC current, AF: Current index, usually , Gate oxide capacitance per unit area (F / m²), formula: , Transistor width, Transistor length :frequency; For the mixer circuit of the present invention, its output noise current It can be characterized as follows:

[0030] This is the pulse function generated by the mixer switching, which toggles between 0 and 1, with a period equal to the local oscillator period. The coefficients of the Fourier series are... The angular frequency of the local oscillator signal. As the time variable, note that flicker noise is significant only at low frequencies, and the formula shows... DC component This will transmit transistor flicker noise to the intermediate frequency output, causing interference. Traditional mixers, or most existing technologies, utilize current injection techniques to reduce the bias current of the switching transistors. While flicker noise is mitigated, it cannot be completely eliminated. This invention proposes a switching mixer that uses a capacitor for AC local oscillator large-signal coupling, enabling the main circuit to operate in a zero-bias-current state, thereby fundamentally avoiding the flicker noise problem.

[0031] also, The mixer exhibits low impedance at high frequencies and high impedance at low frequencies, allowing RF signals to be directly coupled to the gate-source terminals of the transconductance transistor, while the IF signal forms a stable output at the load. Through this dynamic switching mechanism, the mixer achieves low power consumption and low flicker noise characteristics while maintaining high gain.

[0032] Small-signal conversion gain of the mixer of this invention It can be represented as: ,in Indicates that it is composed of capacitors With switching transistors The equivalent impedance formed by the on-resistance and parasitic capacitance, where s is a complex frequency variable. Characterizing the intrinsic conversion gain of the transconductance stage, This is the gain correction factor for the transconductance stage. For the small-signal transconductance of transconductance transistors (M1, M2), The output resistance of the transconductance transistors (M1, M2); The poles reflect the RC structure formed by the output resistance and load capacitance, which can be adjusted... as well as The size parameters of the resistor can control the position of the output poles, thereby extending the intermediate frequency bandwidth. Choosing an appropriate value for R can balance gain and bandwidth while maintaining linearity. Here, R is the equivalent resistance of the transconductance stage cross-coupled load network. This is the equivalent capacitance impedance at the load end; This embodiment details the working principle of transconductance switching and source-drain dynamic switching. This structure, by alternately switching the transconductance sign, symmetrically modulates and upconverts flicker noise to the high-frequency region within each local oscillator cycle, effectively reducing the impact of flicker noise at the intermediate frequency. Simultaneously, it utilizes the transient drive characteristics of the capacitor to achieve DC-current-free operation, enabling the mixer to possess high gain and high linearity at low power consumption. Example 2

[0033] This embodiment is based on the simulation verification of a switching transconductance type low flicker noise downconverter mixer circuit according to Embodiment 1, further illustrating the circuit's performance. The circuit is designed and implemented using a 65 nm CMOS process, and its main components and parameter configurations are shown in Table 1. The total power of the circuit is approximately 9.7 mW.

[0034] like Figure 3 As shown, the voltage gain of the mixer of this invention is approximately 9.5 dB, and the 3 dB bandwidth is approximately 70 MHz. This result demonstrates that the circuit maintains high gain output and flat amplitude-frequency characteristics over a wide intermediate frequency range, verifying the high-efficiency signal conversion capability of the capacitor transient drive mechanism under low-power conditions.

[0035] like Figure 4 As shown, the double-sideband noise figure of the mixer of this invention is only 1.87 dB, demonstrating superior performance. Furthermore, the flicker noise inflection point frequency is below 10 Hz. This performance indicates that the transconductance switching mechanism can effectively modulate the flicker noise component of the device to the local oscillator band, thereby significantly reducing the impact of mid-frequency flicker noise on system sensitivity and allowing the mixer to maintain white noise dominance characteristics in the low-frequency range. Compared to traditional Gilbert-type active mixers (where the flicker noise inflection point is typically greater than 1 MHz), this invention achieves several orders of magnitude improvement in flicker noise control, comparable to the flicker noise level of passive mixers.

[0036] like Figure 5 As shown, through two-tone simulation testing, the third-order input intermodulation point (IIP3) of the mixer of this invention is approximately... The results show that as the input signal power gradually increases, the output fundamental power maintains linear growth, while the amplitude growth of the third-order intermodulation products is significantly suppressed, indicating that the designed dynamic transconductance symmetrical structure can significantly reduce nonlinear distortion and improve the system's anti-interference capability.

[0037] Table 1 Component Parameters

[0038] Table 2 Comparison of Performance Parameters

[0039] The prior art listed in Table 2 above is "High-Gain, Low-Power, and Low-Noise CMOS Mixer Using Current-Reused Bleeding Amplification" published by Pang et al. in IEEE Microwave and Wireless Components Letters (2022). As shown in the table, this invention outperforms existing technologies in both noise characteristics and bias structure. This invention uses a capacitive transient coupling structure to replace the constant DC bias current source, achieving a transconductance drive mechanism with zero static power consumption. This effectively suppresses low-frequency flicker noise, reducing the double-sideband noise figure to 1.87 dB and the flicker noise inflection point to below 10 Hz. Compared to the prior art's 9.17 dB noise figure and approximately 10 kHz inflection point, the performance is significantly improved. This design improves noise performance while reducing power consumption, demonstrating excellent low-noise characteristics and structural innovation.

[0040] This embodiment details the performance verification results of an active mixer based on a transconductance switching mechanism. This circuit achieves high gain, low noise, and wideband response under low power consumption conditions, significantly improving the intermediate frequency output signal quality and system linearity. Simulation results verify the superiority of the proposed structure in terms of flicker noise suppression and dynamic linearity performance.

[0041] The above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. For those skilled in the art, the present invention can have various modifications and variations. Any changes, modifications, substitutions, integrations, and parameter changes made to these embodiments within the spirit and principles of the present invention, without departing from the principles and spirit of the present invention, through conventional substitutions or to achieve the same function, shall fall within the scope of protection of the present invention.

Claims

1. A switching transconductance type low flicker noise downconverter mixer circuit, characterized in that, It includes a switching stage for signal switching, a transconductance stage for signal transconductance conversion and noise suppression, and an RF input matching network for RF signal matching transmission, thus establishing a signal transmission path; The switching stage is configured with a complementary MOS transistor structure and a local oscillator signal coupling element to receive the differential local oscillator signal and periodically switch the conduction state to provide dynamic bias for the transconductance stage. The transconductance stage employs a cross-coupled differential topology and a transient coupling network to bring the drain-source DC current of the transconductance transistor close to zero, thereby suppressing flicker noise at the source and modulating the residual noise to a frequency band far from the intermediate frequency through switching. The RF input matching network integrates impedance matching elements and bias circuits to achieve RF impedance matching and bandwidth optimization. The circuit also includes differential local oscillator signal ports LO+ and LO-, differential radio frequency input ports RFin+ and RFin-, differential intermediate frequency output ports IF+ and IF-, and bias voltage ports VB1, VB2, and VBRF. Each port is interconnected in sequence according to the signal flow direction to form a complete down-conversion link.

2. The switching transconductance type low flicker noise downconverter mixer circuit according to claim 1, characterized in that, The switching stage includes PMOS transistors M5 and M6, NMOS transistors M7 and M8, coupling capacitors C3 and C4, and bias resistors R1 and R2. PMOS transistors M5 and M6 and NMOS transistors M7 and M8 form a complementary switching pair. The drains of transistors M3 and M5 are connected together to form the first switching output node X1, and the drains of transistors M4 and M6 are connected together to form the second switching output node X2. The complementary switches are alternately turned on under the drive of the differential local oscillator signals LO+ and LO-, so that the potentials of the first switch output node X1 and the second switch output node X2 periodically switch between the power supply voltage VDD and the ground potential, providing a dynamic operating voltage for the transconductance stage.

3. The switching transconductance type low flicker noise downconverter mixer circuit according to claim 2, characterized in that, One end of the coupling capacitor C3 is connected to the differential local oscillator signal LO+, and the other end is connected to the gates of transistors M3 and M5, which is used to couple the LO+ signal to the gate of the corresponding switching transistor; one end of the coupling capacitor C4 is connected to the differential local oscillator signal LO-, and the other end is connected to the gates of transistors M4 and M6, which realizes the coupling input of the LO- signal. One end of the bias resistor R1 is connected to the bias voltage VB1, and the other end is connected to the gate of transistors M3 and M4. One end of the bias resistor R2 is connected to the bias voltage VB2, and the other end is connected to the gate of transistors M5 and M6. R1 and R2 provide a stable DC bias for the switching transistors, ensuring that they can reliably turn on / off under the drive of the local oscillator signal.

4. The switching transconductance type low flicker noise downconverter mixer circuit according to claim 1, characterized in that, The transconductance stage includes differential transistors M1 and M2, cross-coupling capacitors C1 and C2, load resistors R3 and R4, and bias resistor Rbx; The gate of transistor M1 serves as the RF signal input terminal, receiving the differential RF input signal RFin+; the gate of transistor M2 receives the differential RF input signal RFin-; the source of transistor M1 is connected to the first switch output node X1, and the drain is connected to the second switch output node X2; the source of transistor M2 is connected to the second switch output node X2, and the drain is connected to the first switch output node X1, forming a source-drain cross-connection structure, which, together with the dynamic switching of the switch stage, realizes the transconductance sign inversion.

5. The switching transconductance type low flicker noise downconverter mixer circuit according to claim 4, characterized in that, One end of capacitor C1 is connected to the drain of transistor M1, and the other end is connected to the source of transistor M2. The connection node between capacitor C1 and the source of transistor M2 forms the differential intermediate frequency output port IF+. One end of capacitor C2 is connected to the drain of transistor M2, and the other end is connected to the source of transistor M1. The connection node between capacitor C2 and the source of transistor M1 forms the differential intermediate frequency output port IF-. Resistor R3 is connected in parallel with capacitor C1, and resistor R4 is connected in parallel with capacitor C2. Resistors R3 and R4, together with capacitors C1 and C2, form a cross-coupled load network to stabilize the intermediate frequency signal output. The two ends of the bias resistor Rbx are connected to the differential intermediate frequency output ports IF+ and IF- respectively, and are connected in parallel with capacitors C1 and C2 to set the drain-source DC operating point of transistors M1 and M2, ensuring that the drain-source DC current of the transconductance transistors approaches zero and suppressing flicker noise.

6. The switching transconductance type low flicker noise downconverter mixer circuit according to claim 1, characterized in that, The RF input matching network includes an input resistor Rin, a coupling capacitor Cin, a matching inductor Lin, and a bias voltage VBRF. The RF input matching network is connected between the RF signal source and the transconductance stage gate. The differential RF input signal RFin+ is coupled to the gate of transistor M1 through coupling capacitor Cin and matching inductor Lin in sequence, and the differential RF input signal RFin- is coupled to the gate of transistor M2 through another coupling capacitor Cin and matching inductor Lin in sequence. The DC signal is isolated by coupling capacitor Cin and the parasitic capacitance of the transconductance stage gate is compensated by matching inductor Lin, so as to achieve efficient coupling of RF signal to transconductance stage.

7. The switching transconductance type low flicker noise downconverter mixer circuit according to claim 6, characterized in that, One end of the resistor Rin is connected to the bias voltage VBRF, and the other end is connected to the connection node between Lin and the transconductance gate. By adjusting the resistance value of Rin, in conjunction with the inductance value of Lin and the capacitance value of Cin, an impedance matching network is constructed to match the equivalent impedance of the RF input port to the standard impedance. At the same time, the operating bandwidth of the circuit is extended by parameter optimization to ensure low-loss transmission of RF signals in the target frequency band.

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