RRAM device based on NiFe2O4 and application thereof

By introducing the NiFe2O4 structure and compact model into RRAM devices, the problems of high voltage and size reduction in existing RRAM devices are solved, achieving low power consumption, high performance, and simplified circuit design.

CN121751650APending Publication Date: 2026-03-27ANHUI UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-26
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing RRAM devices suffer from high voltage and are significantly affected by size reduction in planar stacked structures, and process improvement is difficult, making it hard to meet the requirements of high-performance storage.

Method used

A NiFe2O4-based RRAM device structure is adopted, in which the top electrode Pt, dielectric layer HfO2, and bottom electrode TiN are stacked sequentially from top to bottom. A compact model is developed to simulate the device behavior, and 1T1R, 1D1R, and 1S1R structures are constructed for circuit simulation.

Benefits of technology

It improves the cyclic stability of the device, reduces the switching voltage and switching current, simplifies circuit design, and achieves high-efficiency storage performance.

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Abstract

The invention discloses an RRAM device and application thereof, and belongs to the technical field of semiconductor memories. Comprising a top electrode Pt, a NiFe2O4 dielectric layer, a dielectric layer and a bottom electrode TiN which are sequentially stacked from top to bottom. The Pt / / / TiN device is formed by inserting materials, and compared with Pt / / TiN, the device is stable in structure circulation, and the needed switching voltage is smaller. And main use ways of the RRAM device in a circuit are supplemented through a compact model, and SPICE level simulation of a 1T1R structure, a 1D1R structure and a 1S1R structure formed by the RRAM with the structure is completed.
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Description

Technical Field

[0001] This invention belongs to the field of semiconductor memory technology, specifically relating to... RRAM devices and their applications. Background Technology

[0002] The growing demand for high-performance storage devices driven by emerging technologies such as edge computing, artificial intelligence, and in-memory computing has led to the development of Resistive Random Access Memory (RRAM). Due to its strong scalability, low power consumption, reliability, and excellent compatibility with CMOS processes, RRAM is considered one of the most powerful contenders for next-generation storage technology. RRAM is a novel storage device that uses a transition metal oxide thin film material with a resistive layer to alter its internal electronic structure under the influence of an electric field, switching between high and low resistance to store information.

[0003] Most existing RRAMs adopt a planar stacked structure (such as Ti / / Pt), which has a high formation voltage and is significantly affected by size reduction, while improving performance by changing the structure brings difficulties in the process. Inserting new materials as dielectric layers is more cost-effective.

[0004] Therefore, a proposal based on RRAM devices. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the purpose of this invention is to provide a method based on... The invention relates to RRAM devices and their applications, and solves the problems in the existing technology.

[0006] The objective of this invention can be achieved through the following technical solutions: based on The RRAM devices, stacked from top to bottom: top electrode Pt, dielectric layer TiN as the layer and bottom electrode.

[0007] Furthermore, the top electrode Pt, dielectric layer The thicknesses of the TiN layer and the bottom electrode are 20 nm, 10 nm, 10 nm, and 20 nm, respectively.

[0008] Furthermore, the RRAM device is cylindrical; the top electrode Pt, dielectric layer The diameters of both the TiN layer and the bottom electrode are 40 nm.

[0009] The above is based on The application of RRAM devices in building memory cells.

[0010] A 1T1R cell includes: a field-effect transistor and the above-mentioned... The RRAM device is connected in series with a field-effect transistor.

[0011] A 1D1R unit includes: a rectifier diode and the above-mentioned... The RRAM device is connected in series with a rectifier diode.

[0012] A 1S1R unit includes: a nonlinear resistor with symmetrical electrical characteristics and the above-mentioned... The RRAM device is connected in series with the nonlinear resistor.

[0013] A method for constructing a compact RRAM model for circuit simulation, comprising: Based on the mathematical description of the dynamics of conductive filaments, and combined with the above-mentioned... The data fitting for the RRAM device was written in Verilog-A. The coupling equations of the compact model are: Where g is the gap distance, The horizontal line represents the average gap distance, t represents time, and v is the migration rate, a proportionality coefficient simulating the migration rate of oxygen vacancies. It is the activation energy for migration, representing the effect of temperature on the migration rate; k is the Boltzmann constant, and T is the device temperature. It represents the ambient temperature; q represents the amount of electron charge, and a is the minimum step size for oxygen vacancy migration; Represents the normalized scale of the electric field enhancement factor. It is a local enhancement factor, which can be calculated as ,in Represents the initial enhancement factor. , and These are the coefficients fitted from the numerical simulation results; V and I represent the applied voltage and device current, respectively. It is the equivalent thermal resistance. It is the current pre-factor. It is the g-normalized scale. It is a voltage normalization scale.

[0014] A compact RRAM model is constructed using the above-described construction method.

[0015] The application of the aforementioned RRAM compact model in circuit simulation.

[0016] The beneficial effects of this invention are: 1. This invention uses insertion Material composition Pt / / / TiN devices offer cyclic stability and require lower switching voltages.

[0017] 2. This invention supplements the main application paths of the device in the circuit through a compact model, and completes SPICE-level simulation of the 1T1R structure, 1D1R structure and 1S1R structure composed of this structure RRAM. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the Pt / HfO2 / TiN device structure; Figure 2 This invention is Pt / / / TiN device structure schematic diagram; Figure 3 This is a graph showing the relationship between the conductivity pre-factor, thermal conductivity, activation energy, and oxygen vacancy concentration of this invention. Figure 4 This invention is Pt / / / TiN and Pt / Comparison of IV curves, reset and set voltage distribution diagrams for / TiN devices; Figure 5 During the reset process, Pt / / Two-dimensional plot of oxygen vacancy concentration, temperature, and potential distribution in a TiN device; Figure 6 It is Pt / during the set process / Two-dimensional plot of oxygen vacancy concentration, temperature, and potential distribution in a TiN device; Figure 7 This includes a comparison of the IV curves of the physical model and the compact model of this invention, as well as the 1T1R structure, 1D1R structure, 1S1R structure and characteristic diagrams. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Example 1 Traditional Pt / The two-dimensional and three-dimensional structures of the / TiN device are as follows: Figure 1 As shown in (a) and (b), it is cylindrical and includes, from top to bottom, a top electrode Pt, Layer, HfO x Layer and bottom electrode TiN; located in the figure Layers and The yellow area at the center of the layer represents the conductive filament portion of the structure.

[0022] Furthermore, the Pt / In TiN devices, the top electrode Pt, dielectric layer The dielectric layer and the bottom electrode TiN are both 20 nm thick and 40 nm in diameter.

[0023] Based on the above Pt / / TiN devices, in this embodiment, are inserted by replacement Material composition Pt / / / TiN devices (i.e., based on TiN devices) (Regarding RRAM devices). In the study of RRAM resistive switching mechanisms, the conductive filament theory based on oxygen vacancy composition has been widely accepted. The theoretical mechanism is that the migration of oxygen vacancies leads to the formation and breakage of the CF (conductive filament). Pt / / Simulations of / TiN devices should consider the coupling and computational analysis of multiple physical fields. This example uses the finite element method to simulate the physical model of this structure. The study involves the oxygen vacancy migration equation, the current continuity equation, and the Joule heating equation, which will be described in detail below.

[0024] Device simulation includes diffusion, drift, and the generation and recombination of oxygen vacancies. When the voltage is zero or extremely low, the effect of drift can be ignored, and oxygen vacancies diffuse from high-concentration regions to low-concentration regions. By applying a voltage to the top electrode, the atomic transition barrier decreases, and the atomic transition probability is exponentially related to the barrier height. As the applied voltage increases, the drift current increases rapidly; drift is the dominant motion for oxygen vacancy migration.

[0025] The oxygen vacancy diffusion rate D satisfies the Arrhenius equation: (1) (2) Where D0 is the exponential factor of the diffusion coefficient. is the migration activation energy, in eV; A is the transition distance of the oxygen vacancy, in nm; and f is the escape frequency, in Hz.

[0026] Oxygen vacancy drift rate v It can be represented as: (3) When a voltage is applied to the model, the electric field in the local region breaks the covalent bonds of the oxides and generates oxygen vacancies. Simultaneously, the reduction of metal ions introduces new oxygen vacancies, increasing the local vacancy concentration. Conversely, oxygen vacancies may recombine. The expressions for the generation rate G and recombination rate R are as follows: (4) (5) Where A is the generation rate coefficient, in order to express, It is the energy required to activate oxygen vacancies. is the relaxation energy used to recombine oxygen vacancies, expressed in eV, and b is the grid size, expressed in nm.

[0027] Based on the above, the oxygen vacancy migration equation can be expressed as: (6) Because there is no current source inside the dielectric layer, the total current flowing into and out of the entire system is equal. The expression for the current continuity equation is: (7) in σ It is conductivity, using Let ψ represent electric potential, and −∇ψ represent electric field strength E.

[0028] The conductivity in the expression is assumed to be a constant value, but according to the conductivity... The formula illustrates how the concentration of oxygen vacancies alters conductivity; therefore, we need to provide a conductivity model: (8) in As the pre-exponential factor, This represents the activation energy conducted by the material. Both of these values ​​are related to the activation energy of the material. The given oxygen vacancy concentration is related, and is The function.

[0029] When current flows through a device, collisions between charges generate a significant amount of heat, which is also transferred outwards. When the generated heat exceeds the heat flux, the accumulated heat leads to a temperature increase, thus affecting the migration of oxygen vacancies. Since both the diffusion and drift of oxygen vacancies are affected by temperature changes, we need to incorporate a heat conduction equation into the model, which can be expressed as: (9) in, It is the specific heat capacity of the atmosphere. It is thermal conductivity, the unit is... Since only the steady-state mode is considered, it can be ignored in the simulation. Part, namely: (10) Pt / / The two-dimensional and three-dimensional simulation structures of the / TiN device are as follows: Figure 2 As shown in (a) and (b); it is cylindrical, and stacked from top to bottom: top electrode Pt, Dielectric layer, HfO2 layer and bottom electrode TiN; TiN and Pt were chosen as the bottom and top electrode materials, respectively, because the work function of TiN (4.7 eV) and Pt (5.65 eV) differs greatly, causing the working voltage to decrease as the work function difference between the top and bottom electrodes increases, which is beneficial for the formation of conductive wires. Figure 2 Figure (a) shows a two-dimensional axisymmetric cross-sectional view. The thickness of the top electrode Pt is 20 nm, and the bottom electrode TiN is set to have the same size as the top electrode. The dielectric layer has a thickness of 10 nm and a diameter of 40 nm; the HfO2 dielectric layer has a thickness of 10 nm and a diameter of 40 nm.

[0030] To simplify the analysis, assume that only one CF with a radius of 5 nm is generated.

[0031] The CF simulation is divided into two parts: the lower part is located in In the dielectric layer, the upper part is located In the dielectric layer, the relationship between conductivity pre-factor and oxygen vacancy concentration is as follows: Figure 3 As shown in (a) above, the conductivity decreases from approximately 0 with increasing oxygen vacancy concentration. Increase to 2×10 4 The relationship between thermal conductivity and oxygen vacancy concentration is as follows: Figure 3 As shown in (b) of the diagram.Figure 3 Figure (c) shows the relationship between activation energy and oxygen vacancy concentration. The initial conduction activation energy was set to 0.13 eV. The higher the oxygen vacancy concentration, the lower the conduction activation energy.

[0032] For Pt / / Initial values ​​and boundary conditions were set for the voltage, temperature, and oxygen vacancy concentration of the / TiN structure RRAM. Since the device in this embodiment is a bipolar device, a bias voltage must be applied. The top and bottom electrodes, as well as the model boundary, were set at room temperature (293.15 K). Finally, the oxygen vacancy concentration of CF was set, and the atomic density P was calculated according to the following formula: (11) in, It is molar mass. ρ It is the material density of the dielectric layer. It is Avogadro's constant (6.02 × 10⁻⁶). 23 Since the maximum doping concentration can reach 4.3% of the atomic density, for ease of calculation, the oxygen vacancy concentration in the CF region is set to 1 × 10⁻⁶. 26 Set the oxygen vacancy concentration in other regions to 0m -3 The focus of this embodiment is... and The oxygen vacancy concentration changes within the layer, while the oxygen vacancy concentration in other regions remains essentially unchanged.

[0033] Example 2 In this embodiment, the Pt / mentioned in Example 1 is... / / TiN and Pt / The TiN devices underwent testing and analysis; details are as follows: (1) Single-layer Pt / / TiN devices and double-layer devices Pt / / Comparison of TiN IV curves as follows: Figure 4 As shown in (a), it can be seen that compared with the single-layer device, the latter has a lower set / reset voltage and operating current, and also exhibits a larger storage window, which indicates that the dual-layer device has better performance than the single-layer device.

[0034] (2) Perform 100 cycles on each of the two devices to obtain 100 sets / reset voltages, and the results are as follows. Figure 4 As shown in (b) and (c) in the diagram. It can be seen that: The addition of the layer causes a decrease in the device's set / reset voltage because This provides the device with more oxygen ions. Furthermore... The insertion reduces the energy consumption of oxygen vacancies generation and recombination in RRAM, and makes it easier to form conductive filaments, thus reducing the set / reset voltage.

[0035] (3) Pt / during the reset process / Two-dimensional graphs of oxygen vacancy concentration, temperature, and potential distribution in / TiN devices are shown below. Figure 5 As shown in (a), (b), and (c), it can be seen that the breakage of the conductive filament occurs near the top electrode. This is a result of the redistribution of internal oxygen vacancies driven by both thermal effects and electric field factors. With increasing bias electric field and temperature, the diffusion and drift of oxygen vacancies at the contact point between the electrode and the conductive filament are further promoted. The highest points of temperature and electric field are below the contact surface between the top electrode and the dielectric layer, mainly located at the broken part of the conductive filament. This is because the high resistance after the conductive filament breaks leads to a denser electric field distribution and generates more Joule heat.

[0036] (4) Pt / during the set process / Two-dimensional graphs of oxygen vacancy concentration, temperature, and potential distribution in / TiN devices are shown below. Figure 6 As shown in (a), (b), and (c), it can be seen that when the voltage is low, the oxygen vacancy concentration at the top of the conductive filament is very low, indicating that the conductive filament is in a broken state. At this time, the device has a high resistance. Later, as the voltage increases, the oxygen vacancy concentration at the broken part of the conductive filament gradually increases. Initially, due to the low applied voltage, the Joule heating is limited. After the conductive filament is formed, the current gradually increases, causing the temperature to rise continuously. Before the conductive filament is fully reset, the electric field strength at the top of the dielectric layer is high. As the conductive filament forms, the resistance decreases, causing the voltage division to decrease, and the electric field strength gradually decreases.

[0037] In summary, this fully demonstrates Pt / / Throughout the resistive switching process of the / TiN structure, the applied bias voltage leads to the generation and recombination of oxygen vacancies, and the temperature and potential also change with the changes in oxygen vacancies.

[0038] Example 3 In this embodiment, based on Pt / / / TiN devices, developing a compact RRAM model; RRAM has a low set / reset voltage, making it a promising candidate for low-power memory chips. However, physics-based models only characterize state transitions and are difficult to use in circuit design because numerical simulation of complex circuits is very time-consuming, leading to excessive use of computational resources. To address this issue, a compact RRAM model has been developed, which shows great promise in circuit design due to its high simulation accuracy, low resource consumption, and high efficiency. Specifically, the IV curve of RRAM is first obtained using the COMSOL physical model, and then the parameters are inferred from the physical results and substituted into the compact model. The impedance in the physical model is manifested in the migration of oxygen vacancies, but the compact model does not simulate oxygen density. Instead, it introduces an equivalent variable, gap, and controls the evolution of gap to ensure that the IV curve of the compact model is basically consistent with the IV curve of the physical model.

[0039] RRAM integration can be divided into two types: active arrays and passive arrays. In active arrays, field-effect transistors (FETs) can be used as selectors, forming a 1T1R structure with each RRAM to control the reading and writing of memory cells (e.g., ...). Figure 7 As shown in (b)), word lines and bit lines are used in the integrated array to achieve the purpose of gate storage. In a passive array, each memory cell is defined by the upper and lower electrodes formed by intersecting sub-lines and bit lines; however, passive arrays suffer from crosstalk. To solve this problem, a rectifier diode can be connected in series with each memory node to form a 1D1R cell (such as...). Figure 7 (d) (1) shown in the figure), or a 1S1R structure is formed by connecting a nonlinear resistor with symmetrical electrical characteristics in series (as shown in the figure). Figure 7 As shown in (d) of (2), each crossover point has rectification characteristics to avoid misreading caused by crosstalk.

[0040] The RRAM compact model can be described as: (12) (13) (14) (15) Where g is the gap distance (the horizontal distance of CF fracture). The horizontal line represents the average gap distance, and t represents time. v is the migration rate, a proportionality coefficient simulating the migration rate of oxygen vacancies. This is the activation energy for migration, representing the effect of temperature on the migration rate. k is the Boltzmann constant, and T is the device temperature. This refers to the ambient temperature. q represents the electron charge, and a is the minimum step size for oxygen vacancy migration. Represents the normalized scale of the electric field enhancement factor. It is a local enhancement factor, which can be calculated as ,in Represents the initial enhancement factor. , and These are the coefficients fitted from the numerical simulation results. V and I represent the applied voltage and device current, respectively. It is the equivalent thermal resistance. It is the current pre-factor. It is the g-normalized scale. It is a voltage normalization scale.

[0041] The IV curves of the constructed RRAM compact model written in Verilog-A were compared with those of the physical model, such as... Figure 7 As shown in (a), the two sets of data agree well, confirming the accuracy and feasibility of the compact model, and demonstrating that the proposed compact model can explain Pt / / / TiN devices and related structures' set / reset characteristics.

[0042] Using this compact model to build 1T1R architecture units, such as Figure 7 As shown in (b), where SL represents the select line, WL represents the word line, and BL represents the bit line; the simulated electrical characteristics are as follows. Figure 7 As shown in (c), the current drop point during the set-up process is delayed in the 1T1R architecture, mainly due to the switching voltage division. Furthermore, the vertical transistor acts as a current limiter in the saturation region, preventing hard breakdown of the RRAM.

[0043] Using this compact model to build a 1D1R architecture, such as Figure 7 As shown in (d) of (1), the IV characteristic curve of the 1D1R architecture is as follows: Figure 7 As shown in (e), it can be seen that when a voltage of 0V to 3V is applied to the electrode, the current increases rapidly, realizing the transition from a high-resistance state to a low-resistance state. Furthermore, this 1D1R structure achieves self-current limiting during the setup process, meaning that no additional current limiting is required during setup, greatly reducing the difficulty of designing the peripheral circuitry for RRAM devices.

[0044] Using this compact model to build a 1S1R architecture, as follows: Figure 7 As shown in (d) and (2) of the diagram, the IV characteristic curves of the 1S1R architecture are as follows: ​As shown in (f), it can be seen that when the set voltage is greater than the turn-on voltage, the integrated 1S1R memory device changes from a high-resistance state to a low-resistance state. During voltage flyback, when the voltage is less than the turn-on voltage of the selector, the electrical characteristics of the selector are directly exhibited. At a read voltage of approximately 1.5V, the nonlinearity coefficient of this device reaches 10. 3 .

[0045] In summary, this invention has found that by using Pt / The insertion of Pt / NiFe2O4 into NiFe2O4 not only improves switching performance but also reduces set / reset voltage and switching current. Subsequently, the set / reset process of the device was simulated using appropriate equations. The electric field distribution, temperature distribution, and oxygen vacancy concentration distribution during this process were analyzed to illustrate the entire resistance change process. Finally, considering that the physical model is difficult to meet the efficiency requirements of memory chip circuit design, a Pt / NiFe2O4 model was proposed. / A compact model of the / TiN structure RRAM was developed to facilitate circuit design of the memory chip. Based on the requirements of active and passive arrays for structural units, SPICE-level simulations of 1T1R, 1D1R, and 1S1R structures were developed to verify the model's applicability.

[0046] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0047] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention.

Claims

1. Based on The RRAM device is characterized in that, Stacked from top to bottom: top electrode Pt, dielectric layer Dielectric layer and bottom electrode TiN.

2. The method based on claim 1 The RRAM device is characterized in that, The top electrode Pt, dielectric layer The thicknesses of the TiN layer and the bottom electrode are 20 nm, 10 nm, 10 nm, and 20 nm, respectively.

3. The method based on claim 1 The RRAM device is characterized in that, The RRAM device is cylindrical; the top electrode Pt, dielectric layer The diameters of both the TiN layer and the bottom electrode are 40 nm.

4. The method based on any one of claims 1-3 The application of RRAM devices in building memory cells.

5. A 1T1R unit, characterized in that, include: Field-effect transistors and the field-effect transistors based on any one of claims 1-3 The RRAM device is connected in series with a field-effect transistor.

6. A 1D1R unit, characterized in that, include: The rectifier diode and the rectifier diode based on any one of claims 1-3 The RRAM device is connected in series with a rectifier diode.

7. A 1S1R unit, characterized in that, include: A nonlinear resistor with symmetrical electrical characteristics and based on any one of claims 1-3 The RRAM device is connected in series with the nonlinear resistor.

8. A method for constructing a compact RRAM model for circuit simulation, characterized in that, include: Based on a mathematical description of the dynamics of conductive filaments, and in conjunction with the method described in any one of claims 1-3, based on... The data fitting for the RRAM device was written in Verilog-A. The coupling equations of the compact model are: Where g is the gap distance, The horizontal line represents the average gap distance, t represents time, and v is the migration rate, a proportionality coefficient simulating the migration rate of oxygen vacancies. It is the activation energy for migration, representing the effect of temperature on the migration rate; k is the Boltzmann constant, and T is the device temperature. It represents the ambient temperature; q represents the amount of electron charge, and a is the minimum step size for oxygen vacancy migration; Represents the normalized scale of the electric field enhancement factor. It is a local enhancement factor, which can be calculated as ,in Represents the initial enhancement factor. , and These are the coefficients fitted from the numerical simulation results; V and I represent the applied voltage and device current, respectively. It is the equivalent thermal resistance. It is the current pre-factor. It is the g-normalized scale. It is a voltage normalization scale.

9. A compact RRAM model, characterized in that, It is constructed using the construction method described in claim 8.

10. The application of the RRAM compact model as described in claim 9 in circuit simulation.