P-on-n type mercury cadmium telluride device and production method thereof

Abstract

The invention relates to the field of integrated circuit manufacturing, in particular to a p-on-n type tellurium-cadmium-mercury device and a production method thereof. An n type tellurium-cadmium-mercury layer is arranged on the surface of a substrate material layer; a patterned photoresist layer is arranged on the surface of the n-type tellurium-cadmium-mercury layer; arranging an injection barrier layer on the bottom surface of the injection through hole; performing arsenic injection on the n-type tellurium-cadmium-mercury layer by taking the injection barrier layer and the photoresist layer as masking films to form a PN junction; after the PN junction is formed, the photoresist layer is removed; removing the injection barrier layer by using chemical mechanical polishing; and arranging a passivation layer on the surface of the n-type mercury cadmium telluride layer, and carrying out surface metallization to obtain the p-on-n-type mercury cadmium telluride device. According to the invention, the surface uniformity and roughness of the n-type tellurium-cadmium-mercury layer are prevented from being obviously degraded in the removal process of the injection barrier layer, and the p-type activation rate of arsenic ions in the subsequent heat treatment activation process and the film quality of the subsequent growth passivation layer are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit manufacturing, in particular to a p-on-n type mercury cadmium telluride device and a production method thereof. BACKGROUND

[0002] Mercury cadmium telluride material is mixed by HgTe (mercury telluride) with negative forbidden band and CdTe (cadmium telluride) with positive forbidden band, which is a kind of pseudo-binary compound material with direct band gap. By adjusting the composition of the material, the forbidden band width of mercury cadmium telluride can cover the entire infrared waveband, and it can work in the atmospheric window of 1-3, 3-5 and 8-12 μm. It is an ideal infrared detector material and currently has a very important position in the field of infrared detection. Mercury cadmium telluride photodetector also has good detection performance and is widely used in the fields of optical fiber communication, 3D laser radar, astronomical observation and atmospheric detection.

[0003] Compared with the traditional n-on-p planar device structure, the mercury cadmium telluride infrared detector with p-on-n device structure can obtain lower dark current and higher device performance, but the preparation technology of p-on-n structure is more complex. In the preparation process of p-on-n planar junction device, the pn junction is prepared by first implanting As ions and then annealing for p-type activation.

[0004] However, the implantation of As ions will bombard the surface of mercury cadmium telluride and produce a large number of lattice damage and increase defects. On the other hand, the increase of defects will in turn reduce the activation rate of As. Therefore, a barrier layer needs to be set on the surface of mercury cadmium telluride before AS ion implantation. However, the implantation depth of As ions is very shallow, and a thick barrier layer will reduce the implantation depth of As ions in the mercury cadmium telluride material, which will adversely affect the performance of the device. Therefore, the barrier layer is very thin, usually only a few microns.

[0005] However, due to the serious lattice damage and many defects in the As ion implantation area and the influence of implanted As doped ions, there will be obvious difference in the removal rate between the As ion implantation area and the surrounding non-implantation area during the subsequent chemical polishing and solution etching to remove the barrier layer, resulting in uneven surface of mercury cadmium telluride after etching and chemical polishing, and the appearance of mercury cadmium telluride surface will be obviously deteriorated and the roughness will be sharply increased. At the same time, due to the lack of accurate measurement method to distinguish whether the barrier layer is completely removed or not, it is also impossible to realize the accurate control of the removal thickness of the barrier layer, so that in order to ensure that the barrier layer is completely removed, the surface of mercury cadmium telluride is usually removed to a deeper thickness in this process step, which reduces the depth of As ion doping.

[0006] Therefore, how to reduce the lattice damage and defects caused by the bombardment of As ion implantation process on the surface of mercury cadmium telluride, and how to realize the accurate control of the removal thickness of the barrier layer, and how to effectively protect the surface of mercury cadmium telluride under the premise of completely removing the barrier layer, and how to solve the problems of surface morphology deterioration and roughness increase of mercury cadmium telluride are problems that need to be solved by those skilled in the art. SUMMARY

[0007] The purpose of the present application is to provide a p-on-n type mercury cadmium telluride device and a production method thereof, so as to solve the problem in the prior art that the lattice damage and defects caused by the bombardment of As ion implantation process on the surface of mercury cadmium telluride cannot be reduced, the removal thickness of the barrier layer cannot be accurately controlled, the surface of mercury cadmium telluride cannot be effectively protected under the premise of completely removing the barrier layer, and the problems of surface morphology deterioration and roughness increase of mercury cadmium telluride cannot be solved.

[0008] To solve the above technical problems, the present application provides a production method of a p-on-n type mercury cadmium telluride device, comprising:

[0009] An n-type mercury cadmium telluride layer is arranged on the surface of the substrate material layer;

[0010] A patterned photoresist layer is arranged on the surface of the n-type mercury cadmium telluride layer; the photoresist layer comprises an implantation through hole arranged in an ion implantation area; the implantation through hole exposes the n-type mercury cadmium telluride layer;

[0011] An implantation barrier layer is arranged on the bottom surface of the implantation through hole;

[0012] The implantation barrier layer and the photoresist layer are used as a mask film to perform arsenic implantation on the n-type mercury cadmium telluride layer to form a PN junction;

[0013] After the PN junction is formed, the photoresist layer is removed;

[0014] The implantation barrier layer is removed by chemical mechanical polishing;

[0015] A passivation layer is arranged on the surface of the n-type mercury cadmium telluride layer, and surface metallization is performed to obtain a p-on-n type mercury cadmium telluride device.

[0016] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the implantation barrier layer is removed by chemical mechanical polishing, comprising:

[0017] The implantation barrier layer is selectively chemically mechanically polished with the n-type mercury cadmium telluride layer as a stop layer.

[0018] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the implantation barrier layer is removed by chemical mechanical polishing, comprising:

[0019] The implantation blocking layer is chemically mechanically polished under monitoring of at least one of a microscope, a white light interferometer and a step profiler until the contact surface of the n-type mercury cadmium telluride layer and the implantation blocking layer is polished.

[0020] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the substrate material layer is at least one of a cadmium zinc telluride layer, a silicon layer and a gallium arsenide layer.

[0021] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the n-type mercury cadmium telluride layer is arranged on the surface of the substrate material layer, comprising:

[0022] The n-type mercury cadmium telluride absorption layer is grown on the surface of the substrate material layer by at least one of liquid phase epitaxy, molecular beam epitaxy and metal organic chemical vapor deposition, and indium doping is performed during the growth of the n-type mercury cadmium telluride absorption layer to obtain the n-type mercury cadmium telluride layer.

[0023] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the component of cadmium in the n-type mercury cadmium telluride layer ranges from 0.2 to 0.4, inclusive.

[0024] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the implantation blocking layer is arranged on the bottom surface of the implantation via, comprising:

[0025] The implantation blocking layer is arranged on the bottom surface of the implantation via by at least one of electron beam evaporation, magnetron sputtering and molecular beam epitaxy.

[0026] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the implantation blocking layer is at least one of a cadmium telluride layer, a zinc sulfide layer and a silicon nitride layer.

[0027] Optionally, in the production method of the p-on-n type mercury cadmium telluride device, the thickness of the implantation blocking layer ranges from 50 nanometers to 200 nanometers, inclusive.

[0028] A p-on-n type mercury cadmium telluride device obtained by any one of the above-mentioned production methods of the p-on-n type mercury cadmium telluride device.

[0029] The present invention provides a method for manufacturing a p-on-n type mercury cadmium telluride (HCdT) device, comprising: depositing an n-type HCdT layer on the surface of a substrate material layer; depositing a patterned photoresist layer on the surface of the n-type HCdT layer; the photoresist layer including implantation vias disposed in an ion implantation region; the implantation vias exposing the n-type HCdT layer; depositing an implantation barrier layer on the bottom surface of the implantation vias; performing arsenic implantation on the n-type HCdT layer using the implantation barrier layer and the photoresist layer as a masking film to form a PN junction; removing the photoresist layer after forming the PN junction; removing the implantation barrier layer by chemical mechanical polishing; depositing a passivation layer on the surface of the n-type HCdT layer and performing surface metallization to obtain a p-on-n type HCdT device.

[0030] In this invention, a masking film for arsenic implantation is constructed using a photoresist layer and an implantation barrier layer. After arsenic implantation, the photoresist layer is removed first, and then the implantation barrier layer is chemically mechanically polished. Since only the implantation barrier layer located in the ion implantation region exists on the surface of the n-type mercury cadmium telluride (HCdT) layer after the photoresist layer is removed, the implantation barrier layer creates a certain height difference between the ion implantation region and the non-implantation region. Therefore, during the subsequent chemical mechanical polishing process to remove the barrier layer, this height difference allows for precise detection of the removal rate and complete removal time of the implantation barrier layer. Only when the implantation barrier layer is almost completely removed will it have a significant effect on the surface of the n-type HCdT layer, thus providing significant protection for the surface of the n-type HCdT layer. This avoids significant degradation of the surface uniformity and roughness of the n-type HCdT layer during the implantation barrier layer removal process, improves the p-type activation rate of arsenic ions in the subsequent thermal activation process, and enhances the film quality of the subsequent passivation layer growth. This further reduces the dark current level of p-on-n-type HCdT planar junction infrared devices and improves device performance. The present invention also provides a p-on-n type mercury cadmium telluride device with the above-mentioned beneficial effects. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a flowchart illustrating a specific embodiment of the production method of the p-on-n type mercury cadmium telluride device provided by the present invention.

[0033] Figures 2 to 11 This is a schematic diagram of the process structure of each step in a specific embodiment of the production method of p-on-n type mercury cadmium telluride device provided by the present invention.

[0034] Figure label:

[0035] 110 - Substrate material layer; 120 - n-type mercury cadmium telluride layer; 130 - Photoresist layer; 140 - Injection barrier layer; 150 - PN junction; 160 - Passivation layer; 170 - Metallized photoresist layer; 180 - Contact electrode layer. Detailed Implementation

[0036] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] The core of this invention is to provide a method for manufacturing a p-on-n type mercury cadmium telluride device, and a flowchart of one specific embodiment is shown below. Figure 1 As shown, this is referred to as Specific Implementation Method One, which includes:

[0038] S101: An n-type mercury cadmium telluride layer 120 is disposed on the surface of the substrate material layer 110.

[0039] The corresponding process structure diagram for this step is as follows: Figure 2 As shown, the substrate material layer 110 is at least one of a zinc zinc cadmium layer, a silicon layer, and a gallium arsenide layer. Of course, the substrate material layer 110 is usually a single material layer, and the choice can be made according to the actual situation; this invention does not limit this.

[0040] As one specific implementation method, this step includes:

[0041] An n-type mercury cadmium telluride (MCAD) absorber layer is grown on the surface of a substrate material layer 110 by at least one of liquid phase epitaxy, molecular beam epitaxy, and metal-organic chemical vapor deposition, and indium doping is performed during the growth of the n-type MCAD absorber layer to obtain an n-type MCAD layer 120.

[0042] Liquid phase epitaxy (LPE) technology produces high-quality n-type mercury cadmium telluride (HCdT) layers 120 with fast growth rates and relatively low costs, making it ideal for mass production. Molecular beam epitaxy (MBE) offers high precision and flexibility in layer placement. Metal-organic chemical vapor deposition (MOCVD) produces n-type HCdT layers 120 with good uniformity and high production efficiency. The appropriate growth method can be selected based on actual needs, and this invention does not limit the choice of method. Furthermore, this step further discloses that indium doping during the growth of the n-type HCdT absorber layer yields n-type HCdT layers 120 with even better uniformity and crystal quality.

[0043] Furthermore, the cadmium content in the n-type mercury cadmium telluride layer 120 ranges from 0.2 to 0.4, including endpoint values ​​such as any one of 0.20, 0.33, or 0.40.

[0044] Mercury cadmium telluride can be represented by a chemical formula, Hg. 1-x Cd x Te, and the cadmium composition is x, 0.2≤x≤0.4. Within the above range, good crystal growth can be achieved and the device has good performance. Of course, it can be adjusted according to the actual situation, and the present invention does not limit it.

[0045] In this step, preferably, the indium (In) doping concentration ranges from 2 × 10⁻⁶. 14 cm -3 Up to 2×10 16 cm -3 This includes endpoint values. Of course, other doping concentration parameters can also be selected according to actual conditions, but this invention does not limit them.

[0046] S102: A patterned photoresist layer 130 is formed on the surface of the n-type mercury cadmium telluride layer 120; the photoresist layer 130 includes an implantation via disposed in the ion implantation region; the implantation via exposes the n-type mercury cadmium telluride layer 120.

[0047] In other words, in this step, a layer of photoresist is uniformly coated on the surface of the n-type mercury cadmium telluride layer 120. After the photoresist coating is completed, the chip is dried to harden the photoresist on the chip surface. Subsequently, contact exposure and development are performed. The photolithographic holes exposed after development are the implantation vias. The depth of the implantation vias is the same as the thickness of the photoresist (i.e., penetrating the photoresist layer 130), corresponding to the areas of the device that require ion implantation. The corresponding process structure diagram for this step is shown in the figure. Figure 3 As shown.

[0048] S103: An injection barrier layer 140 is provided on the bottom surface of the injection through hole.

[0049] The injection barrier layer 140 is at least one of cadmium telluride layer, zinc sulfide layer and silicon nitride layer.

[0050] The cadmium telluride layer and the n-type mercury cadmium telluride layer 120 have a very high lattice matching degree, which can provide excellent electrical interface passivation; while the zinc sulfide layer has good optical transmittance and the process is mature; the silicon nitride layer is dense and has strong blocking ability. One or more of them can be selected for combination according to actual needs. This invention does not limit them.

[0051] In one specific embodiment, the thickness of the implantation barrier layer 140 ranges from 50 nanometers to 200 nanometers, including endpoint values ​​such as any one of 50.0 nanometers, 121.4 nanometers, or 200.0 nanometers. If the implantation barrier layer 140 is too thin, it cannot effectively protect the underlying n-type mercury cadmium telluride layer 120 during arsenic implantation, reduce implantation defects, and make it more difficult to control the removal thickness in subsequent steps. However, if it is too thick, arsenic ions, which have poor penetrating power, will have difficulty passing through the implantation barrier layer 140, resulting in poor arsenic implantation effect. The above range is the preferred range after extensive theoretical optimization and practical testing. Within the above range, both the arsenic implantation effect and the protection effect of the n-type mercury cadmium telluride layer 120 can be guaranteed, and it is easy to remove. Of course, other parameter ranges can also be used according to actual needs, and this invention does not limit them.

[0052] Furthermore, this step includes:

[0053] An injection barrier layer 140 is provided on the bottom surface of the injection via by at least one of electron beam evaporation, magnetron sputtering, and molecular beam epitaxy.

[0054] The electron beam evaporation technique provides an injection barrier layer 140 with low internal stress and high deposition rate; while the magnetron sputtering technique provides an injection barrier layer 140 with strong adhesion and good uniformity, and the equipment has strong process versatility; the molecular beam epitaxy technique provides an injection barrier layer 140 with high precision and high flexibility, which can be selected according to actual needs. This invention does not limit the selection of this layer. The process structure diagram corresponding to this step is shown below. Figure 4 As shown.

[0055] S104: Arsenic is implanted into the n-type mercury cadmium telluride layer 120 using the implantation barrier layer 140 and the photoresist layer 130 as a masking film to form a PN junction 150.

[0056] In this step, both the photoresist layer 130 and the implantation barrier layer 140 play a role in blocking arsenic ions during arsenic implantation. However, the implantation barrier layer 140 located in the ion implantation region only blocks a portion of the arsenic ions, while the photoresist layer 130 in other regions needs to block all arsenic ions. The corresponding process structure diagram for this step is shown below. Figure 5 As shown.

[0057] S105: After forming the PN junction 150, remove the photoresist layer 130.

[0058] In this step, a solvent stripping solution can be used to remove the photoresist layer 130 and process residues on the photoresist layer 130 from the chip surface. Only the implantation barrier layer 140 located on the surface of the ion implantation region remains on the entire surface of the n-type mercury cadmium telluride layer 120, forming a stepped structure. The corresponding process structure diagram for this step is shown below.Figure 6 As shown.

[0059] S106: Remove the injection barrier layer 140 by chemical mechanical polishing.

[0060] In this step, chemical mechanical polishing is used to remove the injection barrier layer 140 that forms the stepped structure (i.e., the surface above the n-type mercury cadmium telluride layer 120). Of course, the chemical mechanical polishing only removes the surface that is in contact with the material. Therefore, the n-type mercury cadmium telluride layer 120 will not be consumed before the injection barrier layer 140 is polished clean, thereby protecting the complete surface morphology of the n-type mercury cadmium telluride layer 120 and preventing it from deteriorating.

[0061] Of course, after removing the implantation barrier layer 140, high-temperature heat treatment is required to activate the implanted arsenic ions to the p-type. This typically involves a two-step annealing process. The first step, a closed-tube heat treatment, is performed at mercury saturated vapor pressure at a temperature of 360℃-450℃ for 0.5-3 hours. The second step, a closed-tube heat treatment, is performed at mercury saturated vapor pressure at a temperature of 200℃-250℃ for 24-48 hours. These conditions can be adjusted according to actual circumstances, and are not limited here. The corresponding process structure diagram for this step is shown below. Figure 7 As shown.

[0062] In a preferred embodiment, this step includes:

[0063] Using the n-type mercury cadmium telluride layer 120 as a stop layer, the injection barrier layer 140 is selectively chemically and mechanically ground.

[0064] In this preferred embodiment, when selecting the injection barrier layer 140, a material with a significantly different etching rate from that of the n-type mercury cadmium telluride layer 120 is intentionally chosen as the injection barrier layer 140. In this way, when selective chemical mechanical polishing is performed in this step, the polishing rate will decrease significantly when the polishing head begins to contact the n-type mercury cadmium telluride layer 120 after the injection barrier layer 140 has been polished, making it easier to control the polishing depth.

[0065] In another preferred embodiment, this step includes:

[0066] Under the monitoring of at least one of a microscope, a white light interferometer, and a profilometer, the injection barrier layer 140 is subjected to chemical mechanical polishing until the contact surface between the n-type mercury cadmium telluride layer 120 and the injection barrier layer 140 is reached.

[0067] In this preferred embodiment, the presence of any residue of the injection barrier layer 140 can be directly observed during the removal process using a microscope, white light interferometer, and profilometer. Grinding is stopped immediately after the injection barrier layer 140 is completely removed, thereby achieving precise control over the thickness of the removed injection barrier layer 140 and ensuring that the underlying n-type mercury cadmium telluride layer 120 is not damaged.

[0068] S107: A passivation layer 160 is formed on the surface of the n-type mercury cadmium telluride layer 120, and surface metallization is performed to obtain a p-on-n type mercury cadmium telluride device.

[0069] As one specific implementation method, this step includes:

[0070] A1: A CdTe (cadmium telluride) + ZnS (zinc sulfide) composite passivation layer 160 is grown on the surface of the n-type mercury cadmium telluride layer 120 using electron beam evaporation and magnetron sputtering. The total thickness of the passivation layer 160 is approximately 200 nm to 300 nm. The corresponding process structure diagram for this step is shown below. Figure 8 As shown.

[0071] A2: Perform conventional photolithography on the surface of the CdTe+ZnS composite passivation layer 160, and uniformly coat a layer of photoresist (referred to as the metallization photoresist layer 170). At the corresponding locations in the photolithographic area, use ICP (Inductively Coupled Plasma Etching) + chemical etching to remove a small portion of the arrayed P-type region in the CdTe+ZnS composite passivation layer 160 and the PN junction 150, forming the contact holes for which the contact electrode layer 180 needs to be grown. The corresponding process structure diagram for this step is shown below. Figure 9 As shown.

[0072] A3: A metal layer 180 is grown within the contact hole using a conventional ion beam sputtering process with a sputtering power of 300W. This metal layer typically consists of three layers: Cr (chromium), Pt (platinum), and Au (gold). The corresponding process structure diagram for this step is shown below. Figure 10 As shown.

[0073] A4: Immerse the chip in a conventional stripping solution to remove the metallized photoresist layer 170 and the metal on its surface, completing the fabrication of the p-on-n type mercury cadmium telluride device. The corresponding process structure diagram for this step is shown below. Figure 11 As shown.

[0074] The present invention provides a method for manufacturing a p-on-n type mercury cadmium telluride (HCdT) device, comprising: depositing an n-type HCdT layer 120 on the surface of a substrate material layer 110; depositing a patterned photoresist layer 130 on the surface of the n-type HCdT layer 120; the photoresist layer 130 including an implantation via disposed in an ion implantation region; the implantation via exposing the n-type HCdT layer 120; depositing an implantation barrier layer 140 on the bottom surface of the implantation via; using the implantation barrier layer 140 and the photoresist layer 130 as a masking film to perform arsenic implantation on the n-type HCdT layer 120 to form a PN junction 150; after forming the PN junction 150, removing the photoresist layer 130; removing the implantation barrier layer 140 by chemical mechanical polishing; depositing a passivation layer 160 on the surface of the n-type HCdT layer 120 and performing surface metallization to obtain a p-on-n type HCdT device. In this invention, a masking film for arsenic implantation is formed by a photoresist layer 130 and an implantation barrier layer 140. After arsenic implantation is completed, the photoresist layer 130 is removed first, and then the implantation barrier layer 140 is subjected to chemical mechanical polishing. Since only the implantation barrier layer 140 located in the ion implantation region exists on the surface of the n-type mercury cadmium telluride layer 120 after removing the photoresist layer 130, the implantation barrier layer 140 creates a certain height difference between the ion implantation region and the non-implantation region. Therefore, during the subsequent chemical mechanical polishing process to remove the barrier layer, this height difference can achieve a high removal rate and complete removal of the implantation barrier layer 140. Precise detection of the total removal time ensures that the surface of the n-type mercury cadmium telluride layer 120 is only significantly affected when the implantation barrier layer 140 is nearly completely removed. This provides significant protection for the surface of the n-type mercury cadmium telluride layer 120, preventing significant degradation of the surface uniformity and roughness during the removal process of the implantation barrier layer 140. This improves the p-type activation rate of arsenic ions during subsequent heat treatment activation and the film quality of the subsequent passivation layer 160. Furthermore, it can reduce the dark current level of p-on-n-type mercury cadmium telluride planar junction infrared devices and improve device performance.

[0075] The present invention also provides a p-on-n type mercury cadmium telluride device, wherein the p-on-n type mercury cadmium telluride device is a device obtained by any of the above-described production methods for p-on-n type mercury cadmium telluride devices. The present invention provides a method for manufacturing a p-on-n type mercury cadmium telluride (HCdT) device, comprising: depositing an n-type HCdT layer 120 on the surface of a substrate material layer 110; depositing a patterned photoresist layer 130 on the surface of the n-type HCdT layer 120; the photoresist layer 130 including an implantation via disposed in an ion implantation region; the implantation via exposing the n-type HCdT layer 120; depositing an implantation barrier layer 140 on the bottom surface of the implantation via; using the implantation barrier layer 140 and the photoresist layer 130 as a masking film to perform arsenic implantation on the n-type HCdT layer 120 to form a PN junction 150; after forming the PN junction 150, removing the photoresist layer 130; removing the implantation barrier layer 140 by chemical mechanical polishing; depositing a passivation layer 160 on the surface of the n-type HCdT layer 120 and performing surface metallization to obtain a p-on-n type HCdT device. In this invention, a masking film for arsenic implantation is formed by a photoresist layer 130 and an implantation barrier layer 140. After arsenic implantation is completed, the photoresist layer 130 is removed first, and then the implantation barrier layer 140 is subjected to chemical mechanical polishing. Since only the implantation barrier layer 140 located in the ion implantation region exists on the surface of the n-type mercury cadmium telluride layer 120 after removing the photoresist layer 130, the implantation barrier layer 140 creates a certain height difference between the ion implantation region and the non-implantation region. Therefore, during the subsequent chemical mechanical polishing process to remove the barrier layer, this height difference can achieve a high removal rate and complete removal of the implantation barrier layer 140. Precise detection of the total removal time ensures that the surface of the n-type mercury cadmium telluride layer 120 is only significantly affected when the implantation barrier layer 140 is nearly completely removed. This provides significant protection for the surface of the n-type mercury cadmium telluride layer 120, preventing significant degradation of the surface uniformity and roughness during the removal process of the implantation barrier layer 140. This improves the p-type activation rate of arsenic ions during subsequent heat treatment activation and the film quality of the subsequent passivation layer 160. Furthermore, it can reduce the dark current level of p-on-n-type mercury cadmium telluride planar junction infrared devices and improve device performance.

[0076] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0077] It should be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0078] The above provides a detailed description of the p-on-n type mercury cadmium telluride device and its manufacturing method provided by this invention. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the above embodiments are merely for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the protection scope of this invention.

Claims

1. A method for producing a p-on-n type mercury cadmium telluride device, characterized in that, include: An n-type mercury cadmium telluride layer is deposited on the surface of the substrate material layer; A patterned photoresist layer is formed on the surface of the n-type mercury cadmium telluride layer; the photoresist layer includes implantation vias disposed in the ion implantation region; the implantation vias expose the n-type mercury cadmium telluride layer; An injection barrier layer is provided on the bottom surface of the injection through-hole; Arsenic is implanted into the n-type mercury cadmium telluride layer using the implantation barrier layer and the photoresist layer as a masking film to form a PN junction; After forming the PN junction, the photoresist layer is removed; The injection barrier layer was removed using chemical mechanical polishing. A passivation layer is formed on the surface of the n-type mercury cadmium telluride layer, and surface metallization is performed to obtain a p-on-n type mercury cadmium telluride device.

2. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, Removing the injection barrier layer using chemical mechanical polishing includes: Using the n-type mercury cadmium telluride layer as a stop layer, the injection barrier layer is subjected to selective chemical mechanical polishing.

3. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, Removing the injection barrier layer using chemical mechanical polishing includes: Under the monitoring of at least one of a microscope, a white light interferometer, and a profilometer, the injection barrier layer is subjected to chemical mechanical polishing until the contact surface between the n-type mercury cadmium telluride layer and the injection barrier layer is reached.

4. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, The substrate material layer is at least one of a zinc zinc cadmium layer, a silicon layer, and a gallium arsenide layer.

5. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, An n-type mercury cadmium telluride layer is disposed on the surface of the substrate material layer, including: An n-type mercury cadmium telluride (MCT) absorber layer is grown on the surface of a substrate material layer using at least one of liquid phase epitaxy, molecular beam epitaxy, and metal-organic chemical vapor deposition, and indium doping is performed during the growth of the n-type MCT absorber layer to obtain the n-type MCT layer.

6. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, The cadmium content in the n-type mercury cadmium telluride layer ranges from 0.2 to 0.4, including the endpoint values.

7. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, An injection barrier layer is provided on the bottom surface of the injection via, including: An injection barrier layer is formed on the bottom surface of the injection via by at least one of electron beam evaporation, magnetron sputtering, and molecular beam epitaxy.

8. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, The injection barrier layer is at least one of cadmium telluride, zinc sulfide, and silicon nitride.

9. The method for producing a p-on-n type mercury cadmium telluride device as described in claim 1, characterized in that, The thickness of the injection barrier layer ranges from 50 nanometers to 200 nanometers, including endpoint values.

10. A p-on-n type mercury cadmium telluride device, characterized in that, The p-on-n type mercury cadmium telluride device is a device obtained by the manufacturing method of the p-on-n type mercury cadmium telluride device as described in any one of claims 1 to 9.

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