Semiconductor device
By adjusting the lead and terminal structure of the QFN semiconductor device, the thermal stress distribution is homogenized, solving the solder cracking problem caused by uneven thermal stress in the prior art, and improving the reliability and bonding strength of the semiconductor device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2026-03-27
AI Technical Summary
In existing QFN semiconductor devices, uneven thermal stress on multiple leads increases the risk of solder crack propagation, affecting the reliability of conductive connections.
A QFN semiconductor device was designed to homogenize thermal stress distribution by adjusting the structure of the leads and terminals to have different exposed surface sizes and positional relationships in different directions, and to further stabilize the structure by covering with sealing resin and using dummy terminals.
This achieves a more uniform distribution of thermal stress across multiple terminals, reduces the risk of solder cracking, and improves the bonding strength and reliability between the semiconductor device and the wiring substrate.
Smart Images

Figure CN121753550A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to semiconductor devices. Background Technology
[0002] As one type of semiconductor device package, the QFN (Quick Front-End Packaging) is known to have multiple leads arranged around its perimeter. Patent Document 1 discloses an example of a semiconductor device as a QFN. In this semiconductor device, the end faces of the multiple leads carrying the semiconductor elements are exposed in a manner consistent with the side surfaces of the sealing resin (encapsulation material in Patent Document 1). Correspondingly, the back faces of the multiple leads are exposed in a manner consistent with the bottom surface of the sealing resin. Therefore, compared to the QFP (Quick Front-End Packaging), where multiple leads protrude from the sides of the sealing resin, this semiconductor device has the advantage of miniaturizing the semiconductor device while reducing the mounting area of the semiconductor device relative to the wiring substrate.
[0003] In the semiconductor device disclosed in Patent Document 1, thermal stress caused by heat generated by the semiconductor element is generated in each of the plurality of leads. Due to the differences in the shape and other properties of the plurality of leads, the magnitude of the thermal stress acting on each of the plurality of leads may sometimes vary. As a result, when using this semiconductor device, there is a concern that the solder between the conductive bonding wiring substrate and the semiconductor device may crack and that the crack may propagate.
[0004] Existing technical documents
[0005] Patent documents
[0006] Patent Document 1: Japanese Patent Application Publication No. 2020-77694 Summary of the Invention
[0007] One objective of this invention is to provide a semiconductor device that is an improvement over conventional devices. In particular, in view of the above, one objective of this invention is to provide a semiconductor device capable of providing more uniform thermal stress acting on each of the plurality of terminals.
[0008] A semiconductor device provided by a first aspect of the present invention includes: a first terminal and a fourth terminal, which are separated from each other in a first direction; a second terminal and a third terminal, which are separated from each other in a second direction orthogonal to the first direction; a semiconductor element, which is conductive to at least one of the first terminal, the second terminal, the third terminal, and the fourth terminal; a first lead, which is located next to the first terminal in the second direction and extends in the first direction; a second lead, which is located next to the second terminal in the first direction and extends in the second direction; and a sealing resin covering the semiconductor element. The sealing resin has a bottom surface facing a third direction orthogonal to the first and second directions. The first terminal, the second terminal, the first lead, and the second lead each have a first mounting surface, a second mounting surface, a first exposed surface, and a second exposed surface exposed from the bottom surface. The dimension of the first exposed surface in the first direction is larger than the dimension of the first mounting surface in the first direction. The dimension of the second exposed surface in the second direction is larger than the dimension of the second mounting surface in the second direction. The first exposed surface has a first end and a second end that are separated from each other in the first direction. The second exposed surface has a third end and a fourth end that are separated from each other in the second direction. When viewed from above by a third party, the first end and the third end are located inside the periphery of the sealing resin. When viewed from above by a third party, the fourth end overlaps with the periphery of the sealing resin.
[0009] Other features and advantages of the invention will become more apparent from the following detailed description based on the accompanying drawings. Attached Figure Description
[0010] Figure 1 This is a perspective view of a semiconductor device according to the first embodiment of the present invention.
[0011] Figure 2 yes Figure 1 The diagram shows a top view of a semiconductor device, visible through a sealing resin.
[0012] Figure 3 Is with Figure 2 The corresponding top view further reveals the semiconductor components.
[0013] Figure 4 yes Figure 1 The semiconductor device shown is viewed from below.
[0014] Figure 5 yes Figure 1 The front view of the semiconductor device shown.
[0015] Figure 6 yes Figure 1Rear view of the semiconductor device shown.
[0016] Figure 7 yes Figure 1 Right view of the semiconductor device shown.
[0017] Figure 8 yes Figure 1 Left view of the semiconductor device shown.
[0018] Figure 9 It is along Figure 3 A cross-sectional view of the IX-IX line.
[0019] Figure 10 It is along Figure 3 A cross-sectional view along the XX line.
[0020] Figure 11 It is along Figure 3 A cross-sectional view along line XI-XI.
[0021] Figure 12 It is along Figure 3 A cross-sectional view along line XII-XII.
[0022] Figure 13 It is along Figure 3 A cross-sectional view of line XIII-XIII.
[0023] Figure 14 This is a top view of a semiconductor device according to a modified embodiment of the first embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0024] Figure 15 yes Figure 14 The semiconductor device shown is viewed from below.
[0025] Figure 16 This is a top view of a semiconductor device according to a second embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0026] Figure 17 yes Figure 16 The semiconductor device shown is viewed from below.
[0027] Figure 18 This is a top view of a semiconductor device according to a third embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0028] Figure 19 yes Figure 18 The semiconductor device shown is viewed from below.
[0029] Figure 20 It is along Figure 18 A sectional view along line XX-XX.
[0030] Figure 21 It is along Figure 18 A cross-sectional view of the XXI-XXI line.
[0031] Figure 22 This is a top view of a semiconductor device according to the fourth embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0032] Figure 23 yes Figure 22 The semiconductor device shown is viewed from below.
[0033] Figure 24 It is along Figure 22 A cross-sectional view of the XXIV-XXIV line.
[0034] Figure 25 This is a top view of a semiconductor device according to the fifth embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0035] Figure 26 yes Figure 25 The semiconductor device shown is viewed from below.
[0036] Figure 27 It is along Figure 25 A sectional view of the XXVII-XXVII line.
[0037] Figure 28 This is a top view of a semiconductor device according to a modified example of the fifth embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0038] Figure 29 yes Figure 28 The semiconductor device shown is viewed from below.
[0039] Figure 30 This is a top view of a semiconductor device according to the sixth embodiment of the present invention, showing the sealing resin and semiconductor elements.
[0040] Figure 31 yes Figure 30 The semiconductor device shown is viewed from below.
[0041] Figure 32 It is along Figure 30 A sectional view of the XXXII-XXXII line. Detailed Implementation
[0042] The invention will be described in detail with reference to the accompanying drawings.
[0043] First implementation method:
[0044] based on Figures 1 to 13The semiconductor device A10 according to the first embodiment of the present invention will be described. The semiconductor device A10 includes a plurality of first terminals 11, a plurality of second terminals 12, a plurality of third terminals 13, a plurality of fourth terminals 14, a plurality of dummy terminals 19, a first lead 21, a second lead 22, a third lead 23, a semiconductor element 30, and a sealing resin 40. The package form of the semiconductor device A10 is QFN (Quad For Non-Lead Package). Here, for ease of understanding, Figure 2 and Figure 3 Through sealing resin 40. For ease of understanding, Figure 3 Further through semiconductor element 30. In Figure 2 and Figure 3 In the diagram, the outline of the sealing resin 40 is represented by an imaginary line (double-dotted line). Figure 3 In the diagram, the outline of the semiconductor element 30 is represented by imaginary lines.
[0045] In the description of semiconductor device A10, for convenience, the direction in which the plurality of second terminals 12 are arranged is referred to as "first direction x". A direction orthogonal to the first direction x is referred to as "second direction y". A direction orthogonal to both the first direction x and the second direction y is referred to as "third direction z". The third direction z corresponds to the normal directions of the top surface 41 and the bottom surface 42 of the sealing resin 40, which will be described later.
[0046] like Figure 9 , Figure 11 as well as Figure 13 As shown, the sealing resin 40 covers a portion of each of the plurality of first terminals 11, a portion of each of the plurality of second terminals 12, a portion of each of the plurality of third terminals 13, and a portion of each of the plurality of fourth terminals 14. Furthermore, as... Figure 10 and Figure 12 As shown, the sealing resin 40 covers a portion of each of the first lead 21, the second lead 22, and the third lead 23, and the semiconductor element 30. The sealing resin 40 is electrically insulating. Black epoxy resin is an example of a material for the sealing resin 40. When viewed in the third direction z, the sealing resin 40 is rectangular.
[0047] like Figures 5-8 As shown, the sealing resin 40 has a top surface 41, a bottom surface 42, a first side surface 43, a second side surface 44, a third side surface 45, and a fourth side surface 46. The top surface 41 faces the third side in the z-direction. Figure 1As shown, the top surface 41 includes the periphery 401 of the sealing resin 40. The bottom surface 42 faces the side opposite to the top surface 41 in the third direction z. The first side surface 43 faces the side in the first direction x. The second side surface 44 faces the side in the second direction y. The third side surface 45 faces the side opposite to the second side surface 44 in the second direction y. The fourth side surface 46 faces the side opposite to the first side surface 43 in the first direction x.
[0048] like Figures 9-13 As shown, a plurality of first terminals 11, a plurality of second terminals 12, a plurality of third terminals 13, a plurality of fourth terminals 14, a first lead 21, a second lead 22, and a third lead 23 are respectively mounted on semiconductor elements 30. These terminals and leads constitute conductive paths between semiconductor elements 30 and wiring substrates on which semiconductor devices A10 are mounted. These terminals and leads contain copper (Cu). These terminals and leads are obtained from the same lead frame.
[0049] like Figure 2 and Figure 3 As shown, a plurality of first terminals 11 are located on one side of a first direction x. The plurality of first terminals 11 are arranged along a second direction y. In the semiconductor device A10, two adjacent first terminals 11 in the second direction y are connected to each other.
[0050] like Figure 9 and Figure 11 As shown, a plurality of first terminals 11 each have a first mounting surface 111, a first mounting surface 112, a first end face 113, and a first intermediate surface 114. The first mounting surface 111 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The first mounting surface 111 is opposite to the semiconductor element 30. The first mounting surface 112 faces the opposite side of the first mounting surface 111 in the third direction z. The first mounting surface 112 protrudes from the bottom surface 42 of the sealing resin 40. The first end face 113 faces the side in the first direction x. The first end face 113 protrudes from the first side surface 43 of the sealing resin 40. The first intermediate surface 114 is located between the first mounting surface 111 and the first mounting surface 112 in the third direction z. When viewed in the third direction z, the first intermediate surface 114 overlaps with the first mounting surface 111. The first intermediate surface 114 is covered by the sealing resin 40.
[0051] like Figure 2 and Figure 3 As shown, a plurality of second terminals 12 are located on one side of the second direction y. The plurality of second terminals 12 are arranged along the first direction x.
[0052] like Figure 13As shown, the plurality of second terminals 12 each have a second mounting surface 121, a second mounting surface 122, a second end face 123, and a second intermediate surface 124. The second mounting surface 121 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The second mounting surface 121 is opposite to the semiconductor element 30. The second mounting surface 122 faces the opposite side of the second mounting surface 121 in the third direction z. The second mounting surface 122 protrudes from the bottom surface 42 of the sealing resin 40. The second end face 123 faces the side in the second direction y. The second end face 123 protrudes from the second side surface 44 of the sealing resin 40. The second intermediate surface 124 is located between the second mounting surface 121 and the second mounting surface 122 in the third direction z. When viewed in the third direction z, the second intermediate surface 124 overlaps with the second mounting surface 121. The second intermediate surface 124 is covered by the sealing resin 40.
[0053] like Figure 2 and Figure 3 As shown, a plurality of third terminals 13 are located on the opposite side of the plurality of second terminals 12 in the second direction y, with reference to the semiconductor element 30. The plurality of third terminals 13 are arranged along the first direction x.
[0054] like Figure 13 As shown, the plurality of third terminals 13 each have a third mounting surface 131, a third mounting surface 132, a third end face 133, and a third intermediate surface 134. The third mounting surface 131 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The third mounting surface 131 is opposite to the semiconductor element 30. The third mounting surface 132 faces the opposite side of the third mounting surface 131 in the third direction z. The third mounting surface 132 protrudes from the bottom surface 42 of the sealing resin 40. The third end face 133 faces the opposite side of the second end face 123 of the plurality of second terminals 12 in the second direction y. The third end face 133 protrudes from the third side surface 45 of the sealing resin 40. The third intermediate surface 134 is located between the third mounting surface 131 and the third mounting surface 132 in the third direction z. When viewed in the third direction z, the third intermediate surface 134 overlaps with the third mounting surface 131. The third intermediate surface 134 is covered by the sealing resin 40.
[0055] like Figure 2 and Figure 3 As shown, a plurality of fourth terminals 14 are located on the opposite side of a plurality of first terminals 11 in the first direction x, with reference to the semiconductor element 30. The plurality of fourth terminals 14 are arranged along the second direction y. In the semiconductor device A10, any one of the plurality of fourth terminals 14 is connected to any one of the plurality of first terminals 11. Furthermore, any one of the plurality of fourth terminals 14 is connected to any one of the plurality of third terminals 13.
[0056] like Figure 9 and Figure 11 As shown, the plurality of fourth terminals 14 each have a fourth mounting surface 141, a fourth mounting surface 142, a fourth end face 143, and a fourth intermediate surface 144. The fourth mounting surface 141 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The fourth mounting surface 141 is opposite to the semiconductor element 30. The fourth mounting surface 142 faces the opposite side of the fourth mounting surface 141 in the third direction z. The fourth mounting surface 142 protrudes from the bottom surface 42 of the sealing resin 40. The fourth end face 143 faces the opposite side of the first end face 113 of the plurality of first terminals 11 in the first direction x. The fourth end face 143 protrudes from the fourth side surface 46 of the sealing resin 40. The fourth intermediate surface 144 is located between the fourth mounting surface 141 and the fourth mounting surface 142 in the third direction z. When viewed in the third direction z, the fourth intermediate surface 144 overlaps with the fourth mounting surface 141. The fourth intermediate surface 144 is covered by the sealing resin 40.
[0057] like Figures 2-4 As shown, the first lead 21 is located adjacent to any one of the plurality of first terminals 11 in the second direction y. The first lead 21 extends in the first direction x. In the semiconductor device A10, the first lead 21 is connected to any one of the plurality of fourth terminals 14. Figure 10 As shown, the first lead 21 has a first main surface 211, a first exposed surface 212, and a first end face 213. The first main surface 211 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The first main surface 211 is opposite to the semiconductor element 30. The first exposed surface 212 faces the opposite side of the first main surface 211 in the third direction z. The first exposed surface 212 is exposed from the bottom surface 42 of the sealing resin 40. The first end face 213 faces the same side as the first end face 113 of each of the plurality of first terminals 11 in the first direction x. The first end face 213 is exposed from the first side surface 43 of the sealing resin 40.
[0058] like Figure 4 As shown, the dimension D1 of the first exposed surface 212 of the first lead 21 in the first direction x is larger than the dimension L1 of the first mounting surface 112 of any of the plurality of first terminals 11 located at adjacent positions in the second direction y of the first lead 21 in the first direction x. Figure 4 and Figure 10As shown, the first exposed surface 212 has a first end 212A and a second end 212B that are separated from each other in the first direction x. When viewed in the third direction z, the first end 212A is located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the second end 212B overlaps with the periphery 401 of the sealing resin 40. The second end 212B is in contact with the bottom surface 42 of the sealing resin 40. Relative to the first mounting surface 112 of any of the plurality of first terminals 11 located at adjacent positions in the second direction y of the first lead 21, the second end 212B is located closer to the first mounting surface 112 than the first end 212A.
[0059] like Figures 2-4 As shown, the second lead 22 is located adjacent to any one of the plurality of second terminals 12 in the first direction x. The second lead 22 extends in the second direction y. Figure 12 As shown, the second lead 22 has a second main surface 221, a second exposed surface 222, and a second end surface 223. The second main surface 221 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The second main surface 221 is opposite to the semiconductor element 30. The second exposed surface 222 faces the opposite side of the second main surface 221 in the third direction z. The second exposed surface 222 protrudes from the bottom surface 42 of the sealing resin 40. The second end surface 223 faces the same side as the second end surface 123 of each of the plurality of second terminals 12 in the second direction y. The second end surface 223 protrudes from the second side surface 44 of the sealing resin 40.
[0060] like Figure 4 As shown, the dimension D2 of the second exposed surface 222 of the second lead 22 in the second direction y is larger than the dimension L2 of the second mounting surface 122 of any of the plurality of second terminals 12 located at adjacent positions in the first direction x of the second lead 22 in the second direction y. Figure 4 and Figure 12 As shown, the second exposed surface 222 has a third end 222A and a fourth end 222B that are separated from each other in the second direction y. When viewed in the third direction z, the third end 222A is located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B overlaps with the periphery 401 of the sealing resin 40. The fourth end 222B is in contact with the bottom surface 42 of the sealing resin 40. Relative to the second mounting surface 122 of any of the plurality of second terminals 12 located at adjacent positions in the first direction x of the second lead 22, the fourth end 222B is located closer to the second mounting surface 122 than the third end 222A.
[0061] like Figures 2-4 As shown, the third lead 23 is located adjacent to any one of the plurality of third terminals 13 in the first direction x. The third lead 23 extends in the second direction y. Figure 12As shown, the third lead 23 has a third main surface 231, a third exposed surface 232, and a third end surface 233. The third main surface 231 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The third main surface 231 is opposite to the semiconductor element 30. The third exposed surface 232 faces the opposite side of the third main surface 231 in the third direction z. The third exposed surface 232 is exposed from the bottom surface 42 of the sealing resin 40. The third end surface 233 faces the same side as the third end surface 133 of each of the plurality of third terminals 13 in the second direction y. The third end surface 233 is exposed from the third side surface 45 of the sealing resin 40.
[0062] like Figure 4 As shown, the dimension D3 of the third exposed surface 232 of the third lead 23 in the second direction y is larger than the dimension L3 of the third mounting surface 132 of any of the plurality of third terminals 13 located at adjacent positions in the first direction x of the third lead 23 in the second direction y. Figure 4 and Figure 12 As shown, the third exposed surface 232 has a fifth end 232A and a sixth end 232B that are separated from each other in the second direction y. When viewed in the third direction z, the fifth end 232A is located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the sixth end 232B overlaps with the periphery 401 of the sealing resin 40. The sixth end 232B is in contact with the bottom surface 42 of the sealing resin 40. Relative to the third mounting surface 132 of any of the plurality of third terminals 13 located at adjacent positions in the first direction x of the third lead 23, the sixth end 232B is located closer to the third mounting surface 132 than the fifth end 232A.
[0063] like Figure 4 As shown, the size D1 of the first exposed surface 212 of the first lead 21 is larger than the size D2 of the second exposed surface 222 of the second lead 22. In the semiconductor device A10, the size D3 of the third exposed surface 232 of the third lead 23 is equal to the size D2 of the second exposed surface 222.
[0064] like Figure 4 As shown, in the third direction z, the first center line C1 overlaps with the first exposed surface 212 of the first lead 21 and the third exposed surface 232 of the third lead 23. The first center line C1 is a straight line passing through the center of the second exposed surface 222 of the second lead 22 in the first direction x and extending in the second direction y. The third end 222A of the second exposed surface 222 is located closer to the first exposed surface 212 than the fifth end 232A of the third exposed surface 232.
[0065] like Figure 4As shown, when viewed in the third direction z, the distance between the intersection point P of the first center line C1 and the second center line C2 and the center C of the bottom surface 42 of the sealing resin 40 is less than or equal to the dimension L1 of the first mounting surface 112 of any one of the plurality of first terminals 11. The second center line C2 is a straight line extending in the first direction x through the center of the first exposed surface 212 of the first lead 21 in the second direction y. When viewed in the third direction z, the second center line C2 overlaps with the fourth mounting surface 142 of any one of the plurality of fourth terminals 14.
[0066] like Figures 2-4 As shown, when viewed from a third direction z, a plurality of dummy terminals 19 are disposed at the four corners of the sealing resin 40. At least one of the plurality of dummy terminals 19 is not conductive to the semiconductor element 30. In the semiconductor device A10, any one of the plurality of dummy terminals 19 is connected to any one of the plurality of fourth terminals 14. The plurality of dummy terminals 19 comprise copper.
[0067] like Figure 3 and Figure 4 As shown, the plurality of dummy terminals 19 each have a dummy exposed surface 191, a first surface 192, a second surface 193, and a third surface 194. The dummy exposed surface 191 faces the side opposite to the top surface 41 of the sealing resin 40 in the third direction z. The dummy exposed surface 191 protrudes from the bottom surface 42 of the sealing resin 40. The dimension of the dummy exposed surface 191 in the first direction x is greater than the dimension of the second mounting surface 122 of each of the plurality of second terminals 12 in the first direction x. The dimension of the dummy exposed surface 191 in the second direction y is greater than the dimension of the first mounting surface 112 of each of the plurality of first terminals 11 in the second direction y. The first surface 192 faces the side facing the first direction x. The first surface 192 protrudes from either the first side surface 43 or the fourth side surface 46 of the sealing resin 40. The second surface 193 faces the side facing the second direction y. The second surface 193 protrudes from either the second side surface 44 or the third side surface 45 of the sealing resin 40. The third surface 194 is connected to the first surface 192 and the second surface 193. The third surface 194 is inclined relative to the first direction x and the second direction y. The third surface 194 is covered by sealing resin 40.
[0068] like Figures 9-13As shown, a semiconductor element 30 is mounted on a plurality of first terminals 11, a plurality of second terminals 12, a plurality of third terminals 13, a plurality of fourth terminals 14, a first lead 21, a second lead 22, and a third lead 23. The semiconductor element 30 is, for example, an LSI (Large Scale Integration). The semiconductor element 30 has a plurality of electrodes 31. The plurality of electrodes 31 are located on a side opposite to the plurality of first terminals 11, second terminals 12, third terminals 13, and fourth terminals 14 in a third direction z. The plurality of electrodes 31 are electrically bonded to any one of the plurality of first terminals 11, second terminals 12, third terminals 13, fourth terminals 14, first leads 21, second leads 22, and third leads 23 via a bonding layer 39. Thus, the semiconductor element 30 is electrically connected to the plurality of first terminals 11, second terminals 12, third terminals 13, fourth terminals 14, first leads 21, second leads 22, and third leads 23. The bonding layer 39 contains nickel (Ni), stacked tin (Sn), and silver (Ag). Additionally, the bonding layer 39 may contain nickel, tin, and antimony (Sb).
[0069] Next, based on Figure 14 and Figure 15 The semiconductor device A11 of a modified example of the first embodiment of the present invention will be described here. For ease of understanding, Figure 14 Through the semiconductor element 30 and the sealing resin 40. In Figure 14 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0070] like Figure 15 As shown, in semiconductor device A11, compared to semiconductor device A10, the size D2 of the second exposed surface 222 of the second lead 22 is larger than the size D3 of the third exposed surface 232 of the third lead 23.
[0071] Next, the function and effect of semiconductor device A10 will be explained.
[0072] Semiconductor device A10 includes a first terminal 11, a second terminal 12, a third terminal 13, a fourth terminal 14, a first lead 21, a second lead 22, a semiconductor element 30, and a sealing resin 40. The dimension D1 of the first exposed surface 212 of the first lead 21 is larger than the dimension L1 of the first mounting surface 112 of the first terminal 11. The dimension D2 of the second exposed surface 222 of the second lead 22 is larger than the dimension L2 of the second mounting surface 122 of the second terminal 12. When viewed in the third direction z, the first end 212A of the first exposed surface 212 and the third end 222A of the second exposed surface 222 are located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B of the second exposed surface 222 overlaps with the periphery 401 of the sealing resin 40. By adopting this structure, the deviation in the magnitude of the thermal stress acting on the first terminal 11 and the second terminal 12, respectively, caused by the heat generated by the semiconductor element 30, can be reduced. Therefore, in the use of semiconductor device A10, cracking of the solder between the conductive bonding wiring substrate and semiconductor device A10 is suppressed. Thus, according to this structure, in semiconductor device A10, the thermal stress acting on each of the multiple terminals can be made more uniform.
[0073] The semiconductor device A10 also includes a third lead 23. The dimension D3 of the third exposed surface 232 of the third lead 23 is larger than the dimension L3 of the third mounting surface 132 of the third terminal 13. When viewed in the third direction z, the fifth end 232A of the third exposed surface 232 is located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the sixth end 232B of the third exposed surface 232 overlaps with the periphery 401 of the sealing resin 40. By adopting this structure, the thermal stress acting on the first terminal 11, the second terminal 12, and the third terminal 13 respectively due to the heat generated by the semiconductor element 30 can be made more uniform.
[0074] In the above case, when viewed from a third-party z-axis, the distance between the intersection point P of the first center line C1 and the second center line C2 and the center C of the bottom surface 42 of the sealing resin 40 is less than or equal to the dimension L1 of the first mounting surface 112 of any one of the plurality of first terminals 11 (see reference). Figure 4 By adopting this structure, the thermal stress acting on the first terminal 11, the second terminal 12, and the third terminal 13 can be made more uniform.
[0075] The second end 212B of the first exposed surface 212 of the first lead 21, the fourth end 222B of the second exposed surface 222 of the second lead 22, and the sixth end 232B of the third exposed surface 232 of the third lead 23 are in contact with the bottom surface 42 of the sealing resin 40. By adopting this structure, the concentration of thermal stress acting on the first lead 21, the second lead 22, and the third lead 23 can be reduced.
[0076] The sealing resin 40 has a first side surface 43 facing a first direction x. The first terminal 11 and the first lead 21 are exposed from the first side surface 43. By adopting this structure, when the semiconductor device A10 is mounted on the wiring substrate, the volume of solder attached to the first terminal 11 and the first lead 21, respectively, increases. As a result, the bonding strength of the semiconductor device A10 to the wiring substrate is further improved.
[0077] The sealing resin 40 has a second side surface 44 facing the second direction y. The second terminal 12 and the second lead 22 are exposed from the second side surface 44. By adopting this structure, when the semiconductor device A10 is mounted on the wiring substrate, the volume of solder attached to the second terminal 12 and the second lead 22, respectively, increases. As a result, the bonding strength of the semiconductor device A10 to the wiring substrate is further improved.
[0078] The semiconductor device A10 also includes a plurality of dummy terminals 19 disposed at the four corners of the sealing resin 40 when viewed in a third direction z. Each of the plurality of dummy terminals 19 has a dummy exposed surface 191 protruding from the bottom surface 42 of the sealing resin 40. By adopting this structure, when mounting the semiconductor device A10 onto the wiring substrate, by bonding the dummy exposed surfaces 191 of each of the plurality of dummy terminals 19 to the wiring substrate, the concentration of thermal stress acting on the first terminal 11, the second terminal 12, the third terminal 13, and the fourth terminal 14 can be reduced.
[0079] In the above case, the dimension of the first direction x of the dummy exposed surface 191 is larger than the dimension of the first direction x of the second mounting surface 122 of the second terminal 12. Correspondingly, the dimension of the second direction y of the dummy exposed surface 191 is larger than the dimension of the second direction y of the first terminal 11. By adopting this structure, the concentration of thermal stress acting on the first terminal 11, the second terminal 12, the third terminal 13, and the fourth terminal 14 can be reduced more effectively.
[0080] Second implementation method:
[0081] based on Figure 16 and Figure 17 The semiconductor device A20 according to the second embodiment of the present invention will be described. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are labeled with the same reference numerals, and repeated descriptions are omitted. Here, for ease of understanding, Figure 16 Through the semiconductor element 30 and the sealing resin 40. In Figure 16 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0082] Unlike semiconductor device A10, semiconductor device A20 does not have a third lead 23.
[0083] like Figure 16 and Figure 17 As shown, semiconductor device A20 does not have a third lead 23. In semiconductor device A20, the third lead 23 is replaced by a third terminal 13.
[0084] Next, the function and effect of the semiconductor device A20 will be explained.
[0085] Semiconductor device A20 includes a first terminal 11, a second terminal 12, a third terminal 13, a fourth terminal 14, a first lead 21, a second lead 22, a semiconductor element 30, and a sealing resin 40. The dimension D1 of the first exposed surface 212 of the first lead 21 is larger than the dimension L1 of the first mounting surface 112 of the first terminal 11. The dimension D2 of the second exposed surface 222 of the second lead 22 is larger than the dimension L2 of the second mounting surface 122 of the second terminal 12. When viewed in the third direction z, the first end 212A of the first exposed surface 212 and the third end 222A of the second exposed surface 222 are located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B of the second exposed surface 222 overlaps with the periphery 401 of the sealing resin 40. Therefore, according to this structure, in semiconductor device A20, the thermal stress acting on each of the multiple terminals can be made more uniform. Furthermore, in semiconductor device A20, by having a structure common to semiconductor device A10, it achieves the same function as semiconductor device A10.
[0086] Third implementation method:
[0087] based on Figures 18-21 The semiconductor device A30 according to the third embodiment of the present invention will be described. In these figures, elements that are the same or similar to those in the semiconductor device A10 described above are labeled with the same reference numerals, and repeated descriptions are omitted. Here, for ease of understanding, Figure 18 Through the semiconductor element 30 and the sealing resin 40. In Figure 18 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0088] In semiconductor device A30, the structure of the second lead 22 and the third lead 23 is different from that of semiconductor device A10.
[0089] like Figures 18-21 As shown, the position of the third lead 23 is different from that in the case of semiconductor device A10. When viewed in the third direction z, the first center line C1 is separated from the third exposed surface 232 of the third lead 23.
[0090] Next, the function and effect of the semiconductor device A30 will be explained.
[0091] Semiconductor device A30 includes a first terminal 11, a second terminal 12, a third terminal 13, a fourth terminal 14, a first lead 21, a second lead 22, a semiconductor element 30, and a sealing resin 40. The dimension D1 of the first exposed surface 212 of the first lead 21 is larger than the dimension L1 of the first mounting surface 112 of the first terminal 11. The dimension D2 of the second exposed surface 222 of the second lead 22 is larger than the dimension L2 of the second mounting surface 122 of the second terminal 12. When viewed in the third direction z, the first end 212A of the first exposed surface 212 and the third end 222A of the second exposed surface 222 are located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B of the second exposed surface 222 overlaps with the periphery 401 of the sealing resin 40. Therefore, according to this structure, in semiconductor device A30, the thermal stress acting on each of the multiple terminals can be made more uniform. Furthermore, in semiconductor device A30, by having a structure common to semiconductor device A10, it achieves the same function as semiconductor device A10.
[0092] Fourth implementation method:
[0093] based on Figures 22-24 The semiconductor device A40 according to the fourth embodiment of the present invention will be described. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are labeled with the same reference numerals, and repeated descriptions are omitted. Here, for ease of understanding, Figure 22 Through the semiconductor element 30 and the sealing resin 40. In Figure 22 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0094] In semiconductor device A40, the structure of the first lead 21 is different from that in semiconductor device A10.
[0095] like Figure 23 and Figure 24 As shown, the second end 212B of the first exposed surface 212 of the first lead 21 is located inside the periphery 401 of the sealing resin 40. The size D1 of the first exposed surface 212 is smaller than the size D1 in the case of the semiconductor device A10. When viewed in the third direction z, the first center line C1 overlaps with the first exposed surface 212.
[0096] Next, the function and effect of the semiconductor device A40 will be explained.
[0097] Semiconductor device A40 includes a first terminal 11, a second terminal 12, a third terminal 13, a fourth terminal 14, a first lead 21, a second lead 22, a semiconductor element 30, and a sealing resin 40. The dimension D1 of the first exposed surface 212 of the first lead 21 is larger than the dimension L1 of the first mounting surface 112 of the first terminal 11. The dimension D2 of the second exposed surface 222 of the second lead 22 is larger than the dimension L2 of the second mounting surface 122 of the second terminal 12. When viewed in the third direction z, the first end 212A of the first exposed surface 212 and the third end 222A of the second exposed surface 222 are located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B of the second exposed surface 222 overlaps with the periphery 401 of the sealing resin 40. Therefore, according to this structure, in semiconductor device A40, the thermal stress acting on each of the multiple terminals can be made more uniform. Furthermore, in semiconductor device A40, by having a structure common to semiconductor device A10, it achieves the same function as semiconductor device A10.
[0098] Fifth implementation method:
[0099] based on Figures 25-27 The semiconductor device A50 according to the fifth embodiment of the present invention will be described. In these figures, elements that are the same or similar to those in the semiconductor device A10 described above are labeled with the same reference numerals, and repeated descriptions are omitted. Here, for ease of understanding, Figure 25 Through the semiconductor element 30 and the sealing resin 40. In Figure 25 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0100] Unlike semiconductor device A10, semiconductor device A50 also has a fourth lead 24.
[0101] like Figure 25 and Figure 26As shown, the fourth lead 24 is located adjacent to any one of the plurality of fourth terminals 14 in the second direction y. The fourth lead 24 extends in the first direction x. In the semiconductor device A50, the fourth lead 24 is connected to the first lead 21. Thus, the fourth lead 24 is connected to the semiconductor element 30 via the first lead 21. The fourth lead 24 has a fourth main surface 241, a fourth exposed surface 242, and a fourth end surface 243. The fourth main surface 241 faces the same side as the top surface 41 of the sealing resin 40 in the third direction z. The fourth main surface 241 is opposite to the semiconductor element 30. The fourth exposed surface 242 faces the opposite side of the fourth main surface 241 in the third direction z. The fourth exposed surface 242 is exposed from the bottom surface 42 of the sealing resin 40. The fourth end surface 243 faces the same side as the fourth end surface 143 of each of the plurality of fourth terminals 14 in the first direction x. The fourth end surface 243 is exposed from the fourth side surface 46 of the sealing resin 40.
[0102] like Figure 26 As shown, the dimension D4 of the fourth exposed surface 242 of the fourth lead 24 in the first direction x is larger than the dimension L4 of the fourth mounting surface 142 of any of the plurality of fourth terminals 14 located at adjacent positions in the second direction y of the fourth lead 24 in the first direction x. Figure 26 and Figure 27 As shown, the fourth exposed surface 242 has a seventh end 242A and an eighth end 242B that are separated from each other in the first direction x. When viewed in the third direction z, the seventh end 242A is located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the eighth end 242B overlaps with the periphery 401 of the sealing resin 40. The eighth end 242B is in contact with the bottom surface 42 of the sealing resin 40. Relative to the fourth mounting surface 142 of any of the plurality of fourth terminals 14 located at adjacent positions in the second direction y of the fourth lead 24, the eighth end 242B is located closer to the fourth mounting surface 142 than the seventh end 242A.
[0103] like Figure 26 As shown, when viewed in the third direction z, the first centerline C1 is separated from the first exposed surface 212 of the first lead 21 and the fourth exposed surface 242 of the fourth lead 24. When viewed in the third direction z, the second centerline C2 overlaps with the fourth exposed surface 242 and is far from the second exposed surface 222 of the second lead 22 and the third exposed surface 232 of the third lead 23. The size D4 of the fourth exposed surface 242 is different from the size D2 of the first exposed surface 212 of the first lead 21. In the semiconductor device A50, the size D4 of the fourth exposed surface 242 is larger than the size D1 of the first exposed surface 212.
[0104] Next, based on Figure 28 and Figure 29The semiconductor device A51 of a modified example of the fifth embodiment of the present invention will be described here. For ease of understanding, Figure 28 Through the semiconductor element 30 and the sealing resin 40. In Figure 28 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0105] like Figure 29 As shown, in semiconductor device A51, when viewed in the third direction z, the first center line C1 overlaps with the first exposed surface 212 of the first lead 21 and is separated from the fourth exposed surface 242 of the fourth lead 24. In semiconductor device A51, the size D4 of the fourth exposed surface 242 is smaller than the size D1 of the first exposed surface 212.
[0106] Next, the function and effect of the semiconductor device A50 will be explained.
[0107] Semiconductor device A50 includes a first terminal 11, a second terminal 12, a third terminal 13, a fourth terminal 14, a first lead 21, a second lead 22, a semiconductor element 30, and a sealing resin 40. The dimension D1 of the first exposed surface 212 of the first lead 21 is larger than the dimension L1 of the first mounting surface 112 of the first terminal 11. The dimension D2 of the second exposed surface 222 of the second lead 22 is larger than the dimension L2 of the second mounting surface 122 of the second terminal 12. When viewed in the third direction z, the first end 212A of the first exposed surface 212 and the third end 222A of the second exposed surface 222 are located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B of the second exposed surface 222 overlaps with the periphery 401 of the sealing resin 40. Therefore, according to this structure, in semiconductor device A50, the thermal stress acting on each of the multiple terminals can be made more uniform. Furthermore, in semiconductor device A50, by having a structure common to semiconductor device A10, it achieves the same function as semiconductor device A10.
[0108] The semiconductor device A50 also includes a fourth lead 24. The dimension D4 of the fourth exposed surface 242 of the fourth lead 24 is larger than the dimension L4 of the fourth mounting surface 142 of the fourth terminal 14. When viewed in the third direction z, the seventh end 242A of the fourth exposed surface 242 is located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the eighth end 242B of the fourth exposed surface 242 overlaps with the periphery 401 of the sealing resin 40. By adopting this structure, the thermal stress acting on the first terminal 11, the second terminal 12, the third terminal 13, and the fourth terminal 14 respectively due to the heat generated by the semiconductor element 30 can be made more uniform.
[0109] Sixth implementation method:
[0110] based on Figures 30-32 The semiconductor device A60 according to the sixth embodiment of the present invention will be described. In these figures, elements that are the same or similar to those in the semiconductor device A10 described above are labeled with the same reference numerals, and repeated descriptions are omitted. Here, for ease of understanding, Figure 30 Through the semiconductor element 30 and the sealing resin 40. In Figure 30 In the diagram, imaginary lines represent the shapes of the semiconductor element 30 and the sealing resin 40, respectively.
[0111] In semiconductor device A60, the structure of the plurality of first terminals 11 and the plurality of fourth terminals 14 is different from that of semiconductor device A10.
[0112] like Figure 31 and Figure 32 As shown, two of the plurality of first terminals 11 each have a first secondary mounting surface 115. The first secondary mounting surface 115 protrudes from the bottom surface 42 of the sealing resin 40. In each of the two first terminals 11, the first secondary mounting surface 115 is located inside the bottom surface 42 of the sealing resin 40 compared to the first mounting surface 112. In each of the two first terminals 11, the dimension of the first secondary mounting surface 115 in the second direction y is smaller than the dimension of the first mounting surface 112 in the second direction y. In each of the two first terminals 11, the first secondary mounting surface 115 is located closer to the first exposed surface 212 of the first lead 21 than the first mounting surface 112.
[0113] like Figure 31 and Figure 32 As shown, two of the plurality of fourth terminals 14 each have a second mounting surface 145. The second mounting surface 145 protrudes from the bottom surface 42 of the sealing resin 40. In each of the two fourth terminals 14, the second mounting surface 145 is located inside the bottom surface 42 of the sealing resin 40 compared to the fourth mounting surface 142. In each of the two fourth terminals 14, the dimension of the second mounting surface 145 in the second direction y is smaller than the dimension of the fourth mounting surface 142 in the second direction y. In each of the two fourth terminals 14, the second mounting surface 145 is located closer to the first exposed surface 212 of the first lead 21 than the fourth mounting surface 142.
[0114] Next, the function and effect of the semiconductor device A60 will be explained.
[0115] Semiconductor device A60 includes a first terminal 11, a second terminal 12, a third terminal 13, a fourth terminal 14, a first lead 21, a second lead 22, a semiconductor element 30, and a sealing resin 40. The dimension D1 of the first exposed surface 212 of the first lead 21 is larger than the dimension L1 of the first mounting surface 112 of the first terminal 11. The dimension D2 of the second exposed surface 222 of the second lead 22 is larger than the dimension L2 of the second mounting surface 122 of the second terminal 12. When viewed in the third direction z, the first end 212A of the first exposed surface 212 and the third end 222A of the second exposed surface 222 are located inside the periphery 401 of the sealing resin 40. When viewed in the third direction z, the fourth end 222B of the second exposed surface 222 overlaps with the periphery 401 of the sealing resin 40. Therefore, according to this structure, in semiconductor device A60, the thermal stress acting on each of the multiple terminals can be made more uniform. Furthermore, in semiconductor device A60, by having a structure common to semiconductor device A10, it achieves the same function as semiconductor device A10.
[0116] The first terminal 11 has a first secondary mounting surface 115 exposed from the bottom surface 42 of the sealing resin 40. The first secondary mounting surface 115 is located inside the bottom surface 42, closer to the first mounting surface 112 of the first terminal 11. By adopting this structure, when any one of the plurality of electrodes 31 of the semiconductor element 30 is conductively bonded to the first terminal 11, it is possible to suppress the deflection of the first terminal 11 about a direction orthogonal to the third direction z. As a result, it is possible to prevent a decrease in the bonding strength of the semiconductor element 30 relative to the first terminal 11.
[0117] This invention is not limited to the embodiments described above. The specific structure of each part of this invention can be freely modified in various ways.
[0118] The present invention includes the embodiments described in the following notes.
[0119] Postscript 1.
[0120] A semiconductor device comprising:
[0121] The first terminal and the fourth terminal are separated from each other in a first direction;
[0122] The second and third terminals are separated from each other in a second direction orthogonal to the first direction;
[0123] A semiconductor element that is connected to at least one of the first terminal, the second terminal, the third terminal, and the fourth terminal;
[0124] A first lead is located next to the first terminal in the second direction and extends in the first direction;
[0125] A second lead, which is located next to the second terminal in the first direction and extends in the second direction; and
[0126] A sealing resin is used to cover the semiconductor element.
[0127] The sealing resin has a bottom surface facing a third direction orthogonal to the first and second directions.
[0128] The first terminal, the second terminal, the first lead, and the second lead each have a first mounting surface, a second mounting surface, a first exposed surface, and a second exposed surface protruding from the bottom surface.
[0129] The dimension of the first exposed surface in the first direction is larger than the dimension of the first mounting surface in the first direction.
[0130] The dimension of the second exposed surface in the second direction is larger than the dimension of the second mounting surface in the second direction.
[0131] The first exposed surface has a first end and a second end that are separated from each other in the first direction.
[0132] The second exposed surface has a third end and a fourth end that are separated from each other in the second direction.
[0133] When viewed from above by a third party, the first end and the third end are located inside the periphery of the sealing resin.
[0134] When viewed from above by the third party, the fourth end overlaps with the periphery of the sealing resin.
[0135] Postscript 2.
[0136] According to the semiconductor device described in Appendix 1, the fourth terminal is located closer to the second mounting surface than the third terminal and is in contact with the bottom surface.
[0137] Postscript 3.
[0138] According to the semiconductor device described in Appendix 2, the dimension of the first exposed surface in the first direction is larger than the dimension of the second exposed surface in the second direction.
[0139] Appendix 4.
[0140] According to the semiconductor device described in Appendix 3, when viewed upwards by a third party, a first center line passing through the center of the second exposed surface in the first direction and extending in the second direction overlaps with the first exposed surface.
[0141] Postscript 5.
[0142] According to the semiconductor device described in Appendix 4, the second end is located closer to the first mounting surface than the first end and is in contact with the bottom surface.
[0143] Postscript 6.
[0144] According to the semiconductor device described in Appendix 4, when viewed from the third party upwards, the second end is located inside the periphery of the sealing resin.
[0145] Postscript 7.
[0146] According to the semiconductor device described in Appendix 3, when viewed upwards by a third party, the first center line, which is located at the center of the second exposed surface in the first direction and extends in the second direction, separates from the first exposed surface.
[0147] Postscript 8.
[0148] The semiconductor device according to any one of Appendices 4 to 7 further includes a third lead, which is located next to the third terminal in the first direction and extends in the second direction.
[0149] The third terminal and the third lead each have a third mounting surface and a third exposed surface protruding from the bottom surface, respectively.
[0150] The dimension of the third exposed surface in the second direction is larger than the dimension of the third mounting surface in the second direction.
[0151] The third exposed surface has a fifth end and a sixth end that are separated from each other in the second direction.
[0152] When viewed from above by a third party, the fifth end is located inside the periphery of the sealing resin.
[0153] When viewed from above by the third party, the sixth end overlaps with the periphery of the sealing resin.
[0154] Postscript 9.
[0155] According to the semiconductor device described in Appendix 8, the sixth terminal is located closer to the third mounting surface than the fifth terminal and is in contact with the bottom surface.
[0156] Postscript 10.
[0157] According to the semiconductor device described in Appendix 9, when viewed from the third party upwards, the first centerline overlaps with the third exposed surface.
[0158] Postscript 11.
[0159] According to the semiconductor device described in Appendix 10, the third terminal is located closer to the first exposed surface than the fifth terminal.
[0160] Postscript 12.
[0161] According to the semiconductor device described in Appendix 10, when viewed from above by a third party, the distance between the intersection of the first center line and the second center line extending in the first direction through the center of the first exposed surface and the center of the bottom surface is shorter than the dimension of the first mounting surface in the first direction.
[0162] Postscript 13.
[0163] According to the semiconductor device described in Appendix 9, when viewed from the third-party upwards, the first centerline separates from the third exposed surface.
[0164] Postscript 14.
[0165] According to the semiconductor device described in Appendix 9, the semiconductor element has a plurality of electrodes located on a side facing the third direction opposite to the first terminal, the second terminal, the third terminal, and the fourth terminal.
[0166] Any one of the plurality of electrodes is electrically connected to any one of the first terminal, the second terminal, the third terminal, and the fourth terminal.
[0167] Postscript 15.
[0168] According to the semiconductor device described in Appendix 14, any one of the plurality of electrodes is electrically connected to any one of the first lead, the second lead, and the third lead.
[0169] Postscript 16.
[0170] According to the semiconductor device described in Appendix 15, the sealing resin has a first side facing the first direction.
[0171] The first terminal and the first lead are exposed from the first side.
[0172] Postscript 17.
[0173] According to the semiconductor device described in Appendix 16, the sealing resin has a second side facing the second direction.
[0174] The second terminal and the second lead are exposed from the second side.
[0175] Postscript 18.
[0176] The semiconductor device according to Appendix 17 further includes a plurality of dummy terminals disposed at the four corners of the sealing resin when viewed from the third-party upward.
[0177] The plurality of dummy terminals each have a dummy exposed surface that protrudes from the bottom surface.
[0178] Postscript 19.
[0179] According to the semiconductor device described in Appendix 18, the dimension of the dummy exposed surface in the first direction is larger than the dimension of the second mounting surface in the first direction.
[0180] The dimension of the second direction of the dummy exposed surface is larger than the dimension of the second direction of the first mounting surface.
[0181] Postscript 20.
[0182] According to Appendix 9, the semiconductor device further includes a fourth lead located next to the fourth terminal in the second direction and extending in the first direction.
[0183] The fourth terminal and the fourth lead each have a fourth mounting surface and a fourth exposed surface protruding from the bottom surface, respectively.
[0184] The dimension of the fourth exposed surface in the first direction is larger than the dimension of the fourth mounting surface in the first direction.
[0185] The fourth exposed surface has a seventh end and an eighth end that are separated from each other in the first direction.
[0186] When viewed from above by a third party, the seventh end is located inside the periphery of the sealing resin.
[0187] When viewed from above by a third party, the eighth end overlaps with the periphery of the sealing resin.
[0188] Postscript 21.
[0189] According to the semiconductor device described in Appendix 20, the eighth terminal is located closer to the fourth mounting surface than the seventh terminal and is in contact with the bottom surface.
[0190] Postscript 22.
[0191] According to the semiconductor device described in Appendix 21, when viewed upwards by a third party, a second center line passing through the center of the first exposed surface in the second direction and extending in the first direction overlaps with the fourth exposed surface.
[0192] Postscript 23.
[0193] According to the semiconductor device described in Appendix 22, the dimension of the fourth exposed surface in the first direction is different from the dimension of the first exposed surface in the first direction.
[0194] Postscript 24.
[0195] According to the semiconductor device described in Appendix 22, when viewed from the third party upwards, the second centerline separates from the second exposed surface and the third exposed surface.
[0196] Postscript 25.
[0197] According to the semiconductor device described in Appendix 9, the first terminal has a first mounting surface exposed from the bottom surface.
[0198] The first mounting surface is located inside the bottom surface, which is closer to the first mounting surface.
[0199] Postscript 26.
[0200] According to the semiconductor device described in Appendix 25, the dimension of the second direction of the first mounting surface is smaller than the dimension of the second direction of the first mounting surface.
[0201] Postscript 27.
[0202] According to the semiconductor device described in Appendix 26, the first secondary mounting surface is located closer to the first exposed surface than the first mounting surface.
[0203] Symbol Explanation
[0204] A10~A60—Semiconductor device; 11—First terminal; 111—First mounting surface; 112—First mounting surface; 113—First end face; 114—First intermediate surface; 115—First secondary mounting surface; 12—Second terminal; 121—Second mounting surface; 122—Second mounting surface; 123—Second end face; 124—Second intermediate surface; 13—Third terminal; 131—Third mounting surface; 132—Third mounting surface; 133—Third end face; 134—Third intermediate surface; 14—Fourth terminal; 141—Fourth mounting surface; 142—Fourth mounting surface; 143—Fourth end face; 144—Fourth intermediate surface; 145—Second secondary mounting surface; 19—Dummy terminal; 191—Dummy exposed surface; 192~194—First surface~Third surface; 21—First lead; 211—First main surface; 212—First exposed surface; 212A —First end; 212B—Second end; 213—First end face; 22—Second lead; 221—Second main face; 222—Second exposed face; 222A—Third end; 222B—Fourth end; 223—Second end face; 23—Third lead; 231—Third main face; 232—Third exposed face; 232A—Fifth end; 232B—Sixth end; 233—Third end face; 24—Fourth lead; 241—Fourth main face; 242—Fourth exposed face; 242A—Seventh end; 242B—Eighth end; 243—Fourth end face; 30—Semiconductor element; 31—Electrode; 39—Connecting layer; 40—Sealing resin; 401—Peripheral; 41—Top surface; 42—Bottom surface; 43~46—First side surface~Fourth side surface; C1—First center line; C2—Second center line; x—First direction; y—Second direction; z—Third direction.
Claims
1. A semiconductor device, characterized in that, have: The first terminal and the fourth terminal are separated from each other in a first direction; The second and third terminals are separated from each other in a second direction orthogonal to the first direction; A semiconductor element that is connected to at least one of the first terminal, the second terminal, the third terminal, and the fourth terminal; A first lead is located next to the first terminal in the second direction and extends in the first direction; The second lead is located next to the second terminal in the first direction and extends in the second direction; as well as A sealing resin is used to cover the semiconductor element. The sealing resin has a bottom surface facing a third direction orthogonal to the first and second directions. The first terminal, the second terminal, the first lead, and the second lead each have a first mounting surface, a second mounting surface, a first exposed surface, and a second exposed surface protruding from the bottom surface. The dimension of the first exposed surface in the first direction is larger than the dimension of the first mounting surface in the first direction. The dimension of the second exposed surface in the second direction is larger than the dimension of the second mounting surface in the second direction. The first exposed surface has a first end and a second end that are separated from each other in the first direction. The second exposed surface has a third end and a fourth end that are separated from each other in the second direction. When viewed from above by a third party, the first end and the third end are located inside the periphery of the sealing resin. When viewed from above by the third party, the fourth end overlaps with the periphery of the sealing resin.
2. The semiconductor device according to claim 1, characterized in that, The fourth end is located closer to the second mounting surface than the third end, and is in contact with the bottom surface.
3. The semiconductor device according to claim 2, characterized in that, The dimension of the first exposed surface in the first direction is larger than the dimension of the second exposed surface in the second direction.
4. The semiconductor device according to claim 3, characterized in that, When viewed from above by a third party, a first center line passing through the center of the second exposed surface in the first direction and extending in the second direction overlaps with the first exposed surface.
5. The semiconductor device according to claim 4, characterized in that, The second end is located closer to the first mounting surface than the first end, and is in contact with the bottom surface.
6. The semiconductor device according to claim 4, characterized in that, When viewed from above by a third party, the second end is located inside the periphery of the sealing resin.
7. The semiconductor device according to claim 3, characterized in that, When viewed from above by a third party, the second exposed surface is separated from the first exposed surface by a first center line that passes through the center of the second exposed surface in the first direction and extends in the second direction.
8. The semiconductor device according to any one of claims 4 to 7, characterized in that, It also includes a third lead, which is located next to the third terminal in the first direction and extends in the second direction. The third terminal and the third lead each have a third mounting surface and a third exposed surface protruding from the bottom surface, respectively. The dimension of the third exposed surface in the second direction is larger than the dimension of the third mounting surface in the second direction. The third exposed surface has a fifth end and a sixth end that are separated from each other in the second direction. When viewed from above by a third party, the fifth end is located inside the periphery of the sealing resin. When viewed from above by the third party, the sixth end overlaps with the periphery of the sealing resin.
9. The semiconductor device according to claim 8, characterized in that, The sixth end is located closer to the third mounting surface than the fifth end, and is in contact with the bottom surface.
10. The semiconductor device according to claim 9, characterized in that, When viewed from above by a third party, the first centerline overlaps with the third exposed surface.
11. The semiconductor device according to claim 10, characterized in that, The third end is located closer to the first exposed surface than the fifth end.
12. The semiconductor device according to claim 10, characterized in that, When viewed from above by a third party, the distance between the intersection of the first center line and the second center line extending in the first direction through the center of the first exposed surface and the center of the bottom surface is shorter than the dimension of the first mounting surface in the first direction.
13. The semiconductor device according to claim 9, characterized in that, When viewed from above by the third party, the first centerline separates from the third exposed surface.
14. The semiconductor device according to claim 9, characterized in that, The semiconductor element has a plurality of electrodes located on a side facing the third direction opposite to the first terminal, the second terminal, the third terminal, and the fourth terminal. Any one of the plurality of electrodes is electrically connected to any one of the first terminal, the second terminal, the third terminal, and the fourth terminal.
15. The semiconductor device according to claim 14, characterized in that, Any one of the plurality of electrodes is electrically connected to any one of the first lead, the second lead, and the third lead.
16. The semiconductor device according to claim 15, characterized in that, The sealing resin has a first side facing the first direction. The first terminal and the first lead are exposed from the first side.
17. The semiconductor device according to claim 16, characterized in that, The sealing resin has a second side facing the second direction. The second terminal and the second lead are exposed from the second side.
18. The semiconductor device according to claim 17, characterized in that, It also includes multiple dummy terminals positioned at the four corners of the sealing resin when viewed from above by a third party. The plurality of dummy terminals each have a dummy exposed surface that protrudes from the bottom surface.
19. The semiconductor device according to claim 18, characterized in that, The dimension of the dummy exposed surface in the first direction is larger than the dimension of the second mounting surface in the first direction. The dimension of the second direction of the dummy exposed surface is larger than the dimension of the second direction of the first mounting surface.
Citation Information
Patent Citations
Semiconductor device
JP2020077694A