Analog-to-digital conversion circuit and method for differential signals

Abstract

The invention discloses an analog-to-digital conversion circuit and method for differential signals. The analog-to-digital conversion circuit comprises a first input module, a first amplification module, a threshold voltage regulation module, a second amplification module and a digital output module. The first input module differentially amplifies a first differential signal group received by the input end and outputs a first amplified signal; a first input end of the first amplification module receives a first amplification signal output by the first input module, a second input end receives a preset signal, and the first amplification module differentially amplifies the first amplification signal and the preset signal and outputs a second amplification signal; the threshold voltage adjusting module divides the received preset voltage signal and outputs an adjustable voltage signal; the second amplification module receives the second amplification signal and the adjustable voltage signal, and outputs a third amplification signal according to the second amplification signal and the adjustable voltage signal; the input end of the digital output module is connected with the output end of the second amplification module, and under the condition that the third amplification signal meets the preset threshold value, the level of the output signal is overturned.

Description

Technical Field

[0001] This application relates to the field of analog-to-digital conversion technology, and more specifically, to an analog-to-digital conversion circuit and method for differential signals. Background Technology

[0002] Positioning notches on the surface of a wafer can be detected using a position-sensitive detector (PSD). Traditional PSD output signals are typically analog current or voltage signals, requiring complex analog-to-digital converters (ADCs) and microcontrollers for data processing.

[0003] However, the inventors of this application have found that this method increases system cost and complexity, and may cause latency (typically on the order of microseconds) in some applications with high real-time requirements.

[0004] The content of the background section is merely technology known to the public and does not necessarily represent existing technology in the field. Summary of the Invention

[0005] According to one aspect of this application, an analog-to-digital converter (ADC) circuit for differential signals is provided. The ADC circuit includes a first input module, a first amplification module, a threshold voltage adjustment module, a second amplification module, and a digital output module. The first input module receives a first differential signal group at its differential amplification input terminal and outputs a first amplified signal. The first amplification module receives the first amplified signal output by the first input module at its first input terminal and receives a preset signal at its second input terminal. The first amplification module differentially amplifies the first amplified signal and the preset signal, and outputs a second amplified signal. The threshold voltage adjustment module divides the received preset voltage signal and outputs an adjustable voltage signal. The second amplification module receives the second amplified signal and the adjustable voltage signal, and outputs a third amplified signal based on the second amplified signal and the adjustable voltage signal. The input terminal of the digital output module is connected to the output terminal of the second amplification module. When the third amplified signal meets a preset threshold, the output signal level is flipped to output a digital signal, wherein the preset threshold is determined based on the adjustable voltage signal.

[0006] According to one aspect of this application, this application provides an analog-to-digital conversion method for differential signals, the analog-to-digital conversion method comprising: differentially amplifying a first differential signal group received to determine a first amplified signal; differentially amplifying the first amplified signal and a preset signal to determine a second amplified signal; The voltage divider preset voltage signal is used to determine the adjustable voltage signal; the third amplified signal is determined based on the second amplified signal and the adjustable voltage signal; when the third amplified signal meets the preset threshold, the output signal level of the digital output module is flipped to output a digital signal, wherein the preset threshold is determined based on the adjustable voltage signal.

[0007] The technical solution of this application can convert the first differential signal group into a digital signal output without using an analog-to-digital converter. The delay is on the nanosecond level, which can reduce the response delay to the input first differential signal group and reduce hardware costs. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 A schematic diagram of an analog-to-digital converter circuit according to an embodiment of this application is shown; Figure 2 A schematic diagram of an analog-to-digital conversion method 1000 according to an embodiment of this application is shown; Figure 3 A schematic diagram of an analog-to-digital converter circuit 2000 according to an embodiment of this application is shown. Detailed Implementation

[0010] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this application will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0011] The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced without one or more of these specific details, or other methods, components, materials, devices, etc. In these cases, well-known structures, methods, devices, implementations, materials, or operations will not be shown or described in detail.

[0012] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0013] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order.

[0014] The technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0015] According to one aspect of this application, an analog-to-digital converter circuit 10 for differential signals is provided. See also... Figure 1 The analog-to-digital conversion circuit 10 may include a first input module 11, a first amplification module 12, a threshold voltage adjustment module 13, a second amplification module 14, and a digital output module 15.

[0016] According to an example embodiment, the first input module 11 receives a first differential signal group at its differential amplification input terminal and outputs a first amplified signal. The first differential signal group can be a differential signal group output from a first position-sensitive detector. The first position-sensitive detector can detect positioning notches on the surface of the wafer. When the first position-sensitive detector detects a positioning notch, it outputs the first differential signal group.

[0017] The first amplified signal can be the signal after differential amplification of the first differential signal group. The first input module 11 can perform differential amplification processing on the first differential signal group, and the output terminal of the first input module 11 outputs the first amplified signal. The first differential signal group and the first amplified signal can be analog voltage signals.

[0018] According to the example embodiment, the first input terminal of the first amplification module 12 receives the first amplified signal output by the first input module 11, the second input terminal of the first amplification module 12 receives the preset signal, the first amplification module 12 differentially amplifies the first amplified signal and the preset signal, and outputs the second amplified signal.

[0019] The preset signal can be a preset fixed-level signal. The second amplified signal can be a signal obtained by differentially amplifying the first amplified signal and the preset signal. The first amplification module 12 can perform differential amplification processing on the first amplified signal and the preset signal, and the output terminal of the first amplification module 12 outputs the second amplified signal. The second amplified signal can be an analog voltage signal.

[0020] According to the example embodiment, the threshold voltage adjustment module 13 receives the preset voltage signal by dividing the voltage and outputs an adjustable voltage signal.

[0021] The preset voltage signal can be a preset DC voltage. The adjustable voltage signal can be a voltage signal set according to the waveform shape and waveform width of the output digital signal. The threshold voltage adjustment module 13 can divide the preset voltage signal, and the output terminal of the threshold voltage adjustment module 13 outputs an adjustable voltage signal. The adjustable voltage signal can be an analog voltage signal.

[0022] According to the example embodiment, the second amplification module 14 receives a second amplified signal and an adjustable voltage signal, and outputs a third amplified signal based on the second amplified signal and the adjustable voltage signal.

[0023] The third amplified signal can be the voltage signal obtained by adding and amplifying the second amplified signal and the adjustable voltage signal. The second amplification module 14 can add and amplify the second amplified signal and the adjustable voltage signal, and the output terminal of the second amplification module 14 outputs the third amplified signal.

[0024] According to the example embodiment, the input terminal of the digital output module 15 is connected to the output terminal of the second amplification module 14. When the third amplified signal meets a preset threshold, the output signal level is flipped to output a digital signal. The preset threshold is determined based on the adjustable voltage signal.

[0025] The preset threshold can be a threshold signal that inverts the output signal level based on the adjustable voltage signal. For example, the output signal level of the digital output module 15 can be a low-level signal by default. When the third amplified signal is greater than the preset threshold, the output signal level of the digital output module 15 is a high-level signal, thereby converting the first differential signal group into a digital signal output.

[0026] The output digital signal can be transmitted to an external microcontroller, which can then accurately determine the location of the wafer positioning notch.

[0027] Through the above embodiments, the technical solution of this application can differentially amplify the first differential signal group through the first input module. The technical solution of this application can differentially amplify the first amplified signal and the preset signal through the first amplification module. The technical solution of this application can output an adjustable voltage signal through a threshold voltage adjustment module. The technical solution of this application can amplify the second amplified signal and the adjustable voltage signal through the second amplification module. The technical solution of this application can output the third amplified signal as a digital signal through a digital output module.

[0028] The technical solution of this application can convert the first differential signal group into a digital signal output without using an analog-to-digital converter. The delay is on the nanosecond level, which can reduce the response delay to the input first differential signal group and reduce hardware costs.

[0029] Optionally, the first differential signal group includes a first inverting input signal (SIG1+) and a first inverting input signal (SIG1-).

[0030] See Figure 1 The first input module 11 includes a first differential amplifier U1C. The non-inverting input terminal of the first differential amplifier U1C receives a first non-inverting input signal (SIG1+), and the inverting input terminal of the first differential amplifier U1C receives a first inverting input signal (SIG1-). The first differential amplifier U1C differentially amplifies the first non-inverting input signal and the first inverting input signal, and the output terminal of the first differential amplifier U1C outputs a first amplified signal.

[0031] See Figure 1 The first input module 11 may also include a resistor R18, a capacitor C3, a resistor R11, and a resistor R16.

[0032] Capacitor C3 and resistor R11 are connected in parallel between the inverting input and output of the first differential amplifier U1C, forming a low-pass filter. One end of resistor R18 is connected to the non-inverting input of the first differential amplifier U1C, and the other end is grounded; resistor R18 provides a bias path. One end of resistor R16 is connected to the output of the first differential amplifier U1C, and the other end is connected to the first input of the first amplification module 12; resistor R16 can be used for current limiting.

[0033] For example, the formula for calculating the first amplified signal of the output of the first differential amplifier U1C can be as follows.

[0034] ; in, This is the first amplified signal; This is the signal at the first inverting input; This is the first positive input signal; This is the resistance value of resistor R16; Let R11 be the resistance value. This is the capacitance value of capacitor C3; This is the resistance value of resistor R18; It is an imaginary number; This represents the oscillation frequency.

[0035] Optionally, see Figure 1 The first amplification module 12 includes a second differential amplifier U1A.

[0036] The non-inverting input of the second differential amplifier U1A receives the first amplified signal output by the first input module 11, the inverting input of the second differential amplifier U1A receives a preset signal, the second differential amplifier U1A differentially amplifies the first amplified signal and the preset signal, and the output of the second differential amplifier U1A outputs the second amplified signal.

[0037] See Figure 1 The first amplification module 12 may also include capacitor C5, resistor R17, and resistor R8. Capacitor C5 and resistor R17 are connected in parallel between the non-inverting input terminal of the second differential amplifier U1A and ground, forming a low-pass filter. One end of resistor R8 is connected to the output terminal of the second differential amplifier U1A, and resistor R8 can be used for current limiting.

[0038] For example, the formula for calculating the second amplified signal output by the second differential amplifier U1A can be as follows.

[0039] ; in, This is the second amplified signal; This is a preset signal; This is the resistance value of resistor R16; The resistance value of resistor R17; This is the capacitance value of capacitor C2; This is the capacitance value of capacitor C5.

[0040] Optionally, see Figure 1 The threshold voltage adjustment module 13 includes an adjustable resistor AJ1. A positive value of a preset voltage signal is input to the first terminal of the adjustable resistor AJ1, a negative value of the preset voltage signal is input to the input terminal of the adjustable resistor AJ1, and an adjustable voltage signal is output from the output terminal of the adjustable resistor AJ1.

[0041] For example, see Figure 1The adjustable resistor AJ1 can be a sliding rheostat. The threshold voltage adjustment module 13 may also include resistors R2 and R3. The positive value of the preset voltage signal can be +15V DC voltage, and the negative value of the preset voltage signal can be -15V DC voltage. One end of resistor R2 receives the positive value of the preset voltage signal. One end of resistor R3 receives the negative value of the preset voltage signal. The first end of the adjustable resistor AJ1 is connected to the other end of resistor R2. The second end of the adjustable resistor AJ1 is connected to the other end of resistor R3.

[0042] See Figure 1 The analog-to-digital converter circuit may also include a resistor R5. The output terminal of the adjustable resistor AJ1 is connected to one end of the resistor R5. The other end of the resistor R5 is connected to the other end of the resistor R8. The preset threshold is the voltage value of the connection between resistors R5 and R8.

[0043] Adjusting the resistance of adjustable resistor AJ1 adjusts the voltage across the other end of resistor R5, thus adjusting the preset threshold voltage value. The adjustable voltage signal can be positive or negative. This setting allows for precise setting of the required voltage level for the first differential signal group to trigger the digital signal output toggles, thereby adjusting the trigger sensitivity.

[0044] Optionally, see Figure 1 The second amplification module 14 includes an adjustable bias adder U1B. The inverting input of the adjustable bias adder U1B receives a second amplified signal and an adjustable voltage signal, and the output outputs a third amplified signal.

[0045] For example, see Figure 1 The second amplification module 14 may further include resistors R9, R12, and R15. One end of resistor R12 is connected to the non-inverting input of the adjustable bias adder U1B, and the other end of resistor R12 is connected to the output of the adjustable bias adder U1B. One end of resistor R15 is connected to the non-inverting input of the adjustable bias adder U1B, and the other end of resistor R15 is grounded. Resistors R12 and R15 can be used to determine the voltage gain of the analog-to-digital converter circuit 10, while providing a DC bias path for the non-inverting input of the adjustable bias adder U1B.

[0046] One end of resistor R9 is connected to the output of the adjustable bias adder U1B. Resistor R9 can be used for current limiting.

[0047] For example, the formula for calculating the third amplified signal of the output of the adjustable bias adder U1B can be as follows.

[0048] ; in, This is the third amplified signal; The resistance value of resistor R12; This is the resistance value of resistor R15.

[0049] Adjusting the value of the adjustable resistor AJ1 can also adjust the gain of the adjustable bias adder U1B, and thus adjust the bias of the adjustable bias adder U1B. For example, adjusting the resistance values ​​of the left and right parts of the adjustable resistor AJ1 can adjust the bias of the adjustable bias adder U1B, thereby adjusting the pulse width of the final output digital signal pulse.

[0050] Optionally, see Figure 1 The digital output module 15 includes an optocoupler U2.

[0051] The first end of the primary side of the optocoupler U2 is connected to the output end of the second amplification module 14. When the third amplification signal meets the preset threshold, the output signal level of the first end of the secondary side of the optocoupler U2 is flipped to output a digital signal.

[0052] For example, see Figure 1 The digital output module 15 may also include a capacitor C4, a resistor R14, and a resistor R10.

[0053] The second terminal of the primary side of optocoupler U2 is grounded. The second terminal of the secondary side of optocoupler U2 can receive a +24V DC voltage.

[0054] Capacitor C4 and resistor R14 can be connected in parallel between the first terminal of the secondary side of optocoupler U2 and ground. Capacitor C4 can be used as a filter capacitor, and capacitor C4 and resistor R14 can perform filtering functions.

[0055] One end of resistor R10 can be connected to the first end of the secondary side of optocoupler U2. Resistor R10 can be a current-limiting resistor, providing current-limiting protection.

[0056] The signal output from the first terminal of the secondary side of optocoupler U2 is output at the NOTCH_OUT port after passing through resistor R10.

[0057] The NOTCH_OUT port in the diagram is the digital signal output port. Optocoupler U2 can be used to electrically isolate the third amplified signal output from the adjustable bias adder U1B from the NOTCH_OUT port. Optocoupler U2 can also convert the third amplified signal output from the adjustable bias adder U1B into a digital signal.

[0058] For example, if the third amplified signal is less than or equal to the preset threshold, the LED inside the optocoupler U2 will not light up, the secondary side of the optocoupler U2 will be turned off, and the NOTCH_OUT port will output a low level.

[0059] When the third amplified signal is greater than the preset threshold, the LED inside the optocoupler U2 lights up, the secondary side of the optocoupler U2 is turned on, and the NOTCH_OUT port outputs a high level, thus realizing the output of digital signals.

[0060] Adjusting the resistance value of the adjustable resistor AJ1 can also adjust the preset threshold value. For example, the formula for calculating the preset threshold value can be as follows.

[0061] ; ; Among them, It is an adjustable voltage signal; The resistance value on the left side of the adjustable resistor AJ1; The resistance value on the right side of the adjustable resistor AJ1; This is a preset voltage signal; Let R3 be the resistance value; Let R2 be the resistance value; This is a preset threshold.

[0062] Optionally, see Figure 1 The analog-to-digital conversion circuit 10 also includes an indicator module 17. The indicator module 17 is connected to the output terminal of the digital output module 15, and the indicator module 17 is turned on when the output level of the digital output module 15 is flipped.

[0063] For example, if the third amplified signal is less than or equal to a preset threshold, the NOTCH_OUT port outputs a low level, indicating that module 17 is turned off.

[0064] When the third amplified signal is greater than a preset threshold, the NOTCH_OUT port outputs a high level, and the indicator module 17 is turned on. The indicator module 17 can be used to indicate the high or low level of the NOTCH_OUT port output.

[0065] Optionally, see Figure 1 The indicator module 17 includes a light-emitting diode (LED) D2. The LED D2 is connected to the output terminal of the digital output module 15, and the LED is turned on when the output level of the digital output module 15 is flipped.

[0066] For example, see Figure 1 The indicator module 17 also includes a resistor R13, one end of which is connected to the other end of the resistor R10. One end of the light-emitting diode D2 can be connected to the other end of the resistor R10, and the other end of the light-emitting diode D2 is grounded.

[0067] When the third amplified signal is less than or equal to a preset threshold, the NOTCH_OUT port outputs a low level, turning off the LED D2.

[0068] When the third amplified signal exceeds a preset threshold, the NOTCH_OUT port outputs a high level, and LED D2 is turned on. LED D2 can be used to indicate the high or low level of the NOTCH_OUT port output.

[0069] See Figure 1 The analog-to-digital converter circuit 10 also includes a diode D1, one end of which is connected to the other end of the resistor R9, and the other end of the diode D1 is grounded. The diode D1 can protect the analog-to-digital converter circuit 10.

[0070] Optionally, two position-sensitive detectors can be configured to detect the positioning notch on the wafer. The analog-to-digital converter circuit 10 can also accept differential signal groups from the second position-sensitive detector. The second position-sensitive detector can be spaced apart from the first position-sensitive detector.

[0071] See Figure 1 The analog-to-digital converter circuit 10 also includes a second input module 16. The second input module 16 receives a second differential signal group at its differential amplifier input and outputs a fourth amplified signal. The second differential signal group can be a differential signal group output from a second position-sensitive detector. When the second position-sensitive detector detects a positioning notch, it outputs the second differential signal group. The second differential signal group and the first differential signal group are not simultaneously input to the analog-to-digital converter circuit 10.

[0072] The second amplified signal can be the signal after differential amplification of the second differential signal group. The second input module 16 can perform differential amplification processing on the second differential signal group, and the output terminal of the second input module 16 outputs a fourth amplified signal. The second differential signal group and the fourth amplified signal can be analog voltage signals.

[0073] The second input terminal of the first amplification module 12 receives the fourth amplified signal. The first amplification module 12 differentially amplifies the first amplified signal and the fourth amplified signal, and outputs the second amplified signal.

[0074] The second amplified signal can also be a signal obtained by differentially amplifying the first and fourth amplified signals. The first amplification module 12 can perform differential amplification processing on the first and fourth amplified signals, and the output terminal of the first amplification module 12 outputs the second amplified signal. The second amplified signal can be an analog voltage signal.

[0075] Through the above embodiments, the technical solution of this application can differentially amplify the second differential signal group through the second input module. The technical solution of this application can differentially amplify the first amplified signal and the fourth amplified signal through the first amplification module.

[0076] The technical solution of this application can convert the second differential signal group into a digital signal output without using an analog-to-digital converter, with a delay on the nanosecond level, which can reduce the response delay to the input second differential signal group.

[0077] Optionally, the second differential signal group includes a second positive input signal (SIG2+) and a second negative input signal (SIG2-).

[0078] See Figure 1 The second input module 16 includes a third differential amplifier U1D.

[0079] The non-inverting input of the third differential amplifier U1D receives the second non-inverting input signal (SIG2+), and the inverting input of the third differential amplifier U1D receives the second inverting input signal (SIG2-). The differential amplifier U1D amplifies the second non-inverting input signal (SIG2+) and the second inverting input signal (SIG2-), and outputs the fourth amplified signal.

[0080] See Figure 1 The second input module 16 may also include resistor R1, capacitor C1, resistor R4 and resistor R7.

[0081] Capacitor C1 and resistor R1 are connected in parallel between the inverting input and output of the third differential amplifier U1D, forming a low-pass filter. One end of resistor R7 is connected to the non-inverting input of the third differential amplifier U1D, and the other end is grounded; resistor R7 provides a bias path. One end of resistor R4 is connected to the output of the third differential amplifier U1D, and the other end is connected to the second input of the first amplification module 12; resistor R4 can be used for current limiting.

[0082] For example, the formula for calculating the fourth amplified signal at the output of the third differential amplifier U1D can be as follows.

[0083] ; in, This is the fourth amplified signal; This is the signal at the second inverting input; This is the signal at the second positive input; Let R4 be the resistance value. Let R11 be the resistance value. This is the capacitance value of capacitor C1; This is the resistance value of resistor R18.

[0084] Optionally, see Figure 1The first amplification module 12 may also include a capacitor C2 and a resistor R6. The capacitor C2 and the resistor R6 are connected in parallel between the inverting input terminal and the output terminal of the second differential amplifier U1A to form a low-pass filter.

[0085] For example, the formula for calculating the second amplified signal output by the second differential amplifier U1A can be as follows.

[0086] .

[0087] According to one aspect of this application, an analog-to-digital conversion method 1000 for differential signals is also provided. The analog-to-digital conversion method 1000 can be performed by an analog-to-digital conversion circuit. See also... Figure 2 The analog-to-digital conversion method 1000 may include steps S110-S150.

[0088] In step S110, the analog-to-digital converter differentially amplifies the first differential signal group received and determines the first amplified signal.

[0089] In step S120, the analog-to-digital conversion circuit differentially amplifies the first amplified signal and the preset signal to determine the second amplified signal.

[0090] In step S130, the analog-to-digital converter divides the preset voltage signal to determine the adjustable voltage signal.

[0091] In step S140, the analog-to-digital conversion circuit determines the third amplified signal based on the second amplified signal and the adjustable voltage signal.

[0092] In step S150, when the third amplified signal meets a preset threshold, the output signal level of the digital output module of the analog-to-digital converter circuit is flipped to output a digital signal. The preset threshold is determined based on the adjustable voltage signal.

[0093] According to the example embodiment, the first differential signal group, the first amplified signal, the preset signal, the second amplified signal, the preset voltage signal, the adjustable voltage signal, the third amplified signal, and the output signal have been described in the analog-to-digital conversion circuit above, and will not be repeated here.

[0094] The technical solution of this application can convert the first differential signal group into a digital signal output without using an analog-to-digital converter. The delay is on the nanosecond level, which can reduce the response delay to the input first differential signal group and reduce hardware costs.

[0095] According to one aspect of this application, an analog-to-digital conversion method 2000 for differential signals is also provided. The analog-to-digital conversion method 2000 can be performed by an analog-to-digital conversion circuit. See also... Figure 3 The analog-to-digital conversion method 2000 may include steps S210-S260.

[0096] See Figure 3 Step S210 is the same as step S110, so it will not be described again.

[0097] In step S220, the second differential signal group received by the analog-to-digital converter differential amplifier is processed to determine the fourth amplified signal.

[0098] In step S230, the analog-to-digital conversion circuit differentially amplifies the first amplified signal and the fourth amplified signal to determine the second amplified signal.

[0099] According to the example embodiment, the second differential signal group and the fourth amplified signal have been described in the analog-to-digital conversion circuit above, and will not be repeated here.

[0100] See Figure 3 Steps S240-S260 are the same as steps S130-S150, so they will not be described again.

[0101] The technical solution of this application can convert the second differential signal group into a digital signal output without using an analog-to-digital converter, with a delay on the nanosecond level, which can reduce the response delay to the input second differential signal group.

[0102] Finally, it should be noted that the above description is merely a preferred embodiment of this application and is not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions of the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An analog-to-digital conversion circuit of a differential signal, characterized by, The application relates to an analog-to-digital conversion circuit. The first input module receives a first differential signal group at a differential amplification input end and outputs a first amplified signal; The first amplification module receives the first amplified signal output by the first input module at a first input end and receives a preset signal at a second input end, differentially amplifies the first amplified signal and the preset signal, and outputs a second amplified signal; The threshold voltage adjustment module divides a received preset voltage signal and outputs an adjustable voltage signal; The second amplification module receives the second amplified signal and the adjustable voltage signal, and outputs a third amplified signal according to the second amplified signal and the adjustable voltage signal; The digital output module is connected to the output end of the second amplification module, and the signal level of the output end of the digital output module is reversed to output a digital signal when the third amplified signal meets a preset threshold value, wherein the preset threshold value is determined according to the adjustable voltage signal.

2. The analog-to-digital conversion circuit of claim 1, wherein, The first differential signal group comprises a first non-inverting terminal signal and a first inverting terminal signal; The first input module comprises: The first differential amplifier receives the first non-inverting terminal signal at a non-inverting input end and receives the first inverting terminal signal at an inverting input end, differentially amplifies the first non-inverting terminal signal and the first inverting terminal signal, and outputs the first amplified signal.

3. The analog-to-digital conversion circuit of claim 1, wherein, The first amplification module comprises: The second differential amplifier receives the first amplified signal output by the first input module at a non-inverting input end and receives the preset signal at an inverting input end, differentially amplifies the first amplified signal and the preset signal, and outputs a second amplified signal.

4. The analog-to-digital conversion circuit of claim 1, wherein, The threshold voltage adjustment module comprises: The adjustable resistor inputs a positive value of the preset voltage signal at a first end, inputs a negative value of the preset voltage signal at a second end, and outputs the adjustable voltage signal at an output end.

5. The analog-to-digital conversion circuit of claim 1, wherein, The second amplification module comprises: The adjustable bias adder inputs the second amplified signal and the adjustable voltage signal at an inverting input end and outputs the third amplified signal at an output end.

6. The analog-to-digital conversion circuit of claim 1, wherein, The digital output module comprises: The photocoupler is connected to the output end of the second amplification module, and the output signal level of the first end of the secondary side of the photocoupler is reversed to output a digital signal when the third amplified signal meets a preset threshold value.

7. The analog-to-digital conversion circuit of claim 1, wherein, The analog-to-digital conversion circuit further comprises: The indication module is connected to the output end of the digital output module, and is turned on when the output end of the digital output module is reversed.

8. The analog-to-digital conversion circuit of claim 7, wherein, The indication module comprises: The light-emitting diode is connected to the output end of the digital output module, and is turned on when the output end of the digital output module is reversed.

9. The analog-to-digital conversion circuit of claim 1, wherein, The analog-to-digital conversion circuit further comprises: The second input module receives a second differential signal group at a differential amplification input end and outputs a fourth amplified signal; The second input end of the first amplification module receives the fourth amplified signal, and the first amplification module differentially amplifies the first amplified signal and the fourth amplified signal and outputs the second amplified signal.

10. The analog-to-digital conversion circuit of claim 9, wherein, The second differential signal group comprises a second non-inverting terminal signal and a second inverting terminal signal; The second input module comprises: A third differential amplifier, a non-inverting input end receives the second non-inverting end signal, an inverting input end receives the second inverting end signal, the third differential amplifier differentially amplifies the second non-inverting end signal and the second inverting end signal, and an output end outputs the fourth amplified signal.

11. A method of analog-to-digital conversion of a differential signal, characterized by, The analog-to-digital conversion method comprises: Differential amplification of the received first differential signal group determines the first amplified signal; Differential amplification of the first amplified signal and the preset signal determines the second amplified signal; The preset voltage signal is divided to determine the adjustable voltage signal; According to the second amplified signal and the adjustable voltage signal, the third amplified signal is determined; In the case where the third amplified signal meets the preset threshold, the output signal level of the output end of the digital output module is flipped to output a digital signal, wherein the preset threshold is determined according to the adjustable voltage signal.

12. The analog-to-digital conversion method of claim 11, wherein, The analog-to-digital conversion method further comprises: Differential amplification of the received second differential signal group for processing determines the fourth amplified signal; The differential amplification of the first amplified signal and the preset signal to determine the second amplified signal comprises: Differential amplification of the first amplified signal and the fourth amplified signal determines the second amplified signal.

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