Optical interconnection device, light quantum computer, three-dimensional photon chip coupler and preparation method of three-dimensional photon chip coupler

Abstract

The invention provides an optical interconnection device, an optical quantum computer, a three-dimensional photon chip coupler and a preparation method of the three-dimensional photon chip coupler. The three-dimensional photon chip coupler comprises a base body, the base body is provided with a two-dimensional through hole array penetrating through a first end face and a second end face, and the first end face and the second end face are oppositely arranged. The two-dimensional through hole array is provided with a plurality of first ports located on the first end face, the plurality of first ports are used for connecting the three-dimensional photon chip, the two-dimensional through hole array is further provided with a plurality of second ports located on the second end face, and the plurality of second ports are used for connecting the stacked optical fiber array, so that the three-dimensional photon chip is connected with the optical fiber array. The two-dimensional through hole array for connecting the three-dimensional photon chip and the stacked optical fiber array is formed on the quartz glass body, so that the three-dimensional photon chip breaks through a one-dimensional fixed installation mode, fixed installation of the two-dimensional multi-layer photon chip is achieved, the density of the three-dimensional photon chip is improved, and the size of the three-dimensional photon chip coupler is reduced.

Description

Technical Field

[0001] This application relates to the field of optical fiber communication technology, and in particular to an optical interconnect device, an optical quantum computer, a three-dimensional photonic chip coupler, and a method for fabricating the same. Background Technology

[0002] Three-dimensional photonic chips, by integrating multiple layers of optical waveguides and functional devices in the vertical direction, overcome the limitations of traditional planar photonic circuits by utilizing a third spatial dimension to arrange the optical path. This enables high-density, multifunctional, and complexly interconnected photonic integrated circuits. The emergence of three-dimensional photonic chips not only allows us to enjoy faster and more stable cloud services but also enables optical interconnection in data centers and 5G bearer networks.

[0003] To realize the practical application of photonic chips, the nanoscale optical waveguides (about several hundred nanometers) of photonic chips need to be connected to the micrometer-scale core diameter (such as 9μm) of standard optical fibers in an efficient and low-loss manner, so as to integrate photonic chips with external optical fiber networks and realize long-distance, high-capacity data transmission.

[0004] Photonic chips are typically fixed in place by embedding and securing them in V-shaped grooves. This method can only fix one-dimensional photonic chips at a time. If it is desired to fix more photonic chips at the same time, a larger photonic chip coupler needs to be fabricated. Summary of the Invention

[0005] In view of this, this application provides a three-dimensional photonic chip coupler, an optical interconnect device, an optical quantum computer, and a method for fabricating the three-dimensional photonic chip coupler, aiming to solve, to some extent, the problem of excessively large photonic chip coupler size caused by the simultaneous fixed installation of three-dimensional photonic chips.

[0006] In a first aspect, one embodiment of this application provides a three-dimensional photonic chip coupler, which includes a substrate with a two-dimensional via array penetrating a first end face and a second end face, the first end face and the second end face being disposed opposite to each other. The two-dimensional via array has a plurality of first ports located on the first end face for connecting a three-dimensional photonic chip, and the two-dimensional via array also has a plurality of second ports located on the second end face for connecting a stacked fiber array, thereby connecting the three-dimensional photonic chip and the fiber array.

[0007] Optionally, the substrate also has a groove disposed on the first end face, and a two-dimensional through-hole array is located inside the groove. The groove is used to guide the three-dimensional photonic chip to connect to multiple first ports.

[0008] Optionally, the number and arrangement of the two-dimensional via array are consistent with the number and arrangement of the three-dimensional photonic chips and the number and arrangement of the fiber array, so that the position of each fiber in the fiber array corresponds to the position of each photonic chip in the three-dimensional photonic chip.

[0009] Optionally, the two-dimensional through-hole array is in the form of a matrix array or a ring array.

[0010] Optionally, the size of each via in the two-dimensional via array is consistent with the size of the core of each fiber in the fiber array and the size of the core of each photonic chip in the three-dimensional photonic chip.

[0011] Optionally, the number and arrangement of the two-dimensional via array are consistent with the number and arrangement of the three-dimensional photonic chips and the number and arrangement of the fiber array, so that the position of each fiber in the fiber array corresponds to the position of each photonic chip in the three-dimensional photonic chip.

[0012] Optionally, the two-dimensional via array is obtained by femtosecond laser direct writing.

[0013] Secondly, an embodiment of this application also provides an optical interconnect device, which includes the aforementioned three-dimensional photonic chip coupler, three-dimensional photonic chip, stacked fiber array and encapsulation shell, wherein the coupler, three-dimensional photonic chip and stacked fiber array are disposed in the internal cavity of the encapsulation shell.

[0014] Thirdly, one embodiment of this application also provides an optical quantum computer, which includes a single-photon source, an optical quantum chip, and a single-photon detector, wherein one or more of the single-photon source, the optical quantum chip, and the single-photon detector include the optical interconnect device as claimed in claim 8.

[0015] Fourthly, one embodiment of this application also provides a method for fabricating a coupler, which includes providing a substrate; forming a two-dimensional via array, the two-dimensional via array penetrating a first end face and a second end face of the substrate, the first end face and the second end face being disposed opposite to each other, the two-dimensional via array having a plurality of first ports located on the first end face, the plurality of first ports being used to connect a three-dimensional photonic chip, the two-dimensional via array also having a plurality of second ports located on the second end face, the plurality of second ports being used to connect a stacked fiber array, so as to connect the three-dimensional photonic chip and the fiber array.

[0016] The three-dimensional photonic chip coupler provided in this application breaks through the one-dimensional fixed installation mode of three-dimensional photonic chips by forming a two-dimensional through-hole array on the aggregate to connect three-dimensional photonic chips and stacked fiber arrays. This enables the fixed installation of two-dimensional, multi-layered photonic chips, thus increasing the density of the three-dimensional photonic chips by adding a dimension to the fixed installation. Compared with the traditional photonic chip coupler that uses V-shaped grooves for fixed installation, this not only increases the number of photonic chips in another dimension and realizes the fixed installation of three-dimensional photonic chips, but also helps to reduce the size of the three-dimensional photonic chip coupler and improve space utilization. Attached Figure Description

[0017] It should be understood that the following figures only show some embodiments of this application and should not be regarded as a limitation on the scope.

[0018] It should be understood that the same or similar reference numerals are used in the accompanying drawings to denote the same or similar elements.

[0019] It should be understood that the accompanying drawings are only schematic, and the dimensions and scales of the elements in the drawings are not necessarily precise.

[0020] Figure 1 This is a schematic diagram of the structure of a three-dimensional photonic chip coupler provided in an embodiment of this application.

[0021] Figure 2 This is a schematic diagram of the through-hole array on a three-dimensional photonic chip coupler provided in an embodiment of this application.

[0022] Figure 3 This is a schematic diagram of the through-hole array on a three-dimensional photonic chip coupler provided in an embodiment of this application.

[0023] Figure 4 This is a schematic diagram of the spacing between vias in a via array on a three-dimensional photonic chip coupler provided in an embodiment of this application.

[0024] Figure 5 This is a schematic diagram of the structure of an optical fiber array connected to a three-dimensional photonic chip coupler, provided in one embodiment of this application.

[0025] Figure 6 This is a schematic diagram of the structure of a three-dimensional photonic chip coupler provided in an embodiment of this application.

[0026] Figure 7 This is a schematic diagram of the structure of a three-dimensional photonic chip coupler connected to an optical fiber array, provided in an embodiment of this application.

[0027] Figure 8 This is a schematic diagram of a three-dimensional photonic chip coupler provided in an embodiment of this application, which is connected to an optical fiber array and a photonic chip respectively.

[0028] Figure 9 This is a schematic diagram of the structure of an optical interconnect device provided in an embodiment of this application.

[0029] Figure 10 This is a schematic diagram of the structure of an optical quantum computer provided in an embodiment of this application.

[0030] Figure 11 This is a flowchart illustrating a method for fabricating a three-dimensional photonic chip coupler according to an embodiment of this application. Detailed Implementation

[0031] The embodiments of this application are described below with reference to the accompanying drawings. It should be understood that there are various ways to implement this application, and it should not be construed as being limited to the embodiments described herein. The embodiments described herein are only for a more thorough and clear understanding of this application.

[0032] Application Overview: With the development of technology, data center traffic has experienced explosive growth, creating an urgent need for bandwidth for data center interconnection. To meet the demand for almost unlimited bandwidth growth, cloud data centers and 5G bearer networks have become core infrastructure driving the digital economy wave.

[0033] Compared to traditional data centers, the evolution of cloud data centers involves both a shift in traffic patterns and a rapid iteration of interconnect speeds. Specifically, the traffic pattern has shifted from the traditional traffic pattern of communication between servers and external users (primarily north-south traffic) to a cloud traffic pattern of communication between servers within the data center (with a surge in east-west traffic). This explosive growth in east-west traffic has significantly increased the number of high-speed optical connections required per server, placing higher demands on both the "quantity" and "speed" of optical interconnect devices.

[0034] Due to the rapid iteration of interconnect speeds, traditional 1G / 10G optical interconnect modules can no longer meet the speed requirements. Cloud data centers support large-scale distributed computing, virtualization, and cloud services, requiring frequent data synchronization and interaction between servers. Among these, 40G / 100G has become mainstream, and 400G / 800G is rapidly gaining popularity to ensure the overall performance of cloud computing clusters.

[0035] A layered 5G transport network typically consists of an access layer, an aggregation layer, and a core layer, which together complete the connection between base stations (fronthaul) and the core network (midhaul / backhaul). The densely interconnected devices in each layer are highly dependent on multi-core optical fiber devices. Therefore, the density, reliability, and performance of optical fiber connections directly determine the overall efficiency and latency of the 5G network.

[0036] To cope with the immense pressure of explosive data capacity, external wavelength division multiplexers are used to combine optical signals of different wavelengths and transmit them through a single fiber. Currently, the transmission capacity achievable by mainstream single-mode fiber technology is approaching the transmission limit of Shannon's theorem. Furthermore, to meet the demands of long-distance transmission, dense wavelength division multiplexing (DWDM) optical modules are primarily employed.

[0037] Three-dimensional photonic chips, with their unique characteristics of high bandwidth, low power consumption, and high integration, are considered one of the key technological paths to address this crisis and possess enormous potential. Three-dimensional photonic chips have the following advantages: 1. Increased Bandwidth: By employing technologies such as 3D integration and co-packaged optics (CPO), the optical engine is directly packaged next to the switch or computing chip, or even 3D stacked. This approach significantly shortens the electrical signal transmission distance, reduces signal attenuation and power consumption, and provides terabits per second (Tbps) of transmission bandwidth to meet the massive data exchange needs of scenarios such as AI computing.

[0038] 2. Increased Integration Density: By vertically stacking optical waveguides and devices, the integration limitations of planar photonic chips are overcome, allowing for the integration of more functional components within a unit area. Moreover, the three-dimensional structure allows photonic circuits to develop in the vertical direction, which not only significantly increases integration density but also makes it possible to optimize and combine devices of different materials and functions (such as lasers, modulators, and detectors) on a single chip through heterogeneous integration technology, thereby enabling more complex system functions.

[0039] Furthermore, three-dimensional photonic chips serve as information "processing centers" or "exchange centers," and the information they process needs to be transmitted over optical fibers to reach distant locations. Therefore, connecting to standard optical fibers is a crucial way for photonic chips to integrate into global information networks.

[0040] However, due to the huge size difference between nanoscale three-dimensional photonic chips and the micron-scale core diameter of standard fiber arrays, direct coupling of micron-scale fiber modes with nanoscale photonic chips results in severe light energy leakage and significant losses. Furthermore, traditional methods require each fiber array to be independently aligned to submicron precision in six dimensions, a process that is extremely cumbersome, time-consuming, and expensive.

[0041] The mounting of photonic chips typically utilizes anisotropic wet etching or dry etching techniques to create V-shaped trenches with specific angles and depths at the chip's edge, embedding and fixing the photonic chip within the trenches. However, this method cannot mount stacked photonic chips, i.e., three-dimensional photonic chips, as it not only easily leads to optical crosstalk, but also introduces new alignment errors in the fabrication and stacking of each layer, making it impossible to guarantee the alignment accuracy of photonic chips in different layers.

[0042] To overcome the aforementioned problems, one embodiment of this application provides a three-dimensional photonic chip coupler 100, which includes a substrate 110 with a two-dimensional through-hole array. A three-dimensional photonic chip 130 can be directly inserted into the two-dimensional through-hole array from the first end face of the substrate 110 to connect with an optical fiber array. Compared to using V-shaped trenches, this not only expands the dimension of photonic chip mounting, thereby increasing the number of photonic chips, but also improves integration density and reduces the volume of the three-dimensional photonic chip coupler, thus improving space utilization.

[0043] The following will conclude Figures 1 to 11 This application provides a detailed description of the three-dimensional photonic chip coupler 100, the optical interconnect device 200, the optical quantum computer 300, and the fabrication method of the three-dimensional photonic chip coupler 100.

[0044] Exemplary 3D photonic chip coupler: refer to Figure 1 and Figure 8 The three-dimensional photonic chip coupler 100 provided in this application includes a substrate 110. The substrate 110 has a two-dimensional via array 120 penetrating a first end face 111 and a second end face 112. The first end face 111 and the second end face 112 are disposed opposite to each other. The two-dimensional via array 120 has a plurality of first ports 1110 located on the first end face 111. The plurality of first ports 110 are used to connect a three-dimensional photonic chip 130. The two-dimensional via array 120 also has a plurality of second ports 1120 located on the second end face 112. The plurality of second ports 1120 are used to connect a stacked fiber array 140, so that the three-dimensional photonic chip 130 and the fiber array 140 are connected.

[0045] The substrate 110 can be made of glass, such as ordinary glass or quartz glass. Preferably, the substrate 110 is prepared from quartz glass. Of course, the substrate 110 can also be made of transparent rigid plastic or rigid polymer, such as polymethyl methacrylate, polycarbonate or cyclic olefin polymer, without being specifically limited here.

[0046] The three-dimensional photonic chip 130 may include stacked photonic chips 131, and the stacked fiber array 140 may include multiple layers of ordinary optical fibers 141. Stacking can be understood as multiple layers arranged along the height h direction.

[0047] In other words, a two-dimensional through-hole array 120 is present inside the quartz glass substrate. Each through-hole 121 in the two-dimensional through-hole array 120 penetrates the quartz glass substrate. The two-dimensional through-hole array 120 is connected to the three-dimensional photonic chip 130 on one side of the first end face 111, and connected to the stacked fiber array 140 on one side of the second end face 112. The three-dimensional photonic chip 130 is inserted into the two-dimensional through-hole array 120 from the first port 1110, and the stacked fiber array 140 is inserted into the two-dimensional through-hole array 120 from the second port 1120, so that the three-dimensional photonic chip 130 and the fiber array 140 are connected. The quartz glass substrate can be a rectangular glass substrate, and the specific shape is not limited. For example, the fiber 140 can be a standard fiber to interconnect the three-dimensional photonic chip 130 with the standard fiber.

[0048] It should be noted that the fiber array 140 can be considered as a fiber bundle or fiber ribbon, comprising multiple fibers 141, each fiber 141 including multiple fiber cores, each core being either single-mode single-core or multimode single-core. Each photonic chip 131 can be either a single-mode single-core fiber or a multimode single-core fiber. Thus, the single-mode single-core fiber of each photonic chip 131 can be connected to a single-mode single-core fiber of each fiber 141, a multimode single-core fiber of each fiber 141, or a multi-core fiber; no specific limitations are made here. The fiber bundle or fiber ribbon can be inserted into the two-dimensional through-hole array 120 in one go, which improves installation efficiency.

[0049] The three-dimensional photonic chip coupler provided in this application achieves fixed installation of three-dimensional photonic chips 130 and stacked fiber arrays 140 by forming a two-dimensional through-hole array 120 on a quartz glass substrate. This breaks through the one-dimensional fixed installation mode of the three-dimensional photonic chips and realizes the fixed installation of two-dimensional, multi-layered photonic chips. This increases the dimension of photonic chip fixed installation, thereby improving the density of the three-dimensional photonic chips and reducing the size of the photonic chip coupler. Compared with the traditional photonic chip coupler fixed installation through V-shaped grooves, this not only increases the number of photonic chips in another dimension, realizing the fixed installation of three-dimensional photonic chips, but also helps to reduce the size of the three-dimensional photonic chip coupler and improve space utilization.

[0050] It is understood that the number and arrangement of the two-dimensional via array 120 are consistent with the number and arrangement of the fiber array 140, and the number and arrangement of the two-dimensional via array 120 are consistent with the number and arrangement of the three-dimensional photonic chips 130, so that each via 121 in the two-dimensional via array 120 corresponds to the position of each fiber in the fiber array and each photonic chip in the three-dimensional photonic chip. This helps ensure that the positions of each fiber 141 and each photonic chip 131 in each via 121 are accurately aligned, providing a prerequisite for the precise connection of the fiber 141 and the corresponding photonic chip 131.

[0051] refer to Figure 2 and Figure 3 The two-dimensional through-hole array 120 can include through-holes arranged in any two directions, or it can include ring-shaped through-holes. It can also be flexibly designed according to the actual array structure layout and size, as long as the number and arrangement of the three-dimensional photonic chips 130 and the fiber array 140 connected at both ends correspond one-to-one.

[0052] In one example, the two-dimensional via array 120 can be arranged in a matrix array (see reference). Figure 2 ).

[0053] In another example, the two-dimensional through-hole array 120 can be arranged in a ring array (see reference). Figure 3 ).

[0054] refer to Figures 4 to 8 In the two-dimensional via array 120, the size 'a' of each via 121 is consistent with the size of the core 1411 of each fiber 141 in the fiber array 140, and the size 'a' of each via 121 is consistent with the size of the core at the end face of each photonic chip 131 in the three-dimensional photonic chip 130. Thus, with the core 1411 of the fiber 141 matching the size of the core at the end face of the corresponding photonic chip 131, the optical signal from the three-dimensional photonic chip 130 can directly enter the fiber array 140 for transmission, thereby improving the coupling efficiency of each fiber and each photonic chip 131 and reducing transmission loss. The size of the via 121 can be flexibly designed as needed.

[0055] In one example, the size of each via 121 in the two-dimensional via array 120 is consistent with the size of the core 1411 of each fiber 141 in the fiber array 140 and the size of the core 1311 of each photonic chip 131 in the three-dimensional photonic chip 130. The number and arrangement of the two-dimensional via array 120 are consistent with the number and arrangement of the three-dimensional photonic chips 130 and the number and arrangement of the fiber array 140, so that the position and size of each fiber in the fiber array and each photonic chip in the three-dimensional photonic chip correspond one-to-one. This is beneficial for further achieving precise coupling between the photonic chip 131 and the fiber 141.

[0056] In one embodiment, the size 'a' of each via 121 can be (127±1) micrometers, and the spacing 'b' between adjacent vias 121 in the two-dimensional via array 120 can be (127±1) micrometers. The smaller via size and spacing allow the three-dimensional photonic chip coupler 100 to have a larger number of vias, corresponding to a larger number of optical fibers 141 and photonic chips 131, thus enabling the transmission of more information to the outside. Of course, the via size can also be flexibly designed according to connection requirements, such as 125 micrometers.

[0057] It is understandable that the size 'a' of each via 121 can be 127 micrometers. Depending on the process tolerance, the size 'a' of each via 121 can also be greater than or equal to 126 micrometers and less than or equal to 128 micrometers, for example, it can be 126 micrometers, 128 micrometers, etc. Similarly, the spacing 'b' between adjacent vias 121 in the two-dimensional via array 120 can also be greater than or equal to 126 micrometers and less than or equal to 128 micrometers, for example, it can be 126 micrometers, 127 micrometers, and 128 micrometers.

[0058] refer to Figure 6 The substrate 110 (such as a quartz glass substrate) may also have a groove 150, which is disposed on the first end face 111, and the two-dimensional through-hole array 120 is located inside the groove 150. The groove 150 can be used to guide the three-dimensional photonic chip 130 to connect with multiple first ports 1110. This design is equivalent to setting a groove on the outside of the three-dimensional photonic chip 130 for guiding the installation of the photonic chip 131, so that the three-dimensional photonic chip 130 can be aligned and inserted into each through-hole 121 at one time, thereby improving the installation efficiency of the three-dimensional photonic chip 130. The depth of the groove 150 can be flexibly designed according to needs and process tolerances, such as 1.1mm, 2mm, 2.5mm, 3.6mm, etc., without specific limitations.

[0059] In one example, a groove 150 may be provided on the second end face 112, and a two-dimensional through-hole array 120 is located inside the groove 150. The groove 150 may be used to guide the fiber array 140 to connect with the plurality of second ports 1120.

[0060] In another example, the groove 150 can be disposed on the first end face 111 and the second end face 112, and the two-dimensional through-hole array 120 is located inside the groove 150. The groove 150 can be used to guide the fiber array 140 to connect with the plurality of second ports 1120, and also to guide the three-dimensional photonic chip 130 to connect with the plurality of first ports 1110.

[0061] Preferably, the two-dimensional via array 120 is prepared by femtosecond laser direct writing combined with chemical etching.

[0062] Specifically, firstly, femtosecond laser direct writing is used to etch the substrate 110 (such as a quartz glass substrate) to modify the substrate (such as quartz glass). Because laser direct writing alters the internal properties of the quartz glass substrate (such as refractive index and chemical activity) through the interaction between the laser and the material (such as photopolymerization, ablation, and modification), it ensures the fabrication precision of the three-dimensional photonic chip coupler 100. This method not only reduces the number of processing steps but also allows for flexible fabrication based on different arrangements and sizes of the two-dimensional via array 120. Furthermore, this method can achieve nanometer-level precision, which is beneficial for improving the fabrication accuracy of the three-dimensional photonic chip coupler 100, thereby further improving coupling efficiency.

[0063] Secondly, the etched dimensions are chemically etched using a special chemical solution and equipment to ensure that the arrangement, size, and spacing of the two-dimensional via array 120 on the etched quartz glass substrate are consistent with those of the three-dimensional photonic chip, and also consistent with those of the fiber array. Specifically, the quartz glass substrate is immersed in a prepared chemical mixture solution containing hydrofluoric acid, and the temperature gradient is strictly controlled by employing appropriate temperatures and stirring frequencies at different stages. This ensures that the precision of the etched two-dimensional via array 120 on the quartz glass substrate meets design requirements, and that the lateral and longitudinal dimensions of each via 121 match the dimensions of the corresponding fiber core of the photonic chip.

[0064] It should be noted that after the three-dimensional photonic chip coupler 100 is fabricated, the photonic chip 131 and the corresponding optical fiber 141 are installed. In one example, refer to... Figure 1 , Figures 5 to 8First, the coating layer 1412 is stripped from each fiber 141 in the fiber array 140 (the stripping distance is the length of the via 121 of the three-dimensional photonic chip coupler 100). The fiber clamp is then used to fix and polish the bare fiber 1411 until it meets the coupling requirements, ensuring that the end face of the bare fiber 1411 fully meets the coupling requirements. Similarly, each photonic chip 131 in the three-dimensional photonic chip 130 also needs to be stripped, ground, and polished to obtain a bare fiber. Next, the pre-polished bare fiber is inserted into the two-dimensional via array 120. Then, the polished bare fiber 1411 of the multi-core fiber is inserted from the second end face 112 into the etched two-dimensional via array 120 on the quartz glass substrate, so that each single-core fiber 141 of the multi-core fiber is aligned with each corresponding via 121 in the etched two-dimensional via array 120 of the quartz glass substrate. The multi-core fiber can be inserted into the two-dimensional via array as a whole, eliminating the need for individual installation and improving installation efficiency. Similarly, the polished single-core optical fiber is inserted into the two-dimensional via array 120 from the first end face 111. Multi-core optical fibers can be inserted into the two-dimensional via array as a whole, eliminating the need for individual installation and improving installation efficiency. Similarly, the three-dimensional photonic chip can also be inserted into the two-dimensional via array as a whole, without the need for individual installation. Finally, each single-core optical fiber of the multi-core optical fiber is connected and fixed to each single-core optical fiber in the two-dimensional via array 120 etched into the quartz glass substrate using ultraviolet (UV) curing.

[0065] The following example illustrates the structure and connection of the three-dimensional photonic chip coupler 100 provided in this application, using an N×8 fiber array 140 (i.e., each fiber array 140 may include 8 independent single-core fibers 141, with each group of 8 single-core fibers 141 forming a group, and N such groups of 8-core fibers stacked together in a strip shape), and the interconnection of a single-mode single-core fiber photonic chip 131 with the corresponding single-mode single-core fiber 141.

[0066] refer to Figures 1 to 8 One embodiment of this application provides a three-dimensional photonic chip coupler 100, which includes a substrate 110 (such as a quartz glass substrate). The substrate 110 has a two-dimensional through-hole array 120 penetrating a first end face 111 and a second end face 112. The two-dimensional through-hole array 120 includes 24 holes arranged in a rectangular pattern. Four through holes 121. A three-dimensional photonic chip 130 is inserted into the two-dimensional through hole array 120 from the first end face 111, and a stacked fiber array 140 is inserted into the two-dimensional through hole array 120 from the second end face 112, so that the three-dimensional photonic chip 120 and the fiber array 140 are connected.

[0067] The number and arrangement of the two-dimensional via array 120 are consistent with the number and arrangement of the three-dimensional photonic chip 130, and the number and arrangement of the two-dimensional via array 120 are consistent with the number and arrangement of the fiber array 140. The size of each via 121 in the two-dimensional via array 120 is consistent with the size of the core 1411 of each fiber 141 in the fiber array 140, and the size of each via 121 in the two-dimensional via array 120 is consistent with the size of the core of each photonic chip 131 in the three-dimensional photonic chip 130, so that the position and size of each via 121 in the two-dimensional via array 120 correspond one-to-one with each fiber 141 in the fiber array 140 and each photonic chip 131 in the three-dimensional photonic chip 130. The size of each via 121 can be 127 micrometers, and the spacing d between adjacent vias in the two-dimensional via array 120 can be 127 micrometers.

[0068] The quartz glass substrate may also have a groove 150, which is disposed on the first end face 111, and a two-dimensional through-hole array 120 is disposed inside the groove 150. The groove is used to guide the three-dimensional photonic chip 130 to connect with the plurality of first ports 1110. For example, the two-dimensional through-hole array 120 includes 24 With four through holes of 127 micrometers each, the length c of the groove 150 can be 3.2 mm, the height d of the groove 150 can be 1 mm, 2 mm, etc., and the thickness g of the groove 150 can be 3 mm to 5 mm, such as 3 mm, 4 mm, 5 mm.

[0069] Furthermore, the two-dimensional through-hole array 120 can first modify the internal properties (such as refractive index and chemical activity) of the quartz glass substrate through femtosecond laser direct writing, thereby providing a prerequisite for the fabrication accuracy of the three-dimensional photonic chip coupler 100 structure. The written dimensions are then chemically etched using a special chemical solution and equipment to ensure that the array size of the etched quartz glass substrate matches the arrangement, size, and spacing of the photonic chip, and also matches the arrangement, size, and spacing of the fiber array. The installation process of the three-dimensional photonic chip coupler 100 can be found above and will not be repeated here.

[0070] Exemplary optical interconnect devices and optical quantum computers: refer to Figure 9Based on the aforementioned three-dimensional photonic chip coupler 100, one embodiment of this application provides an optical interconnect device 200, which may include a three-dimensional photonic chip coupler 100, a three-dimensional photonic chip 130, a stacked fiber array 140, and a package housing 160. The three-dimensional photonic chip coupler 100, the three-dimensional photonic chip 130, and the stacked fiber array 140 are disposed in the internal cavity of the package housing 160. The specific structure of the three-dimensional photonic chip coupler 100 can be found in the description above, and will not be repeated here.

[0071] In one example, the enclosure 160 can be a precision-machined 304 stainless steel casing, enabling it to be used in various complex environments without its performance being affected by environmental factors. One end of the three-dimensional photonic chip coupler 100 is a fiber optic array 140, which can be connected to connectors of various specifications. The other end of the optical interconnect device 200 is a photonic chip 130 (such as a three-dimensional photonic chip), which can be spliced ​​or cold-spun as needed to form a highly integrated, high-bandwidth optical interconnect device for data transmission.

[0072] refer to Figure 10 Based on the aforementioned optical interconnect device 200, one embodiment of this application also provides an optical quantum computer 300, which includes a single photon source 310, an optical quantum chip 320, and a single photon detector 330. One or more of the single photon source 310, the optical quantum chip 320, and the single photon detector 330 include the optical interconnect device 200 described above.

[0073] It can be understood that the optical quantum computer 300 mainly comprises a single-photon source, an optical quantum chip, and a detection system. An optical quantum computer is a quantum computing device that uses photons (light particles) as qubits for information processing. The single-photon source generates high-quality single photons as qubit carriers by exciting quantum dots with lasers or by spontaneous parametric down-conversion (SPDC). The optical quantum processor consists of optical components such as optical fibers, waveguides, beam splitters, phase modulators, and mirrors to achieve optical transmission and logical operations (such as Hadamard gates and CNOT gates). The detection system can measure the final state of the photons (such as polarization or path) and output the calculation results. For a detailed description of the specific processing procedures of the optical quantum computer, please refer to the relevant technical descriptions; they will not be elaborated upon here.

[0074] Exemplary method for fabricating a three-dimensional photonic chip coupler: based on Figures 1 to 11 An embodiment of this application also provides a method for fabricating a three-dimensional photonic chip coupler 100, the method comprising the following steps: S10 provides a substrate 110 (such as a quartz glass substrate).

[0075] Specifically, based on the design dimensions of the three-dimensional photonic chip coupler 100, quartz glass is cut into quartz glass substrates of different sizes, and then the surfaces are cleaned with low-concentration hydrofluoric acid, pure alcohol, hydrogen peroxide, and purified water. For example, the two-dimensional through-hole array 120 includes 24... Taking four 127-micrometer through-holes as an example, the depth of the through-holes 121 in the three-dimensional photonic chip coupler 100 can be greater than or equal to 1 mm and less than or equal to 2 mm. The length e of the three-dimensional photonic chip coupler 100 can satisfy: e ≥ 5 mm, for example, length e can be 5 mm, 5.1 mm, 5.5 mm, etc., without specific limitations. The thickness f of the three-dimensional photonic chip coupler 100 can satisfy: 4 mm ≤ f ≤ 7 mm, for example, thickness f can be 4 mm, 5 mm, 6 mm, 7 mm, etc., without specific limitations. The height h of the three-dimensional photonic chip coupler 100 can be 2 mm, 3 mm, etc., without specific limitations.

[0076] S20, a groove 150 is formed on the first end face 111 of the substrate 110.

[0077] Specifically, the internal structure dimensions are etched using femtosecond laser direct writing, followed by etching with a mixed solution of hydrofluoric acid and other substances to form grooves 150. By setting different solution temperatures and stirring frequencies, the etching depth is adjusted to meet requirements. For example, the size of the three-dimensional photonic chip coupler 100 can be 5mm. 6mm With a diameter of 3mm, the length c of the groove 150 can be 3.2mm, the thickness g can be 2mm, and the height d can be 1mm.

[0078] S30, a two-dimensional via array 120 is formed, which penetrates the first end face 111 and the second end face 112 of the substrate 110, with the first end face 111 and the second end face 112 arranged opposite to each other. The two-dimensional via array 120 has a plurality of first ports 1110 located on the first end face 111 for connecting the three-dimensional photonic chip 130. The two-dimensional via array 120 also has a plurality of second ports 1120 located on the second end face 112 for connecting the stacked fiber array 140, so that the three-dimensional photonic chip 130 and the fiber array 140 are connected.

[0079] Specifically, a structure (including a two-dimensional via array 120) is etched into a substrate 110 (such as a quartz glass substrate) using a femtosecond laser direct writing method. By adjusting the pulse frequency and power of the femtosecond laser, the dimensions of the etched structure are made to meet the drawing requirements. The lateral spacing between adjacent vias 121 in the two-dimensional via array 120 is preferably 127 micrometers (with a process tolerance of 1 micrometer), and the longitudinal spacing between adjacent vias 121 in the two-dimensional via array 120 is preferably 127 micrometers (with a process tolerance of 1 micrometer), so as to conform to the dimensions of the 8-core fiber ribbon.

[0080] After the femtosecond laser direct writing process is completed, the internal structure of the quartz glass is modified. The temperature and stirring frequency of the mixed solution such as hydrofluoric acid are used to etch along the path written by the femtosecond laser. By further controlling the time, solution temperature, and solution stirring frequency, the accuracy of the through-hole array and the stress of the quartz glass are ensured to remain unchanged, so as to ensure the etching accuracy of each through-hole in the through-hole array.

[0081] Two-dimensional via array etched by femtosecond laser (reference) Figure 1 and Figure 6 ) and an array of 8-core fiber optic strips (reference) Figure 5 The aperture size is consistent to make the product manufacturing and coupling packaging simpler.

[0082] After the etched quartz glass substrate is assembled and coupled with the 8-core fiber ribbon array (reference) Figure 8 The three-dimensional photonic chip coupler 100 is cured by exposure to a 365nm ultraviolet (UV) lamp and then baked at high temperature for 48 hours to ensure more stable performance. After UV curing, it undergoes another 24 hours of high-temperature baking to further guarantee accuracy. Following high-temperature baking, the three-dimensional photonic chip coupler 100 is subjected to 48 hours of high-low temperature cycling (-40℃ to 85℃) to ensure stable performance under extreme temperatures.

[0083] refer to Figure 8 After the overall encapsulation is completed, the quartz glass substrate is etched with a through-hole array using femtosecond laser-induced etching (see reference). Figure 1 and Figure 6 The three-dimensional photonic chip and multi-core optical fiber are encapsulated in a stainless steel outer box to form an integrated optical interconnect device 200.

[0084] It should be noted that femtosecond laser-induced etching of via arrays on a quartz glass substrate replaces traditional mechanical machining (V-grooves), chemical etching (U-grooves), or C-grooves. Using femtosecond laser direct writing technology to etch the via array on the quartz glass substrate ensures high-precision via arrays while maintaining the stability of the quartz glass substrate's stress. The eight-core optical fibers are then matched one-to-one with the array holes and fixed using UV curing. This fiber bundle solves the problem of matching single-core fiber bundles with multi-core fibers, improving coupling efficiency and resulting in very low transmission loss.

[0085] Furthermore, since the coupling matching problem in this application is solved by etching a via array on the quartz glass substrate using femtosecond laser direct writing technology, compared to the immaturity of multi-core fiber fabrication technology, the via array etching technology using femtosecond laser direct writing has undergone many years of evolution and optimization. Currently, the etching technology is extremely mature, and its corresponding supporting connection cost is low. On this basis, by using femtosecond laser direct writing to etch a via array larger than the quartz glass substrate, only the size of the vias needs to be locally chemically modified and matched. The size of the vias matches the size of the bare fiber, thus achieving a lower coupling loss.

[0086] It is worth noting that this invention has greater potential for mass production compared to traditional mechanically processed fiber arrays. Furthermore, the femtosecond laser direct writing technology for etching through-hole arrays on quartz glass substrates involves only femtosecond laser modification combined with etching using chemical reagents, thus eliminating the inter-core crosstalk problem caused by the process.

[0087] In addition, each functional unit or module in the various embodiments of this application can be integrated into one processing unit or module, or each unit or module can exist physically separately, or two or more units or modules can be integrated into one unit or module.

[0088] It is understood that in this application, directional descriptions such as "upper," "lower," "inner," and "outer" are relative rather than absolute. These directional terms may be applicable when the three-dimensional photonic chip coupler provided in this application is placed in the orientation and position shown in the accompanying drawings.

[0089] It should be understood that although terms such as "first" or "second" may be used in this application to describe various elements (such as the first end face and the second end face), these elements are not defined by these terms, which are only used to distinguish one element from another.

[0090] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0091] The above description has been given for illustrative and descriptive purposes. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

[0092] The components and devices described in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the accompanying drawings. As those skilled in the art will recognize, these components and devices can be connected, arranged, and configured in any manner.

[0093] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A three-dimensional photonic chip coupler, characterized in that, include: Matrix; The substrate has a two-dimensional through-hole array that penetrates the first end face and the second end face, and the first end face and the second end face are arranged opposite to each other; The two-dimensional via array has a plurality of first ports located on the first end face, the plurality of first ports being used to connect to the three-dimensional photonic chip. The two-dimensional via array also has a plurality of second ports located on the second end face, the plurality of second ports being used to connect to a stacked fiber array, so that the three-dimensional photonic chip and the fiber array are connected.

2. The three-dimensional photonic chip coupler according to claim 1, characterized in that, The substrate also has a groove, which is disposed on the first end face, and the two-dimensional through-hole array is located inside the groove. The groove is used to guide the three-dimensional photonic chip to connect with the plurality of first ports.

3. The three-dimensional photonic chip coupler according to claim 1, characterized in that, The number and arrangement of the two-dimensional through-hole array are consistent with the number and arrangement of the three-dimensional photonic chips and the number and arrangement of the fiber array, so that the position of each fiber in the fiber array corresponds to that of each photonic chip in the three-dimensional photonic chip.

4. The three-dimensional photonic chip coupler according to claim 1, characterized in that, The two-dimensional through-hole array is in the form of a rectangular array or a ring array.

5. The three-dimensional photonic chip coupler according to claim 1, characterized in that, The size of each through-hole in the two-dimensional through-hole array is the same as the core size of each optical fiber in the optical fiber array and the core size of each photonic chip in the three-dimensional photonic chip.

6. The three-dimensional photonic chip coupler according to claim 5, characterized in that, The number and arrangement of the two-dimensional through-hole array are consistent with the number and arrangement of the three-dimensional photonic chips and the number and arrangement of the fiber array, so that the position of each fiber in the fiber array corresponds to that of each photonic chip in the three-dimensional photonic chip.

7. The three-dimensional photonic chip coupler according to claim 6, characterized in that, The two-dimensional through-hole array is obtained by femtosecond laser direct writing.

8. An optical interconnect device, characterized in that, The device includes a three-dimensional photonic chip coupler, a three-dimensional photonic chip, a stacked fiber array, and a packaging shell as described in any one of claims 1 to 7, wherein the three-dimensional photonic chip coupler, the three-dimensional photonic chip, and the stacked fiber array are disposed in the internal cavity of the packaging shell.

9. An optical quantum computer, characterized in that, It includes a single-photon source, a quantum chip, and a single-photon detector, wherein one or more of the single-photon source, the quantum chip, and the single-photon detector include the optical interconnect device as described in claim 8.

10. A method for fabricating a three-dimensional photonic chip coupler as described in any one of claims 1 to 7, characterized in that, include: Provide a matrix; A two-dimensional through-hole array is formed, the two-dimensional through-hole array penetrating a first end face and a second end face of the substrate, the first end face and the second end face being disposed opposite to each other. The two-dimensional via array has a plurality of first ports located on the first end face, the plurality of first ports being used to connect to the three-dimensional photonic chip. The two-dimensional via array also has a plurality of second ports located on the second end face, the plurality of second ports being used to connect to a stacked fiber array, so that the three-dimensional photonic chip and the fiber array are connected.

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