Multiphase digital power supply circuit and multiphase digital power supply system
By using the closed-loop feedback mechanism of the PWM controller and PID controller, combined with the ADC sampling unit, precise digital modulation of the multiphase digital power supply circuit is achieved, solving the problem of poor applicability of analog control and providing a high-efficiency, low-ripple, and fast-response power supply.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-30
- Publication Date
- 2026-04-07
AI Technical Summary
The existing implementation of multiphase power supply circuits mainly relies on analog control, resulting in poor applicability and inability to adapt to path changes and load imbalances, requiring readjustment and adaptation.
A closed-loop feedback mechanism is constructed using a PWM controller, a drive circuit unit, a PID controller, and an ADC sampling unit to achieve precise digital modulation of multiple phases. The ADC sampling unit collects electrical and thermal parameters in real time, and the PID controller generates control commands to adjust the PWM signal to control the conduction timing of the drive transistor.
It achieves high-efficiency, low-ripple, and fast-response power supply, improves the applicability and stability of multiphase digital power supply circuits, and reduces dependence on external components and circuit wiring.
Smart Images
Figure CN121813829A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit technology, and in particular to a multiphase digital power supply circuit and a multiphase digital power supply system. Background Technology
[0002] With the ever-increasing demands for high performance, high energy efficiency, and miniaturization in modern electronic devices, power management technology plays a crucial role in system design. Especially in high-power load applications such as servers, high-end computing platforms, graphics processing units (GPUs), and artificial intelligence chips, multiphase power supply solutions are widely adopted due to their ability to effectively distribute current, reduce ripple voltage, improve dynamic response speed, and enhance thermal management efficiency.
[0003] In the existing technology, the implementation of multiphase power supply circuits is mainly achieved by analog methods. For example, two or four phases are generated by analog and then the layout and routing on the circuit board are used to maintain phase consistency.
[0004] However, in the existing implementation, if there is any change in the entire path, the entire system needs to be re-adjusted and adapted. Therefore, the existing implementation has poor applicability. Summary of the Invention
[0005] The purpose of this application is to address the shortcomings of the prior art by providing a multiphase digital power supply circuit and a multiphase digital power supply system that can provide a high-efficiency, low-ripple, and fast-response power supply to the load, thereby improving the applicability of the multiphase digital power supply circuit.
[0006] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, the present invention provides a multiphase digital power supply circuit, comprising: a PWM controller, a drive circuit unit, a drive transistor, a PID controller, and an ADC sampling unit; The PWM controller is connected to the control terminal of the drive circuit unit. The PWM controller is used to adjust at least one PWM signal among multiple PWM signals according to the control command sent by the PID controller for at least one phase, and send it to the drive circuit unit. The driving terminal of the driving circuit unit is connected to the input terminal of the driving transistor. The driving circuit unit is used to convert the adjusted multi-channel PWM signal into a multi-channel driving signal that can drive the driving transistor and send it to the driving transistor. The output terminal of the driving transistor is used to connect to the power supply terminal of the load. The sampling terminal of the load and the sampling terminal of the driving transistor are respectively connected to the input terminal of the ADC sampling unit. The driving transistor is used to control the corresponding power switch branches to be turned on or off according to the conduction timing indicated by the multi-channel driving signal to supply power to the load. The output of the ADC sampling unit is connected to the input of the PID controller, and the output of the PID controller is electrically connected to the input of the PWM controller. The ADC sampling unit is used to collect real-time electrical parameters and / or thermal parameters of each phase and send them to the PID controller. The PID controller is used to generate at least one control command corresponding to each phase and send it to the PWM controller based on the real-time electrical parameters and / or thermal parameters of each phase.
[0007] In an optional embodiment, the multiphase digital power supply circuit further includes: a first LC filter, the first LC filter including: a first inductor and a first capacitor, wherein one end of the first inductor is connected to the output terminal of the driving transistor, the other end of the first inductor is connected to one end of the first capacitor, the other end of the first capacitor is grounded, and the load and the first capacitor are connected in parallel.
[0008] In an optional embodiment, the driving transistor includes multiple first power switch branches corresponding to multiple phases, each first power switch branch including: a first power switch and a second power switch, wherein the first power switch and the second power switch are of the same or different types.
[0009] In an optional embodiment, the first power switch is a first PMOS transistor, the second power switch is a first NMOS transistor, the gate of the first PMOS transistor is connected to the high-side driving terminal output by the driving circuit unit, the drain of the first PMOS transistor is connected to a preset power supply, the source of the first PMOS transistor is connected to the drain of the first NMOS transistor and one end of the first inductor, the gate of the first NMOS transistor is connected to the low-side driving terminal output by the driving circuit unit, and the source of the first NMOS transistor is connected to the drain of the first PMOS transistor in the next first power switch branch.
[0010] In an optional embodiment, the multiphase digital power supply circuit further includes multiple first sampling units corresponding to multiple phases, wherein the source of each first PMOS transistor and the drain of each first NMOS transistor are connected to the input terminal of each first sampling unit, the output terminal of each first sampling unit is connected to one end of the first inductor, and the sampling terminal of each first sampling unit is connected to the input terminal of the ADC sampling unit.
[0011] In an optional embodiment, the multiphase digital power supply circuit further includes: a second LC filter, the second LC filter including: a plurality of second inductors and second capacitors corresponding to multiple phases, wherein one end of each second inductor is connected to the phase output terminal of each driving transistor, the other end of each second inductor is connected to one end of the second capacitor, the other end of the second capacitor is grounded, and the load and the second capacitor are connected in parallel.
[0012] In an optional embodiment, the driving transistor includes multiple second power switch branches corresponding to multiple phases, and each second power switch branch includes: a third power switch and a fourth power switch; The third power switch is a second PMOS transistor, and the fourth power switch is a second NMOS transistor. The gate of the second PMOS transistor is connected to the high-side driving terminal output by the driving circuit unit. The drain of the second PMOS transistor is connected to a preset power supply. The source of the second PMOS transistor is connected to the drain of the second NMOS transistor and one end of the second inductor. The gate of the second NMOS transistor is connected to the low-side driving terminal output by the driving circuit unit. The source of the second NMOS transistor is grounded.
[0013] In an optional embodiment, the multiphase digital power supply circuit further includes a second LC filter, which includes: a plurality of second sampling units corresponding to multiple phases; The source of each second PMOS transistor and the drain of each second NMOS transistor are connected to the input terminal of each second sampling unit. The output terminal of each second sampling unit is connected to one end of each second inductor. The sampling terminal of each second sampling unit is connected to the input terminal of the ADC sampling unit.
[0014] Secondly, the present invention provides a multiphase digital power supply system, including at least one multiphase digital power supply circuit according to any of the foregoing embodiments.
[0015] In an optional implementation, the multiphase digital power system includes: a plurality of multiphase digital power circuits, which are connected to each other via a clock synchronization pin on a PWM controller.
[0016] The beneficial effects of this application are: The multiphase digital power supply circuit and system provided in this application include a PWM controller, a drive circuit unit, a drive transistor, a PID controller, and an ADC sampling unit. The PWM controller is connected to the control terminal of the drive circuit unit. The PWM controller is used to adjust at least one PWM signal among the multiple PWM signals according to the control command sent by the PID controller for at least one phase, and sends it to the drive circuit unit. The drive terminal of the drive circuit unit is connected to the input terminal of the drive transistor. The drive circuit unit is used to convert the adjusted multiple PWM signals into multiple drive signals that can drive the drive transistor and send them to the drive transistor. The output terminal of the drive transistor is used to connect to the power supply terminal of the load. The sampling terminal of the load and the sampling terminal of the drive transistor are respectively connected to the input terminal of the ADC sampling unit. The drive transistor is used to control the corresponding power switch branches to turn on or off according to the conduction timing indicated by the multiple drive signals. The ADC sampling unit is used to power the load. The output of the ADC sampling unit is connected to the input of the PID controller, and the output of the PID controller is electrically connected to the input of the PWM controller. The ADC sampling unit is used to collect real-time electrical and / or thermal parameters of each phase and send them to the PID controller. The PID controller generates at least one control command corresponding to the phase and sends it to the PWM controller. This enables precise digital modulation of multiple phases through the PWM controller. Combined with the ADC sampling unit and the PID controller, a closed-loop feedback mechanism is formed, which enables the power switch branches of each phase to operate with uniform phase difference. This effectively achieves the time-domain peak-shifting superposition of currents in each phase, significantly reduces the ripple of the output current, and improves the stability of the output voltage. Compared with traditional analog control schemes, it can provide the load with a high-efficiency, low-ripple, and fast-response power supply, improving the applicability of multi-phase digital power supply circuits. Attached Figure Description
[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 A schematic diagram of a multiphase digital power supply circuit provided in an embodiment of this application; Figure 2 A schematic diagram of another multiphase digital power supply circuit provided in this application embodiment; Figure 3 A schematic diagram of another multiphase digital power supply circuit provided in this application embodiment; Figure 4A schematic diagram of a multiphase digital power supply system provided in this application embodiment; Figure 5 This is a schematic diagram of another multiphase digital power supply system provided in an embodiment of this application. Detailed Implementation
[0019] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0020] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0021] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0022] In related technologies, the implementation of multiphase power supply circuits mainly adopts analog methods. For example, two or four phases are generated by analog and then the layout and routing on the circuit board are used to maintain phase consistency. However, in this implementation method, if there is any change in the entire path (for example, differences in chip manufacturing process, voltage, and temperature in the path), the entire system needs to be re-adjusted and adapted. Moreover, it cannot adapt to situations with unbalanced loads. Therefore, the existing implementation method has poor applicability.
[0023] In view of this, the present application provides a multiphase digital power supply circuit, which can perform precise digital modulation of multiple phases through the PWM controller 11, and form a closed-loop feedback mechanism with the ADC sampling unit and PID controller, which can provide the load with high-efficiency, low-ripple, and fast-response power, thereby improving the applicability of the multiphase digital power supply circuit.
[0024] Figure 1 This is a schematic diagram of a multiphase digital power supply circuit provided in an embodiment of this application. Optionally, this multiphase digital power supply circuit can be applied to applications such as processors, AI power supplies, servers, DC-DC step-down modules, dexterous hand devices, and motor drive devices, etc., and is not limited thereto. Figure 1As shown, the multiphase digital power supply circuit may include: a PWM controller 11, a drive circuit unit 12, a drive transistor 13, a PID controller 14, and an ADC sampling unit 15.
[0025] The PWM controller 11 is connected to the control terminal of the drive circuit unit 12. The PWM controller 11 is used to adjust at least one PWM signal among the multiple PWM signals according to the control command sent by the PID controller 14 for at least one phase, and send it to the drive circuit unit 12.
[0026] The driving terminal of the driving circuit unit 12 is connected to the input terminal of the driving transistor 13. The driving circuit unit 12 is used to convert the adjusted multi-channel PWM signal into a multi-channel driving signal that can drive the driving transistor 13 and send it to the driving transistor 13. The output terminal of the driving transistor 13 is used to connect to the power supply terminal of the load 16. The sampling terminal of the load 16 and the sampling terminal of the driving transistor 13 are respectively connected to the input terminal of the ADC sampling unit 15. The driving transistor 13 is used to control the power switch branch corresponding to each phase to turn on or off according to the conduction timing indicated by the multi-channel driving signal to supply power to the load 16.
[0027] The output of the ADC sampling unit 15 is connected to the input of the PID controller 14, and the output of the PID controller 14 is electrically connected to the input of the PWM controller 11. The ADC sampling unit 15 is used to collect the real-time electrical parameters and / or thermal parameters of each phase and send them to the PID controller 14. The PID controller 14 is used to generate at least one control command corresponding to each phase and send it to the PWM controller 11 based on the real-time electrical parameters and / or thermal parameters of each phase.
[0028] Optionally, the electrical parameters of each phase may include: current parameters and voltage parameters of each phase, and the thermal parameters of each phase may include: temperature parameters of each phase. The voltage parameters of each phase may indicate the supply voltage of the load.
[0029] The driving transistor 13 may include power switch branches corresponding to each phase. These power switch branches may include two power switches of the same or different types, which is not limited here. The ADC sampling unit 15 may be a 12-bit SAR ADC structure, but is not limited thereto. The ADC sampling unit 15 can convert the real-time electrical parameters and / or thermal parameters of each phase into digital values.
[0030] The working principle of the multiphase digital power supply circuit provided in this application embodiment is as follows: the ADC sampling unit 15 collects the electrical parameters and / or thermal parameters of each phase in real time and sends them to the PID controller 14.
[0031] When powered on, the PID controller 14 obtains the preset proportional coefficient Kp, preset integral coefficient Ki, preset derivative coefficient Kd, upper and lower limits of the duty cycle of the PWM signal, and step size (used to indicate the operation frequency of the PID controller 14) through software configuration or preset memory (such as OTP, MTP, Flash, ROM, etc.). Combined with the electrical parameters and / or thermal parameters of each phase sent by the ADC sampling unit 15 based on the preset PID algorithm, it can generate control commands for at least one phase and send them to the PWM controller 11.
[0032] Optionally, the control instructions corresponding to at least one phase may include: increasing the number of phases, decreasing the current number of phases, adjusting the duty cycle and period of the PWM signal corresponding to an existing phase, etc., which are not limited here. Furthermore, it should be noted that during the adjustment process, the PID controller 14 can determine whether the error of the entire loop is within the preset error range based on the real-time electrical and / or thermal parameters of each phase. If the error is not within the preset error range, the Kp, Ki, and Kd parameters are continuously updated until the error is within the preset range; if the error is within the preset error range, the PID controller 14 continues to operate without updating the Kp, Ki, and Kd parameters, but an interrupt is generated to record that the hardware has completed the operation of setting the preset target value.
[0033] The PWM controller 11 adjusts at least one PWM signal among the multiple PWM signals according to the control command sent by the PID controller 14 for at least one phase (e.g., adjusting the duty cycle, period, etc. of at least one PWM signal), and sends the adjusted multiple PWM signals to the drive circuit unit 12; the drive circuit unit 12 can convert and output the adjusted multiple PWM signals into multiple drive signals with high voltage and high current capabilities suitable for directly controlling the drive transistor 13 (e.g., MOSFET), so that the multiple drive signals can meet the requirements of the load 16.
[0034] In addition, it should be noted that in some embodiments, the drive circuit unit 12 may also have any of the following functions: outputting multiple drive signals to the drive transistor 13 to realize full on / full off, preventing the output signal from rising too fast when powered on, which would cause the drive transistor 13 to overshoot, and preventing the falling time from being too slow when powered off.
[0035] The drive transistor 13 can control each power switch branch to turn on in turn according to a predetermined time sequence based on the multi-channel drive signal. Each phase independently completes energy transfer, and its output current is superimposed in time and space to jointly power the load 16, thereby realizing high-frequency interleaved operation and providing the load 16 with a high-efficiency, low-ripple, and fast-response power supply.
[0036] The input PWM signal is accurately converted into the desired output voltage level, and the rise and fall times of the signal meet the requirements of load 16. The drive circuit unit 12 of this invention also has two functions: first, it can realize fully on / fully off input signals; second, it prevents the output signal from rising too quickly when powered on, causing overshoot of the drive transistor 13, and prevents the fall time from being too slow when powered off.
[0037] In this process, the PID controller 14 can perform closed-loop feedback control based on the real-time electrical and / or thermal parameters of each phase collected by the ADC sampling unit 15. By combining with the PWM controller 11, it can dynamically adjust the conduction timing and current output of each phase according to the instantaneous power consumption requirements of the load 16 and the real-time electrical and / or thermal parameters of each phase (for example, shutting down some phases to improve efficiency under light load, and quickly enabling and coordinating all phases to share the current under heavy load or transient response, avoiding single-phase overload). This enables high-frequency interleaved operation, providing the load 16 with a high-efficiency, low-ripple, and fast-response power supply. In addition, it can prevent local heating, extend the service life of the drive transistor 13, improve the overall system reliability, and effectively suppress output voltage fluctuations caused by transient changes in the load 16, component aging, or environmental temperature differences. Compared with the prior art, it does not require adjusting parameters to control the phase through an external interface, which can improve the applicability, stability, and energy efficiency of the multi-phase digital power supply circuit.
[0038] It should be noted that this application does not limit the specific application scenario of the method. For example, it can be applied to multi-phase digital power systems such as 3-phase, 4-phase, 6-phase, and 8-phase. In addition, depending on the number of phases, the phase difference between the PWM drive signals can be different. For example, in a 4-phase digital power system, the PWM controller 11 can output 4 PWM signals, and the phase difference between each PWM signal is 90°.
[0039] Regarding the PWM controller 11, it should also be noted that in some embodiments, the PWM controller 11 may be configured not to adjust immediately after receiving the control command corresponding to at least one phase from the PID controller 14. Instead, the control command corresponding to at least one phase may be stored in the shadow register of the PWM controller 11. At least one PWM signal among the multiple PWM signals may be adjusted at the dead time point to ensure that the parameter update time point is when the PWM controller output signal is not working, and then sent to the drive circuit unit 12. This avoids unpredictable effects during the update process and can improve the applicability of the method of this application.
[0040] In summary, this application provides a multiphase digital power supply circuit, including: a PWM controller, a drive circuit unit, a drive transistor, a PID controller, and an ADC sampling unit; the PWM controller is connected to the control terminal of the drive circuit unit, and the PWM controller is used to adjust at least one PWM signal among multiple PWM signals according to the control command sent by the PID controller for at least one phase, and send it to the drive circuit unit; the drive terminal of the drive circuit unit is connected to the input terminal of the drive transistor, and the drive circuit unit is used to convert the adjusted multiple PWM signals into multiple drive signals capable of driving the drive transistor and send them to the drive transistor; the output terminal of the drive transistor is used to connect to the power supply terminal of the load, and the sampling terminal of the load and the sampling terminal of the drive transistor are respectively connected to the input terminal of the ADC sampling unit, and the drive transistor is used to control the corresponding power switch branches to turn on or off according to the conduction timing indicated by the multiple drive signals to supply power to the load; ADC The output of the sampling unit is connected to the input of the PID controller, and the output of the PID controller is electrically connected to the input of the PWM controller. The ADC sampling unit is used to collect real-time electrical and / or thermal parameters of each phase and send them to the PID controller, so that the PID controller can generate at least one control command corresponding to the phase and send it to the PWM controller. This enables precise digital modulation of multiple phases through the PWM controller. Combined with the ADC sampling unit and the PID controller, a closed-loop feedback mechanism is formed, which enables the power switch branches of each phase to operate with uniform phase difference. This effectively realizes the time-domain peak-shifting superposition of the current of each phase, greatly reduces the ripple of the output current, and improves the stability of the output voltage. Compared with the traditional analog control scheme, it can provide the load with a high-efficiency, low-ripple, and fast-response power supply, reduce the dependence on external components and circuit wiring of the load, and improve the applicability of multi-phase digital power supply circuits.
[0041] Figure 2 This is a schematic diagram of another multiphase digital power supply circuit provided in an embodiment of this application. In optional embodiments, such as... Figure 2 As shown, the multiphase digital power supply circuit also includes: a first LC filter, which includes: a first inductor L1 and a first capacitor C1, wherein one end of the first inductor L1 is connected to the output terminal of the driving transistor 13, the other end of the first inductor L1 is connected to one end of the first capacitor C1, the other end of the first capacitor C1 is grounded, and the load is connected in parallel with the first capacitor C1.
[0042] In some implementations, considering that the output of the power switch branch in the drive transistor 13 is a high-frequency PWM chopper voltage (i.e., square wave), which contains a large amount of AC components (high-frequency ripple), if left untreated, this "pulsating DC" will seriously interfere with the load, leading to various problems such as unstable operation, increased signal noise, increased heat generation, and shortened lifespan. Therefore, a first LC filter can be set up to suppress current surges and filter out high-frequency ripples through the energy storage and release characteristics of the first inductor L1, making the current change smooth and achieving energy buffering and stable transmission. The charging and discharging capability of the first capacitor C1 can suppress voltage fluctuations.
[0043] In alternative implementations, such as Figure 2 As shown, the driving transistor 13 includes multiple first power switch branches corresponding to multiple phases. Each first power switch branch includes a first power switch and a second power switch. The first power switch and the second power switch may be of the same or different types.
[0044] In an optional implementation, the first power switch is a PMOS transistor and the second power switch is an NMOS transistor. The gate of the PMOS transistor is connected to the high-side drive terminal output by the drive circuit unit 12, the drain of the PMOS transistor is connected to a preset power supply, the source of the PMOS transistor is connected to the drain of the NMOS transistor and one end of the first inductor, the gate of the NMOS transistor is connected to the low-side drive terminal output by the drive circuit unit 12, and the source of the NMOS transistor is connected to the drain of the PMOS transistor in the next first power switch branch.
[0045] Optionally, such as Figure 2 As shown, the first power switch in the first power switch branch can be a PMOS transistor, and the second power switch can be an NMOS transistor. Combined with the first inductor and the first capacitor, in order to better understand this application, the multiphase digital power supply circuit provided in the embodiment of this application is used as an example in a three-phase power supply system for illustration.
[0046] Among them, such as Figure 2 As shown, the PWM controller 11 can output three pairs of complementary PWM signals (i.e., as shown in the diagram). Figure 2 As shown, the first high-side PWM signal PWMA_H and the first low-side PWM signal PWMA_L, the second high-side PWM signal PWMB_H and the second low-side PWM signal PWMB_L, the third high-side PWM signal PWMC_H and the third low-side PWM signal PWMC_L are provided. The phase of each pair of PWM signals can be set, and the delay of each PWM signal can be finely adjusted. Correspondingly, the drive circuit unit 12 can output multiple low-side drive signals (PWMNA, PWMNB, PWMNC) through multiple low-side drive terminals, and output multiple high-side drive signals (PWMPA, PWMPB, PWMPC) through multiple high-side drive terminals.
[0047] Taking the first low-side drive signal PWMNA output by the first low-side drive terminal and the first high-side drive signal PWMPA output by the first high-side drive terminal of the drive circuit unit 12 as examples, when the first low-side drive signal PWMNA and the first high-side drive signal PWMPA output by the drive circuit unit 12 are at a high level, the first power switch NMOS transistor NM1 in the first power switch branch is turned on, the second power switch PMOS transistor PM1 is turned off, the first inductor begins to store energy, its current rises linearly, and part of the energy is directly supplied to the load. Another portion is stored in the first inductor and simultaneously charges the first output capacitor. When the first low-side drive signal PWMNA and the first high-side drive signal PWMPA output by the drive circuit unit 12 are at a low level, the NMOS transistor NM1 in the first power switch branch is turned off and the PMOS transistor PM1 is turned on. The PMOS transistor PM1 provides a low-resistance path (freewheeling path) for the current of the first inductor. The current continues to flow through the load, and the energy stored in the first inductor is released to continue supplying power to the load. The first capacitor also discharges during this period to provide power to the load.
[0048] based on Figure 2 As can be seen, multiple first power switch branches can be connected in series, and the total current flows to the load, achieving efficient and low ripple power supply.
[0049] It should be noted that the number of PWM signals that the PWM controller 11 can output is not limited to... Figure 2 For limitations, the PWM controller 11 can be extended to output any number of PWM signals.
[0050] Furthermore, it should be noted that the selection of the first power switch and the second power transistor is not based on... Figure 2 As shown, the first power switch can be a PMOS transistor and the second power switch can be an NMOS transistor, or both the first power switch and the second power switch can be NMOS transistors, without any limitation.
[0051] As can be seen from the foregoing embodiments, when the real-time electrical and / or thermal parameters of a certain phase deviate from the preset values due to issues such as load characteristics, peripheral components, and PCB trace deviations, the aforementioned adjustment method can be used to fine-tune the duty cycle, period, etc., of the PWM signal corresponding to the phase requiring adjustment. For example, if it is determined that the voltage output of a certain phase is too low, the duty cycle of the PWM signal corresponding to that phase will be increased, and the load voltage will increase to the preset output range. Conversely, if it is determined that the voltage output of a certain phase is too high, the duty cycle of the PWM signal corresponding to that phase will be decreased, and the load voltage will decrease to the preset output range.
[0052] Based on the above embodiments, it should also be noted that in some implementations, the PID controller unit can also be connected to an analog comparator. The analog comparator is used to collect real-time electrical parameters and / or thermal parameters of each phase. If it is determined that the change of real-time electrical parameters and / or thermal parameters of each phase exceeds a preset threshold, it can be considered that an abnormal situation has occurred. Then the analog comparator can directly output an analog adjustment command to the PID controller unit, so that the PID controller can handle the current abnormal situation as soon as possible, accelerate the step size of the PID controller, or directly shut down the PWM controller 11 to avoid the damage from continuing to expand, which can improve the robustness of the multiphase digital power supply circuit.
[0053] In alternative implementations, such as Figure 2 As shown, the multiphase digital power supply circuit also includes multiple first sampling units corresponding to multiple phases. The source of each PMOS transistor and the drain of each NMOS transistor are connected to the input terminal of each first sampling unit. The output terminal of each first sampling unit is connected to one end of the first inductor. The sampling terminal of each first sampling unit is connected to the input terminal of the ADC sampling unit.
[0054] In this configuration, the sampling terminal of each first sampling unit is connected to the input terminal of the ADC sampling unit. It should be noted that this application does not limit the specific connection method; depending on the actual application scenario, each first sampling unit can be connected to the ADC sampling unit through a signal conditioning circuit. Optionally, each first sampling unit can be a first sampling resistor R1.
[0055] Optionally, the ADC sampling unit can be configured in two ways. One way is to set a multiplexer (MUX) in front of the ADC sampling unit to collect parameters such as voltage, current, and temperature of all multi-phase signals, which are then converted into digital signals by the ADC sampling unit. After all the digital signals have been converted, the ADC sampling unit actively sends an adc_eoc notification to the PID controller to indicate that the ADC sampling unit has completed the conversion. Optionally, the voltage, current, and temperature of each channel are stored in a dedicated register, which can reduce the pressure of ADC conversion and the update rate of PWM controller 11 and drive circuit unit 12. The other way is to set an ADC sampling unit for each phase, convert the analog signal into a digital signal through each ADC sampling unit, and then output these digital signals to the corresponding registers. This avoids the problem of data loss caused by the mismatch between the ADC conversion speed and the adjustment speed of the subsequent PID control unit and PWM controller 11 unit. Of course, this application does not limit the specific configuration method and can be flexibly configured according to the actual application scenario.
[0056] In some implementations, the ADC sampling unit can be configured to have a dedicated storage address space for each phase. After the ADC sampling unit completes the digital conversion of the acquired data, it can automatically switch to the next channel and store it in the corresponding storage space. In addition, the ADC sampling unit can be configured with pass-through and filtering functions to prevent the converted data from being out of sync with the acquired data and causing fluctuations in the converted values.
[0057] Figure 3 This is a schematic diagram of another multiphase digital power supply circuit provided in an embodiment of this application. In optional implementations, such as... Figure 3 As shown, the multiphase digital power supply circuit also includes: a second LC filter, which includes: multiple second inductors L2 and second capacitors C2 corresponding to multiple phases, wherein one end of each second inductor L2 is connected to the output terminal of each phase of the driving transistor 13, the other end of each second inductor L2 is connected to one end of the second capacitor C2, the other end of the second capacitor C2 is grounded, and the load and the second capacitor C2 are connected in parallel.
[0058] The second LC filter functions similarly to the first LC filter. Optionally, it uses the energy storage and release characteristics of the second inductor L2 to suppress current surges, filter out high-frequency ripples, and make current changes smooth, thereby achieving energy buffering and stable transmission. It also uses the charging and discharging capability of the second capacitor C2 to suppress voltage fluctuations.
[0059] In alternative implementations, such as Figure 3 As shown, the driving transistor 13 includes multiple second power switch branches corresponding to multiple phases. Each second power switch branch includes a third power switch and a fourth power switch. The third power switch is a second PMOS transistor PM2 and the fourth power switch is a second NMOS transistor NM2. The gate of the second PMOS transistor PM2 is connected to the high-side driving terminal output by the driving circuit unit 12. The drain of the second PMOS transistor PM2 is connected to a preset power supply. The source of the second PMOS transistor PM2 and the drain of the second NMOS transistor NM2 are connected to one end of the second inductor L2. The gate of the second NMOS transistor NM2 is connected to the low-side driving terminal output by the driving circuit unit 12. The source of the second NMOS transistor NM2 is grounded.
[0060] Among them, with the above Figure 2 The difference lies in the fact that the source of the second NMOS transistor NM2 in the second power switch branch is grounded, and the multiple second power switch branches are connected in parallel. Figure 3 The second inductor in the illustrated embodiment includes multiple inductors, which causes the output currents of each phase to be staggered on the time axis, thereby achieving the superposition of the total output current and partial cancellation of the ripple component, and improving the total output power.
[0061] Of course, it should be noted that this application does not limit the scope of the application. Figure 2The circuit shown and Figure 3 The specific application scenarios of the circuits shown can be flexibly applied according to the characteristics of each circuit.
[0062] In an optional implementation, the multiphase digital power supply circuit further includes multiple second sampling units corresponding to multiple phases, wherein the source of each second PMOS transistor and the drain of each second NMOS transistor are connected to the input terminal of each second sampling unit, the output terminal of each second sampling unit is connected to one end of each second inductor, and the sampling terminal of each second sampling unit is connected to the input terminal of the ADC sampling unit.
[0063] In this design, the sampling terminals of each second sampling unit are connected to the input terminal of the ADC sampling unit. It should be noted that this application does not limit the specific connection method; depending on the actual application scenario, each second sampling unit can be connected to the ADC sampling unit through a signal conditioning circuit. Optionally, each second sampling unit can be a second sampling resistor R2.
[0064] about Figure 3 In this embodiment, the specific configuration of the ADC sampling unit can be found in the foregoing description, and will not be repeated here.
[0065] See Figure 2 and Figure 3 As shown, it should also be noted that in some embodiments, the PWM controller 11 may also include a clock synchronization input pin and a clock synchronization output pin, so that when multi-phase digital power supply circuits are cascaded, clock synchronization can be performed based on the clock synchronization input pin and the clock synchronization output pin.
[0066] Optionally, the present invention provides a multiphase digital power supply system, including at least one multiphase digital power supply circuit according to any of the foregoing embodiments.
[0067] Figure 4 This is a schematic diagram of a multiphase digital power supply system provided in an embodiment of this application. Figure 5 This is a schematic diagram of another multiphase digital power supply system provided in an embodiment of this application. In optional implementations, such as... Figure 4 and Figure 5 As shown, the multiphase digital power supply system includes multiple multiphase digital power supply circuits, which are connected to each other via a clock synchronization pin on the PWM controller 11.
[0068] Among them, see Figure 2 and Figure 4 It can be seen that Figure 2The multiphase digital power supply circuits shown are connected via clock synchronization pins on the PWM controller 11, enabling output with more phases and lower ripple. When cascading multiphase digital power supply circuits, the first-stage PWM controller 11 can be set as a standard reference PWM controller 11. When the SYNC_I input signal of the PWM controller 11 is connected to 0, it indicates that the entire cascaded first-stage PWM controller 11 is connected. The SYNC_O output signal is connected to the SYNC_I of the next-stage PWM controller 11, and so on.
[0069] By applying the embodiments of this application, all phases are digitally controlled. As long as the minimum phase adjustment can ensure that the phase of the driving circuit unit 12 or the external driving tube 13 does not repeat, for example, the PWM period is 1200 scales, and for four-phase, each phase is 300 scales; for eight-phase, each scale is 150 scales. In both of these cases, the phase driven by each phase is unique and will not repeat or have a superposition effect.
[0070] See Figure 3 and Figure 5 It can be seen that Figure 3 The multiphase digital power supply circuits shown are connected via the clock synchronization pin on the PWM controller 11, and as... Figure 3 As shown, each phase of the parallel topology requires a corresponding second inductor, and a second capacitor is connected in the last stage. The inductance value of each phase is much smaller than the inductance and capacitance values of a single total power output, and the size is also relatively small, which can be applied to scenarios that require high power output.
[0071] See Figure 5 As shown, when expanding the output power, all circuits or devices in each stage are the same, except that the processing methods of SYNC_I and SYNC_O for the first stage and the last stage are different. Specifically, the SYNC_I input of the PWM controller 11 in the first stage is connected to 0, so that the PWM controller 11 knows that it does not need to be synchronized with the external PWM controller 11 unit, circuit or chip. The SYNC_O output of this stage is connected to the SYNC_I of the next stage. The SYNC_O output of the next stage will depend on whether there is a next stage. If there is no next stage, the SYNC_O signal is disconnected. If there is, the SYNC_O signal is connected to the input terminal SYNC_I of the PWM controller 11 that needs to be synchronized.
[0072] Of course, it should be noted that this application does not limit the number of multiphase digital power supply circuits in the multiphase digital power supply system. Depending on the actual application scenario, two, three, five, etc., can be cascaded.
[0073] By implementing this application, multiple multiphase digital power supply circuits can be connected through the "clock synchronization pin" on the PWM controller 11 to achieve precise phase synchronization. This ensures that the operating rhythm of each PWM controller 11 in the multiphase digital power supply system is consistent, avoiding additional ripple and interference caused by asynchrony. This allows for the construction of a higher power supply system to meet the needs of high-end applications.
[0074] In summary, the digital power supply system provided in this application can be expanded into more phase structures through cascading according to the actual application scenario, resulting in smaller output ripple, larger drive current, and faster response speed.
[0075] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element. The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application. It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need further definition and explanation in subsequent figures. The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A multiphase digital power supply circuit, characterized in that, include: PWM controller, drive circuit unit, drive transistor, PID controller, and ADC sampling unit; The PWM controller is connected to the control terminal of the drive circuit unit. The PWM controller is used to adjust at least one PWM signal among multiple PWM signals according to the control command sent by the PID controller for at least one phase, and send it to the drive circuit unit. The driving terminal of the driving circuit unit is connected to the input terminal of the driving transistor. The driving circuit unit is used to convert the adjusted multi-channel PWM signal into a multi-channel driving signal that can drive the driving transistor and send it to the driving transistor. The output terminal of the driving transistor is used to connect to the power supply terminal of the load. The sampling terminal of the load and the sampling terminal of the driving transistor are respectively connected to the input terminal of the ADC sampling unit. The driving transistor is used to control the corresponding power switch branches to be turned on or off according to the conduction timing indicated by the multi-channel driving signal to supply power to the load. The output of the ADC sampling unit is connected to the input of the PID controller, and the output of the PID controller is electrically connected to the input of the PWM controller. The ADC sampling unit is used to collect real-time electrical parameters and / or thermal parameters of each phase and send them to the PID controller. The PID controller is used to generate at least one control command corresponding to each phase and send it to the PWM controller based on the real-time electrical parameters and / or thermal parameters of each phase.
2. The multiphase digital power supply circuit according to claim 1, characterized in that, The multiphase digital power supply circuit further includes: a first LC filter, the first LC filter including: a first inductor and a first capacitor, wherein one end of the first inductor is connected to the output terminal of the driving transistor, the other end of the first inductor is connected to one end of the first capacitor, the other end of the first capacitor is grounded, and the load is connected in parallel with the first capacitor.
3. The multiphase digital power supply circuit according to claim 2, characterized in that, The driving transistor includes multiple first power switch branches corresponding to multiple phases. Each first power switch branch includes a first power switch and a second power switch. The first power switch and the second power switch may be of the same or different types.
4. The multiphase digital power supply circuit according to claim 3, characterized in that, The first power switch is a first PMOS transistor, and the second power switch is a first NMOS transistor. The gate of the first PMOS transistor is connected to the high-side drive terminal output by the driving circuit unit, the drain of the first PMOS transistor is connected to a preset power supply, the source of the first PMOS transistor is connected to the drain of the first NMOS transistor and one end of the first inductor, the gate of the first NMOS transistor is connected to the low-side drive terminal output by the driving circuit unit, and the source of the first NMOS transistor is connected to the drain of the first PMOS transistor in the next first power switch branch.
5. The multiphase digital power supply circuit according to claim 4, characterized in that, The multiphase digital power supply circuit further includes multiple first sampling units corresponding to multiple phases. The source of each first PMOS transistor and the drain of each first NMOS transistor are connected to the input terminal of each first sampling unit. The output terminal of each first sampling unit is connected to one end of the first inductor. The sampling terminal of each first sampling unit is connected to the input terminal of the ADC sampling unit.
6. The multiphase digital power supply circuit according to claim 1, characterized in that, The multiphase digital power supply circuit further includes: a second LC filter, which includes: multiple second inductors and second capacitors corresponding to multiple phases, wherein one end of each second inductor is connected to the output terminal of each phase of the driving transistor, the other end of each second inductor is connected to one end of the second capacitor, the other end of the second capacitor is grounded, and the load and the second capacitor are connected in parallel.
7. The multiphase digital power supply circuit according to claim 6, characterized in that, The driving transistor includes multiple second power switch branches corresponding to multiple phases, and each second power switch branch includes: a third power switch and a fourth power switch; The third power switch is a second PMOS transistor, and the fourth power switch is a second NMOS transistor. The gate of the second PMOS transistor is connected to the high-side driving terminal output by the driving circuit unit. The drain of the second PMOS transistor is connected to a preset power supply. The source of the second PMOS transistor is connected to the drain of the second NMOS transistor and one end of the second inductor. The gate of the second NMOS transistor is connected to the low-side driving terminal output by the driving circuit unit. The source of the second NMOS transistor is grounded.
8. The multiphase digital power supply circuit according to claim 7, characterized in that, The multiphase digital power supply circuit further includes a second LC filter, which includes: multiple second sampling units corresponding to multiple phases; The source of each second PMOS transistor and the drain of each second NMOS transistor are connected to the input terminal of each second sampling unit. The output terminal of each second sampling unit is connected to one end of each second inductor. The sampling terminal of each second sampling unit is connected to the input terminal of the ADC sampling unit.
9. A multiphase digital power supply system, characterized in that, Includes at least one of the multiphase digital power supply circuits described in any one of claims 1-8.
10. The multiphase digital power supply system according to claim 9, characterized in that, The multiphase digital power system includes: multiple multiphase digital power circuits, which are connected to each other via a clock synchronization pin on a PWM controller.