Synchronous step-down control chip and application circuit

Abstract

The invention provides a synchronous step-down control chip and an application circuit, and relates to the technical field of switching power supplies, and the synchronous step-down control chip is characterized in that an error amplifier module inputs a reference voltage generated by a band-gap reference module at a positive phase input end, inputs a feedback voltage of a step-down converter module at a negative phase input end for error amplification processing, and outputs an error amplification voltage; the current sampling module obtains a sampling signal and superposes the sampling signal with the slope compensation voltage generated by the slope compensation module to obtain a sampling compensation voltage; the comparator module carries out processing according to the error amplification voltage and the sampling compensation voltage and outputs a modulation signal; the trigger module outputs a control signal according to the modulation signal and a conduction signal generated by the self-adaptive conduction module, and the logic driving module controls the conduction and cut-off of a power switch tube in the buck converter module. According to the invention, the influence of disturbance current during inductive current sampling is effectively reduced, and stable output of an output voltage signal is realized by controlling the conduction and cut-off of a power switch tube in the buck converter module.

Description

Technical Field

[0001] This invention relates to the field of switching power supply technology, and in particular to a synchronous buck control chip and its application circuit. Background Technology

[0002] With the rapid development of communication technology and electronic products, power management chips have been widely used. Among them, DC-DC converters convert a fixed input DC voltage into a variable DC voltage signal and are widely used in automotive electronics and industrial electronic equipment.

[0003] However, in traditional technologies, the control of DC-DC converters generally adopts voltage control modules or current control modes. In voltage control mode, when the input voltage or output voltage changes, the switching frequency of the converter changes synchronously, causing significant electromagnetic interference to the chip. In current control mode, when the duty cycle exceeds 50%, it will cause subharmonic oscillation of the chip, which seriously affects the stability of the output voltage signal.

[0004] Therefore, a synchronous buck control chip and its application circuit are proposed. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a synchronous buck control chip and its application circuit, which solves the problem of unstable chip switching frequency leading to unstable output voltage signal in traditional technologies.

[0006] This invention provides a synchronous buck converter control chip, comprising: a buck converter module, a trigger module, a bandgap reference module, a protection circuit module, an error amplifier module, a current sampling module, a slope compensation module, an adaptive conduction module, a comparator module, and a logic driver module; wherein, The bandgap reference module is used to receive the input enable signal and generate a reference voltage. The error amplifier module is used to amplify the error by inputting the reference voltage at the positive input terminal and the feedback voltage of the buck converter module at the negative input terminal, and output the error amplified voltage. The current sampling module is used to collect the inductor current signal in the buck converter module and obtain the sampling signal. The slope compensation module is used to generate a slope compensation voltage based on the sampled signal, and superimpose it with the sampled signal to obtain a sampled compensation voltage; The comparator module is used to process the error amplification voltage input at the positive input terminal and the sampling compensation voltage input at the negative input terminal, and output the modulation signal. An adaptive turn-on module is used to generate a turn-on signal based on the input voltage signal and the output voltage signal of the buck converter module; The trigger module is used to output a control signal according to the input modulation signal and the conduction signal, and the logic drive module controls the conduction and cutoff of the power switch in the buck converter module according to the control signal; The protection circuit module provides over-temperature and under-voltage protection for the chip.

[0007] Preferably, the buck converter module includes: a power switch, a synchronous rectifier, a first inductor, a first capacitor, a first resistor, a second resistor, and a third resistor; The gate of the power switch and the gate of the synchronous rectifier are connected to the trigger module. The drain of the power switch is connected to the input voltage signal. The source of the power switch is connected to the first inductor. The drain of the synchronous rectifier is grounded. The synchronous rectifier is connected in parallel with the first capacitor and the first resistor. The first resistor is connected in parallel with the second resistor and the third resistor. The voltage across the first resistor is used as the output voltage signal. The buck converter module is used to supply power to the first inductor when the power switch is turned on and the synchronous rectifier is turned off according to the control signal, thereby increasing the energy stored in the first inductor; when the power switch is turned off and the synchronous rectifier is turned on, the first inductor generates an induced voltage to keep the current on the first inductor from changing abruptly, and the discharge of the first capacitor and the superposition of the inductor current supply power to the first resistor.

[0008] Preferably, the bandgap reference module includes: The bandgap reference voltage source circuit includes a first MOSFET, a second MOSFET, a third MOSFET, a first transistor, a second transistor, a third transistor, a first comparator, a fourth resistor, and a fifth resistor; The emitter of the first transistor is connected to the drain of the first MOSFET, and the source of the first MOSFET is connected to the source of the second MOSFET. The emitter of the second transistor is connected to the drain of the second MOSFET through a fourth resistor. The base and collector of the first transistor are connected to ground, the base and collector of the second transistor are connected to ground, and the base and collector of the third transistor are connected to ground. The positive input of the first comparator is connected to the emitter of the first transistor, and the negative input of the first comparator is connected to the emitter of the second transistor through a fourth resistor. The output of the first comparator is connected to the gates of the first, second, and third MOSFETs. The sources of the first, second, and third MOSFETs are connected to a first power supply, and the drain of the third MOSFET is connected to the emitter of the third transistor through a fifth resistor. A reference voltage is output at the drain of the third MOSFET. in, The reference voltage, This is the voltage between the base and emitter of the first transistor. This is the voltage between the base and emitter of the second transistor. This is the voltage between the base and emitter of the third transistor. This is the resistance value of the fourth resistor. This is the resistance value of the fifth resistor.

[0009] Preferably, the adaptive conduction module includes: The voltage-to-current conversion unit is used to acquire the input voltage signal and convert it into a corresponding current signal; The adaptive conduction unit includes a fourth MOSFET, a fifth MOSFET, a sixth MOSFET, a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a sixth resistor, a seventh resistor, a second capacitor, and a third capacitor; The gate and drain of the fourth MOSFET are connected, and its drain is connected to the current signal input by the voltage-to-current conversion unit. The gates of the fourth and fifth MOSFETs are connected to the gate of the sixth MOSFET, and the sources of the fourth, fifth, and sixth MOSFETs are connected to the second power supply. The drain of the fourth MOSFET is connected to the current signal output by the voltage-to-current conversion unit. The drain of the fifth MOSFET is connected to the drain of the seventh MOSFET. The gate of the seventh MOSFET is connected to the control signal output by the trigger module. The source of the seventh MOSFET is connected to the source of the ninth MOSFET through the sixth resistor. The gate and drain of the ninth MOSFET are connected to ground. The second capacitor is connected in parallel with the sixth resistor, and the third capacitor is connected in parallel with the eighth and tenth MOSFETs. The drain of the sixth MOSFET is connected to the drain of the eighth MOSFET. The gate of the eighth MOSFET is connected to the control signal. The source of the eighth MOSFET is connected to the source of the tenth MOSFET. The gate and drain of the tenth MOSFET are connected to ground. The drain of the sixth MOSFET is connected to the positive input terminal of the second comparator. The source of the seventh MOSFET is connected to the negative input terminal of the second comparator through the seventh resistor. The second comparator outputs a turn-on signal. The switching frequency of the conduction signal is: Among them, the switching frequency of the conduction signal, This is the first proportionality coefficient between the current signal output by the voltage-to-current conversion unit and the current signal generated at the drain of the fifth MOSFET. This is the second proportionality coefficient between the current signal output by the voltage-to-current conversion unit and the current signal generated at the drain of the sixth MOSFET. This is the resistance value of the sixth capacitor. This is the capacitance value of the third capacitor.

[0010] Preferably, the slope compensation module includes: an eleventh MOSFET, a twelfth MOSFET, a thirteenth MOSFET, a fourteenth MOSFET, a fifteenth MOSFET, a sixteenth MOSFET, a seventeenth MOSFET, an eighteenth MOSFET, a nineteenth MOSFET, a twentieth MOSFET, a twenty-first MOSFET, a twenty-second MOSFET, an eighth resistor, a ninth resistor, a tenth resistor, and a fourth capacitor; The sources of the eleventh, twelfth, thirteenth, fourteenth, fifteenth, and sixteenth MOSFETs are connected to the second power supply; the gate and drain of the eleventh MOSFET are connected, and its gate is connected to the gates of the twelfth and thirteenth MOSFETs; the drain of the twelfth MOSFET is connected to the gates of the fourteenth, fifteenth, and sixteenth MOSFETs; the drain of the eleventh MOSFET is connected to the drain of the seventeenth MOSFET; the drain of the eighteenth MOSFET is connected to the drain of the twelfth MOSFET; the drain of the thirteenth MOSFET is connected to the drain of the nineteenth MOSFET; and the drain of the fourteenth MOSFET is connected to the twentieth MOSFET. The drain of the MOSFET is connected; the drain of the sixteenth MOSFET is grounded through the fourth capacitor; the drains of the seventeenth and eighteenth MOSFETs are grounded through the eighth and ninth resistors, respectively; the source of the nineteenth MOSFET is grounded; the source of the twentieth MOSFET is grounded through the tenth resistor; the gate of the twentieth MOSFET is connected to the gate of the nineteenth MOSFET; the drain of the twentieth MOSFET is connected to the drain of the twenty-first MOSFET; the source of the twentieth MOSFET is connected to the source of the twenty-first MOSFET; the gate of the twenty-first MOSFET is connected to the drain of the twenty-second MOSFET; the gate of the twenty-second MOSFET is connected to the clock signal; and the source of the twenty-second MOSFET is grounded. The gate of the 22nd MOSFET pulls down the voltage of the upper plate of the fourth capacitor according to the clock signal, generating a sawtooth wave voltage signal and producing a slope compensation voltage.

[0011] Preferably, the protection circuit module includes an over-temperature protection circuit and an under-voltage protection unit; The over-temperature protection unit includes a positive temperature coefficient circuit, a negative temperature coefficient circuit, and a temperature coefficient comparator circuit. When the voltage signal output by the positive temperature coefficient circuit is less than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a low-level signal. When the voltage signal output by the positive temperature coefficient circuit is greater than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a high-level signal, and the control chip is turned off. The undervoltage protection unit includes a resistor divider circuit, a comparator circuit, and a digital circuit. The resistor divider circuit acquires the input voltage signal, and the comparator circuit compares the input voltage signal with a preset voltage signal. When the input voltage signal is lower than the preset voltage signal, the digital circuit controls the buck converter module to disconnect the power supply.

[0012] This invention provides an application circuit for a synchronous buck control chip, comprising: a synchronous buck control chip, a fifth capacitor, a sixth capacitor, a twenty-third MOSFET, a first diode, a seventh capacitor, a twenty-fourth MOSFET, a second diode, a second inductor, an eleventh resistor, an eighth capacitor, a ninth capacitor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a tenth capacitor, an eleventh capacitor, and a twelfth capacitor; The first current detection positive input pin and the first current detection negative input pin of the synchronous buck control chip are connected to the two ends of the nineteenth resistor; the chip power supply pin of the synchronous buck control chip is connected to the input voltage source through the fifth and sixth capacitors in parallel; the output voltage adjustment pin of the synchronous buck control chip is grounded through the thirteenth resistor; the frequency adjustment pin of the synchronous buck control chip is grounded through the fourteenth resistor; the maximum input current setting pin of the synchronous buck control chip is grounded through the fifteenth resistor; the maximum output current setting pin of the synchronous buck control chip is grounded through the sixteenth resistor; the MOS drive circuit power supply pin of the synchronous buck control chip is grounded through the twelfth capacitor; the ground pin of the synchronous buck control chip is connected to ground; the error amplifier output pin of the synchronous buck control chip is grounded through the tenth capacitor, which is connected in parallel with the seventeenth and eleventh resistors. The voltage feedback pin of the synchronous buck control chip is grounded through the eighteenth resistor and connected to the twelfth resistor; the second current detection positive input pin and the second current detection negative input pin of the synchronous buck control chip are connected to the eleventh resistor, and the eighth capacitor and the ninth capacitor are connected to ground in parallel; the buck-down MOSFET drive pin of the synchronous buck control chip is connected to the gate of the twenty-third MOSFET, and the drain and source of the twenty-third MOSFET are connected through the first diode; the buck-up MOSFET drive pin of the synchronous buck control chip is connected to the gate of the twenty-fourth MOSFET, and the drain and source of the twenty-fourth MOSFET are connected through the second diode, and the drain of the twenty-fourth MOSFET is connected to the second inductor; the bootstrap power supply pin of the synchronous buck control chip is connected to the buck circuit switch detection pin through the seventh capacitor; the output voltage pin of the synchronous buck control chip outputs the buck voltage signal.

[0013] Compared with traditional technologies, the advantages of this invention are as follows: A synchronous buck converter control chip and application circuit detect the inductor current in the buck converter module through a current sampling module. The acquired sampling signal is superimposed with a slope compensation voltage, effectively reducing the influence of disturbance current. A modulated signal is sent to the trigger module through a comparator module, and a conduction signal is transmitted through an adaptive conduction module. After processing, the trigger module outputs a control signal, which is then controlled by a logic drive module to turn on and off the power switch in the buck converter module according to the control signal, thus achieving stable output of the output voltage signal in the buck converter module. The adaptive conduction module adaptively adjusts the conduction time of the power switch in the control signal to stabilize the chip's switching frequency, solving the problem that the duty cycle and load changes have a significant impact on the switching frequency in traditional technologies, thereby improving the stability of the output voltage signal.

[0014] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings.

[0015] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of the synchronous buck control chip provided by the present invention; Figure 2 The circuit schematic diagram of the synchronous buck converter module with a control chip provided by the present invention is shown below. Figure 3 The circuit schematic diagram of the synchronous buck control chip bandgap reference module provided by the present invention; Figure 4 The circuit schematic diagram of the adaptive conduction module of the synchronous buck control chip provided by the present invention is shown below. Figure 5 The circuit schematic diagram of the slope compensation module of the synchronous buck control chip provided by the present invention; Figure 6 The circuit diagram is shown for the application circuit of the synchronous buck control chip provided by the present invention. Detailed Implementation

[0017] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0018] This invention provides a synchronous buck control chip, see reference. Figure 1 It includes: a buck converter module, a trigger module, a bandgap reference module, a protection circuit module, an error amplifier module, a current sampling module, a slope compensation module, an adaptive conduction module, a comparator module, and a logic driver module; among which, The bandgap reference module is used to receive the input enable signal and generate a reference voltage. The error amplifier module is used to amplify the error by taking a reference voltage at the positive input terminal and the feedback voltage from the buck converter module at the negative input terminal, and outputting an amplified error voltage. The current sampling module is used to collect the inductor current signal in the buck converter module and obtain the sampling signal. The slope compensation module is used to generate a slope compensation voltage based on the sampled signal and superimpose it with the sampled signal to obtain the sampled compensation voltage. The comparator module is used to process the error amplification voltage input at the positive input terminal and the sampling compensation voltage input at the negative input terminal, and output the modulation signal. The adaptive turn-on module is used to generate a turn-on signal based on the input voltage signal and the output voltage signal of the buck converter module; The trigger module is used to output control signals based on the input modulation signal and conduction signal. The logic drive module controls the conduction and cutoff of the power switching transistors in the buck converter module according to the control signals. The protection circuit module provides over-temperature and under-voltage protection for the chip.

[0019] In this embodiment of the invention, the non-inverting input terminal of the error amplifier module receives the reference voltage generated by the bandgap reference module, and the negative input terminal acquires the feedback voltage of the buck converter module for error comparison. After amplification, the error amplification voltage is obtained. The current sampling module acquires the inductor current signal in the buck converter module to obtain the sampling signal. The slope compensation module generates a slope compensation voltage based on the sampling signal and superimposes it with the sampling signal to obtain the sampling compensation voltage. The comparator module receives the error amplification voltage at the non-inverting input terminal and the sampling compensation voltage at the negative input terminal for processing and outputs a modulation signal. The adaptive conduction module generates a conduction signal based on the input voltage signal and the output voltage signal of the buck converter module. The trigger module outputs a corresponding control signal based on the modulation signal and the conduction signal. The logic drive module controls the conduction and cutoff of the power switch in the buck converter module based on the control signal to achieve the stability of the output voltage signal.

[0020] In this embodiment of the invention, when the power switch in the buck converter module is turned on, the inductor is in the energy storage stage, the input voltage signal supplies current to it, and the current sampling module acquires the sampling signal at the same time; the ramp compensation voltage is superimposed with the sampling signal to obtain the sampling compensation voltage; when the error amplification voltage is less than the sampling compensation voltage, the comparator module outputs a low-level modulation signal, and when the error amplification voltage is greater than the sampling compensation voltage, it outputs a high-level modulation signal.

[0021] In this embodiment of the invention, the turn-on signal generated by the adaptive turn-on module is input to the trigger module to control the turn-on time of the power switch in the modulation signal; the trigger outputs a corresponding control signal according to the modulation signal and the turn-on signal.

[0022] In this embodiment of the invention, the trigger module can be implemented as an RS trigger.

[0023] In this embodiment of the invention, when an enable signal is input from outside the chip, the bandgap reference module generates a reference voltage, and at the same time, the protection circuit module starts to work.

[0024] In this embodiment of the invention, the current sampling module detects the inductor current in the buck converter module. The acquired sampling signal is superimposed with the slope compensation voltage, effectively reducing the impact of disturbance current. The comparator module sends a modulation signal to the trigger module, and the adaptive conduction module transmits a conduction signal. After processing, the trigger module outputs a control signal, which is then used by the logic drive module to control the on and off of the power switch in the buck converter module, thus achieving stable output of the output voltage signal in the buck converter module. The adaptive conduction module adaptively adjusts the conduction time of the power switch in the control signal to stabilize the chip switching frequency, solving the problem that the duty cycle and load changes have a significant impact on the switching frequency in traditional technologies, thereby improving the stability of the output voltage signal.

[0025] In this embodiment of the invention, the buck converter module, as referenced... Figure 2 It includes: power switch MP, synchronous rectifier MN, first inductor L1, first capacitor C1, first resistor R1, second resistor R2 and third resistor R3; The gate of the power switch transistor MP and the gate of the synchronous rectifier transistor MN are connected to the trigger module. The drain of the power switch transistor MP is connected to the input voltage signal Vin. The source of the power switch transistor MP is connected to the first inductor L1. The drain of the synchronous rectifier transistor MN is grounded. The synchronous rectifier transistor MN is connected in parallel with the first capacitor C1 and the first resistor R1. The first resistor R1 is connected in parallel with the second resistor R2 and the third resistor R3. The voltage across the first resistor R1 is used as the output voltage signal Vout. The buck converter module is used to control the power switch MP to be turned on and the synchronous rectifier MN to be turned off according to the control signal. When the power switch MP is turned off and the synchronous rectifier MN is turned on, the input voltage signal Vin supplies power to the first inductor L1, and the energy stored in the first inductor L1 increases. When the power switch MP is turned off and the synchronous rectifier MN is turned on, the first inductor L1 generates an induced voltage to keep the current on the first inductor L1 from changing abruptly. The first capacitor C1 discharges and the inductor current is superimposed to supply power to the first resistor R1.

[0026] In this embodiment of the invention, by controlling the power switch MP to be on and the synchronous rectifier MN to be off, the input voltage signal supplies power to the first resistor R1 through the first inductor L1, and at the same time stores energy in the first inductor L1 and the first capacitor C1. The current in the first inductor L1 increases at a linear speed. When it reaches a first preset value, the voltage of the first capacitor C1 increases. When the power switch MP is turned off and the synchronous rectifier MN is on, the first inductor L1 and the synchronous rectifier MN form an inverse loop. The first inductor L1 and the first capacitor C1 provide energy to the first resistor R1. The current signal on the first inductor L1 decreases at a linear speed. When it decreases to a second preset value, the power switch MP is turned on and the synchronous rectifier MN is turned off, entering the next stage of the cycle to maintain the stability of the output voltage.

[0027] In this embodiment of the invention, by controlling the conduction of the power switch and the conduction and cutoff of the synchronous rectifier, the input voltage signal is stepped down and the output voltage signal is kept stable.

[0028] In this embodiment of the invention, the bandgap reference module is used as a reference. Figure 3 ,include: The bandgap reference voltage source circuit includes a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first comparator U1, a fourth resistor R4, and a fifth resistor R5; The emitter of the first transistor Q1 is connected to the drain of the first MOSFET M1, and the source of the first MOSFET M1 is connected to the source of the second MOSFET M2. The emitter of the second transistor Q2 is connected to the drain of the second MOSFET M2 through the fourth resistor R4. The base and collector of the first transistor Q1 are connected to ground, the base and collector of the second transistor Q2 are connected to ground, and the base and collector of the third transistor Q3 are connected to ground. The positive input of the first comparator U1 is connected to the emitter of the first transistor Q1, and the negative input of the first comparator U1 is connected to the emitter of the second transistor Q2 through the fourth resistor R4. The output of the first comparator U1 is connected to the gates of the first MOSFET M1, the second MOSFET M2, and the third MOSFET M3. The sources of the first MOSFET M1, the second MOSFET M2, and the third MOSFET M3 are connected to the first power supply. The drain of the third MOSFET M3 is connected to the emitter of the third transistor Q3 through the fifth resistor R5. A reference voltage is output at the drain of the third MOSFET M3. in, The reference voltage, This is the voltage between the base and emitter of the first transistor Q1. This is the voltage between the base and emitter of the second Q2 transistor. This is the voltage between the base and emitter of the third transistor Q3. This is the resistance value of the fourth resistor, R4. This is the resistance value of the fifth resistor, R5.

[0029] In this embodiment of the invention, the current signals generated by the positive temperature coefficient circuit and the negative temperature coefficient circuit are linearly superimposed to generate a stable current that is approximately unaffected by temperature, thereby generating a reference voltage and providing a voltage reference signal for the error amplifier module.

[0030] In this embodiment of the invention, the adaptive conduction module, referenced... Figure 4 ,include: The voltage-to-current conversion unit is used to acquire the input voltage signal and convert it into a corresponding current signal; The adaptive conduction unit includes a fourth MOSFET M4, a fifth MOSFET M5, a sixth MOSFET M6, a seventh MOSFET M7, an eighth MOSFET M8, a ninth MOSFET M9, a tenth MOSFET M10, a sixth resistor R6, a seventh resistor R7, a second capacitor C2, and a third capacitor C3. The gate and drain of the fourth MOSFET M4 are connected, and its drain is connected to the current signal input to the voltage-to-current conversion unit. The gates of the fourth MOSFET M4 and the fifth MOSFET M5 are connected to the gate of the sixth MOSFET M6. The sources of the fourth MOSFET M4, the fifth MOSFET M5, and the sixth MOSFET M6 are connected to the second power supply. The drain of the fourth MOSFET M4 is connected to the current signal output from the voltage-to-current conversion unit. The drain of the fifth MOSFET M5 is connected to the drain of the seventh MOSFET M7. The gate of the seventh MOSFET M7 is connected to the control signal output from the trigger module. The source of the seventh MOSFET M7 is connected to the source of the ninth MOSFET M9 through the sixth resistor R6. The gate and drain of M9 are connected to ground; the second capacitor C2 is connected in parallel with the sixth resistor R6, and the third capacitor C3 is connected in parallel with the eighth MOSFET M8 and the tenth MOSFET M10; the drain of the sixth MOSFET M6 is connected to the drain of the eighth MOSFET M8, the gate of the eighth MOSFET M8 is connected to the control signal, the source of the eighth MOSFET M8 is connected to the source of the tenth MOSFET M10, and the gate and drain of the tenth MOSFET M10 are connected to ground; the drain of the sixth MOSFET M6 is connected to the non-inverting input of the second comparator U2, and the source of the seventh MOSFET M7 is connected to the inverting input of the second comparator U2 through the seventh resistor R7, and the second comparator U2 outputs a turn-on signal.

[0031] In this embodiment of the invention, when the control signal output by the trigger module is high, the seventh MOSFET M7 is turned on and the eighth MOSFET M8 is turned off. The current generated by the drain of the fifth MOSFET M5 charges the second capacitor C2 through the seventh resistor R7, and the current generated by the drain of the sixth MOSFET M6 charges the third capacitor C3. The voltage at the non-inverting input terminal of the second comparator U2 reaches the inverting input terminal, and the conduction signal output by the second comparator U2 flips from low to high. The control signal flips to low, the seventh MOSFET M7 is turned off, and the eighth MOSFET M8 is turned on. The voltage at the inverting input terminal of the second comparator U2 discharges current through the sixth resistor and the ninth MOSFET M9.

[0032] The switching frequency of the conduction signal is: Among them, the switching frequency of the conduction signal, This is the first proportionality coefficient between the current signal output by the voltage-to-current conversion unit and the current signal generated at the drain of the fifth MOSFET. This is the second proportionality coefficient between the current signal output by the voltage-to-current conversion unit and the current signal generated at the drain of the sixth MOSFET. This is the resistance value of the sixth capacitor. This is the capacitance value of the third capacitor.

[0033] In this embodiment of the invention, the turn-on signal output by the adaptive turn-on module enables adaptive control of the turn-on time of the power switch in the buck converter module. This avoids the overshoot of the output voltage signal caused by the fixed turn-on and turn-off control when the load current undergoes a step change, thus maintaining the switching frequency of the chip, ensuring the stable output of the output voltage signal, and reducing the voltage overshoot and undershoot amplitude.

[0034] In this embodiment of the invention, the slope compensation module, as referenced... Figure 5 This includes: 11th MOSFET M11, 12th MOSFET M12, 13th MOSFET M13, 14th MOSFET M14, 15th MOSFET M15, 16th MOSFET M16, 17th MOSFET M17, 18th MOSFET M18, 19th MOSFET M19, 20th MOSFET M20, 21st MOSFET M21, 22nd MOSFET M22, 8th resistor R8, 9th resistor R9, 10th resistor R10, and 4th capacitor C4; The sources of the eleventh MOSFET M11, twelfth MOSFET M12, thirteenth MOSFET M13, fourteenth MOSFET M14, fifteenth MOSFET M15, and sixteenth MOSFET M16 are connected to the second power supply. The gate and drain of the eleventh MOSFET M11 are connected, and its gate is connected to the gates of the twelfth MOSFET M12 and thirteenth MOSFET M13. The drain of the twelfth MOSFET M12 is connected to the gates of the fourteenth MOSFET M14, fifteenth MOSFET M15, and sixteenth MOSFET M16. The drain of the eleventh MOSFET M11 is connected to the drain of the seventeenth MOSFET M17. The drain of the eighteenth MOSFET M18 is connected to the drain of the twelfth MOSFET M12. The drain of the thirteenth MOSFET M13 is connected to the drain of the nineteenth MOSFET M19. The drain of the fourteenth MOSFET M14 is connected to the drain of the twentieth MOSFET M16. The drain of MOSFET M20 is connected; the drain of the sixteenth MOSFET M16 is grounded through the fourth capacitor C4; the drains of the seventeenth MOSFET M17 and the eighteenth MOSFET M18 are grounded through the eighth resistor R8 and the ninth resistor R9, respectively; the source of the nineteenth MOSFET M19 is grounded; the source of the twentieth MOSFET M20 is grounded through the tenth resistor R10; the gate of the twentieth MOSFET M20 is connected to the gate of the nineteenth MOSFET M19; the drain of the twentieth MOSFET M20 is connected to the drain of the twenty-first MOSFET M21; the source of the twentieth MOSFET M20 is connected to the source of the twenty-first MOSFET M21; the gate of the twenty-first MOSFET M21 is connected to the drain of the twenty-second MOSFET M22; the gate of the twenty-second MOSFET M22 is connected to the clock signal CLK; and the source of the twenty-second MOSFET M22 is grounded. The gate of the 22nd MOSFET M22 pulls down the voltage of the upper plate of the fourth capacitor C4 according to the clock signal CLK, generating a sawtooth wave voltage signal and producing a slope compensation voltage.

[0035] In this embodiment of the invention, when the duty cycle of the power switch in the buck converter module is greater than 50%, the current disturbance does not converge. By introducing a slope compensation module and superimposing it with the sampling signal, the disturbance current gradually decreases and eventually tends to the value before the change, eliminating the unstable influence of the loop and ensuring the stable operation of the chip.

[0036] In this embodiment of the invention, the protection circuit module includes an over-temperature protection circuit and an under-voltage protection unit; The over-temperature protection unit includes a positive temperature coefficient circuit, a negative temperature coefficient circuit, and a temperature coefficient comparator circuit. When the voltage signal output by the positive temperature coefficient circuit is less than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a low-level signal. When the voltage signal output by the positive temperature coefficient circuit is greater than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a high-level signal, and the control chip is turned off. The undervoltage protection unit includes a resistor divider circuit, a comparator circuit, and a digital circuit. The resistor divider circuit acquires the input voltage signal, and the comparator circuit compares the input voltage signal with a preset voltage signal. When the input voltage signal is lower than the preset voltage signal, the digital circuit controls the buck converter module to disconnect the power supply.

[0037] In this embodiment of the invention, when the voltage signal output by the positive temperature coefficient circuit is greater than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a high-level signal to control the chip to exit the normal working state, thereby preventing the chip from overheating and causing damage or performance degradation; when the input voltage signal is lower than the preset voltage signal, the digital circuit controls the buck converter module to disconnect the power supply, and when it is higher than the preset voltage signal, it automatically switches to the normal working mode to ensure the normal operation of the chip.

[0038] This invention provides an application circuit for a synchronous buck control chip, see reference. Figure 6 This includes: synchronous buck control chip U3, fifth capacitor R5, sixth capacitor R6, twenty-third MOSFET M23, first diode D1, seventh capacitor C7, twenty-fourth MOSFET M24, second diode D2, second inductor L2, eleventh resistor R11, eighth capacitor C8, ninth capacitor C9, twelfth resistor R12, thirteenth resistor R13, fourteenth resistor R14, fifteenth resistor R15, sixteenth resistor R16, seventeenth resistor R17, eighteenth resistor R18, nineteenth resistor R19, tenth capacitor C10, eleventh capacitor C11, and twelfth capacitor C12; The first current detection positive input pin CSP1 and the first current detection negative input pin CSN1 of the synchronous buck controller chip U3 are connected to the two ends of the nineteenth resistor R19; the chip power supply pin VIN of the synchronous buck controller chip U3 is connected to the input voltage source VIN through the fifth capacitor C5 and the sixth capacitor C6 in parallel; the output voltage adjustment pin VCC_SET of the synchronous buck controller chip U3 is grounded through the thirteenth resistor R13; the frequency adjustment pin RT of the synchronous buck controller chip U3 is grounded through the fourteenth resistor R14; the maximum input current setting pin CS1 of the synchronous buck controller chip U3 is grounded through the fifteenth resistor R15; the maximum output current setting pin CS2 of the synchronous buck controller chip U3 is grounded through the sixteenth resistor R16; the MOS drive circuit power supply pin VCC of the synchronous buck controller chip U3 is grounded through the twelfth capacitor C12; the ground pin GND of the synchronous buck controller chip U3 is connected to ground; the error amplifier output pin COMP of the synchronous buck controller chip U3 is grounded through the tenth capacitor C10; the tenth capacitor C10 is connected to the seventeenth resistor R17. The eleventh capacitor C11 is connected in parallel; the voltage feedback pin FB of the synchronous buck control chip U3 is grounded through the eighteenth resistor R18 and connected to the twelfth resistor R12; the second current detection positive input pin CSP2 and the second current detection negative input pin CSN2 of the synchronous buck control chip U3 are connected to the two ends of the eleventh resistor R11, and the eighth capacitor C8 and the ninth capacitor C9 are connected in parallel to ground; the buck-down MOSFET drive pin HD of the synchronous buck control chip U3 is connected to the gate of the twenty-third MOSFET M23, and the drain and source of the twenty-fourth MOSFET M24 are connected through the first diode D2; the buck-up MOSFET drive pin LD of the synchronous buck control chip U3 is connected to the gate of the twenty-fourth MOSFET M24, and the drain and source of the twenty-fourth MOSFET M24 are connected through the second diode D2, and the drain of the twenty-fourth MOSFET M24 is connected to the second inductor L2; the bootstrap power supply pin BST of the synchronous buck control chip U3 is connected to the buck circuit switch detection pin SW through the seventh capacitor C7; the output voltage pin VOUT of the synchronous buck control chip U3 outputs the buck voltage signal.

[0039] In this embodiment of the invention, a synchronous buck control chip and corresponding peripheral circuits are used to achieve stable bucking of the input voltage signal. The synchronous buck control chip outputs a control signal to control the conduction and cutoff of the 23rd MOS transistor and the 24th MOS transistor, thereby bucking the input voltage signal and outputting a bucked voltage signal.

[0040] In this embodiment of the invention, the application circuit of the synchronous buck control chip detects the inductor current, superimposes the acquired sampling signal with the ramp compensation voltage, effectively reduces the influence of disturbance current, and controls the conduction and cutoff of the power switch through the control signal to achieve stable output of the output voltage signal; the adaptive conduction time circuit adaptively adjusts the conduction time of the power switch in the control signal to stabilize the chip switching frequency, solving the problem that the conduction duty cycle and load changes have a large impact on the switching frequency in traditional technology, thereby improving the stability of the output voltage signal.

[0041] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A synchronous buck control chip, characterized in that, include: The system includes a buck converter module, a trigger module, a bandgap reference module, a protection circuit module, an error amplifier module, a current sampling module, a slope compensation module, an adaptive conduction module, a comparator module, and a logic driver module; among which, The bandgap reference module is used to receive the input enable signal and generate a reference voltage. The error amplifier module is used to amplify the error by inputting the reference voltage at the positive input terminal and the feedback voltage of the buck converter module at the negative input terminal, and output the error amplified voltage. The current sampling module is used to collect the inductor current signal in the buck converter module and obtain the sampling signal. The slope compensation module is used to generate a slope compensation voltage based on the sampled signal, and superimpose it with the sampled signal to obtain a sampled compensation voltage; The comparator module is used to process the error amplification voltage input at the positive input terminal and the sampling compensation voltage input at the negative input terminal, and output the modulation signal. An adaptive turn-on module is used to generate a turn-on signal based on the input voltage signal and the output voltage signal of the buck converter module; The trigger module is used to output a control signal according to the input modulation signal and the conduction signal, and the logic drive module controls the conduction and cutoff of the power switch in the buck converter module according to the control signal; The protection circuit module provides over-temperature and under-voltage protection for the chip.

2. The synchronous buck control chip according to claim 1, characterized in that, The buck converter module includes: a power switch, a synchronous rectifier, a first inductor, a first capacitor, a first resistor, a second resistor, and a third resistor; The gate of the power switch and the gate of the synchronous rectifier are connected to the trigger module. The drain of the power switch is connected to the input voltage signal. The source of the power switch is connected to the first inductor. The drain of the synchronous rectifier is grounded. The synchronous rectifier is connected in parallel with the first capacitor and the first resistor. The first resistor is connected in parallel with the second resistor and the third resistor. The voltage across the first resistor is used as the output voltage signal. The buck converter module is used to supply power to the first inductor when the power switch is turned on and the synchronous rectifier is turned off according to the control signal, thereby increasing the energy stored in the first inductor; when the power switch is turned off and the synchronous rectifier is turned on, the first inductor generates an induced voltage to keep the current on the first inductor from changing abruptly, and the discharge of the first capacitor and the superposition of the inductor current supply power to the first resistor.

3. The synchronous buck control chip according to claim 1, characterized in that, The bandgap reference module includes: The bandgap reference voltage source circuit includes a first MOSFET, a second MOSFET, a third MOSFET, a first transistor, a second transistor, a third transistor, a first comparator, a fourth resistor, and a fifth resistor; The emitter of the first transistor is connected to the drain of the first MOSFET, and the source of the first MOSFET is connected to the source of the second MOSFET. The emitter of the second transistor is connected to the drain of the second MOSFET through a fourth resistor. The base and collector of the first transistor are connected to ground, the base and collector of the second transistor are connected to ground, and the base and collector of the third transistor are connected to ground. The positive input of the first comparator is connected to the emitter of the first transistor, and the negative input of the first comparator is connected to the emitter of the second transistor through a fourth resistor. The output of the first comparator is connected to the gates of the first, second, and third MOSFETs. The sources of the first, second, and third MOSFETs are connected to a first power supply, and the drain of the third MOSFET is connected to the emitter of the third transistor through a fifth resistor. A reference voltage is output at the drain of the third MOSFET. in, As the reference voltage, This is the voltage between the base and emitter of the first transistor. This is the voltage between the base and emitter of the second transistor. This is the voltage between the base and emitter of the third transistor. This is the resistance value of the fourth resistor. This is the resistance value of the fifth resistor.

4. The synchronous buck control chip according to claim 1, characterized in that, The adaptive conduction module includes: The voltage-to-current conversion unit is used to acquire the input voltage signal and convert it into a corresponding current signal; The adaptive conduction unit includes a fourth MOSFET, a fifth MOSFET, a sixth MOSFET, a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a sixth resistor, a seventh resistor, a second capacitor, and a third capacitor; The gate and drain of the fourth MOSFET are connected, and its drain is connected to the current signal input by the voltage-to-current conversion unit. The gates of the fourth and fifth MOSFETs are connected to the gate of the sixth MOSFET, and the sources of the fourth, fifth, and sixth MOSFETs are connected to the second power supply. The drain of the fourth MOSFET is connected to the current signal output by the voltage-to-current conversion unit. The drain of the fifth MOSFET is connected to the drain of the seventh MOSFET. The gate of the seventh MOSFET is connected to the control signal output by the trigger module. The source of the seventh MOSFET is connected to the source of the ninth MOSFET through the sixth resistor. The gate and drain of the ninth MOSFET are connected to ground. The second capacitor is connected in parallel with the sixth resistor, and the third capacitor is connected in parallel with the eighth and tenth MOSFETs. The drain of the sixth MOSFET is connected to the drain of the eighth MOSFET. The gate of the eighth MOSFET is connected to the control signal. The source of the eighth MOSFET is connected to the source of the tenth MOSFET. The gate and drain of the tenth MOSFET are connected to ground. The drain of the sixth MOSFET is connected to the non-inverting input of the second comparator. The source of the seventh MOSFET is connected to the negative input of the second comparator through the seventh resistor. The second comparator outputs a turn-on signal. The switching frequency of the conduction signal is: Among them, the switching frequency of the conduction signal, This is the first proportionality coefficient between the current signal output by the voltage-to-current conversion unit and the current signal generated at the drain of the fifth MOSFET. This is the second proportionality coefficient between the current signal output by the voltage-to-current conversion unit and the current signal generated at the drain of the sixth MOSFET. This is the resistance value of the sixth capacitor. This is the capacitance value of the third capacitor.

5. The synchronous buck control chip according to claim 1, characterized in that, The slope compensation module includes: an eleventh MOSFET, a twelfth MOSFET, a thirteenth MOSFET, a fourteenth MOSFET, a fifteenth MOSFET, a sixteenth MOSFET, a seventeenth MOSFET, an eighteenth MOSFET, a nineteenth MOSFET, a twentieth MOSFET, a twenty-first MOSFET, a twenty-second MOSFET, an eighth resistor, a ninth resistor, a tenth resistor, and a fourth capacitor; The sources of the eleventh, twelfth, thirteenth, fourteenth, fifteenth, and sixteenth MOSFETs are connected to the second power supply; the gate and drain of the eleventh MOSFET are connected, and its gate is connected to the gates of the twelfth and thirteenth MOSFETs; the drain of the twelfth MOSFET is connected to the gates of the fourteenth, fifteenth, and sixteenth MOSFETs; the drain of the eleventh MOSFET is connected to the drain of the seventeenth MOSFET; the drain of the eighteenth MOSFET is connected to the drain of the twelfth MOSFET; the drain of the thirteenth MOSFET is connected to the drain of the nineteenth MOSFET; and the drain of the fourteenth MOSFET is connected to the twentieth MOSFET. The drain of the MOSFET is connected; the drain of the sixteenth MOSFET is grounded through the fourth capacitor; the drains of the seventeenth and eighteenth MOSFETs are grounded through the eighth and ninth resistors, respectively; the source of the nineteenth MOSFET is grounded; the source of the twentieth MOSFET is grounded through the tenth resistor; the gate of the twentieth MOSFET is connected to the gate of the nineteenth MOSFET; the drain of the twentieth MOSFET is connected to the drain of the twenty-first MOSFET; the source of the twentieth MOSFET is connected to the source of the twenty-first MOSFET; the gate of the twenty-first MOSFET is connected to the drain of the twenty-second MOSFET; the gate of the twenty-second MOSFET is connected to the clock signal; and the source of the twenty-second MOSFET is grounded. The gate of the 22nd MOSFET pulls down the voltage of the upper plate of the fourth capacitor according to the clock signal, generating a sawtooth wave voltage signal and producing a slope compensation voltage.

6. The synchronous buck control chip according to claim 1, characterized in that, The protection circuit module includes an over-temperature protection circuit and an under-voltage protection unit; The over-temperature protection unit includes a positive temperature coefficient circuit, a negative temperature coefficient circuit, and a temperature coefficient comparator circuit. When the voltage signal output by the positive temperature coefficient circuit is less than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a low-level signal. When the voltage signal output by the positive temperature coefficient circuit is greater than the voltage signal output by the negative temperature coefficient circuit, the temperature coefficient comparator circuit outputs a high-level signal, and the control chip is turned off. The undervoltage protection unit includes a resistor divider circuit, a comparator circuit, and a digital circuit. The resistor divider circuit acquires the input voltage signal, and the comparator circuit compares the input voltage signal with a preset voltage signal. When the input voltage signal is lower than the preset voltage signal, the digital circuit controls the buck converter module to disconnect the power supply.

7. An application circuit for a synchronous buck control chip, characterized in that, include: Synchronous buck control chip, fifth capacitor, sixth capacitor, twenty-third MOSFET, first diode, seventh capacitor, twenty-fourth MOSFET, second diode, second inductor, eleventh resistor, eighth capacitor, ninth capacitor, twelfth resistor, thirteenth resistor, fourteenth resistor, fifteenth resistor, sixteenth resistor, seventeenth resistor, eighteenth resistor, nineteenth resistor, tenth capacitor, eleventh capacitor, and twelfth capacitor; The first current detection positive input pin and the first current detection negative input pin of the synchronous buck control chip are connected to the two ends of the nineteenth resistor; the chip power supply pin of the synchronous buck control chip is connected to the input voltage source through the fifth and sixth capacitors in parallel; the output voltage adjustment pin of the synchronous buck control chip is grounded through the thirteenth resistor; the frequency adjustment pin of the synchronous buck control chip is grounded through the fourteenth resistor; the maximum input current setting pin of the synchronous buck control chip is grounded through the fifteenth resistor; the maximum output current setting pin of the synchronous buck control chip is grounded through the sixteenth resistor; the MOS drive circuit power supply pin of the synchronous buck control chip is grounded through the twelfth capacitor; the ground pin of the synchronous buck control chip is connected to ground; the error amplifier output pin of the synchronous buck control chip is grounded through the tenth capacitor, which is connected in parallel with the seventeenth and eleventh resistors. The voltage feedback pin of the synchronous buck control chip is grounded through the eighteenth resistor and connected to the twelfth resistor; the second current detection positive input pin and the second current detection negative input pin of the synchronous buck control chip are connected to the eleventh resistor, and the eighth capacitor and the ninth capacitor are connected to ground in parallel; the buck-down MOSFET drive pin of the synchronous buck control chip is connected to the gate of the twenty-third MOSFET, and the drain and source of the twenty-third MOSFET are connected through the first diode; the buck-up MOSFET drive pin of the synchronous buck control chip is connected to the gate of the twenty-fourth MOSFET, and the drain and source of the twenty-fourth MOSFET are connected through the second diode, and the drain of the twenty-fourth MOSFET is connected to the second inductor; the bootstrap power supply pin of the synchronous buck control chip is connected to the buck circuit switch detection pin through the seventh capacitor; the output voltage pin of the synchronous buck control chip outputs the buck voltage signal.

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